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Chapter 4  

Combinational and Sequential Circuit

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Topics

• Combinational Circuit and Sequential Circuit Criterions

• Some Examples of Combinational Circuit: Parallel Adder, Decoder, etc

• Some Examples of Sequential Circuits: Flip-flop, Register, Serial Adder, etc.

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Combinational vs Sequential Circuit

A

B

F

C

D

Combinational Circuit- output determined

solely by inputs

Sequential Circuit- output determined by

inputs AND previous outputs

A

B

F

C

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• Combinational Logic circuit contains logic gates where its output is determined by the combination of the current input, regardless of the output or the prior combination of input.

• Basically, combinational circuit can be depicted by Diagram 1 below:n input m outputcombinational

circuit

• Examples of Combinational circuits in the computer system are decoder, parallel adder, and multiplexer. 

(Note: Students are encouraged to obtain examples of combinational circuits stated above)

Combinational Circuit

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• Sequential Logic Circuit contains logic gates arranged in parallel and its output is not only determined by the combination of the current input, but also the prior output.

• The circuit also contains memory elements that enable it to store the information of the prior output.

Sequential Circuit

n input m outputsequentiallogic circuit memory

elements

• Examples of sequential circuits in the computer system are like registers, counters and serial adders.

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Some Examples of Combinational Circuit: Parallel

Adder, Decoder, etc• The circuits learnt in chapter 3 are combinational circuits. The steps to design combinational circuits are as the following:

1.  Understand the problem2. Determine the number of input and output variables that are needed3. Give symbols for the stated input and output4. Construct a truth table that defines the relationship between the input and output 5. Obtain the Boolean function or the logical

expression from the truth table in (4) using Karnaugh Map or other known methods.

6. Draw a logic circuit based on the expression obtained from (5) above.

(Note : Alarm System in Chapter 3 is an example of designing a combinational circuit )

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• Adder is based on the addition of the binary system. For example, 1+0=1, 1+1=10, 1+1+1=11

• There are 2 kinds of addition, which are identified to be half addition and full addition.

• Half addition is the addition of 2 bits data (doesn’t involve carry) that produces 2 bits outputs, that is the result and the carrier. For example, 1 + 1 = 0 carry 1

• Full addition is the addition of 3 bits data (2 bits data and 1 bit carry) that produces 2 bits outputs (sum and carry).

• Logic circuit for half addition is known as Half Adder while the logic circuit for full addition is known as Full Adder.

Adder

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Designing a Circuit for Half Adder

The steps are as below:1. Problem: to build a logic circuit for the addition of

2 bits data2. Number of input : 2; Number of output : 23. Variables for input: x and y

Variables for output : s (sum) and c (carry)4. The Truth Table for the problem :INPUT OUTPUT

x y s c

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1

9

0 1

0

1

xy

1

1

_ _s = x y + x y = x y

For s

0 1

0

1

xy

1

c = x y

For c

5. The expressions for s and c using Karnaugh Map

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6. A logic circuits for Half Adder (HA)

x

y

_ _s = xy + xy

c = xy

ORx

y

x y = s

xy = c

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A Block Diagram for HA is as below:

x

y

s

c

HAinput output

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Designing a Circuit for Full Adder (FA)

The same method used to design HA.

1.Problem: Build logic circuit for the addition of 3 bits data

2.Number of input : 3 Number of output : 23.Variables for input: x , y and ci

Variables for output : s (sum) and co (carry)

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INPUT OUTPUT

x y ci s co

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1

 5. Obtain the expression for r and co using Karnaugh Map

(Students are required to try this out themselves):

  will obtain s = x y pi + x y ci + x y ci + x y ci

= x y ci

and co = x y + y ci + x ci

4. The truth table for the problem :

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6. Draw the circuit for FA (Students are required to try this out themselves):

Generally, the block diagram for FA is shown as below :

x

y

s

FAinput output

co ci

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To construct a 4-bit parallel adder, 3 FA and 1 HA are required like the diagram below with the input as X = x3x2x1x0 and Y = y3y2y1y0 (X and Y are binary numbers 4-bit) and the output (addition result) is s3s2s1s0.

x3 y3

FA FAFA HA

x2 y2 x1 y1 x0 y0

c3 s3

c0

s0

c2 c1

s2 s1

INPUT

OUTPUT

x3 y3

FA FAFA FA

x2 y2 x1 y1 x0 y0

c3 s3

c0

s0

c2 c1

s2 s1

INPUT

OUTPUT

0or

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Some Examples of Sequential Circuits: Flip-flop, Register, Serial

Adder, etc.• Sequential circuits are a kind of logic circuit where

the current output not only depends on the current input but also on the past history of inputs.

• Another and generally more useful way to view it is that the current output of a sequential circuit depends on the current input and the current state of that circuit.

• The simplest form of sequential circuit is a flip-flop. Flip-flop is a kind of logic circuit that is capable of exhibiting 2 stable conditions.

• It is also known as 1-bit memory element and is mostly used to make important computer components such as registers, counters, memory etc.

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• There are a variety of flip-flops, all of which share two properties:

 1. The flip-flop is a bistable device either 0 or 1. It exists in one of two states and, in the absence of input, remains in that state. Thus, the flip-flop can function as a 1-bit memory.

2. The flip-flop has two outputs, which are always the complements of each other. These are generally labeled Q and Q.

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• Table 1 shows symbolic graphic and feature table for three types of flip-flop that are S‑R, J‑K and D flip‑flops.

• Flip-flop is a form of memory element used to construct sequential circuits that are more complex, such as registers etc. Sequential circuits can be divided into:

  1. Synchronous 2. Asynchronous•  In synchronous sequential circuit, all flip‑flops are

moved by the same clock pulse so that all flip‑flops involved change simultaneously.

• In asynchronous circuit, the change of flip‑flop condition depends on the change that occurs on the input and the late time that is in the circuit.

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Clock

S Q

R Q

Clock

J Q

K Q

Clock

D Q

Q

Name Graphical Symbol Feature Table

S-R

  S R Qn+1

0 0 Qn

0 1 0

1 0 1

1 1 -

J-K

   

    

J K Qn+1

0 0 Qn

0 1 0

1 0 1

1 1 Change condition

D

    

D Qn+1

0 0

1 1

Table 1: Basic Flip-flops

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S‑R Flip‑flop• S‑R flip‑flop has 2 inputs, S (set) and R (reset) like

Diagram 3 below. In the diagram below, (also for JK and D flip-flops), they used another input called clock. It is to control the movement of input that is input will only occur when given a clock pulse (synchronous circuit)

• The features of S‑R flip‑flop can be depicted in Table 2 below. It can be summarized that:

1. If the value of both S and R are 0, the flip‑flop will remain in its present condition (either 0 or 1).

2. If S = 0 and R = 1 (reset), then the flip‑flop condition will change to 0 (its output, Q = 0).

3. If S = 1 (set) and R = 0, then the flip‑flop condition will change to 1 (output, Q = 1).

4. This circuit does not allow combinational input of input S = 1 and R = 1.

S R Qn Qn+1

0 0 0 0

0 0 1 1

0 1 0 0

0 1 1 0

1 0 0 1

1 0 1 1

1 1 0 -

1 1 1 -Table 2 : Feature table of S-R Flip-flop

1

2

3

4

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clock

S

R

Q

Q

Diagram 3 : S-R Flip-flop

control the movement of input

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J-K Flip-flop•  J-K flip-flop also has 2 inputs, J and K. The function of

clock is same as S‑R flip‑flop. Unlike S‑R flip‑flop, J‑K flip‑flop allows all combination of inputs.

• It can be observed that J‑K flip-flop is built to address the input problem of S = R = 1 in S‑R flip-flop. Features 1 till 3 are same as S‑R flip-flop.

• Table 3 shows the features of J‑K flip‑flop. From the table, it can be summarized that:1. If J = 0 and K = 0, it will

maintain the flip‑flop condition like before

2. If J = 0 and K = 1, it will cause flip‑flop to change to condition 0 (reset).

3. If J = 1 and K = 0, it will cause flip‑flop to change to condition 1 (set).

4. If J = 1 and K = 1, it will change the flip‑flop condition, that is it will become complementary to the initial or prior condition

J K Qn Qn+1

0 0 0 0

0 0 1 1

0 1 0 0

0 1 1 0

1 0 0 1

1 0 1 1

1 1 0 1

1 1 1 0

1

2

3

4

Table 3: Features table of J-K flip-flop

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Clock

J

K

Q

Q

Diagram 4: J-K Flip-flop

The logic circuit for J-K flip-flop is shown in Diagram 4 below.

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D Flip‑flop

• Logic circuit for D flip‑flop is shown in Diagram 5. This flip‑flop only has one input that is D.

• The clock function is same as S‑R and J-K flip‑flops. The features of D flip‑flop can be illustrated by Table 4.

• From the table, it can be seen that this flip‑flop produces the same output as its input regardless of the condition of the stated flip-flop.

• This feature is very suitable to be used as memory element and this flip-flop is mostly used to make registers and computer memory (RAM)

D Qn Qn+1

0 0 0

0 1 0

1 0 1

1 1 1

Table 4 : Feature table of D Flip-flop

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clock

D

Q

Q

Diagram 5 : D Flip-flop

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Examples of Flip-flop (Sequential Circuit) usage

• As priory stated, flip-flop is an example of the simplest form of sequential circuit. It is also a form of memory element where a flip-flop can store 1 bit of data. In this section, examples of sequential circuits that use flip-flop will be given:

1. Register 2. Adder

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Register• Register is an important component in the computer.

Generally, it can be categorized into:1. Storage Register (or Parallel Register)

2. Shift Register (or Serial Register)• Parallel register is made up of a set of 1-bit (flip-flop)

that can be written on and read simultaneously. • This register is used to store data (output=input). The

amount of flip-flop used depends on the size of the register that is to be built.

• If a parallel register that can store 8 bits of data is to be built, then 8 flip-flops are needed.

• Diagram 6 below is a 4 bit parallel register that uses flip-flop D.

(Note: all kinds of flip-flop can be used to build storage register, but

its circuit will differ because every flip-flop has its own features)

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Clock

D Q

I2

Clock

D Q

I1

Clock

D Q

I4

Clock

D Q

I3

Q1 Q2 Q3 Q4

ClockPulse

_Q

_Q

_Q

_Q

Diagram 6: A 4-bit parallel register that uses D Flip-flop

• Diagram 6 below is a 4 bit parallel register that uses flip-flop D.

(Note: all kinds of flip-flop can be used to build storage register, but its circuit will differ because every flip-flop has its own features)

• In the above diagram, 4 bits of input is admitted simultaneously, that is I1, I2, I3 and I4, whereas its output is also is simultaneous or parallel, that is Q1, Q2, Q3 and Q4.

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• In shift register, only one output is produced at a time.

• There are 2 types of shift register that is shift to right and shift to left.

• Shift to right register means the rightmost bit of the stated will be taken out first followed by the following bits after a given clock beat.

• It’s vice versa for move to shift to left register. Diagram 7 below is an example of 4-bit shift to right register that utilizes J-K flip-flop.

Output

Clock

J Q

K

Clock

J Q

K

Clock

J Q

K

Clock

J Q

K

Input

Clock Pulse

_Q

_Q

_Q

_Q

Diagram 7: Shift to Right Register Using J-K Flip-flop

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Parallel Adder

• In the computer environment, there are 2 types of adders:

1.  Parallel Adder 2.  Serial Adder• Parallel adder is an adder that performs addition

concurrently for each bit involved. • Adder in section 4.2 is called a serial adder. • Serial Adder performs addition bit by bit starting

with the rightmost bit, followed by the following bits.

• Diagram 8 below is an example of a serial 4-bit adder.

• This adder uses two Shift to Right Registers, X and Y to hold operand 1 (A = A3A2AIA0) and operand 2 (B = B3B2B1B0), a full adder and a flip‑flop (usually D flip-flop) to hold the carrier value.

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• The addition process in the adder are as below : X = X + Y

  that is the X and Y registers will hold operand 1 and operand 2 and the addition result will be kept in the X register.

• Hence, in the addition, the value in the Y (Operand 2) register cannot change while the X register holds the addition result (the value of operand 1 will be lost)

 

Note: observe and understand the data movement in the stated circuit after every clock pulse is given.

A3 A2 A0A1

B3 B2 B0B1

FullAdder

Ai

Bi

Ci

Ci+1

Si

D flip-flopCarry

Y Register

X Register

Clock Pulse

Diagram 8 : 4-bit Serial Adder