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Chapter 7 Design Implementation

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Overview

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Main Steps of an FPGA Design’s Implementation Design architecture

Defining the structure, interface and relationship between system functional blocks

Design entry HDL (VHDL, Verilog) MATLAB, Simulink, C, or C++

Logic synthesis Converting VHDL/Verilog code to a gate-level

netlist specific to a target device

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Main Steps of an FPGA Design’s Implementation (cont’)

Place and route Determines where registers and gates

are placed within an FPGA’s “fabric” Design entry and logic synthesis

~~ front-end Place and route and configuration

bit-file generation ~~ back-end

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Design Architecture Synchronous design

A critical FPGA design implementation method

Can be used to develop stable, reliable FPGA designs

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Design Architecture (cont’) Synchronous design advantages

Simplification of timing simulation, static timing analysis and constraints

Increased isolation of internal FPGA functionality from external board-level timing issues

Reduced impacts associated with FPGA component process changes

Simplified design reuse Maximizes access to external design support

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Design Architecture (cont’)

Hierarchical versus flat design Flat design: FPGA design on a single

layer as a single global design implementation

Hierarchical design: FPGA design with multiple design layers and individual design blocks

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Design Architecture (cont’)

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Design Architecture (cont’)

HDL capture of a flat design Is accomplished by defining a single

entity having one priority level Hierarchical design

Reduce HDL code complexity by isolating or encapsulating the design into smaller

More manageable design blocks

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Design Entry Popular methods

Schematic capture Hardware description language (HDL)

Synthesis: the process of translating a design into a register, transfer level (RTL)

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HDL Abstraction A significant advantage of HDL-based

design is the abstraction of complex hardware functionality

Abstraction is a technique for reducing the underlying complexities of a design

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VHDL and Verilog VHDL and Verilog were both developed

in the 1980’s to allow the implementation of technology independent text-based circuit description

VHDL (similar to ADA software language)

Verilog is similar in structure and format to the C software language

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VHDL and Verilog Code Example

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Q & A

To be continui

ng