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EE462L, Spring 2014Isolated Firing Circuit for

H-Bridge Inverter

(partially pre-Fall 2009 approach)

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Isolation is needed because we have three separate MOSFET source nodes, and these three nodes are ground references for the respective firing circuits

One logic signal toggles A+,A–

One logic signal toggles B+,B–

Vdc(source of power delivered to load)

Load

A+ B+

A– B–

Local ground reference for A+

firing circuit

Local ground reference for B+

firing circuit

Local ground reference for B−

firing circuit

Local ground reference for A−

firing circuitS

S

S

S

!

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8 5 Comp

1 4

270kΩ

VtriVcont

–Vcont

270kΩ

1kΩ

1.5kΩ

1.5kΩ

V(A+,A–)

–12Vfrom DC-DC chip

+12Vfrom DC-DC chip

Common (0V) from DC-DC chip

+12V

–12V

Comparator Gives V(A+,A–) wrt. Common (0V)

Vcont > Vtri

Vcont < Vtri

+24V

0V

Vcont > Vtri

Vcont < Vtri

Use V(A+,A–) wrt. –12V

Output of the Comparator Chip

Since the comparator compares signals that can be either positive or negative, the comparator must be powered by ±V supply

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8 5 Comp

1 4

270kΩ

VtriVcont

–Vcont

270kΩ

1kΩ

1.5kΩ

1.5kΩ

V(B+,B–)

–12Vfrom DC-DC chip

+12Vfrom DC-DC chip

Common (0V) from DC-DC chip

+12V

–12V

Comparator Gives V(B+,B–) wrt. Common (0V)

–Vcont > Vtri

– Vcont < Vtri

+24V

0V

– Vcont > Vtri

– Vcont < Vtri

Use V(B+,B–) wrt. –12V

Output of the Comparator Chip

Since the comparator compares signals that can be either positive or negative, the comparator must be powered by ±V supply

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AC wall wart (marked with yellow paint)

DC wall wart

V(A+,A−) control signal

V(B+,B−) control signal

Reference (is −12V from DC-DC chip)

The control signals at the open-circuited output of the PWM control circuit are +24V, or 0V

When V(A+,A−) is 24V, MOSFET A+ is on, MOSFET A− is off

When V(A+,A−) is 0V, MOSFET A+ is off, MOSFET A− is on

MOSFETs B+ and B− work the same way with V(B+,B−)

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Figure 14. Output control voltage V(A+,A–) on top, and V(B+,B–) on bottom, with respect to protoboard –12V reference, with ma > 0 (the situation shown is where Vcont is negative)

Figure 13. Output control voltage V(A+,A–) on top, and V(B+,B–) on bottom, with respect to protoboard –12V reference, with ma > 0 (the situation shown is where Vcont is positive)

Save screen snapshot #3

0V

+24V

0V

+24V

0V

+24V

0V

+24V

Look for symmetry of pulse centers

Look for symmetry of pulse centers

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One firing circuit for each MOSFET, with each firing circuit mounted on a separate protoboard. Protoboards

A– and B – can share a power supply and ground . A +

and B + must each use separate power supplies and grounds. Do not connect any of these grounds to the ground of the control circuit.

O+ O– (see Figure 2 for connections)

Powered by +12V that is isolated from the PWM control circuit

10kΩ

0.1µF 10Ω 1.2kΩ

MOSFET

G D S

100kΩ

5 4

Opto

8 1

5 4

Driver

8 1

Outline of protoboard

A+ and B+ use inverting drivers

(1426’s). A– and B– use non -inverting drivers (1427’s) . The optocouplers provide an additional inversion.

green

green

green

blue for A+,B+,

violet for A–,B–

blue

blue

red

blue

Grounds (isolated from control circuit)

Wait until next week

Switching diode

14mA

Optocoupler is current-controlled. Gate current turns on the transistor, which pulls down the collector voltage.

Isolating barrier

Once the MOSFET is connected, this asymmetrical circuit will add blanking by making the turn-on slower than the turn-off. (blanking is the opposite of overlap)

Overlap is the time that A+ and A− are simultaneously “on,” which should be avoided. Hence, some blanking (time between one turning off and the other turning on) is desirable.

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14mA from control circuit

10kΩ

+12V

+

Vdriver = 0V

–

Isolatingbarrier

14mA to Opto Input Yields ≈ 0V to Input of Driver Chip, so Inverting Driver Chip Turns MOSFET ON

To driver

1.2mA (will pull down Vdriver to zero)

Spec. sheet current transfer ratio 0.2 to 0.3 (times 14mA)

!

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10kΩ

+12V

+

Vdriver = 12V

–

0mA

Isolatingbarrier

0mA to Opto Input Yields 12V to Input of Driver Chip, so Inverting Driver Chip Turns MOSFET OFF

To driver

0mA from control circuit

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A+

Firing A–

Firing B+

Firing B–

Firing

Control Circuit from Previous Lab

Jack for DC wall

wart

Figure 2. Physical layout of firing circuits

(A+ opto and driver are powered by a +12V isolated DC converter chip. Likewise, B+ is powered

by another +12V isolated DC converter chip. A– and B– are powered by the DC wall wart.)

Individual protoboard for each firing circuit

Optically-isolated firing circuits. Mount drivers near the MOSFETs

O+ O– O+ O– O+ O– O+ O–

V(A+,A–) V(B+,B–)

–12Vdc regulated

blue

blue blue

violet violet

Jack for AC wall

wart

8”

We use the control signals to send 14ma through optocouplers on each of the four firing circuit boards

A+ and A− are daisy chained

B+ and B− are daisy chained

(for complementary outputs)

So, each 14mA control signal passes through two optocouplers in series

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• 24V control signals from the comparators, less 3.2V drop across two series optocoupler LEDs, and with 14mA, requires about 1.5kΩ of resistance in series with the daisy-chained optocouplers

With 14mA, the LED of each optocoupler has about 1.6V drop

• If applied half the time, 24V across a 1.5kΩ resistor would produce about 0.2W. So, it is a good idea to size up to ½W resistors.

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Thus, you use ½W series resistors between the comparator chip and the output terminals

8 5 Op Amp 1 4

7 1 Waveform Gen.

8 14

0.01µF 100kΩ

Approx 22kHz triangle wave

Filtered and buffered

triangle wave

High-pass filter to block DC

8 5 Comp

1 4

1.5kΩ, ½W

270kΩ

1.5kΩ, ½W

1kΩ

+12Vdc regulated from 2W, DC converter chip

V(A+,A–) V(B+,B–)

red

green

blue

blue

red

These ½W resistors can get hot - keep them off the surface of the protoboard

1kΩ trimmer

Vcont

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Layout of inverter control circuit and isolated firing circuits

AC wall wart (marked with yellow paint)

DC wall wart

A+ A− B+ B−

No MOSFETs connected yet (i.e., the drivers are open-circuited)

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• Keep the 0.1µF capacitors across the drivers to prevent driver failure

• Use the same pattern for B+ and B–

• One DC converter chip feeds A+

• Another DC converter chip feeds B+

• Wall wart feeds A− and B−

DC converter chip

feeds A+ circuit

Inverting driver

for A+ (1426’s) Non-inverting driver

for A– (1427’s)

Wall wart feeds A– circuit

12V

rai

l fed

by

DC

con

vert

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hip

12V

rai

l fed

by

wal

l war

t

grou

nd r

ail f

ed b

y 0V

out

put p

in o

f D

C c

onve

rter

chi

p

grou

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all w

art

Zoom-in view of A+ and A– isolated firing circuits

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wall wart input

chip output

− + − +

Side view of A+ and A– isolated firing circuit and single 12V isolated DC-DC converter chip that powers A+

Socket each single DC-DC converter chip, using one half of an 8-pin SIP socket.

Carefully break an 8-pin SIP socket in half. Do this by clamping on one-half with your long-nose pliers, and then bending the other half down with your fingers. It should be a clean break.

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V(A+,A–)

Opto A+ output

Save screen snapshot #1

0.5V

3.2V

Input and Output Voltages of Optocoupler

Vcont = 0 (i.e., ma = 0) in this Snapshot

12V

0V

Opto Input (the 1.5kΩ resistor drops the voltage from 24V to 3.2V)

As expected, the opto output is inverted

This phototransistor turn off delay will limit your PWM operating frequency

Phototransistor turning on

Phototransistor turning off

Look for Symmetry Among all Four Circuits

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Different time-constants to avoid shoot-through (i.e. to provide a “dead-time”)

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Look for Nearly Perfect Alignment Between V(A+,A−) Signal to Optocoupler, and Output of A+ Inverting Driver Chip

V(A+,A–)

A+ driver output

In phase

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Look for Nearly Perfect Out of Phase Alignment Between V(A+,A−) Signal to Optocoupler, and Output of A− Non-Inverting Driver Chip

V(A+,A–)

A– driver output

Out of phase

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Now the present circuit based on PCBs:

20Key new component: IRS21844

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IRS21844

High output

Low output

Actual pinout

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IRS21844

Blanking time and isolation already integrated in a single IC