1

Effects of Parasitic Components in High-

Frequency Resonant Drivers for Synchronous Rectification

MOSFETs

Department of Information Engineering – DEI Department of Information Engineering – DEI University of Padova, ITALYUniversity of Padova, ITALY

Speaker: Giorgio Spiazzi

2

Outline

• Review of voltage source driver topologyReview of voltage source driver topology• Analysis of resonant voltage source driver Analysis of resonant voltage source driver

topologiestopologies– Unclamped turn-on and clamped turn-offUnclamped turn-on and clamped turn-off– Clamped turn-on and clamped turn-offClamped turn-on and clamped turn-off– Unclamped turn-on and unclamped turn-Unclamped turn-on and unclamped turn-

offoff• Analysis of parasitic component effectsAnalysis of parasitic component effects

3

Voltage Source Topology

+Vdd

S1

S2

Rch

M

Dissipative driverDissipative driver

CR

t

CoffgonCoffCone1VVVtv

Vgon

+

Ron

C+

vC(t)

i(t)

RRonon = R = RDSon(S1)DSon(S1)+R+Rchch+R+Rgg

4

Possible energy Possible energy recovery to output in recovery to output in

VRM applicationsVRM applications

Resonant Driver DR1

Vdd

Vo

+

+

S1

S2

Db1

Db2

Dc1

Lext M

UnclampedUnclamped turn-on and turn-on and clampedclamped turn-off turn-off

5

Resonant Driver DR1

UnclampedUnclamped turn-on and turn-on and clampedclamped turn-off turn-off

triTontfu

VConIpk_p

VCoff

Ipk_n

t

vC(t)i(t)

I1

Toff

ig(t)

Vdd

Vo

+

+

S1

S2

Db1

Db2

Dc1

Lext M

vC

+

-

i(t)

6

Resonant Driver DR1

TTurn-on phaseurn-on phase

triTontfu

VConIpk_p

VCoff

Ipk_n

t

vC(t)i(t)

I1

Toff

ig(t)

Vdd

+ S1 Db1

RDSon

C

Lext

M

Lint +VDb RLp Rg

Vgon

+

Ron L

C+

vC(t)i(t)

on

oon R

ZQ

C

LZo

on

oon

Q2L2

R 2

ono

Q4

11

Resonant circuit parametersResonant circuit parameters

7

Resonant Driver DR1

tsine

Q4

11Z

VVti t

2on

o

Cog

tcos

Q4

11Q2tsine

Q4

11Q2

VVVtv 2

onon

t

2on

on

CoggC

Inductor current and capacitor voltageInductor current and capacitor voltage

onQ2CoffgongonCononC eVVVVTv

Final capacitor voltageFinal capacitor voltage

tsineZ

VVti o

tQ2

o

Cog on

o

tcostsin

Q2

1eVVVtv oo

on

tQ2

CoggCon

o

If QIf Qonon>>1:>>1:

8

Unclamped Resonance

0.2

0.4

0.6

0.8

1

0

3

3

2

3

43

5 20

0.4

0.8

1.2

1.6

2

0

Q = 1000

Q = 10Q = 5

Q = 2

Q = 1

Q = 0.5

[VN][IN]

Normalized capacitor voltage and inductor current as a Normalized capacitor voltage and inductor current as a function of function of oot for different Q valuest for different Q values

(v(vCC(0) = 0, V(0) = 0, VNN = V = Vgongon, I, INN = V = Vgongon/Z/Zoo) )

oonT

TTonon

9

Unclamped Resonance

0.2

0.4

0.6

0.8

1

0

1.2

1.4

1.6

1.8

2

1

[VN][]

0.1 1 10 100Q

Normalized final Normalized final capacitor voltagecapacitor voltage

NONres

res

P

P

Ideal performance comparison between a voltage Ideal performance comparison between a voltage source and an unclamped resonant driverssource and an unclamped resonant drivers

0.50.5

10

Unclamped Resonance

• High Q means high L, that means lower High Q means high L, that means lower resonant frequency, i.e. higher turn on intervalresonant frequency, i.e. higher turn on interval

• Minimum loss resistance is the SR gate internal Minimum loss resistance is the SR gate internal resistance Rresistance Rgg

swo

on TLCT

C

TL 2

2sw

C

T

CL

Z swo

don

oon Q

R

ZQ

CQ

TR

d

swon

k11

lnC

TR sw

onFor a voltage source topology:For a voltage source topology:gon

Con

VV

k

11

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 50.01

0.1

1

10

100100

0.08

R v f( )

R r f 4( )

R r f 2( )

R r f 1( )

50.01 f0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5

0.01

0.1

1

10

100

ffswsw [MHz] [MHz]

RRonon [ []]

Voltage source Voltage source topologytopology

Unclamped Unclamped resonance resonance topologytopology

Q = 4Q = 4

Q = 2Q = 2Q = 1Q = 1

Maximum Ron

Q = 0.5Q = 0.5RRon_minon_min

= 0.05, k = 0.8, R= 0.05, k = 0.8, Ron_minon_min = 1 = 1, C = 10nF, C = 10nF

12

Vgoff

+

Roff-Rg L

C+

vC(t)

i(t)

Rg

+VDc

ig(t)

Resonant Driver DR1

TTurn-off phaseurn-off phase

triTontfu

VConIpk_p

VCoff

Ipk_n

t

vC(t)i(t)

I1

Toff

ig(t)

Vgoff

+

Roff L

C+

vC(t)i(t)

13

DR1 Characteristics

• both switches S1 and S2 turn on and off at zero current;• the control signals of S1 and S2 have no critical timing, the only

requirement being to avoid any cross conduction;• the switching times of S1 and S2 have no influence in the

circuit behavior;• S1 and S2 body diodes are not used (they have high voltage

drop and bad reverse recovery behavior);• switch lead inductances as well as any parasitic inductance

due to traces and layout simply add to the external inductance (they are actually exploited by the circuit);

• different Ton and Toff times can be easily achieved;• Toff interval duration as well as the amount of recovered

energy depends on Vo value (disadvantage);• S2 command signal must be suitably higher than Vo to

completely turn it on (disadvantage). • No low impedance paths during on and off intervals

14

Resonant Driver DR2

DDc1c1 and D and Dc2c2 can be substituted by MOSFETs, can be substituted by MOSFETs, thus ensuring a low impedance path to Vthus ensuring a low impedance path to Vdddd an an to ground during on-time and off-timeto ground during on-time and off-time

tritfi

Ton

Toff

tfu

VCon

Ipk_p

VCoff

Ipk_n

ttru

tfwtfw

vC(t)i(t)

I2

I3

ig(t)

ClampedClamped turn-on and turn-on and clampedclamped turn-off turn-off

+Vdd

S1

S2 Dc1

Dc2

Lext

M

15

Vgon

+

Ron L

C+

vC(t)i(t)

Vdd

+RLp L

C+

vC(t)

i(t)

Rg+

VDc

ig(t)

+VD2

Vdd

+Ron-Rg L

C+

vC(t)

i(t)

Rg+

VDc

ig(t)

Resonant Driver DR2

tritfi

Ton

Toff

tfu

VCon

Ipk_p

VCoff

Ipk_n

ttru

tfwtfw

vC(t)i(t)

I2

I3

ig(t)

Turn-on phaseTurn-on phase

16

DR2 Characteristics

• both S1 and S2 switches turn on at zero current, but they turn off almost at the inductor peak current;

• the control signals of S1 and S2 have critical timing, having to minimize the freewheeling intervals tfw, in order not to adversely affect the overall efficiency;

• the switching times of S1 and S2 have a great influence on the circuit behavior, causing a significant power loss at turn off (see point 1) as well as increase of Ton and Toff intervals;

• S1 and S2 body diodes are involved during the recovery of the inductor energy;

• switch lead inductances as well as any parasitic inductance due to traces and layout have a great impact on the circuit behavior, since they cause high frequency parasitic oscillations at turn off and delay S1 and S2 turn off times;

• VCon value is easily controlled by the supply voltage Vdd (advantage)

17

Resonant Driver DR3

+Vdd

S1

S2

Db1

Db2

Lext

M

UnclampedUnclamped turn-on and turn-on and unclampedunclamped turn-off turn-off

Ton

Toff

VConIpk_p

VCoffIpk_n

t

vC(t)i(t)

offon

offonon

Q1

Q1

2

Q2Q2goff

Q2gon

Con

e1

e1eVe1V

V

offon

onoffoff

Q1

Q1

2

Q2Q2gon

Q2goff

Coff

e1

e1eVe1V

V

18

DR3 Characteristics

Same considerations as DR1. Moreover:

• high VCon values can be achieved with very low supply voltage Vdd;

• Vdd value must be higher than the threshold voltage of S1 (p-channel MOSFET) in order to fully turn it on;

• the driver needs some oscillating cycles in order to achieve a steady state operation

19

Losses Comparison

• SS1,21,2 = IRF7319 = IRF7319• DDb1,2b1,2, D, Dclcl, and D, and Dc1,2c1,2 = STPS1L40U = STPS1L40U • Switching frequency: fSwitching frequency: fswsw = 1.8MHz = 1.8MHz• Maximum diode voltage drop: VMaximum diode voltage drop: VDcDc = V = VDbDb = 0.63V = 0.63V• External inductance parasitic resistance: RExternal inductance parasitic resistance: RLpLp = 200m = 200m• External inductance: LExternal inductance: Lextext = 30nH (DR1), L = 30nH (DR1), Lextext = 35nH = 35nH

(DR2), L(DR2), Lextext = 30nH (DR3) = 30nH (DR3)• Internal gate resistance: RInternal gate resistance: Rgg = 0.25 = 0.25• Equivalent gate capacitance: C = 10nFEquivalent gate capacitance: C = 10nF• Supply voltage: VSupply voltage: Vdddd = 5V (DR1), V = 5V (DR1), Vdddd = 6.8V (DR2), V = 6.8V (DR2), Vdddd = =

3.85V (DR3)3.85V (DR3)• VRM output voltage for DR1: VVRM output voltage for DR1: Voo = 1.3V = 1.3V

Driver parameters:Driver parameters:

20

Losses Comparison: calculations

Details of Losses Calculation for DR1Details of Losses Calculation for DR1(V(VConCon = 7.41V, L = 7.41V, Lextext = 30nH, V = 30nH, Vdddd = 5V, V = 5V, Voo = 1.3V) = 1.3V)

Pdd

[mW]

PDb1,2

[mW]

PDcl

[mW]

PR [mW] Po [mW] PLoss

[mW]

Ton, Toff

[ns]

Ipk

[A]

PTot_loss

[mW]

Turn on 724 91 142 233 55 2.28

502

Turn off 103 13 153 212 269 58.3 -2.55

RDS(on)

[]VD [V]

LSint

[nH]

LDint

[nH]Tsw_off [ns]

Qg@ VGS=5V

[nC]

Qg@ VGS=7V

[nC]

IRF 7319p-MOS 0.098 1 4 6 32 13 17

n-MOS 0.046 1 4 6 17 12.5 16.5  

MOSFET SMOSFET S11 and S and S22 parameters parameters

21

Losses Comparison

Pdd [mW] PDb1,2

[mW]

PR [mW] PLoss

[mW]

Ton, Toff [ns] Ipk [A] PTot_loss

[mW]

Turn on 772 126 272 399 54.4 3.16

773Turn off 126 242 374 54.4 -3.17

Details of Losses Calculation for DR3Details of Losses Calculation for DR3(V(VConCon = 7.44V, V = 7.44V, VCoffCoff = -3.71V, = -3.71V, LLextext = 30nH, V = 30nH, Vdddd = 3.85V) = 3.85V)

Details of Losses Calculation for DR2Details of Losses Calculation for DR2(V(VConCon = 7.43V, L = 7.43V, Lextext = 35nH, V = 35nH, Vdddd = 6.8V) = 6.8V)

Pdd

[mW]

Pdd_recovered

[mW]

PD1,2

[mW]

PDcl ,2

[mW]

PR

[mW]

PLoss

[mW]Ton, Toff [ns]

Ipk

[A]

PTot_loss

[mW]

Turn on 967 179 22 51 241 295 56.1 3.2

574Turn off 199 29 36 215 280 50.5 -3.25

22

Losses Comparison

Driver DR2 losses do not include SDriver DR2 losses do not include S11

and Sand S22 switching losses: switching losses:

at at turn-onturn-on: P: Psw_onsw_on = 220mW = 220mW

at at turn-offturn-off: P: Psw_offsw_off = 135mW = 135mW

Total DR1 losses: Total DR1 losses: PPtot_losstot_loss = 502mW = 502mW

Total DR2 losses: Total DR2 losses: PPtot_losstot_loss = 574+355 = 929mW = 574+355 = 929mW

Total DR3 losses: Total DR3 losses: PPtot_losstot_loss = 773mW = 773mW

23

Experimental Waveforms: DR1

vC [2V/div]

vRs [100mV/div]

VGS_n-MOS [1V/div]

vG_p-MOS [1V/div]

vDS_n-MOS [2V/div]

With LWith Lextext

CLoad = 10nF (smd), Rs = 0.1, Ualim = 5V, fsw = 1.8MHz

Rs

Dcl1

+VRs

+VCC

24

Experimental Waveforms: DR1

vC [2V/div]

vRs [200mV/div]

VGS_n-MOS [1V/div]

vG_p-MOS [1V/div]

vDS_n-MOS [2V/div]

Without LWithout Lextext

CLoad = 10nF (smd), Rs = 0.1, Ualim = 5V, fsw = 1.8MHz

Rs

Dcl1

+VRs

+VCC

25

Experimental Waveforms: DR2

vC [2V/div]

vRs [100mV/div]

VGS_n-MOS [2V/div]

vG_p-MOS [2V/div]

vDS_n-MOS [2V/div]

With LWith Lextext

CLoad = 10nF (smd), Rs = 0.1, Ualim = 7.5V, fsw = 1.8MHz

TpNMOS = 58.4ns, TpPMOS = 58.4ns (misurati a 1V)

26

Experimental Waveforms: DR2

vC [2V/div]

vRs [200mV/div]

vG_p-MOS [2V/div]

VGS_n-MOS [2V/div]

vDS_n-MOS [2V/div]

Without LWithout Lextext

CLoad = 10nF (smd), Rs = 0.1, Ualim = 7.5V, fsw = 1.8MHz

TpNMOS = 58.4ns, TpPMOS = 58.4ns (misurati a 1V)

27

Experimental Waveforms: DR3

With LWith Lextext

vC [2V/div]

vRs [100mV/div]

VGS_n-MOS [1V/div]

vG_p-MOS [1V/div]

vDS_n-MOS [2V/div]

CLoad = 10nF (smd), Rs = 0.1, Ualim = 4V, fsw = 1.8MHz

28

Experimental Waveforms: DR3

Without LWithout Lextext

vC [2V/div]

vRs [200mV/div]

VGS_n-MOS [1V/div]

vG_p-MOS [1V/div]

vDS_n-MOS [2V/div]

CLoad = 10nF (smd), Rs = 0.1, Ualim = 4V, fsw = 1.8MHz

29

Effect of Device Parasitic Capacitances

RLp

+vC

C+

Lext

i(t)vCp

Cp

+Vdd

The final capacitor voltage during turn on is lower than The final capacitor voltage during turn on is lower than expected, especially for driver DR2. Why?expected, especially for driver DR2. Why?

Effect of device’s Effect of device’s output capacitancesoutput capacitances

0

2

4

6

8

-2

-4

vC

vDS_n-MOS

iL

[V,A]

Time

VCon

VCoff

Ton_sw = 150ns

X axis scale = 50ns/div

0

2

4

6

8

-2

-4

vC

vDS_n-MOS

iL

[V,A]

Time

VCon

VCoff

Ton_sw = 90ns

VCon_nominal

30

Effect of Device Parasitic Capacitances

Tsw-cond = 60ns

Tsw-cond = 90ns

DR2 Measurements: Vdd = 7V, fsw = 1.8MHz, Lext

= 0

vvcc(t)(t)

[2V/div][2V/div]

Time [100ns/div]Time [100ns/div]

31

Effect of Device Parasitic Capacitances

Pdd [mW] VCon

[V]

VCoff

[V]

Tsw_cond

[ns] Pnom [W]

0.5901 5.93 1.5 64 0.63 0.068

0.6482 5.86 1.28 90 0.62 -0.049

0.7049 6.14 1.23 99 0.68 -0.039

With

Lext

0.7791 6.42 1.17 140 0.74 -0.050

1.0878 6.94 -0.22 140 0.878 -0.255

1.0689 6.8 -0.22 120 0.83 -0.284

1.0437 6.94 0.14 107 0.87 -0.204

0.9408 6.6 0.22 90 0.78 -0.2

Without

Lext

0.6965 5.86 1 60 0.62 -0.127

DR2: Effect of Switch Conduction Time on VCon and VCoff (Vdd = 7V, Rs = 0)

sw2Connom fCVP

nom

ddnom

P

PP

32

DR1 Power Losses at Different Vdd

Vdd

[V]

VCpeak

[V]

VCon

[V]

Pdd

[mW]

Pnom

[W]

3 4.19 3.95 0.264 0.281 0.061

3.5 5.23 4.9 0.375 0.432 0.133

4 6.1 5.72 0.496 0.589 0.158

4.5 6.95 6.5 0.635 0.761 0.166

With Lext

5 7.8 7.34 0.792 0.970 0.184

3 3 2.9 0.197 0.151 -0.298

3.5 4 3.84 0.285 0.265 -0.075

4 4.93 4.72 0.404 0.401 -0.006

4.5 5.88 5.58 0.545 0.560 0.027

Without

Lext

5 6.68 6.42 0.698 0.742 0.059

(Rs = 0, Vo = 0)

33

DR2 Power Losses at Different Vdd

Vdd

[V]

VCpeak

[V]

VCon

[V]

Pdd

[mW]

Pnom

[W]

5 5.62 4.09 0.310 0.301 -0.030

5.5 6.5 4.71 0.384 0.399 0.037

6 7.24 5.22 0.449 0.490 0.084

6.5 7.8 5.54 0.519 0.552 0.060

7 8.34 6 0.594 0.648 0.084

With Lext

7.5 9.02 6.38 0.683 0.733 0.068

5 6.78 4.4 0.372 0.348 -0.067

5.5 7.56 4.66 0.433 0.391 -0.109

6 8.28 5.04 0.505 0.457 -0.104

6.5 9 5.4 0.588 0.525 -0.121

7 9.58 5.78 0.683 0.601 -0.136

Without

Lext

7.5 10.22 6.16 0.779 0.683 -0.141

(Rs = 0, Tsw-cond = 58.4ns)

34

DR3 Power Losses at Different Vdd

Vdd

[V]

VCon

[V]

VCoff

[V]

Pdd

[mW]

Pnom

[W]

3 3.99 -1.9 0.363 0.287 -0.268

3.5 5.78 -2.88 0.609 0.601 -0.013

3.75 6.5 -3.32 0.744 0.761 0.021

4 7.1 -3.74 0.880 0.907 0.030

4.25 7.8 -4.11 1.037 1.095 0.053

4.5 8.42 -4.54 1.197 1.276 0.062

With Lext

5 9.63 -5.16 1.589 1.669 0.048

3 2.91 -1.02 0.255 0.152 -0.675

3.5 3.74 -1.31 0.373 0.252 -0.480

4 4.71 -1.78 0.542 0.399 -0.356

4.5 5.9 -2.26 0.752 0.627 -0.201

Without

Lext

5 6.94 -2.7 1.011 0.867 -0.166

(Rs = 0)

35

Internal MOSFET Inductance

• For the same VFor the same Vdddd value, the value, the final Vfinal VConCon voltage voltage without the without the

external inductor Lexternal inductor Lextext in DR1 and DR3 (and, to a less extent, in DR1 and DR3 (and, to a less extent,

also in DR2) is much lower than the corresponding value also in DR2) is much lower than the corresponding value with Lwith Lextext, and this phenomenon is more pronounced at lower , and this phenomenon is more pronounced at lower

VVdddd values values

• This result can be explained only by a This result can be explained only by a lower Qlower Qonon factor factor of of

the circuit without Lthe circuit without Lextext, i.e. a , i.e. a higher Rhigher RDSonDSon of the p-channel of the p-channel

MOSFET SMOSFET S11 caused by a reduced gate-to-source voltage due caused by a reduced gate-to-source voltage due

to the voltage drop across the internal source inductance to the voltage drop across the internal source inductance

(4nH for the IRF7319) that becomes worse at higher di/dt (4nH for the IRF7319) that becomes worse at higher di/dt values, i.e. without Lvalues, i.e. without Lextext. This explains why the observed . This explains why the observed

phenomenon is more pronounced at lower Vphenomenon is more pronounced at lower Vdddd values, and values, and

justify why DR1, that requires a higher Vjustify why DR1, that requires a higher Vdddd than DR3 to than DR3 to

achieve the same Vachieve the same VConCon value, has lower overall losses than value, has lower overall losses than

DR3 even without energy recovery.DR3 even without energy recovery.

36

Resonant VRM

• Square-wave operation of the primary half-bridge• Zero-voltage and zero-current commutations of SR MOSFETs

Q1 and Q2

• Operation at fs = 1.8MHz, VIN = 48V, Vo = 1.3V, Io = 50A• Resonant drivers for SRs

VIN

+

HB1

HB2

LR

N:1

CA

CB C2

C1

LF1

LF2

Q2

Q1

+

VO

iF2

CF

RL

iF1

iR

+

+

TR

VGS_Q1

VGS_Q2

VC1

VC2

37

VRM Prototype

4 IRF7836 SR 4 IRF7836 SR MOSFETsMOSFETs

(Q(Qgg = 18-27nC = 18-27nC

@V@VGSGS = 4.5V, = 4.5V,

RRgg = 1 = 1))

38

Experimental Waveforms: DR1

VGS1 [2V/div] VGS2 [2V/div]

DR1DR1 measured waveforms driving 4 IRF7836 measured waveforms driving 4 IRF7836 SR MOSFETs (no energy recovery)SR MOSFETs (no energy recovery)

PPlossloss = 1W each = 1W each

HB1

HB2

39

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