1 ics 51 introductory computer organization fall 2009

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1 ICS 51 Introductory Computer Organization Fall 2009

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Page 1: 1 ICS 51 Introductory Computer Organization Fall 2009

1

ICS 51Introductory Computer

Organization

Fall 2009

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Agenda

• Computer System

• Assembly Language (to help w/ lab)– Introduction of Assembly Language

– Data types and registers

– Instruction categories

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Computer System

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Storage Architecture

Hard Disk

Memory

Registers

Closer to CPUFaster

LargerSpace

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REGISTERS

• A type of internal fast memory – Assume operations are on register operands – Very few in x86 - only 8!

• Need to know how to “address” them– For example, Add R1, R2

» means R1 = R1 + R2

• All x86 computation instructions are of the form– Op Rx, Ry

» Op indicates operation» Rx and Ry present operands

• Rx is destination operand• Rx and Ry are source operands

» For example: Add R1, R2• R1 = R1 + R2

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Assembly Language

• High level language– C, C++, Java language– Abstraction– Human friendly

(e.g.) a = b + c;

• Assembly language– X86 Assembly language for Intel machine– Hard for human to read

(e.g.)Mov eax, bMov ebx, cAdd eax, ebxMov a, eax

– High efficiency to use registers• Machine language

– Machine code for a specific machine– Machine readable

(e.g.)001101001001001001001110101010101010010010010010011101010101011110101010101111101010101011110010

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Assembly Language Programming

• Assembly Language– Processor-specific, low-level programming language

» exposes most of processor features to the programmer

– Describes» Data types and operations

• Size: Byte, Word, etc

• Meaning: integer, character

» Storage• Registers

• Memory

» Specific instructions

• Will use Intel Assembly (x86, IA-32)– A small subset of all instructions

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Generic Instructions

• Specify operation and operands

• Simple enough for hardware to execute directly

• For example: SUB R4, R3– Operation is subtract

– Operands are contents of memory locations called or addressed as R4, R3

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Data Types - size

7 0

Byte

LowByte

7 0

WordHighByte

15 8

Low Word

15 0

Double WordHigh Word

31 16

Low Double Word

31 0

Quad WordHigh Double Word

63 32

Low Quad Word

0Double Quad

Word

63

High Quad Word

64127

Always take care of the type of data an instruction accesses!!!!

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Operands

• The registers are operands of the instruction

• There are source and destination registers

• AND R7, R5– R7 = R7 AND R5

» R7 is the destination operand (register)

» R7 and R5 are source operands (registers)

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X86 Examples

• Add EAX, EBX– Add the contents

• Is the same as earlier example: Add R1, R2– here operands are in registers called R1 and R2

• Intel uses the following names for 32b registers– EAX for R1, EBX for R2

– ECX for R3, EDX for R3

– The other four are registers called ESI, EDI, EBP, ESP

• Use only Intel register names in Assembly

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80386/486/Pentium Registers

IP

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• (E)AX, BX, CX, and DX are general purpose registers– AX is usually called accumulator register, or just accumulator.

Most of arithmetical operations are done with AX.– BX is usually called base register. The common use is to do

array operations. BX is usually used with other registers, most notably SP to point to stacks.

– CX is commonly called counter register. This register is used for counter purposes.

– DX register is the data register. It is usually used for keeping data value.

• CS, DS, ES, and SS are segment registers– You do not need to fiddle with these registers.

• SI and DI are index registers– Usually used to process arrays or strings. SI is called source

index and DI is destination index. • BP, SP, and IP are pointer registers

– BP is base pointer. Used for preserving space to use local variables in C/C++ (the same as frame pointer?) Don’t need to fiddle with it.

– SP is stack pointer. Points to the last used location in the stack.– IP is instruction pointer (it is the same as PC or program counter

on other architectures). Points to the instruction that is going to be executed next. Cannot be directly modified.

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Flag register• Flag is a register that

contains processor status– No direct access to it

– C: carry flag (bit 0). Turns to 1 whenever the last arithmetical operation has carry or borrow, otherwise 0.

– P: parity flag (bit 2). It is set to 1 if the last operation result has even number of 1’s.

– A: auxiliary flag (bit 4). It is set in Binary Coded Decimal (BCD) operations. – Z: zero flag (bit 6). Is 1 if the last operation result is zero. – S: sign flag (bit 7). It is set to 1 if the most significant bit of the last operation

is 1. – T: trap flag (bit 8). It is only used in debuggers to turn on the step-by-step

feature. – I: interrupt flag (bit 9). Disables or enables interrupts.– D: direction flag (bit 10). If set, all string operations are done backward. – O: overflow flag (bit 11). If the bit is set, the last arithmetic operation resulted

in overflow. – IOPL: I/O Privilege Level flag (bit 12 to 13). It is used to denote the privilege

level of the running programs.– N: Nested Task flag (bit 14). Used to detect whether multiple tasks (or

exceptions) occur.

• Most often used flags are O, D, I, S, Z, and C.

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Instruction Categories

• Data movement instructions

• Arithmetic operations

• Logical operations

• Comparison instructions

• Control Transfer Instructions– Unconditional

– Conditional

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Data Movement Instructions

REGISTER, REGISTER1 and REGISTER2 can be any of the Intel registers (EAX, EBX, ECX, etc)

• Between registersmov REGISTER1, REGISTER2

• To registersmov REGISTER, value

mov REGISTER, variable

• To a variablemov variable, REGISTER

• From a variablemov REGISTER, variable

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Simple Arithmetic Operations

add REGISTER, VALUE – REGISTER = REGISTER + VALUE

add REGISTER1, REGISTER2– REGISTER1 = REGISTER1 + REGISTER2

sub REGISTER, VALUE – REGISTER = REGISTER - VALUE

sub REGISTER1, REGISTER2– REGISTER1 = REGISTER1 - REGISTER2

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Boolean Operation Instructions

• NOT

• AND

• OR

• XOR

• Example: OR EAX, EBX

• One way to set a register to 0– XOR R1, R1

» (R1 AND (NOT R1) OR ((NOT R1) AND R1)

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Comparison Instructions

CMP Op1,Op2

cmp REGISTER, VALUE

cmp REGISTER1, REGISTER2

• Sets special registers called flags – Each flag 1-bit storing 0 or 1

• x86 has the following flag registers– N, Z, C, V

• Flags are used by the conditional jumps

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Control Transfer Instructions

• Instructions execute sequentially, except for CTI

• Unconditional Transfer Instructions– e.g.) jmp Label

• Conditional Transfer Instructions– e.g.) jg Label

• Labels a_label:

...

CODE

...

another_label:

...

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Unconditional Transfer Instructions

• jmp LABEL

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Conditional Transfer Instructions

jg LABELgreater

jge LABEL greater or equaljl LABEL

lessjle LABEL

less or equalje LABEL

equaljne LABEL

not equal

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Lab Assignments

• You will use assembly blocks inside C programs

• Visual Studio is the software tool we use in the lab

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• You will insert your code in the C program we give you

int sum (int firstparam, int secondparam)

{ int retval;

__asm {

Your assembly code goes here

}

return retval;

}

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int sum (int firstparam, int secondparam)

{ int retval;

__asm {

mov eax, firstparam

mov ebx, secondparam

add eax, ebx

mov retval, eax

}

return retval;

}

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MOV EAX, a;

MOV EBX, b;

CMP EAX, EBX;

JLE ELSE_BLOCK;

MOV EAX, a;

MOV max, EAX;

JMP END_IF;

ELSE_BLOCK:

MOV EAX, b;

MOV max, EAX;

END_IF:

if ( a > b )

max = a;

else

max = b;

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i =0;

while (i<A)

{

sum += i;

i++;

}

MOV EAX, 0;

MOV ECX, 0;

START_WHILE:

CMP ECX, A;

JGE END_WHILE;

ADD EAX, ECX;

INC ECX;

JMP START_WHILE;

END_WHILE:

MOV sum, EAX;

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Turning in Lab Assignments

• Start lab assignment ASAP

• Turnins past the deadline are automatically

rejected