Memorial University of NewfoundlandFaculty of Engineering and Applied Science

ENGI-5854Electronic Circuits II.

Final Exam

prepared by V.Masek

1:00-3:30, 14 April 2014

1 PROBLEM [20%]

Assuming the op amp to be ideal, it is required to design the circuit shown in Figure 1 to implementa current amplifier with gain iL/iI = 10[A/A].

[10% ] Find the required value for R.

[10% ] If RL = 1kΩ and the op amp operates in an ideal manner as long as v0 is in the range±12V , what range of iI is possible?

Figure 1: Current amplifier

2 PROBLEM [20%]

Using a combination of inverting integrator and non-inverting bistable multivibrator, design a circuitthat provides square waves of 10V peak to peak and triangular waves of 10V peak to peak at afrequency of 1kHz. Implement the bistable circuit with the output voltage limited by a pair of zenerdiodes. Use 10nF capacitor and specify the values of all resistors and the required zener voltage.Design for a minimum zener current of 1mA and for a maximum current in the resistive divider of0.2mA. Assume that the output saturation levels of the op amps are ±13V .

Mark allocation:

[5% ] circuit schematics

[5% ] design for current limitation

[5% ] design for bistable multivibrator

[5% ] design for integrator

3 PROBLEM [15%]

A low pass filter is designed for Amax = 0.5dB and Amin = 40dB. Introduce any variable you mayneed, and

[5% ] Find |T | at ω = 0.

[5% ] Find |T | at ω = ωP .

[5% ] Find |T | at ω = ωS.

4 PROBLEM [15%]

Design a low pass filter in Figure 2 that can be remotely modified through the multiplier and controlvoltage VC . Design for a low frequency gain of 1V/V and a nominal corner frequency (3db frequency)of 1kHz (at VC = 1V ). Also keep in mind the input resistance shall not fall below 10kΩ.

[5% ] Derive the transfer function (transmission) in terms of all components and VC .

[5% ] Specify all circuit components.

[5% ] Draw an approximate magnitude response in dB for two control voltages, VC1 = 1V andVC2 = 2V .

Figure 2: Remotely controlled LPF

5 PROBLEM [15%]

Consider an amplifier having a midband gain AM and a low-frequency response characterized by apole at s = −ωL and a zero at s = 0. Let the amplifier be connected in a negative feedback loopwith feedback factor β.

[5% ] Find the expression for the midband gain of the closed loop amplifier

[5% ] Find the expression for the lower 3dB frequency of the closed loop amplifier.

[5% ] By what factor has both changed?

6 PROBLEM [5%]

A newely constructed feedback amplifier undergoes a performace test with the following results: withfeedback connection removed, a source signal of 5mV is required to provide a 10V output to load.With the feedback connected, a 10V output requires a 200mV source signal. For this amplifier,identify A, β, Aβ.

7 PROBLEM [5%]

A designer is required to achive a closed-loop gain of 25± 1%V/V using a basic amplifier whose gainvariation is ±10%. What nominal value of A and β (assumed constant) are required.

8 PROBLEM [5%]

A multipole amplifier having the first pole at 1MHz and a DC open loop gain of 60dB is to becompensated for closed-loop gains as low as 20dB by the introduction of a new dominant pole. Atwhat frequency must the new pole be placed?

Memorial University of NewfoundlandFaculty of Engineering and Applied Science

ENGI-5854Electronic Circuits II.

Final Exam

prepared by V.Masek

1:00-3:30, 10 April 2015

1 PROBLEM [20%]

Determine the dc characteristics of the circuit below for two switch positions, open and closed.Consider R1 = R2 = R3 = R4.

Mark allocation:

[5% ] dc transfer characteristics of the first stage VX = VX(Vi)

[5% ] dc transfer characteristics of the second stage V0 = V0(VX) when switch is OPEN

[5% ] dc transfer characteristics of the second stage V0 = V0(VX) when switch is CLOSED

[5% ] sketch input-output characteristics for both switch positions in one ploti.e. V0 ↔ Vi|open and V0 ↔ Vi|closed.

Vx

2 PROBLEM [20%]

Using a single op amp, design astable multivibrator that utilizes charging and discharging of acapacitor. Design for a square wave output having frequency of 1kHz and 50% duty cycle. In orderto also utilize the intermediate signal generated at the capacitor, limit the charging and dischargingtime to one time constant τ . The supply voltage is ±10V .

Mark allocation:

[5% ] circuit schematics

[10% ] design for the frequency, determine all component values

[5% ] sketch the voltage at the capacitor as a function of time and also include the square waveoutput in the same plot.

3 PROBLEM [20%]

Design a low pass filter (LPF) by cascading multiple first order LPF’s to meet the following criteria:Amax = 9dB, Amin = 60dB, ωP = 1kHz, ωS = 10kHz, and dc gain of 8V

V. Consider all stages being

identical and the lowest input resistance 100kΩ.

[10% ] Draw the circuit of one stage, determine all passive components in the circuit and state thenumber of stages needed.

[5% ] Draw a Bode plot (magnitude) for one stage and the overall LPF cascade

[5% ] Draw a Bode plot (phase) for one stage and the overall LPF cascade

4 PROBLEM [20%]

A series-shunt feedback amplifier utilizes a resistive divider for the feedback circuit.

[5% ] Calculate the real open-loop gain VO

Vsassuming the following parameters: A = 103 V

V, RS =

10kΩ, Ri = 100kΩ, RO = 100Ω, RL = 1kΩ

[5% ] Find expressions for the h parameters of the feedback circuit, if R1 = 1kΩ and β = 0.1 whatare the values of all four parameters.

[5% ] Sketch and label an equivalent circuit in which the A circuit also includes the resistancesresulting from the h parameters of the β circuit.

[5% ] Calculate the input and output resitance RIN , ROUT .

5 PROBLEM [5%]

Input stage of an instrumentation amplifier is shown below. Determine Vo1 and Vo2 when Vi1 = 5Vand Vi2 = 3V . Consider 2R1 = 1kΩ and R2 = 2kΩ.

6 PROBLEM [5%]

Derive the output voltage Vo in terms of the input voltage Vi for the circuit below.

R

7 PROBLEM [5%]

What type of second order filter has two complex conjugate poles in the LHP (left half plane) andone finite zero at the origin, i.e. z1 = 0 and z2 −→ ∞.

8 PROBLEM [5%]

A newely constructed feedback amplifier undergoes a performace test with the following results: withfeedback connection removed, a source signal of 10mV is required to provide a 10V output to load.With the feedback connected, a 10V output requires a 200mV source signal. For this amplifier,identify the open loop gain A and the feedback gain β.

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Memorial University of NewfoundlandFaculty of Engineering and Applied Science

ENGI-5854Electronic Circuits II.

Final Exam

prepared by V.Masek

9:00-11:30, 14 April 2016

1 PROBLEM [20%]

Assuming ideal OP AMP, implement current amplifier with gain iL/iI = 10[A/A].

[10% ] Find R value.

[10% ] The OP AMP operates normally as long as v0 ≤ ±10V , what range of iI is possible whenRL = 1kΩ.

2 PROBLEM [30%]

Design a single OP AMP astable multivibrator that generates ±10V square wave at 1kHz and 50%duty cycle.

[10% ] Circuit schema.

[10% ] Timing characteristic.

[10% ] Circuit components calculation.

3 PROBLEM [5%]

A system is designed for the closed-loop gain of 10 ± 1%V/V using a basic amplifier whose gainvariation is ±15%. What nominal value of A and β are required.

4 PROBLEM [25%]

Design Butterworth LPF for Amax = 0.5dB, Amin ≥ 20dB, ωp = 100[rad/s], ωs = 170[rad/s].

[10% ] Find ε, N

[10% ] Find poles and define T(s) numerically

[5% ] Find the actual Amin[dB]

Formulae:

|T (jω)| =1√

1 + ε2(

ωωp

)2NT (s) =

KωN0

(s− p1)(s− p2) . . . (s− pN)

ω0 = ωp

(1

ε

) 1N

. . . radius of a circle poles lie on

5 PROBLEM [10%]

Draw the input stage of instrumentation amplifier and express its output in terms of the input.

[5% ] Circuit schema.

[5% ] Expression for output.

6 PROBLEM [10%]

Complete the flow schematics of two-integrator based high pass filter by filling into the blank balloons:

VHPF (s)

Vi(s)=

ks2

s2 + ω0

Qs+ ω2

0

Σ −ωo

s−ωo

s

Vi VHPF

Memorial University of NewfoundlandFaculty of Engineering and Applied Science

ENGI-5854Electronic Circuits II.

Final Exam

prepared by V.Masek

14th April 2017, 1:00-3:30

1 PROBLEM [15%]

Consider the circuit in the figure below having R1 = 10k and forward bias of D1 equal to 0.6V.

[5% ] Derive output in terms of input.

[5% ] Sketch input-output characteristic.

[5% ] Sketch input - Vop characteristic.

-1V

2 PROBLEM [5%]

Design a differential input stage of an instrumentation amplifier (without the difference amplifierstage) that features a variable differential gain between 2 [V/V] and 5 [V/V].

[3% ] Draw circuit schematics.

[2% ] Determine values for all components.

3 PROBLEM [15%]

Design a 1kHz square wave generator that features an inverting integrator. Due to a large instabilityof the ±10V dual power supply, condition the integrator’s input by zener diodes.

[5% ] Draw schematics of the overall circuit.

[5% ] Determine all component values for 1kHz frequency.

[5% ] Draw the integrator’s output waveform along time axis, be precise about the voltage levelsand time scale.

4 PROBLEM [15%]

For a given Amax = 3dB, Amin ≥ 40dB, ωp = 1kHz, and considering a first order low-pass-filter:

[5% ] calculate or extract from graph the bandstop frequency ωs

[5% ] draw a circuit schematics and determine all components considering the minimum inputresistance of 10k.

[5% ] If you cascade two of such filters in series, how will ωp and ωs change, determine the newvalues.

5 PROBLEM [20%]

For the circuit in figure below:

[5% ] find loop gain L(jω)

[5% ] the frequency of oscillation in terms of R and C.

[5% ] the gain for oscillation in terms of R1 and R2

[5% ] propose a method for amplitude control, draw a schematic.

6 PROBLEM [10%]

[5% ] Show that in a negative feedback amplifier with loop gain Aβ >> 1, the closed loop gain Afis lower than its ideal value of 1

βby 100

Aβ[%].

[5% ] What is the minimum loop gain required so that Af is within 5% of its ideal value.

7 PROBLEM [20%]

An amplifier has a dc gain of 102 and poles at 105Hz, 3.16 × 105Hz and 106Hz.

[5% ] Find a range of β that assures a stable closed loop system.

[5% ] Compensate a unity gain amplifier (β = 1) for stability by introduction of a new pole.

[10% ] Derive phase margin and gain margin for the compensated unity gain amplifier.

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