1 sleeping crystals and dld ( drive level dependency ) arthur lee technical director copyright, 2000...

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Sleeping Crystals and

DLD ( Drive Level Dependency )

Arthur Lee Technical Director

Copyright, 2000 ©

Hong Kong X’tals Limited.http://www.HongKongCrystal.com

2Hong Kong X’tals Limited

What is Sleeping Crystals ???

Sleeping crystal is a well known phenomenon in the Crystal industry :

The Crystal will NOT start, but after the crystal is started by some mechanical or electrical excitation, it works fine for some time, then, after some unknown time ( usually with power removed), it sleeps again --- not functioning.

The time that it begins to sleep again is unpredictable, could be minutes or months.


Sleeping Crystals make ambiguous failures !

This phenomenon is one of the reasons why when a crystal user finds a faulty crystal, returns it to the crystal maker, but the failure analysis reports says the crystal is good.

Most likely the sleeping crystal was “woken up” by either the mechanical shock / vibration during transportation, or being tested at a relatively high drive level during failure analysis. ( note : there are many other reasons for these send-faulty, return-good situations, sleeping crystal is one of them ).


I have been using crystals for years. Why I haven’t ever seen a Sleeping crystal.


Slow Starting Crystals = Sleeping Crystals !??

Decades ago, electronic circuits worked at higher voltages and lower frequencies. Hence, crystals operated at higher drive levels ( say, 1000 W or above ). The high drive levels of these circuits woke up the crystal every time it was switched on, hence, in the olden days, this sleeping phenomenon was not a big problem. However, the high drive level of these circuit still require some time ( from mSec to Seconds ) to wake up the sleeping crystal.

That is why some engineers call these crystals “Slow Starting”.


Nowadays application are more demanding !

The lower voltage of application circuits usually result in lower drive levels,

The higher operating frequencies, hence more phase lag in circuits usually result in lower drive level ( due to lower load capacitance CL ),

Applications now demand faster start up time, say for example : VGA display cards, USB devices with hot plug feature, PC card with hot plug feature, etc.,

Battery operated devices with power saving mode demand very fast start up time, say for example : PDA, mobil phones, cordless phones, and pagers that switch on and off in milli-seconds cycles so as to save battery power.


Why do Crystals sleep ?

The root cause of sleeping crystals is contamination in the various production stages.

Contamination of quartz crystals is not only limited to dirt particles, but traces of moisture, gases, oils, etc are also considered as contamination. Hence, the cost of controlling contamination in all the production stages is high, and it is some times very difficult to locate the source of contamination.


The Structure of a Quartz Crystal

Cover

Base

Silver Electrodeon both sides

Silver EpoxyQuartz Wafer( Blank )

Sealed with Clean, Dry, inert gas

Any contamination will affect performance of the crystal, including :

Contamination on the quartz surface and, inside the structure.


Hot topic in the industry

Today, sleeping crystals are still a hot topic in the industry and a lot of research work is still being done by a lot of crystal makers.

However, not all crystal makers know how to avoid producing sleeping crystals. That is why some of them do not like to talk about this topic.


Is there a cure for Sleeping Crystals ?

Unfortunately there is no cure, a sleeping crystal will sleep again, even after excited / woken up.

The sleeping state is the crystal’s natural stable state, it will return to this stable state after external excitation is removed for some duration. There is no way that a Sleeping crystal can be cured and become a non-sleeping crystal again.

There is no way to remove contamination after the manufacturing process.

There is NO cure !


High Driving -- by Crystal Makers ??

Some crystal makers “high drive” their crystals in their production ( driving the crystal with a very high drive level ) so as to wake up all the crystals before outgoing test hence, achieving a higher output yield. This means delivering sleeping crystal to users, but these crystals will sleep again eventually.


High Driving– wrong specification !?

For the same reason, you should specify the operating drive level of your circuit correctly, so that good crystal makers will not test ( drive ) the crystal inappropriately. Say for example, if your circuit operates the crystal at 50 W, but you specify 1mW ( by copying from old specification sheets ), then you are instructing your crystal makers to wake up ( high drive ) all the sleeping crystals during their production, and final outgoing test.

Please note that 1mW is considered as a very high drive level nowadays, due to the much lower drive levels in application circuits and much smaller crystal sizes than older packages. If you have difficulty specifying the drive level of your circuit, send your PCBA to your crystal maker for measurement.


How to detect Sleeping Crystals ?

The major difficulty in detecting a sleeping crystal is : once it is woken up, it behaves like a good crystal, and the time required to wait until it sleeps again is unpredictable ( could be seconds, minutes, days, or weeks ).

We have to detect sleeping crystals indirectly, making use of DLD ( Drive Level Dependency ) of the crystal.

Drive level dependency of a crystal is caused by the same root cause as Sleeping Crystal, contamination, but less serious.


The DLD characteristics of an ideal crystal

Over a wide drive level range ( decades of drive level ) the ESR and frequency of the crystal changes very little until the drive level reaches its structural limit. However, a Sleeping crystal may show the same characteristic after a large external excitation.

0

0.5

1

1.5

2

2.5

Drive Level

No

rmal

ized

E

SR

When Drive Level is below the structural limit, ESR changes very little, or no change.

When Drive Level is higher than the structural limit, ESR increases dramatically, this is normal.


The DLD characteristics of some non-ideal crystals :

Below the structural maximum drive level, the ESR and frequency of a non-ideal crystal changes a lot ( ESR changes by several times, Frequency changes by several tens of ppm ) due to contamination in various production processes.

0

2

4

6

8

Drive Level

No

rmal

ized

E

SR

When Drive Level is higher than the structural limit, ESR increases dramatically, this is normal.

The four crystals shown here are bad DLD crystals due to large ESR change


Non-repeatability dilemma

To measure this DLD characteristic, the maximum measurement drive level specified in the range must be high enough to excite ( wake up ) the crystal. Hence, after measuring the first time, the DLD characteristic of the same crystal changes ( usually appears better ). And, if the maximum measurement drive level is high enough, the crystal will be totally woken up, and may perform like an ideal crystal for some time ( like the above ideal DLD curve ). Hence, this measurement is NOT repeatable, and we should only rely on the first measurement result.


Important note

If the DLD characteristic of a crystal does not change with time, nor does it change with external excitations, then, this crystal is NOT a sleeping crystal ( it may be a poor DLD crystal, but not a sleeping crystal ). Depending on the application circuit’s operating drive level, this poor DLD crystal may or may not be a good crystal :

if the application circuit works fine with the ESR at the operating level ( including consideration of start up speed), this is a good crystal, else,

if the application circuit can not operate with the ESR at the operating drive level ( including consideration of start up speed), then this is a failure.


Crystal DLDTypical Example

Changes due to Design limit, not because of poor process

Kolinker KH1200 Test data

At 10nW Rs=37At 100uW Rs=31, non-ideal process, depending on applications, could be good or no good


Time characteristic of DLD

The DLD characteristic of a crystal may change with time, and will also be changed by external excitation.

ESR at low Drive Level,or DLD-dRs,or DLD-dFs

Time

Excited by external larger amplitude stimulation : much waken up

Excited by external small stimulation : slightly waken up

Waken mode :Unstable state

Sleep mode :stable steady state


Gamma ratio test for DLD

When we attempt to test a crystal chosen at random, can we determine the status of the crystal : sleeping ? waken ? or semi-waken up ? Or, how to device test methods that can better test a crystal’s Sleeping ( non-repeating DLD ) characteristic? The answer to the question is not simple. Some crystal engineers devised a test method focusing on the ESR ratio instead of the absolute change in ESR, hoping to solve the problem by comparing the ratio of ESR ( and frequency ) between several measurements taken at different drive levels.


Gamma ratio test for DLD

The test method compares the ratio of ESR, and frequency change between the 1st : 2nd, and 1st : 3rd measurements. Where :12 = ESR of 1st measurement / ESR of 2nd measurement <= specified limit13 = ESR of 1st measurement / ESR of 3rd measurement <= specified limit( Fr of 1st measurement – Fr of 2nd measurement ) <= specified limit( Fr of 1st measurement – Fr of 3rd measurement ) <= specified limit

Drive Level

ESR

1st measurement

2nd measurement

3rd measurement


Multiple measurement points

Some engineers further modify this method with multiple measurement points so as to detect ESR / Frequency changes in between the minimum and maximum drive levels.

For details, please refer to the IEC standards 444-6. These methods are still under evaluation in the crystal industry, and there is still, as yet, no final conclusion, especially when the discussion has to cover a wide range of applications : military, professional, industry and commercial.

The Kolinker KH1200 network analyzer provides a convenient user interface for crystal engineers to further investigate these methods.


Definition of Sleeping --- Relationship of Sleeping and DLD

The ESR and frequency of a commercial grade crystal change inevitably with drive level. Some may change by as little as 1 Ohm, while some may change by a few hundreds or even a few K Ohms, or the ESR becomes so high that even professional crystal measurement systems are not able to measure the ESR, and indicate an “unstable crystal”.

But will a poor DLD crystal sleep ? Or, how poor is the DLD of a sleeping crystal ? Or, how ….


Relationship of Sleeping and DLD

Contamination

( Non-ideal process ) Non-

repeatable

DLD

( Difficult to measure )

Fail at operating Drive level

Sleeping

Fail below operating Drive Level

Slow Starting & Sleeping

Structural Limit

( Design Limitation )

Pass both of the above

Good Crystal, but safety margin should be set in DLD specification, to avoid potential Sleeping crystal

Repeatable

DLD

Fail at operating Drive level

Simple Failure, easy to detect

Other Reasons

( unknown )

Fail below operating Drive Level

Slow Starting, easy to detect

Pass both of the above

Good crystal

Poor D

LD characteristic


Rough Definition

Roughly speaking, Sleeping Crystals are crystals with Non-repeatable DLD characteristic and fail to operate in the application circuit at either:

the operating drive level of the application circuit, orthe drive level roughly 5 to 10 times below the operating.Practically, this definition is correct, but quite dependent on the

characteristic of the application circuit that it is not easily understandable by most crystal users.

Unfortunately, there is no clear formal definition for a Sleeping crystal in the crystal industry.


Crystal Measurement Precautions

DLD measurement

Measurement results verification

Failure analysis

“Fs stable, FL unstable” crystals


DLD Measurement Precautions

To further eliminate the possible measurement error due to equipment ( FL and RL measurement error ) :

Do not measure DLD-dFL, or DLD-dRL … etcFor crystal below 100MHz, measure DLD-dFr, and DLD-dRr, and

For crystal at 100MHz or above, measure DLD-dFs, and DLD-dRs


Measurement Result verification

Measurement results verification ( including all other parameters ) :

When verifying measurement results by re-measuring the crystal, bear in mind that the crystal may have been woken up after the first measurement. It is a good habit to leave the crystals for a few days before any re-measurement.

Note : The same applies for all oscillators.


Failure analysis Precaution

When performing failure analysis, bear in mind the parameters of a crystal with “Poor aging characteristics” also change with time, but poor aging crystals could not be woken up by excitation. Of course, some bad crystal may have both failure modes : poor aging and poor DLD. Note : The same applies for all oscillators.


“Fs stable, FL unstable” crystals

Some crystals when measured for FL will show “Unstable”, but when measured for Fs, or Fr will show stable.

Most likely, these crystals have DLD problems. In such an event, use the DLD graphic scan in KH1200 to find out the DLD characteristic of such crystals.

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Technical Support from HKC

Send HKC your production failuresSend us your latest PCBA for crystal specification verification.

Web Page : http://www.HongKongCrystal.comE-mail : [email protected] : ( 852 ) 24985908

Copyright, 2000 © Hong Kong X’tals Limited

1 sleeping crystals and dld ( drive level dependency ) arthur lee technical director copyright, 2000...

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