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The PHENIX Muon Identifier Front End Electronics

Andrew Glenn(University of Tennessee),

for the PHENIX collaboration

Andrew Glenn 5/1/01

April APS Meeting in Washington, D.C.

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Andrew Glenn 5/1/01

South

North

The Experiment

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The Muon Identifier

MuID

MuTrAndrew Glenn 5/1/01

6340 Tubes per arm

3170 Active Channels

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The MuID Main Functions

• Distinguish muons from other particles, primarily pions separation of ~3*10-3

• Provide triggering capability Large groupings of ORed tubes from lemo

pseudo-trigger outputs for commissioning, cosmic-ray trigger, and possible fallback.

Optical fiber outputs for full tracking trigger. (J. Newby V10.008)

Andrew Glenn 5/1/01

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The Muid FEE Main Components

• In-panel Amplifier/HV Distribution Boards• Readout Cards (ROCs)• Front End Module Cards (FEMs)• Transition Cards, Backplanes, Crates

Andrew Glenn 5/1/01

In-panel Amplifiers

TransitionCards (20) ROCs (20)

FEM (1)

LVL1 triggerTwisted-paircables

Optical Fiber

Analog signals

Optical FiberDigitalBackplane

DataAcquisitionSystem

DigitalSignals(Hits)

Basic Data Flow For 1 Orientation

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In-panel Amplifier/HV Boards

• Produce Differential Output of ~± 250mV

• Push Analog Signals Over ~30 meter Twisted-pair Cable

• Must Stand the Test of Time– Polyfuses– Double-diode protection against broken wire– Diode clamps prevent reverse-bias

Andrew Glenn 5/1/01

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MuID FEE Diagram

1616 1616 1616

Six sets of 16 twisted-pair inputs from MuID panels

Signal Conditioning -Digitization -Variable Delay

Buffering-LVL1 Latency-“Alive for 5”

96 bits out to LVL1G-link @6xBCLK

Digital Backplane Data, serial data, control and power

Data FormattingSerial ControlTiming & Control, eg.Mode bits, LVL1, BCLK

G-link to DCMARCNet in

G-link from GTM

Andrew Glenn 5/1/01

ROCFEM

(20 perCrate)

Transition Card

96 Channels

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MuID ROC DiagramDelay &

LatchFPGAs (6)

AndClockdelay

chips (12)

DataStoreFIFOs

(3)

FiveEventFIFOFPGA

SerialString &

Pulser

AnalogMuxes (7)

AddressDecode

PLD

TriggerFormatFPGA

TTL GlinkCircuit

16

16

16

16

16

16

16

16

16

16

16

16

32

32

3296

6

96

28

BCLK96

6

5

96

20

16

Pulserlines

DataLVL1_Acpt/RD/RD_EN/DV

Analog SpyOutput

Digital SpyOutput

TriggerGLink(60 MHz)

FIFO cntrl

Align bit

Trigger Data

6X BCLK

Greset

ED

Locked

/RD_EN

FPGA Prog.

Analog data

Analog data

P1

P2

/HALT

Align bit

LVL1_Acpt

BCLKBoard Resets (4)

/RD

/DV

Data (16)

Mode CLK

Xfer Mode (2)

MP_dat (2)

/ALE

FEM Device Addr (5)

ARCNet Addr/Data (5)

Geographic Addr (6)

P3

sdin,rdbak,slatch,sclk,sdout,sreset

Andrew Glenn 5/1/01

Receiver&

Threshold

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MuID FEM Diagram

Mode Control

ARCNetSubsystem

FIFO GLinkXMIT

Data FormatterDiagnostic

FPGA

AddressDecode

PLD

GlinkRCV

16

5

5

Strobe, /CAV, /DAV

Data (16)

WR Clk & EN (2)

Mode Bits (20)

Serial Data (6)

ARC bus (10)

FPGA Program (6)

6

CommandLines (7)

GlinkTo DCM

ARCNetSerial line

RD Clk & EN (2)

Data(16)

FPGAProgram (6)

LVL1 acceptBCLK

4xBCLKEnDat0

User Bit [2:0]Mode Bits [7:0]

Mode Enable

ROC DataFEM Addr

/ALE/RD

/ROC_DV

/HALTLVL1 Acpt

BCLKResets (4)Align bit

FPGA

GeographicAddress (6)

ARC Addr/DataMode CLK

Xfer Mode (2)MP_dat (2)

Rx ResetStat0

Address &RD Cntrl (7)

GlinkFrom T&C

Andrew Glenn 5/1/01

DataFormatter

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Other Components

Andrew Glenn 5/1/01

Transition Card

CrateDigital Backplane

Passthrough backplane

2 Crates per rack: 1 for horizontal tubes and 1 for vertical

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MuID FEE Photos

FEM

Signal Wires

FEM

Andrew Glenn 5/1/01

Pseudo-trigger outputs

To Trigger

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Communication Overview

• Slow Controls (Timing Delays, Thresholds …)– Serial Downloads via ARCNet to FEM

• Timing and Modebits from Granule Timing Module (GTM)– Fiber Optic G-Link (On FEM)

• Formatted Data to Data Collection Module (DCM)– Fiber Optic G-Link (On FEM)

• Level1 Trigger– Lemo Cable Pseudo-trigger outputs (commissioning)

– 6x Fiber Optic G-Link (Full Tracking Trigger)

Andrew Glenn 5/1/01

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ARCNet GUIs

Andrew Glenn 5/1/01

Java based GUIs set various parameters over ARCNet via a CORBA server.

Three Types of Downloads:-DMUX (Shown)-DAC-Miscellaneous

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Current FEE Status

• Successful basic commissioning run last year. (H. Sato V10.006)

• All FEMs have passed quality assurance tests.• All ROCs have passed quality assurance tests.• Noise and trigger studies at an advanced stage.• Data in ~1 Month!

Please see http://phenix.bnl.gov/WWW/muon/muid_fee/for additional

information.

Andrew Glenn 5/1/01