1. transistor ce characteristicsece.gecgudlavalleru.ac.in/pdf/manuals/edc-labmanual.pdf · readings...

DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

ELECTRONICS ENGINEERING LAB

1

1. TRANSISTOR CE CHARACTERISTICS

Aim

1. To plot the input and output static characteristics.

2. To calculate the input dynamic resistance from the input characteristics

and output dynamic resistance and current gain from the output

characteristics of the given transistor.

Apparatus Required

S.No Name of the

Equipment/Component Specifications Quantity

1 Transistor (BC 107)

Icmax=100mA PD=300mw Vceo=45V Vbeo=50V

1

2 Resistors-39KΩ,1KΩ Power rating=0.5w Carbon type

1

3 Regulated Power Supply 0-30V,1A 1

4 Voltmeters 0-1V, 0-10V 1

5 Ammeters 0-300µA, 0-10mA 1

Theory

In common emitter configuration the emitter is common to both input

and output. For normal operation the Base-Emitter junction is forward biased and

base-collector junction is reverse biased .The input characteristics are plotted

between IB and VBE keeping the voltage VCE constant. This characteristic is very

similar to that of a forward biased diode. The input dynamic resistance is

calculated using the formula

ri = ∆ VBE / ∆ IB at constant VCE

The output characteristics are plotted between IC and VCE keeping IB constant.

These curves are almost horizontal. The output dynamic resistance is given by,

ro = ∆VCE / ∆ IC at constant IB

At a given operating point, DC and AC current gains (beta) are calculated as

follows

DC current gain βdc = IC / IB at constant VCE

AC current gain βac = ∆ IC/ ∆ IB at constant VCE.



2

Circuit diagram

Fig A: Transistor Common Emitter Configuration

Procedure

a) Input Characteristics

1. Connect the circuit as shown in fig A.

2. Keep the voltage VCE as constant at 2V by varying VCC.

3. Vary the input voltage, VBB in steps of 1V upto 10V

4. Measure the voltage, VBE from voltmeter and current, IB through the

ammeter for different values of input voltages

5. Repeat the steps 3 and 4 for VCE values of 5V and 10V

6. Draw input static characteristics for tabulated values

7. At suitable operating point, calculate input dynamic resistance.

b) Output Characteristics

1. Fix input base current, IB at constant value say at 10µA.

2. Vary the output voltage, VCC in steps of 1V from 0V upto10V.

3. Measure the voltage, VCE from voltmeter and current IC through the

ammeter for different values.

4. Repeat above steps 2 and 3 for various values of IB=20µA and

30µA.

5. Draw output static characteristics for tabulated values.



3

Tabular forms


S.No

Applied

Voltage

VBB(V)

VCE = 2V VCE = 5V VCE = 10V

VBE(V) IB(µA) VBE(V) IB(µA) VBE(V) IB(µA)


S.

No

Applied

voltage

Vcc (V)

IB = 10µA IB = 20µA IB = 30µA

VCE(V) IC(mA) VCE (V) IC(mA) VCE (V) IC(mA)



4

Model graphs

Fig B: Input Characteristics Fig C: Output Characteristics

Calculations


Input Resistance, ri = ∆ VBE / ∆ IB at VCE constant


Output dynamic resistance, ro = ∆VCE / ∆ IC at IB constant

Current gain, β = ∆ IC / ∆ IB at VCE constant

Precautions

1. Connections must be done very carefully.

2. Readings should be noted without parallax error.

3. The applied voltage, current should not exceed the maximum rating of the

given transistor.

Result

Inference

Questions

1. List various operating regions of Transistor

2. List various biasing circuits

3. Give Transistor current equation in CE configuration.



5

2. FULL WAVE RECTIFIER

Aim

To observe the working of full wave rectifier with and without filter & calculate

its ripple factor

Apparatus Required

S. No Name of the Equipment/

Component

Specifications Quantity

1. Diode(1N4001) VR (max)=1000V

IR(max)=50mA

1

2. Resistor(1KΩ) Power rating=0.5W Carbon type

1

3. Transformer 6-0-6V,500mA 1

4. Capacitor(1000µF/25V) Electrolytic type, Voltage rating= 1.6v

1

5. Cathode Ray Oscilloscope 20MHz 1

6. Digital Multi meter 4 ½ digit 1

Theory

In the full wave rectifier circuit the transformer has a center-tap in its

secondary winding. It provides out of phase voltages to the two diodes. During the

positive half cycle of the input, the diode D2 is reverse biased it does not conduct. But

diode D1 is in forward bias and it conducts. The current flowing through D1 is also

passes through the load resistor, and a voltage is developed across it.

During negative half cycle diode D2 is forward biased and diode D1 is

reverse biased. Now the current flows through diode D2 and load resistor. The

current flowing thought the load resistor RL passes in the both half cycles. The DC

voltage obtained at the output is given by Vdc = 2Vm / π, where Vm is peak AC voltage

between center-tap point and one of the diodes. It can be proved that the ripple factor

of a full- wave rectifier is 0.482.The output of the full-wave rectifier contains an

appreciable amount of AC voltage in addition to DC voltage. But, the required output

is pure DC with out any AC voltage in it. The AC variation can be filtered by a shunt

capacitor filter connected in shunt with the load. The capacitor offers low impedance

path to the AC components of current. Most of the AC current passes through the

shunt capacitor. All the DC current passes through the load resistor.



6

Circuit Diagrams

Fig A: Full wave Rectifier without Filter

Fig B: Full wave Rectifier with Filter

Procedure

1. Connect the circuit as shown in Fig A.

2. Apply the supply voltage 230V, 50Hz at the primary winding of the

transformer.

3. Connect the CRO at the secondary winding of the transformer and measure

the maximum voltage (Vm) and time period (T) at the input. Calculate the RMS

input voltage using Vrms=Vm/√2.

4. Now connect the multimeter at the secondary and measure the rms voltage of

the input signal. The rms voltage measured by both CRO and multimeter

must be same.

5. Now connect the CRO across the load resistor and measure the maximum

voltage, Vm and time period, T of the output voltage. Calculate the rms and

average (dc) values of the output signal using

V rms = Vm / √2 and Vdc=Vavg = 2Vm / π.

6. Measure the AC and DC voltages across the load resistor using multimeter

and calculate the ripple factor as r = Vac / V dc



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7. While finding ripple factor using CRO, use r =[ [(Vrms / Vdc )2 – 1]]1/2

8. Compare the measured ripple factor value with theoretical value.

9. Now close the switch ‘s’ to connect the capacitor filter across the load

resistor, RL then connect the CRO at output terminals and measure the both

ripple AC voltage and DC voltages. Calculate the ripple factor. Also measure

the time period T of ripple AC voltage.

10. Tabulate the values with filter and without filter.

Observations

Fig C : Input Waveform

Fig D: Output Wave Form Without Filter

Fig E: Output Wave form with filter



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Calculations

Input waveform

a) Using CRO

Vm =

Vrms = Vm/√2 =

T=

b) Using multimeter

Vrms =

Output waveform without filter

a) Using CRO:

Vm =

Vrms = Vm/2 =

Vdc = Vm/π =

Ripple factor, r = [ [(Vrms / Vdc )2 – 1]]1/2 =

b) Using multimeter

Vac =

Vdc =

Ripple factor, r = Vac / Vdc =

Output waveform with filter

a) Using CRO:

Vm =

Vrpp=

Vac= Vrpp/4√3 =

Vdc = Vm- Vrpp/2 =


Charging time period, T1=

Discharging time period, T2=

T= T1+ T2=

b) Using multimeter

Vac =

Vac =




9

Tabular form

Full-Wave

Rectifier

Without Filter With Filter

CRO Multimeter CRO Multimeter

Vrms (V)

Vdc (V)

Ripple Factor, r

Precautions

1. Connections must be given very carefully.

2. Readings should be taken without any parallax error.

3. The applied voltage and current should not exceed the maximum ratings of

the diode.

Result

Inference

Questions

1.What are the limitations of half wave rectifier

2. Give theoretical values for ripple factor and efficiency of center tapped

full wave rectifier.



10

3. COMMON EMITTER AMPLIFIER

Aim

To plot the frequency response characteristics of CE amplifier

Apparatus Required

S.No Name of the

Component/ Equipment


1 CE Amplifier Circuit Board ____ 1


3 Cathode Ray Oscilloscope 20 MHz 1

4 Signal Generator 0-1MHz 1

Theory

Common Emitter amplifier has the emitter terminal as the common terminal

between input and output terminals. The emitter base junction is forward biased and

collector base junction is reverse biased, so that transistor remains in active region

throughout the operation. When a sinusoidal AC signal is applied at input terminals of

circuit during positive half cycle, the forward bias of base emitter junction VBE is

increased resulting in an increase in IB, The collector current Ic is increased by β

times the increase in IB, VCE is correspondingly decreased. i.e output voltage gets

decreased. Thus in a CE amplifier a positive going signal is converted into a negative

going output signal i.e.180o phase shift is introduced between output and input signal

and it is an amplified version of input signal.

Characteristics of CE amplifier

1. Large current gain (AI)

2. Large voltage gain (AV)

3. Large power gain(AP=AI.AV)

4. Phase shift of 180o

5. Moderate input & output impedances.

The voltage gain of the amplifier is given by

Gain = AV = 20 Log VO / VS

Where, Vo is the output voltage.

VS is input voltage of applied AC signal.



11

Circuit Diagram

Fig A: CE Amplifier

Procedure


2. Apply the supply voltage, VCC=12V.

3. Now feed an ac signal VS of 20mV peak to peak at the input of the

amplifier, vary the frequency of input signal ranging from 10HZ to 1MHZ

and measure the amplifier output voltage V0.

4. Now calculate the gain in dB for various input signal frequencies.

5. Draw a graph with frequency on X-axis and gain dBs on Y-axis. From

graph, calculate bandwidth.



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Tabular form Input voltage, VI=20mVpeak-peak

S.No Input Frequency

(HZ)

Output Voltage,

Vo (V)

Gain = AV=20 log (Vo / VI)

(dB)

Model graph

Observations

Maximum gain (Av) =

Lower cutoff frequency (FL) =

Upper cutoff frequency (FH) =

Band width (B.W) = (FH – FL) =

Gain bandwidth product = Av (B.W) =



13

Precautions


2. Readings should be noted without parallax error

3. The applied voltage, current should not exceed the maximum rating of the

given transistor.

Result

Inference

Questions

1. What are the characteristics of C.E amplifier?

2. What is the main application of CE amplifier?

3. What is meant by Bandwidth of an amplifier?



14

4. RC PHASE SHIFT OSCILLATOR

Aim To determine the frequency of oscillations of an RC Phase shift oscillator.

Apparatus Required

S.No Name of the Component/ Equipment


1 RC phase shift oscillator Circuit Board

____ 1


3 Cathode Ray Oscilloscope 20 MHz 1

Theory

In the RC phase shift oscillator, the combination RC provides self-bias for the

amplifier. The phase of the signal at the input gets reverse biased when it is amplified

by the amplifier. The output of amplifier goes to a feedback network consists of three

identical RC sections. Each RC section provides a phase shift of 600. Thus a total of

1800 phase shift is provided by the feedback network. The output of this circuit is in

the same phase as the input to the amplifier. The frequency of oscillations is given by

F=1/2π RC (6+4K)1/2 Where, R1=R2=R3=R,

C1=C2=C3=C and

K=RC/R.

Circuit Diagram

Fig A. RC Phase shift Oscillator



15

Procedure


2. Switch on the power supply.

3. Connect the CRO at the output of the circuit.

4. Adjust the RE to get undistorted waveform.

5. Measure the Amplitude and Frequency.

6. Compare the theoretical and practical values.

7. Plot the graph for amplitude versus frequency

Theoretical Values

f = 1 / 2 π RC √(6+4K)

Tabular Form

S.NO Theoretical

Frequency(Hz)

Practical

Frequency(Hz) % Error

Model Graph



16

Result

Inference

Questions

1. Define oscillator

2. What is BARKHAUSEN CRITERION?



17

5. CLASS-A POWER AMPLIFIER

Aim

To calculate the efficiency of single ended class-A power amplifier

Apparatus

S.No Name of the Component /equipment

Specifications Qty

1 Power transistor (BD139) VCE=60V,VBE=100V,IC=100mA,hfe=40 to 160

1

2 Resistor 1 KΩ , 10KΩ, 2.2KΩ,2.2KΩ 4 3 Capacitors 100 µF 1 4 Function Generator 0 -1MHZ 1 6 Regulated Power Supply 0-30V,1Amp 1 7 Transformer Operating temperature=ambient 1

Theory

The power amplifier is said to be class A amplifier if the Q point is selected

in such a way that output signal is obtained for a full input cycle. For class A power

amplifier position of Q point is at the centre of mid point of load line. For all values of

input signals the transistor remains in the active region and never enters into the cut

off or saturation region.

When an ac signal is applied, the collector current flows for 3600 of the input

cycle. In other words, the angle of collector current flow is 3600 i.e... One full cycle.

Here signal is faithfully reproduced at the output without any distortion. This is an

important feature of class A operation. The efficiency of class A operation is very low

with resistive load and is 25%. This can be increased to 50% by using inductive load.

In the present experiment inductive load is used.

Circuit Diagram



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Procedure

1. Connect the circuit as per circuit diagram.

2. Supply the required DC voltage

3. Note down the zero signal collector current and collector to emitter voltage

and then calculate Pdc.

Pdc.= VCE X IC

4. Feed an AC signal at the input and keep the frequency at 1 KHZ and

amplitude 5V.Connect a power o/p meter at the o/p.

5. Note down the AC power delivered to the load by changing the various

loads

6. Note down power output for each load

7. Then calculate efficiency for all loads.

8. Plot a graph between o/p power and load impedance. From this graph find

the impedance for which the o/p power is maximum. This is the value of

optimum load.

Model Graph



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Tabular Form

S.No RL(Ohm) D.C Input Power Pin (mw)

A.C output Power Pout (mw)

η=(Pac)/(Pdc)*100 (%)

Precautions

1. Connections should be done care fully.

2. Take the readings with out any parallax error.

3. Amplifier voltage and currents should not exceed maximum rating of the

transistor

Inferences

Result

Questions

1. What is power amplifier?

2. Why power amplifiers are called as large signal amplifiers?

3.What is the maximum collector efficiency of transformer load class A power amplifier?

4. What is the maximum collector efficiency of resistive load class A power amplifier?



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6. MICROPROCESSOR

1.1 General Description

VMC-85/9 is single board microprocessor training /development kit

configured around the most widely used microprocessor of today’s world.

It can be used to train engineers to control any industrial process and to

develop software for 8080 and 8085 based system. The kit communicates with the

outside world through a key board having 28 keys and seven segment hexadecimal

displays. The kit also has the capability of interacting with teletypewriter, CRT

terminal and an audio cassette recorder through the interfaces provided on the

board. Other devices like a serial printer or floppy drives etc. can be connected to the

kit.Vmc-85/9 provides 2k byte of RAM and 4k bytes of EPROM. The total on board

memory can be very easily expanded to 64k bytes in an appropriate combination of

RAM and ROM. 2k bytes of RAM has an address of 2000-27FF.The input/output

structure of VMC-85/9 provides 24 programmable I/O lines expandable to 48 I/O

lines. It has got 16 bit programmable Timer/Counter for generating any type of

counting etc. The on board 8259 provides 8 level of interrupts. The onboard battery

back up for RAM retains the memory content in the case of power failure. The on

board resident system monitor software is very powerful and provides various

software utilities. The kit provides various powerful software commands like SEND,

RECEIVE, INSERT, DELETE, BLOCK, MOVE, RELOCATE, STRING, FILL&

MEMORY COMPARE etc. which are very helpful in debugging/developing the

software.

VMC-85/9 is configured around the internationally adopted STD bus, which

is the most popular Bus for process control and real time applications. All the

address, Data and Control lines are available at the edge connector through the

buffers. The kit is fully expandable for any kind of application.

1.2 System Specification

C.P.U - 8bit Microprocessor, the 8085-A

MEMORY - Total on board capacity-64kbytes

RAM - 2k bytes (6116), space for further expansion

ROM - 4k bytes of EPROM loaded with powerful monitor program

(2732), space for further expansion using

2716/2732/2764/27128.

TIMER - 16 bit programmable timer/counter using 8253



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I/O - 24 I/O lines expandable to 48 I/O using 8255 PPI

INTERRUPTS- 8 different level interrupts through 8259

KEYBOARD - 10 keys for command.

16 keys for hexadecimal data entry.

1 key for Vector interrupt and 1 key for reset

LED DISPLAY- 6 seven segment displays, 4 for address field.

BUS - All data, address and control signals (TTL compatible)

Available at edge connector.

INTERFACE - 1) Audio cassette recorder.

2)20 mA current loop through SID/SOD lines.

3) RS-232-c through SID/SOD lines with auto baud rate.

4) One RS-232-c through 8251 with a programmable baud

rate.

5) EPROM programmer

POWER SUPPLY - +5V, 1.5 A for the kit

REQUIREMENT - +12 V ±5%, 250mA for CRT and TTY.

- +24 V ±5%, 100 mA for EPROM programmer interface

OPERATING TEMP - 0 to 50º C.

1.3 System Capabilities

1) Examine the contents of any memory location.

2) Examine/modify the contents of any of the up internal register.

3) Modify the contents of any of the RAM location.

4) Move a block of data from one location to another location.

5) Insert one or more instructions in the user program.

6) Delete one or more instructions from the user program.

7) Relocate a program written for some memory area to some other memory area.

8) Find out a string of data lying at a particular address.

9) Fill a particular memory area with a constant.

10) Compare two blocks of memory.

11) Insert one or more data bytes in the user’s program/data entry.

12) Delete one or more data bytes from the user’s program/data area.

13) Transmit a program from memory to audio cassette recorder.

14) Receive a program into memory from Audio cassette Recorder

15) Check the contents of an EPROM for blank.

16) List the contents of an EPROM into RAM area.

17) Verify the contents of an EPROM with any memory area.

18) Program an EPROM.



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19) *List a program or a block of data on the SIOD or prepare a paper tape.

20) Enter a program or a block of data from the SIOD using the paper tape.

21) Execute a program at full clock speed.

22) Execute a program in single step i.e , instruction by instruction.

23) Download HEX file to PC

(These facilities are available if serial I/O device are also connected to the kit).

Hardware Description

General

The system has got 8085-a as the Central processing unit. The clock frequency for

the system is 3.07MHz and is generated from a crystal of 6.14MHz. 8085 has got 8

data lines and 16 address lines. The lower 8 address lines and 8 bit data lines are

multiplexed. Since the lower 8 address bits appear on the bus during the first clock

cycle of a machine cycle and the 8 bit data appears on the bus during the second

and third clock cycle, it becomes necessary to latch the lower lower 8 address bits

during the first clock cycle so that the 16 bit address remains available in subsequent

cycles. This is achieved using a latch 74-LS-373.

Memory

VMC-85/9 provides 2Kbytes of CMOS RAM using 6116 chip and 4Kbytes of EPROM

using 2732. The total on board memory can be expanded up to 64Kbytes. The

various chips which can be used are 2716, 2732, 2764, 27128, 6116 and 6264.

There are 6 memory spaces provided on VMC-85/9. These six pages are divided into

three blocks of two memory spaces each. Each memory space can define any

address slots from 0000-FFFF depending upon the size of the memory chip. Same

way any block (i.e, two memory spaces) can be defined to have any of the chips,

2716/2732/2764/ 27128/ 6116/ 6264.

I/O Devices

The various I/O chips used in VMC-85/9 are 8279, 8255, 8253, 8251 and 8259. The

functional role of all these chips are given below:

8279

8279 is a general purpose programmable keyboard and display I/O interface device

designed for use with the 8085 microprocessor. It provides a scanned interface to 28

contact key matrix provided in VMC-85/9 and scanned interface for the six 7-segment

displays. 8279 has got 16 X 8 display RAM which can be loaded or interrogated by

the CPU. When a key is pressed, its corresponding code is entered in FIFO queue of



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8279 and can now be read by the microprocessor. 8279 also refreshes the display

RAM automatically.

8255

8255 is a programmable peripheral interface (PPI) designed to use with 8085

microprocessor. This basically acts as a general purpose I/O component to interface

peripheral equipments to the system bus. It is not necessary to have an external logic

to interface with peripheral devices since the functional configuration of 8255 is

programmed by the system software. It has got three I/O ports of 8 lines each( Port-

A, Port-B, and Port-C). Port C can be divided into two ports of four lines each named

as Port C upper and Port C lower. Any I/O combination of Port A, Port B, Port C

upper and Port C lower can be defined using the appropriate software commands.

VMC-85/9 provides six I/O ports of 8 lines each using two 8255 chips.

8253

This chip is a programmable interval timer/ counters and can be used for the

generation of accurate time delays under software control. Various other functions

can be implemented with this chip are programmable rate generator, event counter,

binary rate multiplier, real time clock etc. This chip has got three independent 16 bit

counters, each having a count rate of up to 2MHz. This first timer counter (Counter 0)

is being used for single step operation. The second timer counter (Counter 1) is

being used for generating programmable baud rate while using 8251. For single step

operation clock 0 signal of counter 0 is getting a clock frequency of 1.535MHz.

8251

This chip is a programmable communication interface and is used as a peripheral

device. This device accepts data characters from the CPU in parallel format and then

converts them into serial data characters for the CPU. This chip will signal the CPU

whenever it can accept a new character for transmission or whenever it has received

a character for the CPU. The CPU can read the complete status of it at any time.

8251 has been utilized in VMC-85/9 for CRT terminal and TTY interface.

Display

VMC-85/9 provides six digits of seven segment display. Four digits are for displaying

the address of any location or name of any register, where as rest of the two digits

are meant for displaying the contents of memory location or of a register. All the six

digits of the display are in hexadecimal notation.



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Buffers

Space has been provided on the board of VMC-85/9 for buffering the data, address

and control lines. One just needs to put buffers chips on the space provided for these

lines. All these address, data and control lines (TTL Compatible) are available to the

user at the PCB edge connector in the STD bus configuration. The buffer ICS used in

the VMC-85/9 are 74-LS-245 and 74-LS-240. In order to facilitate the multiprocessing

operation, all address, data and necessary control lines have been made Bi-

directional.

Interface

VMC-85/9 provides an interface for Audio Cassette Recorder. The user can store his

program into the recorder and can load back the program into the system memory as

and when required. The system provides two commands namely SEND AND

RECEIVE to store and to load from the Cassette tape. The subroutines required for

transmission and parallel to serial and serial to parallel conversion are all

incorporated into the system monitor program.

VMC-85/9 provides (0-20mA) current loop and RS-232-C interface through the SID

and SOD lines of 8085. The selection of (0-20mA) current loop and RS-232-C is

done by a switch at the left bottom side of the kit. An EPROM programmer interface

is provided on the board of kit to facilitate the programming of the 2716/2732/2732-

A/2764/27128-EPROMS. An additional RS232-C interface is provided through 8251

with programmable baud rate. Any serial device like printer, floppy drive or CRT

terminal etc. can be connected to it.

Battery back up

The VMC-85/9 provides a battery back up for the onboard RAM area. The battery

back up circuitry is based around LM-393. Since each socket can be defined to have

6264 or 6116 chip also, the VCC to each memory socket is given through the Black

box-2. The VCC of all the memory sockets are brought at the Black box-2 named as

VCC M0 to VCC M5. Any RAM area to be backed up by battery, its corresponding VCC

M point should be connected to CMOS +5V point in the Black box-2 and other points

should be connected to VCC point.



25

Simple Programs using 8085 microprocessor

Addition of two 8 – bit numbers

Masking of lower nibble

Address Hex code

Mnemonic Operand Comments

5100 3A LDA

4100

Load the contents of accumulator with the contents of memory location 4100

5101 00 5102 41 5103 E6

ANI

F0 (H) The contents of accumulator are logically ANDed with an immediate data F0 (H)

5104 F0

5105 32 STA

4101

Store the contents of accumulator in 4101 memory location

5106 01 5107 41 5108 76 HLT Stop the program.

Address Hex code


5100 3A LDA

4100


5101 00 5102 41 5103 47 MOV B, A Move the contents of

accumulator into register B 5104 3A

LDA

4101 Load the contents of accumulator with the contents of memory location 4101

5105 01 5106 41 5107 80 ADD B Add the contents of accumulator

with the contents of register B 5108 32

STA

4105 Store the contents of accumulator in 4105 memory location

5109 05 510A 41 510B 76 HLT Stop the program.



26

Subtraction of two 8 – bit numbers

1’s Complement of a given Byte

Address Hex code


5100 3A LDA

4100


5101 00 5102 41 5103 2F CMA Complement the contents of

accumulator 5104 32

STA

4105 Store the contents of accumulator in 4105 memory location.


2’s Complement of a given Byte

Address Hex code


5100 3A LDA

4100


5101 00 5102 41 5103 2F CMA Complement the contents of

accumulator 5104 3C INR A The contents of accumulator are

incremented by ‘1’ 5105 32

STA

4105 Store the contents of accumulator in 4105 memory location.


Address Hex code


5100 3A LDA

4100


5101 00 5102 41 5103 47 MOV B, A Move the contents of

accumulator into register B 5104 3A

LDA

4101 Load the contents of accumulator with the contents of memory location 4101

5105 01 5106 41 5107 80 SUB B Subtract the contents of register

B from the contents of accumulator

5108 32 STA

4105

Store the contents of accumulator in 4105 memory location

5109 05 510A 41 510B 76 HLT Stop the program.



27

Addition of two 16 – bit numbers

Subtraction of two 16 – bit numbers

Address Hex code


5100 2A LHLD

4100

Load HL pair the contents of memory location 4100 5101 00

5102 41 5103 EB XCHG Exchange the contents of HL pair

with the contents of DE pair 5104 2A

LHLD

4102 Load HL pair the contents of memory location 4102 5105 02

5106 41 5107 19 DAD D Add the contents of HL register

pair with the contents of DE register pair

5108 22 SHLD

4105

Store the contents of HL pair in 4105 memory location 5109 05

510A 41 510B 76 HLT Stop the program.

Address Hex code


5100 2A LHLD

4100

Load HL pair the contents of memory location 4100 5101 00

5102 41 5103 EB XCHG Exchange the contents of HL pair

with the contents of DE pair 5104 2A

LHLD

4102 Load HL pair the contents of memory location 4102 5105 02

5106 41 5107 7B MOV A, E Move the contents of register E

into accumulator

5108

95

SUB L

Subtract the contents of register L from the contents of accumulator

5109 32 STA 4104 Store the contents of accumulator in 4104 memory location

510A 04 510B 41 510C 7A MOV A, D Move the contents of register D

into accumulator 510D 94 SUB H Subtract the contents of register

H from the contents of accumulator

510E 32 STA 4105 Store the contents of accumulator in 4105 memory location

510F 05 5110 41 5111 76 HLT Stop the program.



28

ADDITIONAL EXPERIMENTS



29

1. PN - JUNCTION DIODE CHARACTERISTICS

Aim

a) To Plot V-I characteristics of PN junction diode both in

i) Forward Bias

ii) Reverse Bias.

b) To calculate the Forward Static and dynamic resistance of the diode at a

particular operating point.

Apparatus Required

S.No Name of the Equipment/ Component


1 Diode 1N4001 VR (max)=1000V

IR(max)=50mA 1

2 Resistor 1KΩ Power rating=0.5w Carbon type

1

3 Regulated power Supply 0-30V,1A 1

4 Cathode Ray Oscilloscope 20MHz 1

5 Voltmeter 0-1V, 0-10V 1

6 Ammeter 0-100mA, 0-30µA 1

Theory

A diode conducts in forward bias (when anode is positive with respect to

cathode).It does not conduct in reverse bias. When diode is forward biased the

barrier potential at the junction reduces. The majority carries then diffuse across the

junction. This causes the current to flow through the diode. In reverse bias, the

barrier potential increase, and almost no current can flow through the diode.

From the forward characteristics at a given operating point one can determine the

static resistance Rd and dynamic resistance rd of the diode. The static resistance is

defined as ratio of the dc voltage to dc current. It is given by

Rd= V / I

The dynamic resistance is the ratio of a small change in voltage to the corresponding

change in current. It is given by

rd =∆ V /∆ I



30

Circuit Diagram

Fig A: Forward Bias Fig B: Reverse Bias

Procedure

a) Forward Bias


2. Apply the supply voltage, VIN in steps of 0.5V from 0V to 6V.

3. Measure the voltage, V across the diode from voltmeter and current I

through the diode from ammeter for different steps of applied voltage, VIN.

4. Draw a graph between the voltage, V and current, I.

5. At suitable operating-point, calculate the static and dynamic resistances of

the diode.

b) Reverse Bias

1. Connect the circuit as shown in Fig ‘B’.

2. Apply the supply voltage, VIN in steps of 0.5V from 0V to 6V.

3. Measure the voltage, V across the diode from voltmeter and current, I through

the ammeter for different steps of applied voltage, VIN.

4. Draw a graph between the voltage V and current I.



31

Tabular Forms

a) Forward Bias

S. No.

Applied

voltage,

VIN (volts)

Diode Voltage

V (Volts) Diode Current

I (mA )

b) Reverse Bias

S.NO Applied voltage,

VIN (Volts)

Diode Voltage

V (Volts)

Diode Current

I(µA)



32

Model Graph

Fig C: VI - Characteristics

Calculations

1. Static Resistance, Rd= V / I=

2 .Dynamic Resistance, rd =∆ V /∆ I =

Precautions

1. Connections must be done very carefully.

2. Readings should be noted without parallax error.

3. The applied voltage, current should not exceed the maximum rating of the diode.

Result

Inference

Questions

1. Define Cut-in voltage of PN junction diode.

2. List the applications of PN-junction diode.

3. Give typical values of cut-in voltage for both Germanium and Silicon.



33

2. HALF WAVE RECTIFIER

Aim

To observe the working of half wave rectifier with and without filter & calculate

its ripple factor.

Apparatus Required

S.No Name of the Equipment/

component


1 Transformer 6-0-6V,500mA 1

2 Resistor(1KΩ) Power rating=0.5W Carbon type

1

3 Diode(1N4001 or 1N4007) VR (max)=1000V

IR(max)=50mA

1

4 Capacitor(1000µF/25V) Electrolytic type, Voltage rating= 1.6v

1

5 Cathode Ray Oscilloscope 20MHz 1

6 Digital Multimeter 4 ½ digit

1

Theory

The ac voltage across the secondary winding of the transformer changes

polarity after every half cycle of ac input voltage. The diode is forward biased and

hence it conducts current. During the negative half cycle of input ac voltage, the

diode is reverse biased and it conducts no current. In this way, the current flowing

through the resistor is in the same direction. Hence DC output is obtained across the

resistor.

When a capacitor filter is placed across the rectifier, output is parallel to the

load resistance, the pulsating DC voltage can be made as a pure DC voltage is

applied to the capacitor filter, as the rectifier voltage increases, it charges and

supplies current to the load at the end of the quarter cycle, the capacitor charges to

peak value Vm of the rectifier voltage. Now the capacitor starts to discharge through

load and voltage across it will decrease very slightly because the next voltage peak

comes and charges the capacitor. This process is repeated and the output waveform

is obtained.



34

Circuit Diagram

Fig A: Half wave Rectifier without Filter

Fig B: Half wave Rectifier with Filter

Procedure


2. Apply the supply voltage 230V, 50Hz at the primary winding of the

transformer.

3. Connect the CRO at the secondary winding of the transformer and measure

the maximum voltage (Vm) and time period (T) at the input. Calculate the RMS

input voltage using Vrms=Vm/2.

4. Now connect the multimeter at the secondary and measure the rms voltage of

the input signal. The rms voltage measured by both CRO and multimeter

must be same.

5. Now connect the CRO across the load resistor and measure the maximum

voltage, Vm and time period, T of the output voltage. Calculate the rms and

average (dc) values of the output signal using the formula V rms = Vm / 2 and

Vdc=Vavg = Vm / π and measure the AC and DC voltages across the load

resistor using multimeter and calculate the ripple factor as r = Vac / V dc

6. calculate the ripple factor using theoretical formula r = [ [(Vrms / Vdc )

2 – 1]]1/2

7. Now close the switch ‘s’ to connect the capacitor filter across the load

resistor, RL then connect the CRO at output terminals and measure the both

ripple AC voltage and DC voltages. Also measure the time period of ripple AC

voltage.

8. Tabulate the values with filter and without filter.



35

Observations

Fig C: Input Waveform

Fig D: Output Wave form without filter

Fig E: Output Wave form with filter



36

Calculations

Input waveform

a) Using CRO

Vm =

Vrms = Vm/√2 =

T=

b) Using multimeter

Vrms =

Output waveform without filter

a) Using CRO:

Vm =

Vrms = Vm/2 =

Vdc = Vm/π =

Ripple factor, r = [ [(Vrms / Vdc )2 – 1]]1/2 =

b) Using multimeter

Vac =

Vdc =


Output waveform with filter

a) Using CRO:

Vm =

Vrpp=

Vac= Vrpp/4√3 =

Vdc = Vm- Vrpp/2 =


Charging time period, T1=

Discharging time period, T2=

T= T1+ T2=

b) Using multimeter

Vac =

Vac =




37

Tabular form

Half-Wave

Rectifier

With-Out Filter With Filter

CRO Multimeter CRO Multimeter

Vac (V)

Vdc (V)

Ripple Factor, r

Precautions


2. Readings should be taken without any parallax error.

3. The applied voltage and current should not exceed the max ratings of the

diode.

Result

Inference

Questions

1. Give theoretical values for ripple factor and efficiency

2. What is the need of a Filter circuit



38

3. COMMON BASE TRANSISTOR CHARACTERISTICS

Aim

1. To plot the input and output static characteristics of transistor in common

base configuration.

2. To calculate the input dynamic resistance from the input characteristics and

output dynamic resistance from the output characteristics of the given

transistor.

Apparatus required

S.No Name of the

Equipment/Component


1 Transistor BC107 Icmax=100mA PD=300mw Vceo=45V Vbeo=50V

1

2 Resistors 1KΩ,100Ω Power rating=0.5w Carbon type

1


4 Voltmeters 0-1V, 0-10V 1

5 Ammeters 0-10mA 2

Theory

In common base configuration, the base is common to both input and

output. For normal operation the Base–Emitter junction is forward biased and base

collector junction is reverse biased .The input characteristic are plotted between IE

and VEB keeping the voltage VCB constant. This characteristic is very similar to that of

a forward biased diode. The input dynamic resistance is calculated using the formula

ri = ∆VEB / ∆IE at constant VCB.

The output characteristics are plotted between IC and VCB keeping IE constant. These

curves are almost horizontal. The output dynamic resistance is given by

ro = ∆VCB / ∆ IC at constant IE.

At a given operating point, current gain can be defined as follows

Current gain, α = ∆ IC / ∆ IE at constant VCB.



39

Circuit Diagram

Fig A: Transistor Common Base Configuration

Procedure


1. Connect the circuit as shown in fig A

2. Keep the voltage VCB as constant at 1V by varying VCC.

3. Vary the input voltage, VEE in steps of 1V from 0V to 10V.

4. Measure the voltage, VBE from voltmeter and current, IE through the

ammeter for different values of input voltages.

5. Repeat the step 3 and 4 for VCE values of 5V and 10V.

6. Draw input static characteristics for tabulated values.


1. Fix input emitter current, IE at constant value say at 0, 2 and 3mA

respectively.

2. Vary the output voltage, VCC in steps of 1V from 0V to10V.

3. Measure the voltage, VCB from voltmeter and current IC through the

ammeter for different values of input voltages.

4. Repeat above steps 2 and 3 for various values of different values of IE.

5. Draw output static characteristics for tabulated values.

6. At suitable VCB, calculate the value of α.



40

Tabular Forms


S.No

Applied

Voltage

VEE(V)

VCB = 1V VCB = 5V VCB = 10V

VBE (V) IE(mA) VBE(V) IE mA) VBE(V) IE(mA)


S.No

Applied

Voltage

VCC(V)

IE = 0mA IE = 2mA IE = 3mA

VCB(V) IC(mA) VCB(V) IC(mA) VCB(V) IC(mA)



41

Model graphs

Fig B: Input Characteristics Fig C: Output Characteristics

Model Calculations


ri = ∆VBE/ ∆IE at VCB constant =


Output dynamic resistance ro = ∆VCE / ∆ IC at IE constant

Current gain, α = ∆IC / ∆IB at VCB constant =

Result

Inferences

Questions

1. Give collector current equation in CB configuration

2. Give the applications of Transistor



42

4. SCR CHARACTERISTICS

Aim

a) To obtain the forward characteristics of SCR.

b) To identify the break over voltage at different gate voltages.

Apparatus Required

S. No Name of the

Equipment/Component Specifications Quantity

1 SCR(TYN 604)

IH (max.)=4A

P (max.)=10W

VH (max.)=5V

1

2 Variable resistor 0-10KΩ 1

3 Resistor - 1KΩ Power rating=0.5w Carbon type

1


5 Ammeters 0-50mA 2

6 Digital multimeter 4 ½ digit 1

Theory

SCR acts as a switch when it is forward bias. When the gate is kept open

IG = 0 and the operation of SCR is similar to PNPN diode. When IG < 0 the break over

voltage required to allow the current through SCR is large. When IG > 0 less amount

of break over voltage is sufficient. With very large positive gate currents break over

may occur at a very low voltage such that the characteristic of SCR is similar to

ordinary PN diode. Once the SCR is turned ON, the gate losses control and cannot

be used to switch the device OFF. One way to turn the device OFF is by lowering the

anode current below the holding current by reducing the supply voltage below the

holding voltage, keeping the gate open. At this point even if the gate signal is

removed the device keeps ON conducting, till the current level is maintained to a

minimum level of holding current.



43

Circuit Diagram 10KΩ

Fig A: SCR Characteristics

Procedure


2. Initially some gate current is applied by varying the V2.

3. Voltage V1 is slowly varied and different reading of ammeter (IA) and voltmeter

(VAK) are taken.

4. The voltage at which the SCR is triggered and heavy current flows is noted as

VBO, forward breakdown voltage.

5. Now apply the gate current more than IG.

6. Steps 3 & 4 are repeated and note down corresponding currents and voltages.

7. Draw the graph between VAK and IA at different gate currents.



44

Tabular form

S. No

Applied

Voltage,V1

(V)

IG1 = 3mA IG > IG1

VAK (V) IA (mA) VAK (V) IA (mA)

Model Graph



45

Result

Inference

Questions

1. What are the advantages of Thyristor Family?

2. Define the following terms

a) Holding current

b) Forward breakover voltage

3. What are the different operating regions of SCR?

4. List the applications of SCR?



46

5. FRQUENCY MEASUREMENT USING LISSAJOUS FIGURES

Aim

To measure frequency of a sinusoidal signal using Lissajous figures

Apparatus Required

S.No Name of the Equipment Specification Quantity 1 Oscilloscope 0-30MHz 1 2 Signal generators 20 Vp-p 1MHz 2 3 CRO probes 2

Theory

An important electrical quantity with no equivalent in DC circuits is frequency.

Frequency measurement is very important in many applications of alternating

current, especially in AC power systems designed to run efficiently at one frequency

only.

Lissajous pattern helps to measure frequency. When sinusoidal voltages

simultaneously applied to vertical and horizontal plates, the pattern, appearing on the

CRT is called as Lissajous pattern. In this method the standard known frequency (fH)

is applied to X-plate or horizontal plate. The unknown frequency (fV) is applied to Y-

plate or vertical plate. Then a Lissajous pattern with loops is obtained. Then the

unknown frequency (fV) can be measured by the following relationship.

fV / fH = No. of loops cut by horizontal line / No. of loops cut by vertical line

Equal voltages of same frequency but of different phase angles- cause the

pattern to vary from a straight diagonal line to ellipses of different eccentricities.

Lissajous patterns can be obtained on the screen which depends on the ratio of two

frequencies.In general, the shape of the Lissajous figures depends on amplitude,

phase difference and ratio of the frequency of the two waves.

In cases where the frequencies of the two AC signals are not exactly a simple

ratio of each other (but close), the Lissajous figure will appear to “move,” slowly

changing orientation as the phase angle between the two waveforms rolls between 0o



47

and 180o. If the two frequencies are locked in an exact integer ratio between each

other, the lissajous figure will be stable on the view screen of the CRT

Consider the following examples and their given vertical/horizontal frequency ratios.

Fig. 1.1: Lissajous figures on an oscilloscope, displaying 2:1, 3:1, 4:1 and 3:2.

2:3 4:3 4:5

Fig. 1.2: Lissajous figures on an oscilloscope, displaying 2:3, 4:3 and 4:5 relationship between the frequencies of the vertical and horizontal sinusoidal inputs, respectively

Measuring Arrangement



48

Calculation Frequency Measurement:

fV / fH = No. Of loops Horizontal touches / No. Of loops Vertical touches.

y

x y x Procedure

1. Set the CRO to XY mode 2. Adjust (V/division) of both the channels (X and Y) to be the same.

3. The test signal (unknown frequency) is fed to one of the channels(say Y)

4. A reference signal (of known frequency) is fed to the other channel (x).

5. Two lines are drawn, one vertical and one horizontal so that they do not

pass through any intersection on Lissajous pattern. Then the number of

intersections of the horizontal and vertical lines with the Lissajous patterns

are counted separately.

6. Then calculate the unknown frequency (fV) by the following relationship.

fV / fH = No. of loops cut by horizontal line / No.of loops cut by vertical line

Precautions

1. Connections should be made properly

2. CRO probe testing must be done

Result

Inference



49

Questions

1. What is a Lissajous pattern?

2. To which mode the CRO has to be set to observe the Lissajous patterns?

3. On which parameters, the shape of Lissajous patterns depend?

4. To which plate the unknown frequency signal should be applied?

1. transistor ce characteristicsece.gecgudlavalleru.ac.in/pdf/manuals/edc-labmanual.pdf · readings...

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