10 8086 instruction set
TRANSCRIPT
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8086 μP Instruction Set
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- Data Transfer Group- Arithmatic Group- Logical Group- Control transfer Group- Miscellaneous Instruction Group
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Data Transfer Group
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Movement of data.
- Register to Register
- Immediate data to Register
- Register to Memory
- Memory to Register
- Immediate data to Memory
- Memory location to memory location – for string operation only.
- I/O port and Register
- Stack and Register
RB = (8 bit) Byte Register
AL,AH,BL,BH,CL,CH,DL,DH
RW = (16 BIT) Word Register
AX, BX, CX, DX, SI, DI, BP, SP, IP, CS, DS, SS, ES.
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Data 8 – 8 bit data
Data 16 – 16 bit data
DADDR – Data (operand) address in memory
- Specified by any data memory addressing mode.
- Register to Register operation
MOV RBD, RBS
(RBD) ← (RBS)
MOV RWD,RWS
(RWD) ← (RWS)
Note – Data movement between segment Registers are not allowed.
Source
Destination
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- Memory to Register Operation
MOV RB, DADDR
RB ← (EA)
MOV RW, DADDR
RW ← (EA)
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DADDR i.e. memory address will depend on the addressing mode –
- Direct Addressing – [addr]- Register Indirect – [BP or BX or SI or DI]- Base + Index – [BP SI]
[BX DI]- Register relative - BP SI
BX DI
- Register Relative BP SI
BX DI
- Base + Index BP SI
Register Relative BX DI
+ dispor
+
or
+ + disp
LIST
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- Register to Memory
MOV DADDR, RB
(EA) ← RB
MOV DADDR, RW
(EA) ← RW
- Immediate data to Register
MOV RB, DATA 8
RB ← DATA 8
MOV RW, DATA 16
RW ← DATA 16
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- Immediate data to memory
MOV DADDR, Data 8 or Data 16
(EA) ← DATA 8 or DATA 16
- Register to Segment Register
MOV SR, RW SR may be (CS, DS, SS, ES)
SR ←RW
Note – Segment Register to segment Register data transfer not
allowed.
- Segment Register to Register
MOV RW, SR
RW ← SR
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- Memory to Segment Register
MOV SR, DADDR
SR ← (EA)- Segment Register to Memory
MOV DADDR, SR
(EA) ← SR
- Memory to Accumulator (Direct Addressing)
MOV AL, Label
AL ← (EA)
MOV AX, Label
AX ← (EA)
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- Accumulator to memory (Direct Addressing)
MOV Label, AL
(EA) ← AL
MOV Label, AX
(EA) ← AX
- Stack operation (16 bit opeartion) – ( uses Stack segment Register for accessing stack)
- Stack to memory
POP DADDR
(EA) ← ((SP)) , (SP) ← (SP) + 2- Stack to Register
POP RW or SR
RW or SR ← ((SP)) , (SP) ← (SP) + 2
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- Stack to flag RegisterPOPF(SFR) ← ((SP)), (SP) ← (SP) + 2
Status flag Register.- Register to Stack
PUSH RW or SR(SP) ← (SP) – 2 ((SP)) ← RW or SR
- Memory to StackPUSH DADDR(SP) ← (SP) – 2 ((SP)) ← (DADDR)PUSHF
(SP) ← (SP) – 2 ((SP)) ← (SFR)
Higher byteLower byte
xxXX - 1
XX - 2
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Pointer Operations- Load pointer using DS
LDS RW, DADDR
RW ← (EA) Offset
Segment
(DS) ← (EA + 2)
- Load offset to Register
LEA RW, DADDR
RW ← (EA)
offset of location DADDR
xxXX + 1XX + 2XX + 3
xx + 3XX + 2XX + 1XX offset
Segment
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- Load pointer using ES
LES RW, DADDR
(RW) ← (EA)
(ES) ← (EA + 2)
xx XX + 1XX + 2XX + 3
offset
Segment
xx + 3XX + 2XX + 1XX offset
Segment
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String OperationsLoad string byte or word to Acc.
LODSB/LODSW
Transfer string element addressed by
DS : SI to Acc.
(DF) = 0 SI is incremented by 1 for byte operation.
SI is incremented by 2 for word operation.
(DF) = 1 SI is decremented by 1 for byte operation.
SI is decremented by 2 for word operation.
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LODSB – Load string byte
(AL) ← (DS : SI), (SI) ← (SI) + 1 if (DF) = 0
(SI) ← (SI) – 1 if (DF) = 1
LODSW – Load string word
(AX) ← (DS : SI), (SI) ← (SI) + 2 if (DF) = 0
(SI) ← (SI) – 2 if (DF) = 1
LODSD – Load string Doubleword
(AX) ← (DS : SI), (SI) ← (SI) + 4 if (DF) = 0
(SI) ← (SI) – 4 if (DF) = 1
DF = 1
Byte
WordWord
DF = 0
yyxx
Byte
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Store string byte or word.
STOSB/STOSW stores string byte/word in Acc. to location at
ES : DI.
(DF) = 0 DI is incremented by 1 for byte
DI is incremented by 2 for word.
(DF) = 1 DI is decremented by 1 for byte.
DI is decremented by 2 for word.
STOSB
(ES : DI) ← (AL), (DI) ← (DI) + 1 if (DF) = 0
(DI) ← (DI) – 1 if (DF) = 1
STOSW
(ES : DI) ← (AX), (DI) ← (DI) + 2 if (DF) = 0
(DI) ← (DI) – 2 if (DF) = 1
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MOVSB/MOVSW – Move string byte or word from one memory location to another memory location.
- Combination of LODSB/LODSW & STOSB/STOSW
Copies data from memory location addressed by DS : SI to location ES : DI.
MOVSB
(ES : DI) ← (DS : SI), (SI) ← (SI) + 1, (DI) ← (DI + 1)
if (DF) = 0
(SI) ← (SI) – 1, (DI) ← (DI) – 1, if (DF) = 1
MOVSW
(ES : DI) ← (DS : SI), (SI) ← (SI) + 2, (DI) ← (DI + 2)
if (DF) = 0
(SI) ← (SI) – 2, (DI) ← (DI) – 2 if (DF) = 1
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Repeat String Operation
REP
Repeats string operation while (CX) > 0. After each string opeartion CX is decremented and Zero Flag is tested.
Example-
MOV DS, -
MOV DI, -
MOV ES, -
MOV SI, -
MOV CX,0010H
CLD ;(DF) = 0
REP MOVSB
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REPE/REPZ – Repeat equal/ Repeat zero.
Repeats the execution of string instruction while CX > 0 and Zero Flag is set. CX is decremented and Zero Flag is tested after each string operation. Used with compare string instruction.
REPNE/REPNZ – Repeat not equal/Repeat not zero.
Repeats the execution of string instruction while CX > 0 and Zero Flag is not set. i.e flag is tested after each string operation.
Note – REPE/REPZ and REPNE/REPNZ are used for string comparison.
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LAHF – Load register AH with Flags
AH = SF ZF ×× AF ×× PF ×× CF
SAHF – Store AH Register into flags.
Flags affected – SF, ZF, AF, PF, CF
XCHG – Exchange contents- Register and Register
XCHG RB1, RB2 / XCHG RW1, RW2
(RB1) ←→ (RB2) (RW1) ←→ (RW2)- Memory and Register
XCHG RB, DADDR / XCHG RW, DADDR
(RB) ←→ (DADDR) (RW) ←→ (DADDR)
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XLAT – Translate
Replace the byte in AL with byte from users table, addressed by BX. Original value of AL is index into translate table.
MOV BX, OFFSET TABLE
MOV AL, 00H
XLAT
(AL) ← 5
AL [BX+AL] 3
5(BX)
Base of table
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Input – Output - IN AL, P8 – Byte operation (AL) ← (P8)- IN AL, DX – port no. In (DX) (AL) ← (P.DX)
IN AX, P8 – word opeartion(AL) ← (P8 ), (AH) ← (P8 + 1) IN AX, DX(AL) ← (P.DX), (AH) ← (P.DX + 1)
OUT P8 , AL (P8 ) ← (AL) OUT DX, AL (P.DX) ← (AL) OUT P8 , AX (P8) ← (AL), (P8 + 1) ← (AH) OUT DX, AX (P.DX) ← (AL), (P.DX + 1) ← (AH)
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Arithmetic Group
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ADD, SUB, MUL, DIV of binary numbers (signed/ unsigned). ADD, SUB, MUL, DIV of ASCII or unpacked decimal no. (1 digit
per byte). ADD, SUB of packed BCD no. (2 digit per byte). INC, DEC by 1. CMP (Comparision) of two bytes or words. Adjustment operations in case of BCD operations.
- Addition – Register to Register
ADD RBD, RBS ADD RWD, RWS
(RBD) ← (RBD) + (RBS) (RWD) ← (RWD) + (RWS)
- Register to memory
ADD DADDR, RB ADD DADDR, RW
(EA) ← (EA) + (RB) (EA) ← (EA) + (RW)
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- Memory to Register
ADD RB, DADDR ADD RW, DADDR
- Immediate Data to Register
ADD RB, Data 8 ADD RW, Data 16
- Immediate Data to Memory
ADD DADDR, Data 8 ADD DADDR, Data16
Add with Carry (ADC) - (CF is also added)
- Register to Register
ADC RBD, RBS ADC RWD, RWS
(RBD) ← (RBD) + (RBS) + (CF) (RWD) ← (RWD) + (RBS) + (CF) Same for memory & immediate data
ADC opr1 opr2
(opr1) ← (opr1) + (opr2) + (CF)
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Subtraction
- Register to Register
SUB RBD, RBS SUB RWD RWS
(RBD) ← (RBD) – (RBS) (RWD) ← (RWD) – (RWS) Same for memory and Immediate data.
Subtraction with Borrow
SBB opr1, opr2
(opr1) ← (opr2) – (opr2) – (CF)
- Register to Register operation
SBB RBD, RBS SBB RWD RWS
(RBD)←(RBD)–(RBS)–(CF) (RWD)←RWD)–(RWS)– (CF) Same for other addressing modes.
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Multiplication
Unsigned multyply Signed multiply
MUL Src IMUL Src
Src may be Register or memory location.
If src is byte then-
- Other multiplicand in AL
- Results in AX
If src is word then
- Other multiplicand in AX.
- Result in DX : AX.- MUL RB IMUL RB
(AX) ← (AL) × (RB) (AX) ← (AL) × (RB)
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- MUL RW - IMUL RW
(DX) . (AX) ← (AX) × (RW) (DX) (AX) ← (AX) × (RW)
- MUL DADDR - IMUL DADDR
(AX) ← (AL) × (EA) (AX) ← (AL) × (EA)
- MUL DADDR - IMUL DADDR
(DX)(AX) ← (AX)x(EA) (DX)(AX) ← (AX)x(EA)
BYTE PTR or WORD PTR is used to differentiate the byte or word operation.
DivisionUnsigned Signed
DIV src IDIV src
- Src may be Register or memory location.
If src = byte value –> AX divided by src.
- Quotient in AL.
- Reminder in AH.
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If src = word then DX : AX is divided by src.
- Quotient in AX.
- Reminder in DX.
- DIV RB - IDIV RB
(AX) ← (AX)/(RB) (AX) ← (AX)/(RB)
- DIV RW - IDIV RW
(DX)(AX) ← (DX)(AX)/(RW) (DX)(AX) ← (DX)(AX)/(RW)
- DIV DADDR (For byte) - IDIV DADDR
(AX) ← (AX)/(EA) (AX) ← (AX)/(EA)
- DIV DADDR (For word) - IDIV DADDR
(DX)(AX) ← (DX) (AX)/(EA) (DX)(AX) ← (DX) (AX)/(EA)
BYTE PTR or WORD PTR is used to differentiate the
operation.
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Increment & Decrement- INC RB - DEC RB
(RB) ← (RB) + 1 (RB) ← (RB) – 1
- INC RW - DEC RW
(RW) ← (RW) + 1 (RW) ← (RW) – 1
- INC DADDR - DEC DADDR
(EA) ← (EA)+ 1 (EA) ← (EA) – 1
Use BYTE PTR for byte operation.
Use WORD PTR for word operation.
CompareCMP dest.src
- dest – src is calculated, flags are updated
dest, src remains unchanged
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Register operation –
CMP RBD, RBS CMP RWD, RWS
Register to memory –
CMP DADDR, RB CMP DADDR, RW
Memory to register –
CMP RB, DADDR CMP RW, DADDR
Immediate data to memory –
CMP DADDR, Data 8 CMP DADDR, Data 16
Immediate data to Register –
CMP RB, Data 8 CMP RW, Data 16
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Compare Strings
CMPSB/ CMPSW
- Destination string byte subtracted from source string.
- Flags updated.
- Source string represented by DS : SI.
- Destination string represented by ES : DI.
- If (DF) = 0 - Auto increment mode
(SI) ← (SI) + 1 (DI) ← (DI) + 1
- Byte operation
(SI) ← (SI) + 2 (DI) ← (DI) + 2
- Word operation
- If (DF) = 1
(SI) ← (SI) - 1 (DI) ← (DI) – 1 (Byte operation )
(SI) ← (SI) - 2 (DI) ← (DI) – 2 (Word operation )
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- CMPSB - CMPSW
(DS : SI) – (ES : DI) (DS : SI) – (ES : DI)
- If (DF) = 0
(SI) ← (SI) + 1 (SI) ← (SI) + 2
(DI) ← (DI) + 1 (DI) ← (DI) + 2
- If (DF) = 1
(SI) ← (SI) - 1 (SI) ← (SI) - 2
(DI) ← (DI) - 1 (DI) ← (DI) - 2
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Scan String- Compares the value of string byte or word defined by ES:DI from ACC.
- Flags Set
- DI incremented or decremented depending on (DF) and byte/word operation.
- SCASB - SCASW
(AL) – (ES:DI) (AX) – (ES:DI)
- If (DF) = 0
(DI) ← (DI) + 1 (DI) ← (DI) + 2
- If (DF) = 1
(DI) ← (DI) - 1 (DI) ← (DI) - 2
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Conversion from one form to other
- Byte to word - CBW
(AL) converted to (AX) – Sign extended.
- Word operation - CWD
(AX) converted to (DX:AX) – Sign extended.
BCD and ASCII Arithmetic
- Normal arithmetic instructions used for BCD number and ASCII numbers (30H to 39H for 0 to 9).
- For cash Register applications – Now out dated.
- 8086 provides instructions to adjust the result back to BCD or ASCII.
- BCD adjustment instruction – BCD number in AL is packed BCD format.
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DAA – Decimal Adjust After Addition
Used after ADD or ADC instruction to adjust the result back into packed BCD format.
MOV AL,24H (24H is BCD no.)
ADD AL,28H - Result = 4CH
DAA - Converts it into 52H
DAS – Decimal Adjust After Subtraction
Used after SUB or SBB instruction to adjust result back to BCD (packed format).
MOV AL, 91H
SUB AL, 56H ; Result = 3BH
DAS ; Converts into 35H
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ASCII Adjustment Instruction
ASCII coded numbers - 30H for 0 to 39H for 9. Instructions use Register AX for source and destination.
AAA – ASCII Adjustment After Addition
Used after ADD or ADC to adjust result back in (AX)
MOV AX, 39H ; ASCII code for 9
ADD AL, 35H ; ASCII code for 5
; Result = 6EH
AAA - Adjust result as 0104H in AX
ADD AX, 3030H ; Result in ASCII
; 3134H is
AH – 31H ; ASCII code for 1
AL – 34H ; ASCII code for 4
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ASCII Adjustment Before Division
- Appears before division.
- AX Register has two digit unpacked BCD number (not ASCII)
- After adjusting the AX Register with AAD, it is divided by an unpacked BCD number to generate a single digit result in AL. Reminder in AH.
AAD basically converts unpacked BCD number in AX into
binary number.
MOV AX,0305H ; unpacked BCD number 35 decimal
AAD
MOV CL,5
DIV CL ; Result will be 7 in AL. AH will be zero
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AAM - ASCII adjust after multiplication
- Used after multiplication of two one digit unpacked BCD numbers.
MOV AL, 9 ; BCD for 9
MOV DL, 5 ; BCD for 5
MUL DL ; Result = 2DH
AAM ; Converts into 0405H in AX i.e 45 in unpacked BCD format.
AAS – ASCII adjust after subtraction
- Adjust AX Register after subtraction.
- If 31H (i.e 1) is subtracted from 35H , the result if for. No correction is required . AAS will not modify AH or AL. If 38H is subtracted from 37H, then result will be 01 in binary.
AAS will modify the content as follows -
AL = 09
No. In AH decremented by 1
i.e 29 in BCD unpacked format.
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Logical Instructions
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AND OR XOR, dest, src
(dest) ← (dest.) opr. (source)
Register to Register – AND RBD, RBS/ AND RWD, RWS
(RBD) ← (RBD). AND. (RBS)
Register to Memory – OR DADDR, RB/ OR DADDR, RW
(EA) ← (EA) .OR. (RB)
Memory to Register – XOR RB, DADDR/ XOR RW, DADDR
(RB) ← (RB) .XOR. (EA)
Immediate Data to Register – AND RB,Data8/ AND RW,Data16
(RB) ← (RB) AND Data 8
Immediate Data to Memory– OR DADDR, Data8,
OR DADDR, Data 16
(EA) ← (EA) OR Data 8 / Data 16
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Test dest, src
- Performs (dest) AND (src) logical AND of two operands.
- Flags are updated.
- Result is not saved.
Register and Register Operation
TEST RBD, RBS TEST RWD, RWS
(RBD) .AND. (RBS)
Register and Memory
TEST DADDR, RB TEST DADDR, RW
(EA) . AND. (RB)
Register and Immediate Data
TEST RB, Data 8 TEST RW, Data 16
(RB) .AND. Data 8
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Memory and Immediate Data
TEST DADDR, Data 8 TEST DADDR, Data 16
(EA) .AND. Data8
NOT dest - compliment (Logical NOT)
- Inverts the bits of destination.
Register operand – NOT RB NOT RW
(RB) ← NOT (RB)
Memory operand – NOT DADDR
(EA) ← NOT (EA)
NEG dest – 2’s compliment
- Subtracts the destination from 0.
- Saves result in destination.
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Register operand – NEG RB NEG RW
(RB) ← NOT (RB) + 1
Memory operand – NEG DADDR
(EA) ← NOT (EA) + 1
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Shift/ Rotate Instructions
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- RCL dest, count – Rotate through carry Left the count number of bits.
- Rotate the bits in the destination to the left ‘count’ times through carry flag.
- Carry flag holds the last bit rotated out.
- Count may be 1 or content of CL Register (i.e either N = 1 or N = CL)
RCL RB/RW, N
RCL DADDR, N
CF
CF
7 0
15 8 7 0
OR
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RCR, dest, count
- Similar to RCL but right direction rotation.
RCR RB/RW, N
RCR DADDR, N
ROL, dest, count - Rotate left
- Rotation not through carry bit, but from MSB to LSB.
- Last bit rotated is saved in CF.
- Rest same as RCL or RCR.
ROL RB/RW, N
ROL DADDR, N
CF
CF
7 0
15 8 7 0
OR
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ROR dest, count - Rotate right
- Similar to ROL but right direction rotation.
SAL/SHL dest, count – Shift Arithmetic Left/ Shift Logical Left
- Shifts left the destination by ‘count’bits.
- Zeros are shifted from right i.e LSB.
- CF contains the last bit shifted out.
- Count = 1 or CL Register content.
CF
CF
7 0
15 8 7 0
OR0
0
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SAL/SHL DADDR, N
SAL/SHL RB/RW, N (count = 1 or CL reg.)
SAR dest,count – Shift Arithmetic Right
- Shifts the destination right by count bits.
- The sign bit is replicated in the left most bit.
- CF contains the last bit shifted out.
SAR DADDR
SAR RB/RW
CF
CF
7 0
0
OR
15 8 7
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SHR dest, count – Shift logical right
- Shifts right the destination by count bits.
- Zeros are shifted from left i.e MSB.
- CF contains the last bit shifted put.
SHR RB/RW, N
SHR DADDR, N
OR
CF
CF
0
0
0
15 8 7
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Control Transfer Group
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- Unconditional Jump
- Conditional Jump
- Subroutine Call
- Return
Unconditional Jump
Direct jump
Intra – segment jump
JMP Label
2 byte instruction 3 byte
instruction
5 byte instruction
Short jump+127 to -128 Near jump
± 32K
Far jump !Inter-segment jumpJump to another code segment2 bytes in instruction for new IP and 2 bytes for CS.
Relative jump in the same segment
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JMP SHORT LABEL1 JMP FAR PTR LABEL3
JMP NEAR LABEL2 OR
OR LABEL3 LABEL FAR
LABEL1 LABEL SHORT JMP LABEL3
JMP LABEL1
LABEL2 LABEL NEAR
JMP LABEL2
- Assembler automatically adjusts
the instruction as 2 byte, 3 byte or 5 byte depending on Short, Near or Far directive.
- Assembler will find out new code segment base address in
case of Far label and place in 2 bytes of instruction.
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Indirect Jump- Using Register – JMP RW
(IP) ← (RW)- Jump to memory location where address is contained in RW.
This may be used to jump to location whose address is stored in a table.Example –
.DataJMP – TAB DW Label1
DW Label2 DW Label3
.CodeMOV SI, OFFSET JMP – TAB
; To jump to Label1
LEA SI JMP-TAB
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MOV BX, [SI]
JMP BX
; To jump to Label3
MOV BX, 04
ADD SI, BX
MOV BX, [SI]
JMP BX
- If we use JMP [SI] then SI contain the Address in data segment that contains.
Offset address for jump location. It is
Indirect – Indirect or double indirect jump.
Label 1 :
Label 2 :
Label 3 :
AlternativeADD SI,04JMP [SI]
AlternativeJMP [SI]
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- Using Index
May use TABLE [Index] to directly access the jump table.
Jump table may contain
- 16 bit offset address.
(IP) ← offset address
or - 16 bit offset address & 16 bit CS address.
(IP) ← 16 bit offset
(CS) ← 16 bit CS address
JMP TABLE[SI] may be used &
Table must be declared with DD- double word or
JMP FAR PTR[SI] may be used with Table DW ----
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Example 1.
.Data
TABLE DW L1, L2, L3, L4
.CODE
LEA BX, TABLE
MOV BX OFFSET TABLE
MOV SI, 04H ; Table contains 2 bytes for each label.
JMP TABLE[SI]; Jump to L3
JMP [BX+SI]
L1 :
L2 :
L3 :
L4 :
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EXAMPLE – 2
.DATA
TABLE DD IP1, CS1
DD IP2, CS2
MOV SI, 04
JMP TABLE [SI]
MOV BX, OFFSET TABLE
JMP [BX+SI]
(IP) ← IP2
(CS) ← CS2
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Conditional JumpJ<cond.> Label
Short jump i.e upto – 128 to +127 byte from current instruction- Conditional jump occurs after arithmetic, logic or compare
instruction. cond. – determined by status flags.
IF <cond.> = True then (IP) ← (IP) + disp.8 else continue.In the mnemonics
Above, Equal or Below are used for unsigned numbers. Greater, Less or Equal are used for signed numbers. As good programming practice one must organise codes so
that expected case is executed without a jump since actual jump takes larger to execute.
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Conditional jump instructions.
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X1 DB -MOV AL,DLCMP AL, 38HCMP DL, X1CMP DL,CLAND AL, CLSUB AL, 75H
KK1
128Bytes
JCXZ Label – Jump if CX = 0.- CX is used as counter Register.
127 bytes
KK1 :
J <con.> KK1
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LOOP Instructions
- In 8051 → MOV RX, #count
KK DJNZ RX, KK
executes the loop count times.
In 8086 - MOV CX, count
KK:
DEC CX
JNZ KK
8086 provides 3 instructions for looping.
- basically 3 different versions of DJNZ instruction of 8051.
- LOOP Label
- Decrement CX by 1 branch to label if CX in not zero.
Executes the loop count times.
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- LOOPE/LOOPZ Label- Decrements CX by 1 (without modifying the flag).- Branches to label if zero flag is set and CX ≠ 0.
MOV CX, -
KK :
CMP AL, DL
LOOPE KK ; LOOP will execute till AL = DL and CX ≠ 0.
i.e. (CX) ← (CX) – 1
If [(CX) ≠ 0 and (ZF) = 1]
then (IP) ← (IP) + disp 8
Do – while Loop
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- LOOPNZ/ LOOPNE Label- Decrement CX by 1 (without modifying the flags).- Branches to label if zero flag is clear (i.e Not Set) and CX ≠ 0.
i.e. (CX) ← (CX) – 1
If [(CX) ≠ 0 and (ZF) = 0]
Then ← (IP) + disp8
MOV CX
KK1 :
CMP AL, DL
LOOPNZ KK1
Loop will execute if (CX) ≠ 0 and AL ≠ DL.
RepeatUntilLoop
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Procedure Call and Return
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Format of procedure in 8086.
CALL P_NAME
① Return address is saved in stack.
Program branches to P_NAME.
② Return address is retrieved from stack.
Program branches to main program.
V
V
①
②
P_NAME PROC FAR/NEARII
RET P_NAME ENDP
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P_NAME PROC NEARIntra segment procedure.
CALL P_NAMESaves offset address i.e IP content (16 bit) in
stack.Offset address of P_NAME loaded to IP.P_NAME should be ± 32K displacement from CALL P_NAME.
P_NAME PROC FARInter segment procedure.
- P_NAME can be any where in memoryCALL P_NAME
Saves CS content (16 bit) and offset address i.e IP content (16 bit) in stack. CS followed by IPCS (16 bit) and offset address (16 bit) of P_NAME loaded to CS Register and IP respectively..
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If a procedure is declared FAR then assembler automatically stores CS content along with IP content in stack.
It also loads CS content and IP content of procedure while branching.
Indirect call – Call with Indirect memory address.CALL DADDR
The address of procedure is saved in the address DADDR.For Near procedure IP content.For Far procedure IP and CS content.
- Programmer to load the procedure address in memory.- Like Table jump, Table-Call is also posible.
Indirect call through Register Like JMP, Call may also be possible using Register. The offset
address of procedore is stored in one of the Register. CALL RW will indirectly branch to procedure.
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MOV SI,offset P_NAME P_NAME PROC NEAR
LEA SI, P_NAME
RET
CALL SI P_NAME ENDP
Return from procedure
RET
- For RET in Near procedure
-16 bit data popped from stack and placed in IP, for returning to main program.
- For RET in Far procedure- 32 bit data popped from stack and stored in IP (16 bit) and CS (16
bit) for returning to main program. IP followed by CS since stack is LIFO.
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Miscellaneous Instructions
CLC – Clear carry flag
CMC – Complement Carry
STC – Sets Carry Flag
CLD – Clear Direction Flag
STD – Set Direction Flag
CLI – Clear Interrupt Flag (Disable Interrupt)
STI – Set Interrupt Flag (Enable Interrupt)
FALC – Fills AL with carry
If (CF) = 0, (AL) = 0
(CF) = 1, (AL) = FFH
HLT – Halt CPU till RESET is activated.
NOP – No Operation
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INT num. – Initiates a software Interrupt by
- Pushing flags, CS &IP.
- Clearing TRAP and Interrupt flags.
- Loading CS & IP from interrupt vector table based on ‘num’value.
- Execution begins at new CS : IP. Execution like
CALL instruction
INTO – Interrupt on overflow
If overflow flag is set, the instruction causes interrupt INT 4 to occur.
INT 3 – Single byte interrupt
IRET – Return from Interrupt (Single byte)
Last instruction of ISR.
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Assembly Program Format
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.Model – Defines assembly memory model. TINY – 64 byte single memory segment. SMALL – Two segment model.
Single data segment Single code segment
DOS.EXE files are generated Origin at 0000H. FLAT – Single segment of upto 4 Gbytes in length
.MODEl SMALL
. STACK
. DATA
- Contents and memory space for variables defined.
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X1 DB – X2 DW –
To declare array of 10 numbers. X3 DB 1,2,7,9, ----------
To declare array location X4 DB 20 DUP(0)
.CODEExecuteable instructions are put here
MOV AX, @DATAMOV DS, AX
Note – The above is MASM convention. CS Register is automatically loaded with starting address of code
segment with .CODE statement.- Other executable statements.
MOV AH, 4CHINT 21HEND
Starting address of data segmentto be stored in DS Register.
DOS function call to end the program normally.
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DOS Function Calls- Used to access (read – write) from I/O) devices in the
program in interactive fashion.- Store function no. in AH Register and other data in Register
identified.- Execute INT 21H instruction (interrupt call at 21H) to perform
the task.- Some important function calls used
- Read ASCII character from keyboard.
Function call no – 01H
MOV AH, 01H
INT 21H
The ASCII code of keyboard key pressed is transfered to
AL Register. This function call automatically echos, whatever is typed to the VDU.
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- Write to standrad output device (VDU)- Function call no – 02H- The ASCII code of character to be written is stored in DL
Register.
MOV DL, XXH
MOV AH, 02H
INT 21H- The XXH is ASCII code of character to be displayed. The
character will be displayed after INT 21H is executed.- Display Character String
- Function Call no. – 09H
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– The character string must end with ASCII .’$’. (24H). The
character string may be of any length and may be include LF
& CR also as character.
LF = 10 (Decimal)
CR = 13 (Decimal)- The address of character string is stored in DS : DX.
LEA DX, MES
MOV AH, 09H
INT 21H
MES : DB “My name is Kant $”
My name is Kant is displayed on VDU.- End the program
- Function call no – 4CH- Must occur immediately before ‘End’statement.
MOV DX, OFFSET MES
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MOV AH, 4CH
INT 21H
END
– Program ends normally.- Read System Date
Function call No – 2AH
MOV AH, 2AH
INT 21H
Following will be Register contents.
AL = Day of the week
DH = Month
DL = Day of month
CX = Year
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- Read System Time- Function call No – 2CH
MOV AH, 2CH
INT 21H
Following will be Register contents
CH = Hours
CL = Minutes
DH = Seconds
DL = Hundredth of second
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Memory Addressing options- Direct Addressing – [addr]
,, → N1 – var. Name
- Register Indirect – [BX or BP or SI or DI]
- Base + Index - BP SI
BX DI
[ ] [ ]
- Register Relative - BP SI
BX DI
,, → LIST BP SI
BX DI
- Base + Index
+ Register Relative - BP SI
BX DI
,, → LIST BP SI
BX DI
+
+ + disp
or
or + disp
+
DADDR
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REP – Repeat String Operation
REP – Repeats string operation while (CX) > 0
- After each string operation CX is decremented and zero
flag is checked.
Example – MOV DS, -
MOV ES, -
MOV DI, -
MOV SI, -
MOV CX, 0010H for (16 bytes)
CLD -(DF ← 0)
REP MOVSB
→ String has been moved from DS : SI to ES : DI