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DCSE CEG, Anna University Microprocessor System Design Input / Output Peripheral Interfacing

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DCSE CEG, Anna University

Microprocessor System DesignInput / Output

Peripheral Interfacing

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DCSE CEG, Anna University

Outline

• Peripheral devices

 – Input devices

 – Output devices

• 8 bit / 16-bit IO

• Simple Input device - interfacing switches

• Simple Output device - interfacing LEDs

• 8255 PPI

• 8255 modes

• 16-bit data bus to 8-bit peripherals or memory devices

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DCSE CEG, Anna University

Peripheral

• is an input and/or output device

• like a memory chip, it is mapped to a certain

location (called the port address)

• unlike a memory chip, a peripheral is usually

mapped to a single location

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DCSE CEG, Anna University

Output Device

• like a memory chip, you can write to an

output device

You can write to a memory chip using thecommand mov [bx], al

• You can write to an output device using the

command out dx, al

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DCSE CEG, Anna University

Input Device

• like a memory chip, you can read from an

input device

• You can read from a memory chip using thecommand mov al, [bx]

• You can read from an input device using the

command in al, dx

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DCSE CEG, Anna University

Memory mapped vs. peripheral

• Same instruction vs. independent instruction

• Entire address bus vs. part of address bus

• Same control signals vs. independent

• More IO ports vs. 65536 ports

• More commands and operations

• Uses memory space

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DCSE CEG, Anna University

Two formats for IN / OUT

Format 1

• IN AL, port#

Or

• OUT port#, AL• Example:

 – BACK: IN AL,22HCMP AL, 100JNZ BACK

Format 2

• MOV DX,port#IN AL, DX

Or• MOV DX, port#

OUT DX, AL

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DCSE CEG, Anna University

8bit vs 16bit IO

• 8088 case:

• MOV DX, 648HOUT DX, AX ;AX = 76A9H

• Address bus and ALE

• Low byte (A9), IOW

• Setup time

• Address (649) and ALE

• High byte (76), IOW

• Setup time

• 8086 case:

• MOV DX, 648HOUT DX, AX ;AX = 76A9H

• Address bus and ALE

• Word (76A9), IOW

• Setup time

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DCSE CEG, Anna University

Creating a SimpleOutput Device

• Use 8-LED’s 

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DCSE CEG, Anna University

Use 8 LED’s 

8088 Minimum 

Mode 

 A18 

 A0 

D7 

D6 

IOR  

IOW  

 A19 

D5 

D4 

D3 

D2 D1 

D0 

:

mov al, 55

out dx, al

:

:

:

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DCSE CEG, Anna University

Creating a SimpleOutput Device

• Use 8-LED’s 

• Use a chip and an address decoder such thatthe LED’s will respond only to the command

out and a specific address (let’s assume thatthe address is F000)

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DCSE CEG, Anna University

Use of 74LS245 and Address Decoder

:

mov al, 55

mov dx, F000

out dx, al

:

8088 Minimum 

Mode 

 A18 

 A0 

D7 

D6 

IOR  

IOW  

 A19 

D5 

D4 

D3 

D2 

D1 

D0 

74LS245

B0

B1

B2

B3

B4

B5B6

B7

A0

A1

A2

A3

A4

A5A6

A7

E DIR 5V

 A  1 5 

 A  1 4 

 A  1 3 

 A  1 2 

 A  1 1 

 A  1 0 

 A  9  A  8  A  7  A  6  A  5  A  4  A  3  A  2  A  1  A  0 IOW  

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DCSE CEG, Anna University

Creating a SimpleOutput Device

• Use 8-LED’s 

• Loses the data

• Solution?

• Use a chip and an address decoder such thatthe LED’s will not only respond to thecommand out and a specific address (let’sassume that the address is F000) but will also

latch the data

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DCSE CEG, Anna University

Use of 74LS373 and Address Decoder

:

mov al, 55

mov dx, F000

out dx, al

:

 A  1 5 

8088 Minimum 

Mode 

 A18 

 A0 

D7 

D6 

IOR  

IOW  

 A19 

D5 

D4 

D3 

D2 D1 

D0 

 A  1 4 

 A  1 3 

 A  1 2 

 A  1 1 

 A  1 0 

 A  9  A  8  A  7  A  6  A  5  A  4  A  3  A  2  A  1  A  0 IOW  

74LS373

Q0

Q1

Q2

Q3

Q4

Q5Q6

Q7

D0

D1

D2

D3

D4

D5D6

D7

OELE

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DCSE CEG, Anna University

Creating a SimpleInput Device

• Use 8-Switches (keys)

• Use a chip and an address decoder such thatthe keys will be read only to the command in 

and a specific address (let’s assume that theaddress is F000)

• How to interface a switch to computer?

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DCSE CEG, Anna University

Use of 74LS245 and Address Decoder

:

mov dx, F000

in al, dx

: A  1 5 

8088 Minimum 

Mode 

 A18 

 A0 

D7 

D6 

IOR  

IOW  

 A19 

D5 

D4 

D3 

D2 D1 

D0 

 A  1 4 

 A  1 3 

 A  1 2 

 A  1 1 

 A  1 0 

 A  9  A  8  A  7  A  6  A  5  A  4  A  3  A  2  A  1  A  0 IOR  

5V

74LS245

B0

B1

B2

B3

B4

B5B6

B7

A0

A1

A2

A3

A4

A5A6

A7

E DIR

Same address for input and output?

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DCSE CEG, Anna University

How do you know if a user haspressed a button?

• By Polling

• By Interrupt

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DCSE CEG, Anna University

Polling

mov dx, F000

in al, dx

L1: cmp al, FF

je L1

:

:

 A 

1

5

8088

Minimum

Mode

 A18

 A0

:

D7

D6

IOR 

IOW 

 A19

D5

D4

D3

D2

D1

D0

74LS245

B0

B1

B2

B3

B4

B5

B6

B7

A0

A1

A2

A3

A4

A5

A6

A7

E DIR

 A 

1

4

 A 

1

3

 A 

1

2

 A 

1

1

 A 

1

0

 A 

9

 A 

8

 A 

7

 A 

6

 A 

5

 A 

4

 A 

3

 A 

2

 A 

1

 A 

0IOR 

5V

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DCSE CEG, Anna University

Output Port Design

T1  – T4 of OUT 99H, AL ?

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DCSE CEG, Anna University

Input Port Design

T1  – T4 of IN AL, 5FH ?

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DCSE CEG, Anna University

8255 PPI

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DCSE CEG, Anna University

Control word

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DCSE CEG, Anna University

Modes of Operation

• Mode 0 – simple input or output

• Mode 1 – input or output with handshaking

Mode 2 – bideirectional IO with handshaking

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DCSE CEG, Anna University

Example - Port addresses

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DCSE CEG, Anna University

Solution

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DCSE CEG, Anna University

Example – Programming 8255

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DCSE CEG, Anna University

Solution

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DCSE CEG, Anna University

BSR mode

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DCSE CEG, Anna University

Example for BSR

• Program 8255 for the following – A) set PC2 to high

 – B) Use PC6 to generate a square wave of 66% duty cycle

• Solution

• A) – MOV AL, 00000101B

OUT 93H,AL

• B) – MOV AL, 0xxx1101

OUT 93H, AL

CALL DelayCALL DelayMOV AL, 0xxx1100OUT 93H, ALCALL DelayJMP AGAIN

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DCSE CEG, Anna University

MODE 1 Output Operation

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DCSE CEG, Anna University

Output with handshake

• #OBFa : – CPU has written a byte

• #ACKa: – Data has been picked up by receiving device

• INTRa: – After rising edge of #ACKa

• INTEa (interrupt enable)

 – Internal flipflop – Controlled by PC6

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DCSE CEG, Anna University

MODE 1 Timing (output)

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Interrupt vs. Polling

• CPU is interrupted whenever necessary

• CPU can serve many devices

• Require more hardware

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DCSE CEG, Anna University

Using status to Poll

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DCSE CEG, Anna University

Solution

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DCSE CEG, Anna University

MODE 1 Input Operation

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DCSE CEG, Anna University

Input with handshake

• #STB (in): – Device provides data to an input port

• IBF (out): – Data has been latched by 8255

• INTR (out): – After activation of IBF

• INTE (interrupt enable) –

Internal flip-flop – Controlled by PC4 and PC2

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DCSE CEG, Anna University

MODE 1 Timing (input)

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DCSE CEG, Anna University

MODE 2 Operation

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DCSE CEG, Anna University

IBM PC IO MAP

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DCSE CEG, Anna University

Decoding by 74138

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DCSE CEG, Anna University

8255 Address in PC

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DCSE CEG, Anna University

Use of 8255 ports in PC

MOV AL,99HOUT 63, AL

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DCSE CEG, Anna University

80x86 family

• 16-bit Processors – 8088 (8-bit data / 20-bit address)

 – 8086/186 (16-bit data / 20-bit address)

 – 80286 (16-bit data / 24-bit address)

32-bit Processors – 80386 (16/24 or 32/32 common)

 – 80486 (32/32), Pentium, PII (64/32)

 – Pentium Pro, II, III, IV (64/36)

 – PPC 60x (32 or 64/32)

• All 80x86 processors use a 16-bit address fori/o

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DCSE CEG, Anna University

8 And 16 bit Organizations

• 8088

 – Data is organized into byte widths

 – The 1MB memory is organized as 1M x 8-bits

• 8086/80186

 – Data is organized into word widths

 – The 1MB memory is organized as 512kB x 16-bits

80286/80386SX – Data is organized into word widths

 – The 16MB memory is organized as 8MB x 16-bits

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DCSE CEG, Anna University

32 and 64 bit Organizations

• • 80386DX/80486 

 –  – Data is organized into double word widths

 –

 – The 4GB memory is organized as 1GB x 32-bits

• • Pentium Pro/Pentium 1-4

 –  – Data is organized into quad word widths

 –  – The 4GB memory is organized as 512MB x64-bits

• (on P2-4, actual address bus is 36 bits)

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DCSE CEG, Anna University

Little Endian / Big Endianfor the 68000:

MOVE.W #513, D0 ; move value 513 into the lower 16 bits of D0

MOVE.W D0,4 ; store the lower word of D0 into memory 4

for the 80x86:MOV AX,513 ; load AX (16 bits), with the value 513MOV [4],AX ; store AX into memory 4

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DCSE CEG, Anna University

Memory Alignment in 16-bit Micro

• We have 16-bit data bus

• Why not use it for memoryaccess.

• 1M byte of memory is organizedas:

• 512K * 16 bit

• The memory is word-aligned

• Access to even addresses is

aligned and simple• Example: 0102H and 0304H

stored in [4H]What happens on mov AX,[4]?

What happens on mov AX,[5]?

Motorola family of the MC680x0 forbids non-aligned access

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DCSE CEG, Anna University

Memory Bank Select

• 8086/186/286/386SX has 16 Data Lines D15-D0

• 6264 Only has 8 I/O7 – I/O0

• Must Use a “Memory Bank”  – 1 SRAM for Storing Bytes with “Even Addresses” (… 0 2 ) 

 – 1 SRAM for Storing Bytes with “Odd” Addresses” (… 1 3 ) 

• 8086 has BHE Control Signal – (Bank High Enable)

• Can Use Combination of A0 and BHE to DetermineType of Access

 – BHE A0 Access Type

 –

0 0 1 word (16-bits) – 0 1 Odd Byte (D15-D8)

 – 1 0 Even Byte (D7-D0)

 – 1 1 No Access

Interfacing two 512KB Memory to the 8088 Microprocessor(review)

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(review)

 A18 

 A0 

D7 

D0 

 MEMR  

 MEMW  

XXXX 

BP 

ES 

DS 

SS 

CX 

BX 

 AX 

XXXX 

XXXX 

XXXX 

2000 

0000 

0023 

3F1C 

FCA1 

SP 

DX 

XXXX 

CS 

SI 

XXXX 

XXXX IP 

XXXX DI 

 A19 

23 00000 

00001  95 

20020 

20021 

20022 

20023 

7FFFD 

7FFFE 

7FFFF 

29 

12 

7D 

13 

19 

25 

36 

 A18 

 A0 

D7 

D0 

RD 

 WR  

CS 

97 00000 

00001  D4 

20020 

20021 

20022 20023 

7FFFD 

7FFFE 

7FFFF 

 A3 

92 

45 33 

2C 

98 

12 

 A18 

 A0 

D7 

D0 

RD 

 WR  

CS 

Interfacing two 512KB Memory to the 8086 Microprocessor

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g y p

 A19 

 A1 

D7 

D0 

 MEMR  

 MEMW  

XXXX 

BP 

ES 

DS 

SS 

CX 

BX 

 AX 

XXXX 

XXXX 

XXXX 

4000 

0000 

0023 

3F1C 

FCA1 

SP 

DX 

XXXX 

CS 

SI 

XXXX 

XXXX IP 

XXXX DI 

 A0 

23 00000 

00001  95 

20020 

20021 

20022 

20023 

7FFFD 

7FFFE 

7FFFF 

29 

12 

7D 

13 

19 

25 

36 

 A18 

 A0 

D7 

D0 

RD 

 WR  

CS 

97 00000 

00001  D4 

20020 

20021 

20022 20023 

7FFFD 

7FFFE 

7FFFF 

 A3 

92 

45 33 

2C 

98 

12 

 A18 

 A0 

RD 

 WR  

CS 

D15 

D8 

: D7 

D0 

BHE# 

How to connect data lines?How to connect address lines?What about chip select?

MOV [0040], AL?MOV [0041], AH?MOV [0040], AX?

1C

3F

Decoding Circuit with Bank

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Decoding Circuit with BankSelect

Interfacing 8-bit Peripherals to

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Interfacing 8-bit Peripherals to16-bit Data Bus

• The Problem?

• Solutions: – 1) two separate PPI devices.

Even address for one and oddaddresses for otherOUT port#, AX outputs to both ofthem!!!

Interfacing 8-bit Peripherals to

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Interfacing 8-bit Peripherals to16-bit Data Bus (2)

• Solutions:

 – 2) Hi / Lo byte copier.

 – Outputting to odd-addressed ports:

» Hi/Lo byte copier copies data from D8-D15 to D0-D7

 – Inputting a byte form odd-addressed ports:

» Hi/Lo byte copier copies data from D0-D7 to D8-D15

 – The logic now resides in chipsets.

C C

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Hi/Lo Copier in PC

ISA B i l

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ISA Bus expansion slot

• Only 16-bit (even32-bit or higherdata bus)

Speed is limited to8MHz

Linear Select Address

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Linear Select AddressDecoding

What is the address range and aliases?

Buffering Selected IO Address

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Buffering Selected IO AddressRange

Range of addresses?Blocking others.

PC I t f C d

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PC Interface Card

• From BitPardaz

I/O Programming with C and

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I/O Programming with C andBASIC

Assembly Microsoft C Borland C BASIC

OUT port#,

AL

outp (port#,

byte)

ouportb(port

#, byte)

Out port#,

byte

IN AL, port# var=inp(port#)

var=inportb(port#)

Var = INP(port#)

OUT DX, AX Outpw(port#,

word)

Outport(port

#, word)

Out port#,

word ??

IN AX, DX word=inpw(port#)

word=inport(port#)

Var = INP(port#)??

E l

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Example

E l P lli ?

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Example Polling program?

• The program makes a “running LED” effect(initially moving from down to up). Every timethe lowest button is pressed, it changes the

direction of the movement. When the highestbutton is pressed, the program terminates.

The Circuit A18 

:

 A19  5V

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DCSE CEG, Anna University

 A  1 5 

8088 Minimum 

Mode 

 A0 

D7 

D6 

IOR  

IOW  

D5 

D4 

D3 

D2 

D1 

D0 

 A  1 4 

 A  1 3 

 A  1 2 

 A  1 1 

 A  1 0 

 A  9  A  8  A  7  A  6  A  5  A  4  A  3  A  2  A  1  A  0 IOR  

74LS245

B0

B1

B2

B3

B4

B5

B6

B7

A0

A1

A2

A3

A4

A5

A6

A7

E DIR

 A  1 5  A  1 4  A  1 3  A  1 2  A  1 1  A  1 0  A  9  A  8  A  7  A  6  A  5  A  4  A  3  A  2  A  1  A  0 IOW  

74LS373

Q0Q1Q2Q3Q4Q5Q6Q7

D0D1D2D3D4D5D6D7

OELE

T h t th d

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Trace what the program does:

  mov dx, F000

  mov ah, 00

  mov al, 01

L1: out dx, al

  mov cx, FFFF

L2: dec cx

jnz L2

cmp ah, 00

jne L3

rol al, 1

cmp al, 01

jne L1

jmp L4

L3: ror al, 1

cmp al, 80

jne L1

L4: mov bl, al

in al, dx

cmp al, FF

je L6

test al, 01

jnz L5

xor ah, FF

jmp L6

L5: test al, 80

jz L7

L6: mov al, bl

jmp L1

L7:

What’s the problem with polling

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What s the problem with pollingin the sample program?

• Running LED takes time

• User might remove his/her finger from the

switch• before the in al, dx instruction is executed

• the microprocessor will not know that the

user has pressed the button

Problem with Polling

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Problem with Polling

  mov dx, F000

  mov ah, 00

  mov al, 01

L1: out dx, al

  mov cx, FFFF

L2: dec cx

jnz L2

cmp ah, 00

jne L3

rol al, 1

cmp al, 01

jne L1

jmp L4L3: ror al, 1

cmp al, 80

jne L1

L4: mov bl, al

in al, dx

cmp al, FF

je L6

test al, 01

jnz L5

xor ah, FF

jmp L6

L5: test al, 80

jz L7

L6: mov al, bl

jmp L1

L7:

Interrupt

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Interrupt

• The microprocessor does not check if data isavailable.

• The peripheral will interrupt the processor

when data is available

Polling vs Interrupt

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Polling vs. Interrupt

While studying, I’ll

check the bucket every

5 minutes to see if it is

already full so that I can

transfer the content of the bucket to the drum.

Input

DeviceMemory

P

instruction

POLLING

Polling vs Interrupt

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Polling vs. Interrupt

I’ll just study. When the

speaker starts playing

music it means that the

bucket is full. I can

then transfer thecontent of the bucket to

the drum.

Input

DeviceMemory

P

instruction

INTERRUPT

Interruptrequest