11mt220 microprocessor and microcontroller lab

Department of Electronics & Media Technology Karunya University

1 | P a g e 11MT220 Microprocessors & Microcontroller Lab Manual

KARUNYA SCHOOL OF ELECTRICAL SCIENCES

Department of Electronics and Media Technology

Lab Manual

11MT220 - Microprocessor and Microcontroller Lab

Even Semester 2013-14

Credit 0:0:2

Name Signature

Prepared By Ms. K. Shiby Angel

Mr. Nair Vishal Vijay

Approved By Ms. Shanthini Pandiaraj

(Karunya Institute of Technology & Sciences)

Declared as deemed to be university under Section 3 of the UGC act, 1956

Karunya Nagar, Coimbatore 641 114.



Lab Exercises

11MT220 MICROPROCESSOR AND MICROCONTROLLER LAB

ODD SEM 2013-14

Sr. NO

Title of Exercises Page No

1

Arithmetic and logical Operations using 8085p a. 8 Bit Addition b. 8 Bit Subtraction c. 8 Bit Multiplication d. 8 Bit Division

2 Sorting using 8085

a. Ascending Order b. Descending Order

3

Code Conversion a. ASCII to Decimal Conversion b. BCD to Hex c. Hex to Decimal d. Hex to Binary

4 Square wave Generation using 8255

5 Serial Data Transfer operation using 8251

6 ADC Interfacing using 8085

7

Arithmetic and Logical operations using 8051 a. 8 Bit Addition b. 8 Bit Subtraction c. 8 Bit Multiplication d. 8 Bit Division

8 Searching using 8051

9 Serial Communication using 8051

10 DAC using 8051

11 Stepper motor interfacing using 8051

12

Arithmetic and Logical operations using 8086 a. 16 Bit Addition b. 16 Bit Subtraction c. 16 Bit Multiplication d. 16 Bit Division



Ex. No : 1

ARITHMETIC AND LOGICAL OPERATIONS USING 8085p

__________________________________________________________________________

AIM: To perform the following Arithmetic and logical Operations using 8085p:

a. 8 bit Addition b. 8 bit Subtraction c. 8 bit Multiplication d. 8 bit Division

A) 8-BIT ADDITION

APPARATUS REQUIRED

S. No Item description Qty 1 8085 Microprocessor Kit 1 2 Power Supply Unit 1

THEORY/DESCRIPTION

The two operands (i.e., 8-bit numbers) are loaded into two registers A & B, using immediate

addressing mode instructions and then added using ADD instruction. The result is stored in the

desired memory location. The overflow in addition is checked by verifying the status of Carry

(CY) flag and accordingly either 00 or 01 is stored in the location next to the result.

ALGORITHM

1. Start the program

2. Initialize the C register as 00H.

3. Move the data1 and data2 to Accumulator and B register respectively.

4. Add B register content to the content of the Accumulator.

5. If there is no carry, go to step 6, else increment C register value.

6. Store the content of Accumulator to a memory location.

7. Move the content of C register to Accumulator.

8. Store the content of Accumulator to the memory location 4501H.

9. Stop the program.



PROGRAM

Address Opcode & Operand

Label Mnemonics Comments

4100 0E,00 MVI C,00 Clear Register C

4102 3E,data1 MVI A, data1 Move data1 to accumulator

4104 06,data2 MVI B, data2 Move data 2 to Register B

4106 80 ADD B Add B register content to accumulator

4107 D2,0B,41 JNC GO Jump on no carry to location GO

410A 0C INR C Increment C register

410B 32,00,45 GO: STA 4500 Store the result

410E 79 MOV A, C Move carry to Accumulator

410F 32,01,45 STA 4501 Store the carry

4112 76 HLT Stop the program



FLOWCHART

Fig.1.1 Flow chart for 8-bit Addition with carry



B) 8-BIT SUBTRACTION

APPARATUS REQUIRED


THEORY/DESCRIPTION

Out of the two operands for subtraction, the first operand is loaded into Accumulator and

the second operand is subtracted directly from memory, using register indirect addressing mode

instructions. The result is stored in desired memory location and the borrow in subtraction is

checked by verifying the status of Carry (Cy) flag and accordingly either 00 or 01 is stored in

the location next to result.

ALGORITHM

1. Start the program.

2. Load the HL pair with 16-bit address of data location.

3. Move the content of memory address in HL to accumulator.

4. Increment the address in HL pair.

5. Subtract the content of memory from accumulator.

6. Jump on No-carry to step 8.

7. Increment the C-register.

8. Store the content of accumulator and C-register.




PROGRAM



4100 21,50,41 LXI H,4150 Load data to HL Register

4103 7E MOV A, M Move Data1 to Acc

4104 0E,00 MVI C, 00 Clear C-register.

4106 23 INX H Increment address.

4107 96 SUB M Subtract Data2 from Acc

4108 02,0C,41 JNC NEXT Jump on No-carry to the location NEXT.

410B 0C INR C Increment C register

410C 32,52,41 NEXT: STA 4152 Store the result

410F 79 MOV A, C Move carry to Acc

4110 32,53,41 STA 4153 Store the carry




FLOWCHART

Fig 1.2 8-bit Subtraction

C) 8-BIT MULTIPLICATION

APPARATUS REQUIRED


THEORY/DESCRIPTION

Using the immediate addressing mode instructions, the two operands to be multiplied are

loaded into two registers say, B and C. By the method of repeated addition, the multiplication

operation is performed (i.e., first number is repeatedly added to accumulator as per the second



number Eg. 03 x 04 => Acc + 03 (04 times)). The overflow in multiplication is checked every

time after each addition, by verifying the status of Carry (CY) flag and accordingly a register, say

D is incremented. The result in accumulator is stored in the desired memory location and the

content of D register is stored in the location next to result.

ALGORITHM


2. Clear the Accumulator and D Register.

3. Load the Data1 to B register and Data2 to C register.

4. Add the content of B to accumulator until C becomes zero.

5. If No-carry, go to step 6.

6. Increment the D-register.

7. Decrement the C register.

8. If C register is Non-zero, Jump to step 4.

9. Store the content of accumulator to 5000H.

10. Move the content of D-register to Accumulator.

11. Store the content of accumulator to 5001H.


PROGRAM



4500 3E,00 MVI A, 00 Move data to accumulator

4502 06,data1 MVI B, data1 Move multiplicand to B register.

4504 0E,data2 MVI C, data2 Move the multiplier to C register

4506 16,00 MVI D, 00 Clear D-reg for carry

4508 80 LOOP2: ADD B repetitive addition

4509 D2,0D,45 JNC LOOP1 Jump on no carry to an location LOOP1

450C 14 INR D Increment the D-register, if carry occurs.

450D 0D LOOP1: DCR C Decrement C-register

450E C2,08,45 JNZ LOOP2 Jump on no zero to Location LOOP2



4511 32,00,50 STA 5000 Store resultant product

4514 7A MOV A, D Move carry to accumulator

4515 32,01,50 STA 5001 Store the carry.


FLOWCHART

Fig 1.3 8-bit Multiplication

D) 8-BIT DIVISION

APPARATUS REQUIRED


THEORY/DESCRIPTION

Using the immediate addressing mode instructions, the Divisor and Dividend are loaded

directly into Accumulator and B registers. By the method of successive subtraction, the division is

carried out (i.e., Divisor is repeatedly subtracted from Dividend, until the dividend becomes

smaller than divisor E.g. 09 / 02 => 09 02 (4 times) => Remainder=01 and Quotient=04). The C



register is incremented every time after each subtraction, to keep count of the quotient. The final

content in accumulator will be remainder of the division and it is stored in the desired memory

location and the content of C register containing the quotient is stored in the location next to

result.

ALGORITHM


2. Clear C Register.

3. Load the Divisor to Accumulator.

4. Load the Dividend to B-register.

5. Compare the B-register value with the accumulator.

6. If Accumulator content is smaller to B reg., then Jump to step 10.

7. Subtract B-register value with accumulator.

8. Increment the C-register.

9. Jump to step 4.

10. Store the contents of accumulator and C-register into memory.


PROGRAM

Address Opcode & Operand Label Mnemonics Comments

4500 3E, Divisor MVI A, Dividend Move Divisor to Acc

4502 06, Dividend MVI B, Divisor Move Dividend to B reg.

4504 0E, 00 MVI C, 00 Clear C register

4506 B8 LOOP2: CMP B Compare Acc and B reg.

4507 DA, 0F, 45 JC LOOP1 Jump on Carry to location LOOP1

450A 90 SUB B Repetitive subtraction for division

450B 0C INR C Increment C register

450C C3, 06,45 JMP LOOP2 Jump to location LOOP2

50F 32,00,50 LOOP1: STA 5000 Store the Remainder

4512 79 MOV A, C Move C reg. to Acc

4513 32,01,50 STA 5001 Store the Quotient.




FLOWCHART

Fig 1.4 8-bit Division

RESULT

The following exercises are practiced and the output is verified:

A) 8-bit addition

B) 8-bit subtraction

C) 8-bit Multiplication

D) 8-bit Division



Ex. No: 2

SORTING ______________________________________________________________________________

AIM:

To write and implement an assembly language program for arranging an array of 8-bit

numbers in ascending and descending order, using 8085.

APPARATUS REQUIRED:


THEORY/DESCRIPTION

This program uses the register indirect addressing mode instructions, to access the data

during sorting. The Bubble-Sort technique is used to sort the numbers in either ascending order or

descending order. The numbers to be sorted is stored in the memory as a array with the first

location containing the count of the data in the array. The sorted numbers are stored back again in

the same source location of the array.

ALGORITHM: ASCENDING ORDER


2. Load the data address to HL register pair and Initialize B register with 00

3. Move the array size count into C-register, then decrement the C-register

4. by 1 and increment HL register pair by 1.

5. Load the first data in the memory to Accumulator.

6. Compare the subsequent memory with Accumulator.

7. Jump on Carry, when M is greater A and go to Step 9.

8. Move the memory M to D register

9. Decrement the address of HL pair and move the D register content to M

10. and increment the value by HL by 1.

11. Move 01 to B register and decrement the C-register.

12. If C is Non-zero, Jump to comparison of next data.



13. If B becomes zero after decrement, go to step1.


PROGRAM



FLOWCHART

Fig 2.1 Sorting in Ascending Order



ALGORITHM: DESCENDING ORDER


2. Load the data address to HL and initialize B register with 00

3. Move the Array size count into C-register then decrement the C-register by

4. 1 and increment HL by 1.

5. Load the data-I in the memory to A.

6. Compare the subsequent memory content with A.

7. Jump on No-carry (when M is greater A), go to Step 9.

8. Move the memory M to D register

9. Decrement the value of HL pair and move the D register content to M and increment the

value by HL by 1.

10. Move B register and decrement the C-register.

11. Jump on Non-Zero to the next comparison. If zero, then decrement B and go to step1.


PROGRAM



FLOWCHART

Fig 2.2 Sorting in Descending Order

RESULT

Thus the assembly language program for sorting Ascending & Descending order is

executed and the results are verified.



Ex. No : 3

CODE CONVERSION USING 8085 PROGRAM

______________________________________________________________________________

AIM:

To Perform Code Conversion for the following.

1. ASCII to Decimal 2. BCD to Hex 3. Hex to Decimal 4. Hex to Binary

APPARATUS REQUIRED:


THEORY/DESCRIPTION

ASCII to Decimal Conversion

Conversion of ASCII number to decimal is very simple because all the decimal numbers

form a sequence in ASCII. Any ASCII number can be converted to decimal just by subtracting 30

from it.

BCD to Hex

Out of the two BCD digits at 4150 and 4151, the one at 4150 is the MSD. The logic is to

multiply ten MSD by ten using repeated addition. Then add the LSD to it.

Hex to Decimal

Hex Number is converted to its equivalent decimal number using the following logic. First

count the number of hundreds, the number of tens and units present in that number. Using these

three, add up to get the equivalent decimal number.



Hex to Binary

First get the data and rotate it right. Depending upon carry store either 0 or 1 in memory. Do the

rotation 8 times for the 8-bits in that number.

FLOWCHART: ASCII TO DECIMAL

Fig: 3.1 Ascii to Decimal Conversion

START

GET DATA

DATA=DATA-30H

IS DATA >

09H?

RESULT=FFH RESULT=DATA

STOP

Yes



ALGORITHM: ASCII to Decimal Conversion 1. Load HL register pair with content as the address value.

2. Move content pointed by the memory pointer to the Accumulator.

3. Subtract 30 from content of Accumulator.

4. Compare content of Accumulator with 10.

5. Check whether a valid decimal number.

6. If yes store result in next addresses location otherwise store FF in a memory location.

7. Halt the program.

PROGRAM Address Opcode &

Operand Label Mnemonics Comments

4100 21, 50,41 LXI H,4150 Point to data

4103 7E MOV A,M Get operand

4104 DE, 30 SUI 30 Convert to decimal

4106 FE, 0A CPI 0A Check whether its a valid decimal number

4108 DA, 0D, 41 JC LOOP Yes, Store Result

410B 3E, FF MVI A, FF No make result =FF

410D 23 LOOP INX H Increment HL by 1

410E 77 MOV M,A Move accumulator content to memory

410F 76 HLT (A)=>(4151)



FLOWCHART: BCD to HEX Conversion

Fig: 3.2 BCD to Hex Conversion ALGORITHM: BCD to Hex

1. Initialize memory pointer.

2. Move value of memory pointed to Accumulator.

3. Add the contents of Accumulator by itself.

4. Move content of Accumulator to register B.

5. Add the contents of Accumulator by itself again two times.

6. Point to LSD.

7. Add to form hex equivalent.

START

Get Most

Significant Digit

MSD=MSD*10

Hex Data =

MSD+LSD

Store Hex Data

STOP



8. Move accumulator content to memory.

PROGRAM Address Opcode

& Operand


4100 21, 50,41 LXI H,4150 Initialize memory pointer to 4150

4103 7E MOV A, M (A)=(4150)-(MSD)

4104 87 ADD A MSD*2

4105 47 MOV B, A Save MSD*2

4106 87 ADD A MSD*4

4107 87 ADD A MSD*8

4108 80 ADD B MSD*10

4109 23 INX H Point to LSD

410A 86 ADD M Add to form hex equivalent

410B 23 INX H (A)=>(4152)

410C 77 MOV M, A Move accumulator content to memory

410D 76 HLT



FLOWCHART: HEX to DECIMAL Conversion

Fig: 3.3 Hex to Decimal Conversion

Start

Get data Carry = 0; Hundreds=0; Tens=0

Data=data-100 Hundreds=Hundreds+1

Is

Carry=1

Data=data-10 Tens=Tens+1

Data=data+100

Store hundreds, tens, units

Units-data

Data=data-10

Stop

Is

Carry=1



ALGORITHM: Hex to Decimal

1. Take the first digit on the left of the hexadecimal number and change it to decimal.

2. If there are still more digits, multiply your running total by 16, change the next digit to

decimal and add that to the running total. Continue with step 2 until all digits are

exhausted.

PROGRAM Address Opcode &

Operand Label Mnemonics Comments

4100 21, 50, 41 LXI H, 4150 Point to data

4103 01, 00, 00 LXI B, 0000 Initialize Hundreds=0; Tens =0

4106 7E MOV A, M Get Hex Data to A

4107 D6, 64 LOOP SUI 64 Subtract 64 from A

4109 DA, 10, 41 JC LOOP1 Jump when CY is set

410C 04 INR B Hundreds=Hundreds+1

410D C3, 07, 41 JMP LOOP Unconditional jump

4110 C6, 64 LOOP1 ADI 64 Add 64 to A

4112 D6, 0A LOOP2 SUI 0A Subtract 10 from A

4114 DA, 1B, 41 JC LOOP3 Jump when CY is set

4117 0C INR C Tens=Tens+1

4118 C3, 12, 41 JMP LOOP2 Unconditional jump

411B C6, 0A LOOP3 ADI 0A If Subtracted extra, add it again

411D 23 INX H A Units

411E 70 MOV M, B Store Hundreds

411F 47 MOV B, A Combine Tends in C and Units in A to

4120 79 MOV A, C Form single 8-bit number

4121 07 RLC Rotate each bit in A left with CY




4125 80 ADD B Add content of A to Reg B

4126 23 INX H Increment HL by 1



4127 77 MOV M, A Store Tens and Units

4128 76 HLT stop

ALGORITHM: Hex to Binary

1. Move the number to be converted from memory to Accumulator.

2. Check for the least significant bits by moving them to carry bit.

3. Store zero if no carry and one if carry.

4. Perform step(3) for 8 times.

5. Halt the program.

PROGRAM



4100 21, 50, 41 LXI H, 4150 Initialize memory pointer

4103 06, 08 MVI B, 08 Counter for 8-bits

4105 3E, 5A MVI A, 5A 5A is moved to A

4107 0F LOOP RRC Check for least significant bits

4108 DA,10, 41 JC LOOP1 Jump when CY is set

410B 36, 00 MVI M, 00 Store zero if no carry

410D C3, 12,41 JMP COMMON Unconditional jump

4110 36, 01 LOOP1 MVI M, 01 Store one if there is a carry

4112 23 COMMON INX H Increment HL by 1

4113 05 DCR B Decrement B by 1

4114 C2, 07, 41 JNZ LOOP Check for counter

4117 76 HLT STOP

RESULT

Thus code conversion for the following has been performed.

1. ASCII to Decimal Conversion

2. BCD to Hex

3. Hex to Decimal

4. Hex to Binary



Ex. No: 4

SQUARE WAVE GENERATION USING 8255

______________________________________________________________________________

AIM: To Generate a square wave using 8255.

APPARATUS REQUIRED


THEORY

To generate a square wave of 8255 first initialize all the ports of the 8255 as output ports

by writing the corresponding control word. Then make the 24 I/O lines high and low with a

certain delay and we will get the square wave out of 8255. If you dont give any delay then you

cannot see any square wave because of the speed at which the 8255 output lines change states

from high to low and low to high. Increase the delay to reduce the frequency and reduce the delay

to increase the frequency.

HARDWARE DESCRIPTION The Intel 8255A is a general purpose programmable I/O device which is designed for parallel

communication between microprocessors and peripheral devices. It provides 24 I/O pins which

may be individually programmed in 2 groups of 12 and used in 3 major modes of operation.

The 8255 allows the following three operating modes (Modes 0, 1 and 2):

Mode 0 - Simple I/O mode: Ports A and B operate as either inputs or outputs and Port C is

divided into two 4-bit groups either of which can be operated as inputs or outputs.

Mode 1 Handshake I/O Mode: Same as Mode 0 but Port C is used for handshaking and

control.

Mode 2 Bidirectional I/O: Port A is bidirectional (both input and output) and Port C is used for

handshaking. Port B is not used.

BASIC SYSTEM INTERFACE



The control pins with which the CPU communicates to 8255 are the RESET, CS*, RD*,

WR*, A0, A1, D0-D7. Its basic operations are as given in the following table.

RD* - Active Low Read

WR* - Active Low Write

CS* - Active Low Chip Select

A0, A1 - Select control register/port

D0-D7 - Bidirectional Data Bus

The basic operations of the 8255 using the above signals are as given below. A1 A0 RD* WR* CS* FUNCTION 0 0 1

0 1 0

0 0 0

1 1 1

0 0 0

INPUT OPERATION(READ) PORT A=>DATA BUS PORT B=>DATA BUS PORT C=>DATA BUS

0 0 1 1

0 1 0 1

1 1 1 1

0 0 0 0

0 0 0 0

OUTPUT OPERATION (WRITE) DATA BUS=>PORT A DATA BUS=>PORT B DATA BUS=>PORT C DATA BUS=>PORT D DISABLE FUNCTION

X 1 X

X 1 X

X 0 1

X 1 1

1 0 0

DISABLE FUNCTION DATA BUS=>3-STATE ILLEGAL CONDITION DATA BUS=>3-STATE



CONTROL WORD

1. I/O Mode

2. BSR Mode



The following are the I/O addresses for 8255:

IC No. Function Address U3 U3 U3 U3 U19(U4) U19(U4) U19(U4) U19(U4)

Control Register Port A Port B Port C Control Register Port A Port B Port C

0F 0C 0D 0E 17 14 15 16

ALGORITHM

1. Set the control word in control register

2. Send high value to port A and call the delay loop.

3. Send a low value to port A and call delay

DELAY SUBROUTINE 1. Load count register C.

2. Decrement C and if it is zero return to main program.

3. Else continue the loop until C is zero.

PROGRAM

Address Opcode & Operand Label Mnemonics Comments 4100 3E, 80 MVI A, 80 A 80

4102 D3, 0F/43 OUT CT8255 Control word

4104 3E, FF MVI A, FF AFF

4106 D3, 0C/40 LOOP OUT PA8255 Write Data PortA

4108 D3, 0D/41 OUT PB8255 Write Data PortB

410A D3, 0E/42 OUT PC8255 Write Data PortC

410C CD, 13, 41 CALL DELAY Call Subroutine

410F 2F CMA Compliment A

4110 C3, 06, 41 JMP LOOP Repeat writing

4113 F5 DELAY PUSH PSW PUSH PSW

4114 21, FF, FF LXI H, FFFF HLFFFF

4117 00 DELAY1 NOP No Opeartion



4118 2B DCX H Decrement HL

4119 7D MOV A, L AL

411A B4 ORA H A OR H

411B C2, 17, 41 JNZ DELAY1 Jump if non zero

411E F1 POP PSW POP PSW

411F C9 RET Return

RESULT

The square wave is generated using 8255.



Ex No: 5

SERIAL DATA TRANSFER OPERATION USING 8251

______________________________________________________________________________

Aim:

To initialize 8251A and to check the transmission and reception of a character.

Apparatus:

1. 8085 Microprocessor Kit

2. RS232C connector

3. Power Cable

Theory:

The control Words are split into two formats:

1. Mode Instruction word

2. Command Instruction word

Mode Instruction word Definition:

Mode instruction is used for setting the function of the 8251. Mode instruction will be in "wait for

write" at either internal reset or external reset. That is, the writing of a control word after resetting

will be recognized as a "mode instruction."

Items set by mode instruction are as follows:

Synchronous/asynchronous mode

Stop bit length (asynchronous mode)

Character length

Parity bit

Baud rate factor (asynchronous mode)

Internal/external synchronization (synchronous mode)

Number of synchronous characters (Synchronous mode)

In the case of synchronous mode, it is necessary to write one-or two byte sync characters. If sync

characters were written, a function will be set because the writing of sync characters constitutes

part of mode instruction.



Fig 1a. Bit Configuration of Mode Instruction (Asynchronous Mode)

Fig 1b. Bit Configuration of Mode Instruction (Synchronous Mode)



Command Instruction Word:

Command is used for setting the operation of the 8251. It is possible to write a command

whenever necessary after writing a mode instruction and sync characters.

Items to be set by command are as follows:

Transmit Enable/Disable

Receive Enable/Disable

DTR, RTS Output of data.

Resetting of error flag.

Sending to break characters

Internal resetting

Hunt mode (synchronous mode)

Fig 2. Bit configuration of Command Word



Fig 3. Status Read Format

Pin Description:

D 0 to D 7 (l/O terminal)

This is bidirectional data bus which receive control words and transmits data from the CPU and

sends status words and received data to CPU.

RESET (Input terminal)

A "High" on this input forces the 8251 into "reset status." The device waits for the writing of

"mode instruction." The min. reset width is six clock inputs during the operating status of CLK.

CLK (Input terminal)

CLK signal is used to generate internal device timing. CLK signal is independent of RXC or

TXC. However, the frequency of CLK must be greater than 30 times the RXC and TXC at

Synchronous mode and Asynchronous "x1" mode, and must be greater than 5 times at

Asynchronous "x16" and "x64" mode.

WR (Input terminal)

This is the "active low" input terminal which receives a signal for writing transmit data and

control words from the CPU into the 8251.

RD (Input terminal)

This is the "active low" input terminal which receives a signal for reading receive data and status

words from the 8251.



C/D (Input terminal)

This is an input terminal which receives a signal for selecting data or command words and status

words when the 8251 is accessed by the CPU. If C/D = low, data will be accessed. If C/D = high,

command word or status word will be accessed.

CS (Input terminal)

This is the "active low" input terminal which selects the 8251 at low level when the CPU

accesses. Note: The device wont be in "standby status"; only setting CS = High.

TXD (output terminal)

This is an output terminal for transmitting data from which serial-converted data is sent out. The

device is in "mark status" (high level) after resetting or during a status when transmit is disabled.

It is also possible to set the device in "break status" (low level) by a command.

TXRDY (output terminal)

This is an output terminal which indicates that the 8251is ready to accept a transmitted data

character. But the terminal is always at low level if CTS = high or the device was set in "TX

disable status" by a command. Note: TXRDY status word indicates that transmit data character is

receivable, regardless of CTS or command. If the CPU writes a data character, TXRDY will be

reset by the leading edge or WR signal.

TXEMPTY (Output terminal)

This is an output terminal which indicates that the 8251 has transmitted all the characters and had

no data character. In "synchronous mode," the terminal is at high level, if transmit data characters

are no longer remaining and sync characters are automatically transmitted. If the CPU writes a

data character, TXEMPTY will be reset by the leading edge of WR signal. Note : As the

transmitter is disabled by setting CTS "High" or command, data written before disable will be

sent out. Then TXD and TXEMPTY will be "High". Even if a data is written after disable, that

data is not sent out and TXE will be "High".After the transmitter is enabled, it sent out. (Refer to

Timing Chart of Transmitter Control and Flag Timing)

TXC (Input terminal)

This is a clock input signal which determines the transfer speed of transmitted data. In

"synchronous mode," the baud rate will be the same as the frequency of TXC. In "asynchronous

mode", it is possible to select the baud rate factor by mode instruction. It can be 1, 1/16 or 1/64

the TXC. The falling edge of TXC sifts the serial data out of the 8251.

RXD (input terminal)

This is a terminal which receives serial data.

RXRDY (Output terminal)

This is a terminal which indicates that the 8251 contains a character that is ready to READ. If the

CPU reads a data character, RXRDY will be reset by the leading edge of RD signal. Unless the

CPU reads a data character before the next one is received completely, the preceding data will be

lost. In such a case, an overrun error flag status word will be set.



RXC (Input terminal)

This is a clock input signal which determines the transfer speed of received data. In "synchronous

mode," the baud rate is the same as the frequency of RXC. In "asynchronous mode," it is possible

to select the baud rate factor by mode instruction. It can be 1, 1/16, 1/64 the RXC.

SYNDET/BD (Input or output terminal)

This is a terminal whose function changes according to mode. In "internal synchronous mode."

this terminal is at high level, if sync characters are received and synchronized. If a status word is

read, the terminal will be reset. In "external synchronous mode, "this is an input terminal. A

"High" on this input forces the 8251 to start receiving data characters.

In "asynchronous mode," this is an output terminal which generates "high level"output upon the

detection of a "break" character if receiver data contains a "low-level" space between the stop bits

of two continuous characters. The terminal will be reset, if RXD is at high level. After Reset is

active, the terminal will be output at low level.

DSR (Input terminal)

This is an input port for MODEM interface. The input status of the terminal can be recognized by

the CPU reading status words.

DTR (Output terminal)

This is an output port for MODEM interface. It is possible to set the status of DTR by a

command.

CTS (Input terminal)

This is an input terminal for MODEM interface which is used for controlling a transmit circuit.

The terminal controls data transmission if the device is set in "TX Enable" status by a command.

Data is transmitable if the terminal is at low level.

RTS (Output terminal)

This is an output port for MODEM interface. It is possible to set the status RTS by a command.

The program first initializes the 8253 to give an output clock frequency of 150KHz at

channel 0 which will give 9600 baud rate of 8251A. Then 8251A is initialized to a dummy Mode

command. The internal reset to 8251A is then provided, since the 8251A is in the Command

mode now. Then the 8251A is initialized as said above with data 4E and 37. The program after

initializing will read the status register and check for TxEMPTY. If the transmitter buffer is

empty then check for a character in the receive buffer. If some character is present then, it is

received and stored at location 4200. If the serial port is not proper the program will be in a

constant loop either in the transmission mode or in the reception mode.



Program:

Address Opcode Label Mnemonics Comments 4100 MVI A, 36

Initialization of 8253

4102 OUT TMRCNT 4104 MVI A, 0A 4106 OUT TMRCHO 4108 XRA A 4109 OUT TMRCHO 410B XRA A

Resetting the 8251A 410C OUT UATCNT 410E OUT UATCNT 4110 MVI A,40 4112 OUT UATCNT 4114 MVI A, 4E

Initialization of 8251A 4116 OUT UATCNT 4118 MVI A, 37 411A OUT UATCNT 411C LOOP: IN UATCNT

Check 8251As TxEMPTY and then send the data 41 to 8251A

411E ANI 04 4120 JZ LOOP 4123 MVI A, 41 4125 OUT UATDAT 4127 LOOP1: IN UATCNT

Check 8251As RxRDY and then get the data and store at 4200

4129 ANI 02 412B JZ LOOP1 412E IN UATDAT 4130 STA 4200 4133 HLT

Result:

The data byte has been successfully transferred serially using 8251.



Ex No: 6

ADC Interfacing with 8085

______________________________________________________________________________

Aim:

To perform ADC interfacing with 8085p kit using assembly language. Apparatus Required:

1. 8085p kit

2. CRO

3. ADC Interface board

4. Power Chord

Theory:

In a real time applications, processing of input data, conversion of data from digital to

analog and vice versa, are indispensable. The following program initiates the analog to digital

conversion process, checks the EOC pin of ADC 0809 as to whether the conversion is over and

then inputs the data to the processor. It also instructs the processor to store the converted digital

data in the memory.

ADC:

HARDWARE DETAILS:

ADC 0809 is a monolithic CMOS device, with an 8-bit analog-to-digital converter, 8channel

multiplexer and microprocessor compatible control logic.

Selected Analog

Channel

ADDRESS LINE

ADD C ADD B ADD A

IN0 0 0 0

IN1 0 0 1

IN2 0 1 0

IN3 0 1 1

IN4 1 0 0

IN5 1 0 1

IN6 1 1 0

IN7 1 1 1



The main features of ADC 0809 are:

1. 8 bit resolution

2. 100s conversion time

3. 8 channel multiplexer with latched control logic

4. No need for external zero or full scale adjustment

5. Low power consumption 15mW.

6. Latched tristate output.

The device 0809 contains an 8 channel single ended analog signal multiplexer. A particular input

channel is selected by using the address decoding. The above featured table shows the input states

for address lines to select any channel. The address is latched into the decoder of the chip on low

to high transition of the ALE. The A/D converters successive approximation register is reset on

the positive edge of the start conversion pulse. The conversion begins at the falling edge of the

SOC pulse. End of Conversion will go low between 0 and 8 clock pulses after the rising edge of

start of conversion.

Algorithm:


2. Give start of conversion pulse and set the data.

3. Check for the end of conversion pulse.

4. Store the digital data in the memory.


Procedure:

1. Place jumper J2 in A position.

2. Place jumper J5 in A position.

3. Enter and execute the program

4. Vary the analog input (using trimpot) and verify the digital data displayed with that data

stored in memory location 4150h.



Program:

Address Operand &

Opcode


4100 3E, 10 START MVI A, 10 A 10 Sel Ch:0 and

make ALE low 4102 D3, C8 OUT 0C8H A C8

4104 3E, 18 MVI A, 18 A18 Make ALE

High 4106 D3, C8 OUT 0C8H AC8

4108 3E, 01 MVI A,01 A01 SOC signal

high 410A D3. D0 OUT 0D0H AD0

410C AF XRA A AA | A Delay

410D AF XRA A AA | A

410E AF XRA A AA | A

410F 3E, 00 MVI A, 00 A00 SOC signal

low 4111 D3, DO OUT 0D0H AD0

4113 DB, D8 Loop IN 0D8H AD8 Check for

EOC 4115 E6 01 ANI 01 AA&01

4117 FE 01 CPI 01 Compare A with 01

4119 C2, 13, 41 JNZ Loop Jmp if Z=1

411C DB, C0 IN 0C0H AC0 Read data from

ADC 411E 32, 50, 41 STA 4150 [4150]A

4121 76 HLT Stop

Observation:

Vin Analog VoltageSet at input of

ADC

Digital Output seen in LED Digital Output Stored

inmemory location 4150

Result:

ADC interfacing with 8085p using assembly language is done successfully.



Ex. No: 7

8051 ARITHMETIC OPERATIONS

______________________________________________________________________________

AIM:-

To perform arithmetic operations in 8051 Microcontroller using assembly level

programming.

A) 16 Bit addition

B) 8 Bit subtraction

C) 8 Bit multiplication

D) 8 Bit Division

7(A) 8051 ARITHMETIC OPERATIONS (16-BIT ADDITION)

APPARATUS REQUIRED

S. No Item description Qty 1 8051 Microcontroller Kit 1 2 Power Supply Unit 1

THEORY/DESCRIPTION

As there is only one 16-bit register in 8051, 16-bit addition is performed by using ADDC

instruction twice i.e., adding LSB first and MSB next.

ALGORITHM: 16 BIT ADDITION


2. Get the LSB of 1st and 2nd operands.

3. Add the LSB of the two operands and store it in memory.

4. Get the MSB of 1st and 2nd operands.

5. Add the MSB and store the result in memory




FLOWCHART

PROGRAM



7(B) 8051 ARITHMETIC OPERATIONS (8-BIT SUBTRACTION)

APPARATUS REQUIRED


THEORY/DESCRIPTION

Using the accumulator, subtraction is performed and the result is stored. Immediate

addressing is employed. The SUBB instruction writes the result in the accumulator.

ALGORITHM

1. Start the program 2. Clear the carry flag and load the first operand in accumulator. 3. Get the 2nd Operand and subtract it from the accumulator. 4. Store the result in memory 5. Stop the program.

FLOWCHART



PROGRAM

7(C) 8051 ARITHMETIC OPERATIONS (8-BIT MULTIPLICATION)

APPARATUS REQUIRED


THEORY/DESCRIPTION

The 8051 has a MUL instruction unlike many other 8-bit processors. MUL instruction

multiplies the unsigned eight-bit integers in A and B. the low-order byte of the product Is left in A

and the high-order byte in B. If the product is >255, the overflow flag is set. Otherwise it is

cleared. The carry flag is always cleared.

ALGORITHM

1. Start the Program

2. Load the 1st operand in A and 2nd Operand in B.

3. Multiply A and B contents using MUL Instruction

4. Store the result in memory




FLOWCHART



PROGRAM

7(D) 8051 ARITHMETIC OPERATIONS (8-BIT DIVISION)

APPARATUS REQUIRED


THEORY/DESCRIPTION

The 8051 has a DIV instruction unlike many other 8-bit processors. DIV Instruction divides the

unsigned 8-bit integer in A by the unsigned 8-bit integer in register B. The Accumulator receives

the integer part of the quotient and register B receives the integer remainder. The carry and ov

flags will be cleared.

ALGORITHM

1. Start the Program.

2. Get 1st operand in A and 2nd in B.

3. Divide A by B Contents using division instruction.

4. Store the result in memory




FLOWCHART

PROGRAM

Result: All the arithmetic operations using 8051c are practiced successfully.



Ex. No: 8

SEARCHING

_____________________________________________________________________________

AIM:

To find the biggest number in an array of 8-bit unsigned numbers of predetermined length.

APPARATUS REQUIRED


DESCRIPTION

To find the biggest number in an array, the contents of the array must be compared with

arbitrary biggest number. In this experiment, Since all numbers are said to be unsigned 8-bit

number, let internal memory location (say 40H) has the digest number i.e. zero. Now compare the

first number with internal memory location. If it is greater, move it to a internal memory location.

Further comparison is with this biggest number and this comparison is done till the end of the

array. Now the biggest number I internal memory location is stored in memory as the result.



FLOWCHART

NO

YES

YES

1

NO

NO

1

YES

Start

Get Current element of array in A

Initialize Counter and Pointer

Load internal memory location

40H with 0

IS

40H=(A)

IS

(40H)



PROGRAM

Address Label Mnemonics Comments

4100 MOV DPTR, #4200

4103 MOV 40H, #00

4106 MOV R5, #0AH

4108 LOOP2 MOVX A, @DPTR

4109 CJNE A, 40H, LOOP1

410C LOOP3 INC DPTR

410D DJNZ R5, LOOP2

410F MOV A, 40H

4111 MOVX @DPTR, A

4112 HLT SJMP HLT

4114 LOOP1 JC LOOP3

4116 MOV 40H, A

4118 SJMP LOOP3

RESULT

Thus the biggest number in an array is found and verified.



Ex. No: 9

SERIAL COMMUNICATIONS

______________________________________________________________________________

AIM:

To perform serial communication of data using 8051 microcontroller.

APPARATUS REQUIRED


ALGORITHM

1. Start the Program.

2. Initialize the timer 1 in auto reload mode.

3. Load the count value in TH1.

4. Initialize TCON and Set timer1 in run bit.

5. Get the data to be transmitted in the SBUF.

6. Copy the data of SCON in to the accumulator.

7. If RI =1 reset RI and copy the content of SBUF in to a memory location; else if RI!=1 then

again more the SCON value in to accumulator.

8. Store the result in memory.

9. Stop.



FLOWCHART

START

Initialize timer1 in auto reload mode

Initialize SCON

Initialize TCON to set timer1 run bit

Load the count TH1

Move SCON to accumulator

IS RI

Set

Get the data to be transmitted in SBUF

Reset RI

Store the result in memory

Move the content of SBUF to accumulator

STOP



Baud Rate= 11232

2

H

S

TFF

encyclockFrequ

D

MOD

1

60

12

1012

32

29600

HTFFD

12-12TH1=39.0625

TH1=FB

TMOD

Gate C/T M1 M0 Gate C/T M1 M0

0 0 1 0 0 0 0 0 =20H

TCON

TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

0 1 0 0 0 0 0 0 =40H

SCON

0 1 0 1 1 0 0 0 =58H

OBSERVATION

Input Data to SBUF is A6

Output Address: 4200

Data : A6



PROGRAM

Address Opcode & Operand Label Mnemonics Comments 4100 75 89 20 MOV TMOD, #20

4103 75 8D FB MOV TH1, #FB

4106 75 88 40 MOV TCON, #40

4109 75 98 58 MOV SCON, #58

410C 75 99 A6 MOV SBUF, #A6

410F E5 98 XX MOVA, SCON

4111 54 01 ANL A, #01

4113 70 FA JZ XX

4115 C2 98 CLR SCON.0

4117 E5 99 MOV A, SBUF

4119 90 42 00 MOV DPTR. #4200

411C F0 MOVX @DPTR, A

411D 80 FE SJMP 411D

RESULT

The program for serial communication using 8051 microcontroller was executed

successfully and the output was verified.



Ex. No: 10

DAC INTERFACING WITH 8051 PROGRAM

______________________________________________________________________________

AIM:

To interface 8051 microcontroller with DAC and generate the following waves.

1. Square Wave

2. Saw tooth Wave

3. Triangular Wave

APPARATUS REQUIRED

S. No Item description Qty 1 8051 Microcontroller Kit 1 2 DAC Interface Board 1 3 Power Supply Unit 1

THEORY/DESCRIPTION

MicroProcessor &Interfacing Ramesh Goankar.

ALGORITHM: SQUARE WAVEFORM GENERATION

1. Start

2. Move the port address of the DAC to DPTR

3. Clear the accumulator

4. Move the contents of accumulator to the DAC Port.

5 Call delay

6. Move the Value of FF to A

7. Move the contents of the accumulator to DAC port

8. Call delay

9. Stop



DELAY:

1. Load Count

2. Load the second count

3. Loop till the count is zero.

4. Jump to main Program.



FLOWCHART: SQUAREWAVE GENERATION

start

Move the port address of DAC to DPTR

Move the value FF to accumulator and move A to DAC port

Clear accumulator and move the content of A to the DAC

Call Delay

Call Delay

Stop

DELAY

Load value 05 in R1

Load the Value of R2

Decrement R2

Decrement R1

Return

If R2=0

If R1=0



PROGRAM

Address Label Mnemonics Opcode Comments 4200 MOV DPTR, #FFC0 90 CO FF 4203 LL MOV A, #00 74 00 4205 MOVX @DPTR, A FO 4206 LCALL DELAY 12 41 00 4209 MOV A, #FF 74 FF 420B MOVX @DPTR, A FO 420C LCALL DELAY 12 41 00 420F LJMP LL 02 42 03

4100 MOV R1, #05 79 05 4102 XX MOV R2, #FF 7A FF 4104 YY DJNZ R2, YY DA FE 4106 DJNZ R1, XX D9 FA 4108 RET 22

ALGORITHM: SAWTOOTH WAVEFORM GENERATION

1. Start

2. Clear the accumulator by loading data 00

3. Move the content of accumulator in to DPTR

4. Increment accumulator content.

5. Jump to the previous instruction.

PROGRAM: SAWTOOTH WAVEFORM GENERATION

Address Label Mnemonics Opcode Comments 4200 MOV DPTR, #FFCO 90 FF CO 4203 MOV A, #00 74 00 4205 LL MOVX @DPTR, A FO 4206 INC A 04 4207 SJMP LL 80 FC



ALGORITHM: TRIANGULAR WAVEFORM GENERATION

1. Start

2. Load the port address to DPTR

3. Load the value of accumulator to the port address.

4. Increment accumulator.

5. Jump on NO zero to loop1

6. Move data FF into the accumulator.

7. Decrement the value of accumulator.

8. Jump if No zero , Stop.

PROGRAM: TRIANGULAR WAVEFORM GENERATION

Address Label Mnemonics Opcode Comments 4200 MOV DPTR, #FFCO 90 FF CO 4203 START MOV A, #00 74 00 4205 LOOP1 MOVX @DPTR, A FO 4206 INC A 04 4207 JNZ LOOP1 70 FC 4209 MOV A, #FF 74 FF 420B LOOP2 MOVX @DPTR, A F0 420D JNZ LOOP2 420F LJMP START 02 42 03

RESULT

The Program for interfacing 8051 with DAC to generate square, saw tooth and triangular

waveform was executed and verified successfully.



Ex. No: 11

STEPPER MOTOR INTERFACING WITH 8051

______________________________________________________________________________

AIM:

To interface a stepper motor with 8051 microcontroller and determine the angle.

APPARATUS REQUIRED

S. No Item description Qty 1 8051 Microcontroller Kit 1 2 Stepper Motor Interface Board 1 3 Power Supply Unit 1

Theory:

Stepper motor is a widely used device that translates electrical pulses into mechanical

movement. Stepper motor is used in applications such as; disk drives, dot matrix printer,

robotics etc,. The construction of the motor is as shown in figure 1 below.

Figure 1: Structure of stepper motor

It has a permanent magnet rotor called the shaft which is surrounded by a stator. Commonly used

stepper motors have four stator windings that are paired with a center tapped common. Such

motors are called as four-phase or unipolar stepper motor.



The stator is a magnet over which the electric coil is wound. One end of the coil are

connected commonly either to ground or +5V. The other end is provided with a fixed sequence

such that the motor rotates in a particular direction. Stepper motor shaft moves in a fixed

repeatable increment, which allows one to move it to a precise position. Direction of the rotation

is dictated by the stator poles. Stator poles are determined by the current sent through the wire

coils.

Step angle:

Step angle is defined as the minimum degree of rotation with a single step.

No of steps per revolution = 360 / step angle

Steps per second = (rpm x steps per revolution) / 60

Example: step angle = 2

No of steps per revolution = 180

Switching Sequence of Motor:

As discussed earlier the coils need to be energized for the rotation. This can be done by

sending a bits sequence to one end of the coil while the other end is commonly connected. The

bit sequence sent can make either one phase ON or two phase ON for a full step

sequence or it can be a combination of one and two phase ON for half step sequence. Both are

tabulated below.

Full Step:

Two Phase ON

One Phase ON



Half Step (8 sequence):

The sequence is tabulated as below:

8051 Connection to Stepper Motor:



PROGRAM:

1. To run a Stepper motor at different speed.

Address Opcode Label Mnemonics Comments 4100 ORG 4100 4100 START: MOV DPTR, #4500H 4103 MOV R0, #04

4105 JO: MOVX A, @DPTR

4106 PUSH DPH

4108 PUSH DPL

410A MOV DPTR, #FFCOH

410D MOV R2, #04H

410F MOV R1, #FFH

4111 DLY1: MOV R3, #FFH 4113 DLY: DJNZ R3, DLY

4115 DJNZ R1, DLY1

4117 DJNZ R2, DLY1

4119 MOV @DPTR, A

411A POP DPL

411C POP DPH

411E INC DPTR

411F DJNZ R0, J0

4121 SJMP START 4123 END

4500 09,05,06,0A TABLE: DB 09,05,06,0A

Exercise:

1. To run a stepper motor for require Angle within 360 degrees.

2. To run the Stepper motor in both forward & reverse direction with delay.

RESULT

The program for interfacing a Stepper motor with an 8051 microcontroller was done

successfully and the output was verified to run Stepper motor at different speed.



Ex. No: 12

8086 p ARITHMETIC OPERATIONS

AIM:

To perform arithmetic operations using 8086 assembly language programming for the

following:

1. 16 bit Addition

2. 16 bit Subtraction

3. 16 bit Multiplication

4. 16 it Division

A) 16-BIT ADDITION

APPARATUS REQUIRED


THEORY/DESCRIPTION

The add instruction requires either the addend or the augend to be in a register, unless the

source operand is immediate since the addressing modes permitted for the source and destination

are register-register, memory to register, register to memory, register to immediate, and finally

memory to immediate. Hence one of the operands is initially moved to AX. Then using the add

instruction, 16- bit addition is performed.

PROCEDURE

1. Enter the Opcode in RAM memory from location 1000 using ADD command.

2. Using STEP command, execute the program instruction by instruction.

3. After each instruction verified register contents and see that they are initialized to the required

values.



ALGORITHM : ADDITION

1. Load input numbers to be added.

2. Add the numbers and store in AX

3. Store output in memory location 1200


PROGRAM: 16-BIT ADDITION

Address Label Mnemonics Comments 1000 MOV AX, [1100] AX



B) 16-BIT SUBTRACTION APPARATUS REQUIRED S. No Item description Qty 1 8086 Microprocessor Kit 1 2 Power Supply Unit 1

THEORY

The next arithmetic primitive is SUB. As discussed in ADD it permits the same modes of

addressing. Hence moving the minuend to a register pair is necessary. Then the result is moved to

a location in memory.

PROCEDURE

1. Enter the Opcode in RAM memory from location 1000 using SUB command

2. Using STEP command, execute the program instruction by instruction

3. After each instruction verified register contents and see that they are initialized to the required

values.

ALGORITHM: SUBTRACTION

1. Load the two numbers to be subtracted

2. Subtract the numbers and store in AX.

3. Store the output in memory location 1200




FLOWCHART: SUBTRACTION

PROGRAM: 16-BIT SUBTRACTION

Address Label Mnemonics Comments 1000 MOV AX, [1100] AX



have both 16 and 8 bit operands and the multiplicand is AX or AL, accordingly the result for a

byte multiply is a 16 bit number in AX while that for a word multiply is a 32 bit number, the

lower word of which is in AX and the higher word in DX.

PROCEDURE

1. Enter the opcodes in ram memory from location 1000 using SUB command

2. Using STEP command, execute the program instruction by instruction

3. After each instruction verified register contents and see that they are initialised to the required

values

ALGORITHM: 16-BIT MULTIPLICATION

1. Load two 16-bit numbers in to registers.

2. Multiply contents of both registers

3. MSB and LSB is stored in 1200 & 1202 respectively

4. Stop the Program.

FLOWCHART: 16-BIT MULTIPLICATION

START

Load Input multiplier and multiplicand

Multiply the two data

Stop

Store the Result



PROGRAM : 16-BIT MULTIPLICATION

Address Opcode & Operand Label Mnemonics Comments 1000 MOV AX, [1100] 1004 MOV BX, [1102] 1008 MUL BX 100C MOV [1200], BX 1010 MOV[1202], AX

D) 8086 16-BIT DIVISION

APPARATUS REQUIRED


THEORY/DESCRIPTION

Using the DIV Instruction of 8086, both division of a double word by a word and a word

by a byte can be performed. For the first case, the lower order word of the dividend is in AX and

the higher order word is in DX. The quotient is in AX and remainder in DX.

For the second case, the dividend is in AL, the quotient is in AL and the remainder is in AH.

ALGORITHM: 32-BIT DIVISION

1. Load two 16-bit numbers in to registers.

2. Divide contents of both registers

3. Store the remainder and quotient.

4. Stop the Program.



FLOWCHART: 32-BIT DIVISION

PROGRAM: 32-BIT DIVISION

Address Opcode & Operand Label Mnemonics Comments

1000 MOV DX, [1100] 1004 MOV AX, [1102] 1008 MOV CX, [1104] 100C DIV CX 1010 MOV [1200], AX 1014 MOV [1202], DX 1018 HLT

PROCEDURE

1. Enter the opcodes in ram memory from location 1000 using SUB command.

2. Using STEP command, execute the program instruction by instruction.

START

Load Input dividend and divisor

Perform the two data

Stop

Store the Result



3. After each instruction verified register contents and see that they are initialized to the

required values.

RESULT

Thus, the features of the Intel 8086 microprocessors were studied and operations of the

corresponding kits were understood. Also 16-bit arithmetic operations are performed and verified.

11mt220 microprocessor and microcontroller lab

Documents