1310/1490/1555nm integrated triplexer transceiver · 2019. 4. 25. · ds-7284 rev 04 parameter...

ITR-D3T-SD9

DS-7284 Rev 04

- Digital Transmitter: A DFB laser diode is employed for upstream transmission at OC-24 (1244Mbps). The optical transmitter includes a back facet

photodetector to monitor laser power for APC control.

- Digital Receiver: An APD with TIA is employed for downstream data reception at OC-48 (2488Mbps). A post amplifier is also included for CML output

compatibility.

- Analog Receiver: 870MHz forward path video (CATV) receiver with multiple gain stages, automatic gain control (AGC), and status indicators.

1310/1490/1555nm Integrated Triplexer Transceiver

Features

Single fiber, integrated triplexer transceiver

Compliant to FSAN G.984.2& G.984.5 specifications

Complies with 21 CFR 1040.10 and 1040.11 except for deviations

pursuant to Laser Notice No. 50, dated June 24, 2007

Voice/Data/Video FTTx ONT/ONU applications

1310nm Tx, 1490nm Rx, 1555nm video Rx

1244Mbps Tx / 2488Mbps Rx asymmetric data rate

Burst mode upstream transmission

1555nm CATV Wavelength Blocking Filter

870MHz Video Bandwidth

-40 to 85ºC Operation

Feedback Video AGC Operation

20km reach

28dB power budget

ROHS no exemption

Meets UL 94V-1 flammability

ITR-D3T-SD9

DS-7284 Rev 04

AGCMOCA

RF Tilt /

Surge

Protection

RF

Detector

Microcontroller

A

D

C

Optical

Triplexer

Module

1550nm PIN

Receiver

1310nm

Laser

WDM

TIA

1490nm APD

Receiver

Rx

Section

Lim.

Amp.

Tx

Section

LDD

Video

Section

1310nm Upstream

1490nm Downstream

1555nm Downstream

Rx Data

Tx Data

Triplexer Block Diagram

RF Out

ITR-D3T-SD9

DS-7284 Rev 04

Absolute Maximum Ratings

Usage of this transceiver shall adhere to the following absolute maximum ratings. Stresses beyond those in Table 1 may cause permanent damage to

the unit. These are stress ratings only, and functional operation of the unit at these or any other conditions beyond those indicated in the operational

sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect unit reliability.

Table 1 - Absolute Maximum Ratings

Parameter Minimum Maximum Unit/Conditions

Ambient Storage Temperature -40 85 ºC

Operating Temperature* -40 85 ºC

Operating Case Humidity Range 10% 90% non-condensing

Lead Soldering Temperature - 260ºC 10 sec

Vdd_+12V -0.3 15 V

Vdd power-on rise time 150 - us

Vcc_Rx -0.3 4 V

Vcc_Tx -0.3 4 V

Vcc_µC -0.3 +4.2 V

*Operating temp: minimum is ambient, maximum is case.

Module Characteristics

Table 2 - Optical Characteristics

Parameter Minimum Typical Maximum Unit/Conditions

Optical Isolation

From external 1310 (1260 – 1360) nm to 1490 (1480 – 1500) nm Rx -30 dB

Optical Isolation


Optical Cross-talk

From internal 1310 (1260 – 1360) nm TX to 1490 (1480 – 1500) nm Rx -47 dB

Optical Cross-talk

From internal 1310 (1260 – 1360) nm TX to 1555 (1550 – 1560) nm Rx -47 dB

Optical Isolation


Optical Isolation

From external 1555 nm to 1490 nm Rx -32

Optical Isolation Wavelength Blocking Filter

From external 1530 nm(>1530nm) to 1490 (1480 – 1500) nm Rx 30 dB


From external 1450 nm(<1450nm) to 1490 (1480 – 1500) nm Rx 30 dB


From external 1577 (1575 – 1625) nm to 1550 (1550 – 1560) nm Rx 30 dB

ITR-D3T-SD9

DS-7284 Rev 04

Parameter Minimum Typical Maximum Unit/Conditions

Optical Return Loss

1490 nm band

1555 nm band

-20 dB

Optical Return Loss @ 1310 nm - - -6 dB

Functional Characteristics

The following tables list the performance specifications for the various functional blocks of the integrated optical transceiver module.

Table 3 – Digital Transmitter Specifications

Parameter Minimum Typical Maximum Unit Notes

Operating Voltage 3.15 3.30 3.45 V Vcc referenced to GND_Tx

Data Rate - 1244.16 - Mbps

Average Optical Output Power, Po 0.5 - 5 dBm

Output Power at Transmit Off - - -40 dBm

Side Mode Suppression Ration (SMSR) 30 - - dB

Extinction Ratio 10 - - dB PRBS 223-1, NRZ, 50% duty cycle

Operational Wavelength 1290 - 1330 nm

Transmitter Output Eye G.984.2 Figure 3

Optical Rise and Fall Time - 250 - ps 20% to 80%

Differential Input Voltage, Vin 200 - 2400 mVp-p BEN+/- and TXD+/-. DC-coupled

Input Impedance, differential - 100 - Ω BEN+/-, TXD+/- (see Figure 1)

Common-Mode Input Voltage - Vcc-1.32 - V DC coupled

Tx Burst Enable Time - - 12.86 ns 16 bits data @ 1244Mbps

Tx Burst Disable Time - - 12.86 ns 16 bits data @ 1244Mbps

TX_SD Delay (Timing “D”) 40 200 ns See Figure 2

TX_SD Width Difference (Timing “X”) 100 ns See Figure 2

TX_SD Startup Time (TTX_SD_STARTUP) 3 S See Figure 3

ITR-D3T-SD9

DS-7284 Rev 04

Figure 1 – Schematic representation of the module high speed inputs/outputs

Figure 2: TX_SD timing diagram.

Figure 3: TX_SD startup timing diagram.

BEN

Rx Data

100

0 . 1 u F

For CML Tx Data

Tx Data

100 Differential Transmission Lines

0 . 1 u F

LDD/LA

Post Amp

100 TX

RX

W

D

W X

D = 40ns typical..

X = 100ns max.

TX_DIS

TX_SD

Ttx_sd_startup

Normal Undefined state TX_SD

TX_VCC

TX_BEN-

ITR-D3T-SD9

DS-7284 Rev 04

Table 4 – Digital Receiver Specifications


Operating Voltage 3.15 3.30 3.45 V Vcc referenced to GND_RX

Data Rate - 2488.32 - Mbps

Operational Wavelength Range 1480 - 1500 nm

Sensitivity -28 - - dBm With Tx on

Overload - - -8 dBm

Bit Error Rate (BER) - 10-10

Optical Return Loss 20 - - dB

Data Output Rise and Fall Time - 160 - ps 20% to 80%

Signal Detect Assertion Level - -28 dBm Transition during increasing light

Signal Detect De-Assertion Level -38 - - dBm Transition during decreasing light

Signal Detect Hysteresis 0.5 - 6 dB

Differential Output Voltage 750 900 1050 mV CML output, ac coupled (0.1F)

Signal Detect Output HIGH Voltage 2.0 - - V

LVTTL with internal pull up resistor.

Asserts HIGH when input data

amplitude is above threshold.

Signal Detect Output LOW Voltage - - 0.4 V LVTTL. De-asserts LOW when input

data amplitude is below threshold .

RSSI Rangea -28 -8 dBm

RSSI Accuracy -3 - +3 dB

a) Externally calibrated.

Table 5 – Video Receiver Specifications


Operating Voltage 11.7 - 13.2 V

Supply Current - - 250 mA

Frequency Range 54 - 870 MHz

Receiver Wavelength 1550 1555 1560 nm

Responsivity 0.8 - - A/W

AGC Time Constant 0.5 - 15 s

Video PD Monitor Accuracy -3 - 3 dB

Channel Bandwidth - 4 - MHz

Channel Spacing - 6 - MHz

Received Average Optical Power -8 - 2 dBm

OMI 4.3 % Analog OMI% / carrier

2.15 % Digital OMI% / carrier (Freq > 550MHz)

ITR-D3T-SD9

DS-7284 Rev 04


RF Output 550 MHz 19 - 26 dBmV For digital channels > 550MHz, RF

levels are 6dB lower

RF Output Power Tilt 2 - 7 dB

Peak to Peak Flatness -2 - 2 dB

S22 Output Return Loss 14 - - dB 75Ω

CSO - - -55 dBc For > 550MHz, CSO is 7dB higher

CTB - - -55 dBc For > 550MHz, CTB is 7dB higher

Carrier to Noise Ratio(CNR) 46 - - dB

CNR measurement correlated to SCTE

standard, At -8dBm input power, 3.4%

OMI

Table 6 – Microcontroller Specifications


Operating Voltage 3.15 3.30 3.45 V

SDAa - - - -

LVTTL, open collector serial data line

from the I2C bus to the on board

Microcontroller

SCLa,b - - - -

LVTTL, open collector serial clock line

from the I2C bus to the on board

Microcontroller

Reset Holdc 30 - - ms LVTTL input, internal 50Ω pull-up. Active

Low.

a) I2C SDA and SCL must be open collector or open drain connections b) Clock stretching, as per paragraph 13.2 of the I2C bus standard, must be implemented to operate correctly c) Please see table & timing diagram below for a recommended system start-up sequence.

Table 7 – Microcontroller Specifications


DDM Temp Accuracy -5 - +5 C Note: MCU temp

DDM VCC Accuracy -5 - +5 %

DDM RSSI Accuracy -3 - +3 dB

DDM VpdMon Accuracy -3 +3 dB

DDM RfMon Accuarcy -3 +3 dB

DDM Bias Current Accuarcy -15 15 %

DDM TX Power Accuarcy -3 +3 dB

ITR-D3T-SD9

DS-7284 Rev 04

Table 8 – Suggested Start-up Sequence

Step Action

1 Power up the host system, with the RESET pin pulled to ground via a ≤ 4.7k_ resistor.

2 Drive the RESET pin LOW.

3 Set the BEN control lines to disable the transmitter (BEN lines must be driven with differential logic).

4 Ensure power to the unit is on.

5 Drive the RESET pin HIGH to release the unit to become operational.

6 Wait approximately 250ms

7 Read bytes A2.70/71/74/75 to clear the interrupt condition. Verify that byte A2.75 bit 7 was set. Use multi-byte read of bytes

70/71 and bytes 74/75. (If software interrupt feature is not used, this step may be skipped)

8 The unit is now ready for normal operation.

Figure 4 - Recommended transceiver module start-up sequence

EEPROM Mapping

Table 9- A0H Address

DEC

Addr.

HEX

Addr.

Size

(bytes) Name Default Value(HEX) Description

0-11 00-0B 12 CUST_PN 20 20 20 20 20 20 20 20 20 20 20

20 Customer Part Number

12 0C 1 BR_UPSTREAM 7C Upstream Bit Rate (10 Mbps)

13 0D 1 BR_DOWNSTREAM F9 Downstream Bit Rate (10 Mbps)

14-15 0E-0F 2 Reserved Reserved

16 10 1 MIN_RF_LEVEL 03 Minimum RF Output Level

17 11 1 LOW_VIDEO_INPUT_POWE

R B0 Low Video Input Power Level (0.1 dBm)

18 12 1 HI_VIDEO_INPUT_POWER 14 Hi Video Input Power Level (0.1 dBm)

19 13 1 NOM_RF_TILT 28 Nominal RF Tilt (0.1 dBm)

20-35 14-23 16 VENDOR_NAME "SOURCEPHOTONICS" Vendor Name (ASCII)

36 24 1 Reserved Reserved

ITR-D3T-SD9

DS-7284 Rev 04

37 25 1 RF_BW 01 RF Bandwidth

38-49 26-31 12 Reserved Reserved

50 32 1 RESPONSIVITY xx Responsivity (0.01 mA/mW)


56-59 38-3B 4 VENDOR_REV 31 20 20 20 Part Revision Number

60 3C 1 TX_WL 83 Transmit Wavelength (10 nm)

61 3D 1 RX_WL 95 Receive Wavelength (10 nm)

62-67 3E-43 6 Reserved Reserved

68-83 44-53 16 VENDOR_SN "xxxxxxxxxxxxxxxx" Part Serial Number(ASCII)

84-91 54-5B 6 DATE_CODE xx xx xx xx xx xx 20 20 Year(2 bytes) month(2 bytes) day(2

bytes)

92 5C 1 DIAG_TYPE 18 Diagnotics Support Code

93-95 5D-5F 3 Reserved Reserved

96-125 60-7D 30 VENDOR_PN "ITR-D3T-SD9" Sourcephotonics Part Number

126-127 7E-7F 2 VENDOR_SPECIFIC 20 20 Vendor Specific

Table 10- A2H Address

DEC Addr. HEX

Addr.

Field Size

(bytes) Name Description

0-1 00-01 2 THRESH_TEMP_ALARM_HI NO SETTING

2-3 02-03 2 THRESH_TEMP_ALARM_LO NO SETTING

4-5 04-05 2 THRESH_TEMP_WARN_HI NO SETTING

6-7 06-07 2 THRESH_TEMP_WARN_LO NO SETTING

8-9 08-09 2 THRESH_VCC_ALARM_HI NO SETTING

10-11 0A-0B 2 THRESH_VCC_ALARM_LO NO SETTING

12-13 0C-0D 2 THRESH_VCC_WARN_HI NO SETTING

14-15 0E-0F 2 THRESH_VCC_WARN_LO NO SETTING

16-17 10-11 2 THRESH_VPDMON_ALARM_HI NO SETTING

18-19 12-13 2 THRESH_VPDMON_ALARM_LO NO SETTING

20-21 14-15 2 THRESH_VPDMON_WARN_HI NO SETTING

22-23 16-17 2 THRESH_VPDMON_WARN_LO NO SETTING

24-25 18-19 2 THRESH_RFMON_ALARM_HI NO SETTING

26-27 1A-1B 2 THRESH_RFMON_ALARM_LO NO SETTING

28-29 1C-1D 2 THRESH_RFMON_WARN_HI NO SETTING

30-31 1E-1F 2 THRESH_RFMON_WARN_LO NO SETTING

32-33 20-21 2 THRESH_RSSI_ALARM_HI NO SETTING

34-35 22-23 2 THRESH_RSSI_ALARM_LO NO SETTING

ITR-D3T-SD9

DS-7284 Rev 04

36-37 24-25 2 THRESH_RSSI_WARN_HI NO SETTING

38-39 26-27 2 THRESH_RSSI_WARN_LO NO SETTING


50 32 1 OMI_OFFSET Customer Controlled OMI Offset (0.1 dB) per step


56-59 38-3B 4 RSSI_C4 4th order RSSI calibration coefficient, Current Power

60-63 3C-3F 4 RSSI_C3 3rd order RSSI calibration coefficient, Current Power

64-67 40-43 4 RSSI_C2 2nd order RSSI calibration coefficient, Current Power

68-71 44-47 4 RSSI_C1 1st order RSSI calibration coefficient, Current Power

72-75 48-4B 4 RSSI_C0 0th order RSSI calibration coefficient, Current Power

76-92 4C-5C 17 Reserved Reserved

93 5D 1 VERS_MAJ_OFFSET Major Version Number

94 5E 1 VERS_MIN_OFFSET Minor Version Number

95 5F 1 CHECKSUM Checksum (not used)

96-97 60-61 2 RT_TEMP Temperature in C/256 windowed average 16, in 0.00390625 C

98-99 62-63 2 RT_VCC VCC, volts = Reg / 512 * 2.44 + 2.44, windowed average 8

100-101 64-65 2 RT_VPDMON VPDMON, V = Reg / 1024 * 2.44, windowed average 16

102-103 66-67 2 RT_RFMON RFMON, units of 0.1dBuV, = 1.2 RFMON_A2D + RFMON_C0

104-105 68-69 2 RT_RSSI RSSI calibrated by RSSI_LUT

106-107 6A-6B 2 Reserved Reserved

108 6C 1 Reserved Reserved

109 6D 1 RT_V12 VCC 12 V reading (latched if video is on)

110

6E.0 1bit RT_SD Signal Detect (read-only, active hi)

6E.1 1bit RT_INTERRUPT Interrupt state (read-only, active hi)

6E.2 1bit RT_TXFAIL Tx Fail state (read-only, active low)

6E.3 1bit RT_V_ON Video enable

6E.4 1bit RT_TXDIS Transmit Disable (read-write, active hi)

6E.5 1bit RT_HOLD_VVA If enabled by HOLD_VVA_EN, hold video attenuator at a

constant value, cleared on boot.

6E.6 1bit RT_EYESAFEFLT Eye-Safety Fault Active (read-only latched, active hi)

6E.7 1bit RT_VPD_SQUELCH_EN Squelch video attenuator if input signal goes off

111

6F.0 1bit Reserved Reserved



6F.3 1bit Eyesafe_Dis Eye Safety Disable

6F.4 1bit Interrupt Mode Enable Interrupt Mode Enable


6F.6 1bit Rx_Squelch_DIS Rx Squelch Disable

ITR-D3T-SD9

DS-7284 Rev 04


112

70.0 1bit TEMP_ALARM_HI Temperature too high alarm

70.1 1bit TEMP_ALARM_LO Temperature too low alarm

70.2 1bit VCC_ALARM_HI VCC too high alarm

70.3 1bit VCC_ALARM_LO VCC too low alarm

70.4 1bit VPDMON_ALARM_HI VPDMON too high alarm

70.5 1bit VPDMON_ALARM_LO VPDMON too low alarm

70.6 1bit RFMON_ALARM_HI RFMON too high alarm

70.7 1bit RFMON_ALARM_LO RFMON too low alarm

113

71.0 1bit RSSI_ALARM_HI RSSI too high alarm

71.1 1bit RSSI_ALARM_LO RSSI too low alarm

71.2 1bit SD_OFF Signal Detect went LOW

71.3 1bit SD_ON Signal Detect went HIGH

71.4 1bit TXFAIL_OFF TX Fail went LOW

71.5 1bit TXFAIL_ON TX Fail went HIGH

71.6 1bit TXDIS_OFF TX Disable went LOW

71.7 1bit TXDIS_ON TX Disable went HIGH

114 72 1 IMASK0 Interrupt Mask for ISRC0 (lo=ignored)

115 73 1 IMASK1 Interrupt Mask for ISRC1 (lo=ignored)

116

74.0 1bit TEMP_WARN_HI Temperature too high warning

74.1 1bit TEMP_WARN_LO Temperature too low warning

74.2 1bit VCC_WARN_HI VCC too high warning

74.3 1bit VCC_WARN_LO VCC too low warning

74.4 1bit VPDMON_WARN_HI VPDMON too high warning

74.5 1bit VPDMON_WARN_LO VPDMON too low warning

74.6 1bit RFMON_WARN_HI RFMON too high warning

74.7 1bit RFMON_WARN_LO RFMON too low warning

117

75.0 1bit RSSI_WARN_HI RSSI too high warning

75.1 1bit RSSI_WARN_LO RSSI too low warning

75.2 1bit Reserved Reserved


75.4 1bit EYESAFE_ON Eye Safety Fault

75.5 1bit reserved reserved

75.6 1bit reserved reserved

75.7 1bit RSTDONE Boot finished, part is ready (not maskable)

118 76 1 IMASK2 Interrupt Mask Register for ISRC2 (lo=ignored)

119 77 1 IMASK3 Interrupt Mask Register for ISRC3 (lo=ignored)

120 78.0 1bit RESET Execute Software Reset, only if no other bits set

ITR-D3T-SD9

DS-7284 Rev 04

78.1 1bit SAVE_FLASH Execute Save RAM to Flash, only if no other bits set







121 79 8 bit Reserved Reserved

122

7A.0 1bit Reserved Reserved

7A.1 1bit HOLD_VVA_EN If set, then enable RT_HOLD_VVA feature







123-126 7B-7E 4 Reserved Reserved

127-179 7F-B3 53 Reserved Reserved

180 B4 1 Reserved Reserved

181 B5 1 Reserved Reserved

182-191 B6-BF 10 Reserved Reserved

192-193 C0-C1 2 THRESH_BIASMON_ALARM_HI Not Setting

194-195 C2-C3 2 THRESH_BIASMON_ALARM_LO Not Setting

196-197 C4-C5 2 THRESH_BIASMON_WARN_HI Not Setting

198-199 C6-C7 2 THRESH_BIASMON_WARN_LO Not Setting

200-201 C8-C9 2 THRESH_BFMON_ALARM_HI Not Setting

202-203 CA-CB 2 THRESH_BFMON_ALARM_LO Not Setting

204-205 CC-CD 2 THRESH_BFMON_WARN_HI Not Setting

206-207 CE-CF 2 THRESH_BFMON_WARN_LO Not Setting

208 D0 1 Reserved Reserved

209 D1 1 Reserved Reserved

210-211 D2-D3 2 BIAS_C1 Slope for calibrating TX Bias

212-213 D4-D5 2 BIAS_C0 Offset for calibrating TX Bias

214-215 D6-D7 2 BFMON_C1 Slope for calibrating TX Power

216-217 D8-D9 2 BFMON_C0 Offset for calibrating TX Power

218-219 DA-DB 2 RT_BIASMON Real-time read of TX Bias

220-221 DC-DD 2 RT_BFMON Real-time read of TX Power, corrected by tracking error factor

ITR-D3T-SD9

DS-7284 Rev 04

222

DE.0 1bit BIASMON_ALARM_HI TX Bias High Alarm

DE.1 1bit BIASMON_ALARM_LO TX Bias Low Alarm

DE.2 1bit BFMON_ALARM_HI TX Power High Alarm

DE.3 1bit BFMON_ALARM_LO TX Power Low Alarm

DE.4 1bit BIASMON_WARN_HI TX Bias High Warning

DE.5 1bit BIASMON_WARN_LO TX Bias Low Warning

DE.6 1bit BFMON_WARN_HI TX Power High Warning

DE.7 1bit BFMON_WARN_LO TX Power Low Warning

223 DF 1 IMASK4 Interrupt mask 4

Pin Definitions

Table 11 - Module Pin Definitions

Pin Number Label Definition

1 GND_A Common ground

2 GND_Rx Digital Rx ground

3 Vcc_Rx Digital Rx Vcc

4 SD Signal Detect output. LVTTL with internal 3.3k pull-up. Asserts HIGH when input optical signal level

is above threshold.

5 RXD+ RX data output, CML. 50Ω terminated to Vcc and AC coupled to module output (0.1F)

6 RXD- RX data bar output, CML. 50Ω terminated to Vcc and AC coupled to module output (0.1F)

7 BEN+ Burst Enable input, internally DC coupled.

8 BEN- Burst Enable bar input, internally DC coupled.

9 GND_Tx Digital Tx ground

10 TXD+ Tx data input, LVPECL. Internally DC coupled. 100Ω differential termination.

11 GND_Tx Digital Tx ground

12 TXD- Tx data bar input, LVPECL. Internally DC coupled. 100Ω differential termination.

13 Vcc_Tx Digital Tx Vcc

14 SDA I2C Data input/output. LVTTL

15 SCL I2C Clock input. LVTTL

16 Tx_SD Tx signal detect. Active high

17 Vdd_+12V Video Rx 12V Vdd

18 NC Not connected

19 Reset Reset input. LVTTL. Internal pull up. Active low.

20 GND_A Common ground

21 RF_GND RF ground

22 RF_SIGNAL RF signal

23 RF_GND RF ground

ITR-D3T-SD9

DS-7284 Rev 04

Package Diagram

ITR-D3T-SD9

DS-7284 Rev 04

Ordering Information

Table12 – Valid Part Numbers

Part Number Description

ITR-D3T-SD9 GPON ONT triplexer optical transceiver,SC/APC, I-temp operation

Table 13 - Device Handling/ESD Protection

The devices are static sensitive and may easily be damaged if care is not taken during handling. The following handling practices are

recommended.

1 Devices should be handled on benches with conductive and grounding surfaces.

2 All personnel, test equipment and tools shall be grounded.

3 Do not handle the devices by their leads.

4 Store devices in protective foam or carriers.

5 Avoid the use of non-conductive plastics, rubber, or silk in the area where the devices are handled

6 All modules shall be packaged in materials that are anti-static to protect against adverse electrical environments.

7

Avoid applications of any voltage higher than maximum rated voltages to this part. For proper operation, any VIN or VOUT should be

constrained to the range GND (VIN or VOUT) VCC. Unused inputs must always be tied to an appropriate logic voltage (e.g. either

GND or VCC). Unused outputs must be left open.

ITR-D3T-SD9

DS-7284 Rev 04

Caution Use of controls or adjustment or performance of procedures other than those specified herein may result in hazardous radiation exposure.

Warnings Handling Precautions: This device is susceptible to damage as a result of electrostatic discharge (ESD). A static free environment is highly recommended. Follow guidelines according to proper ESD procedures.

Laser Safety: Radiation emitted by laser devices can be dangerous to human eyes. Avoid eye exposure to direct or indirect radiation.

Legal Notice IMPORTANT NOTICE!

All information contained in this document is subject to change without notice, at Source Photonics’ sole and absolute discretion. Source Photonics

warrants performance of its products to current specifications only in accordance with the company’s standard one-year warranty; however, specifications

designated as “preliminary” are given to describe components only, and Source Photonics expressly disclaims any and all warranties for said products,

including express, implied, and statutory warranties, warranties of merchantability, fitness for a particular purpose, and non-infringement of proprietary

rights. Please refer to the company’s Terms and Conditions of Sale for further warranty information.

Source Photonics assumes no liability for applications assistance, customer product design, software performance, or infringement of patents, services,

or intellectual property described herein. No license, either express or implied, is granted under any patent right, copyright, or intellectual property right,

and Source Photonics makes no representations or warranties that the product(s) described herein are free from patent, copyright, or intellectual property

rights. Products described in this document are NOT intended for use in implantation or other life support applications where malfunction may result in

injury or death to persons. Source Photonics customers using or selling products for use in such applications do so at their own risk and agree to fully

defend and indemnify Source Photonics for any damages resulting from such use or sale.

© Copyright Source Photonics, Inc. 2007~2008

All Rights Reserved.

All information contained in this document is subject to change without notice. The products described in this document are NOT

intended for use in implantation or other life support applications where malfunction may result in injury or death to persons.

The information contained in this document does not affect or change Source Photonics product specifications or warranties. Nothing

in this document shall operate as an express or implied license or indemnity under the intellectual property rights of Source Photonics

or third parties. All information contained in this document was obtained in specific environments, and is presented as an il lustration.

The results obtained in other operating environments may vary.

THE INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED ON AN ”AS IS” BASIS. In no event will Source Photonics be

liable for damages arising directly from any use of the information contained in this document.

Contact

SOURCE PHOTONICS

20550 NORDHOFF ST.

CHATSWORTH, CA 91311

Manufacture address: Building #2 & 5, West Export Processing Zone No. 8 Kexin Road, Hi-Tech Zone Chengdu, 611731, China

[email protected]

Tel: 818-773-9044 Fax: 818-576-9486

Or visit our website: http://www.sourcephotonics.com

mailto:[email protected]

http://www.sourcephotonics.com/

1310/1490/1555nm integrated triplexer transceiver · 2019. 4. 25. · ds-7284 rev 04 parameter...

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