15-441 computer networking
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15-441 Computer Networking. Data and Control Planes. Goals of This Lecture. Show h ow everything fit together Review data plane components v arious switching architectures Head of line blocking Scheduling Header lookup Discuss Control plane Control processor Routing protocol - PowerPoint PPT PresentationTRANSCRIPT
Hui Zhang, Fall 2012 1
15-441 Computer Networking
Data and Control Planes
Hui Zhang, Fall 2012 2
Goals of This Lecture
Show how everything fit together Review data plane components
- various switching architectures
- Head of line blocking
- Scheduling
- Header lookup
Discuss Control plane- Control processor
- Routing protocol
- Signaling protocol
- Interconnection of Multiple control protocols
Hui Zhang, Fall 2012 3
Review: Structure of A Generic Communication Switch
Switches- circuit switch
- Ethernet switch
- ATM switch
- IP router
Line Cards
Switch Fabric
Control Processor
Line Cards
Switch fabric- high capacity interconnect
Line card- address lookup in the
data path (forwarding) Control Processor
- load the forwarding table (routing or signaling)
Hui Zhang, Fall 2012 4
Data and Control Planes
Data plane: how each packet is processed? - Forwarding: header lookup and forward the packet to
right output port
- Switching: move packets from input port to output port
- Scheduling: manage buffer and bandwidth resource
Control plane: how forwarding tables are computed
- Router: routing protocols
- ATM and phone switches: signaling & routing protocols
- Ethernet switch: learning and spanning tree
Hui Zhang, Fall 2012 5
Review: Data Plane Switch
Input and output interfaces are connected through an interconnect
A interconnect can be implemented by
- Shared memory
- Shared bus
- Crossbar or other switching fabric
input interface output interface
Inter-connect
Hui Zhang, Fall 2012 6
Review: Head-of-line Blocking The packet/cell at the head of an input queue cannot
be transferred, thus blocking the following packets/ cells
Cannot betransferred
because output buffer overflow
Cannot be transferred because is blocked by red cell
Output 1
Output 2
Output 3
Input 1
Input 2
Input 3
Hui Zhang, Fall 2012 7
Review: Solution to Avoid Head-of-line Blocking
For each input card, maintain at each input N virtual queues, i.e., one per output
Output 1
Output 2
Output 3
Input 1
Input 2
Input 3
Hui Zhang, Fall 2012 8
Input Interface
Packet forwarding: decide to which output interface to forward each packet based on the information in packet header
- Examine packet header
- Lookup in forwarding table
- Update packet headerinput interface output interface
Inter-connect
Hui Zhang, Fall 2012 9
Circuit Switching
Input PortsOutput Ports
Switch
Connects (electrons or bits) ports to ports
Hui Zhang, Fall 2012 10
AABB
DD
CC
EE
FF
VC7VC4
VC3VC3
VC3VC5
VC3 VC5
VC2
VC2
Virtual Circuit Switching: Label Swapping
Table at Node A
INLINK
IN VC OUTLINK
OUTVC
CA 7 AB 4
CA 2 AB 5
DA 3 AB 3
Hui Zhang, Fall 2012 11
IP Routing
Packet with destination address 12.82.100.101 is sent to interface 2, as 12.82.100.xxx is the longest prefix matching packet’s destination address
……
312.82.xxx.xxx
1128.16.120.xxx
1
2128.16.120.111
12.82.100.101
12.82.100.xxx 2
Hui Zhang, Fall 2012 12
Patricia Tries
Use binary tree paths to encode prefixes
Advantage: simple to implement Disadvantage: one lookup may take O(m), where m
is number of bits (32 in the case of IPv4)
001xx 2 0100x 310xxx 101100 5
0 1
0
1 0
1
1
0
0
0
0
2
3
5
1
Hui Zhang, Fall 2012 13
Review: Addressing and Look-up
Flat address- Ethernet: 48 bit MAC
address
- ATM: 28 bit VPI/VCI
- DS-0: timeslot location Limited scalability High speed lookup
Hierarchical address- IP <network>.<subnet>.<host>
- Telephone: country.area.home Scalable Easy lookup if boundary is fixed
- telephony Difficult lookup if boundary is
flexible- longest prefix match for IP
Hui Zhang, Fall 2012 14
Output Interface
Buffer management: decide when and which packet to drop Scheduler: decide when and which packet to transmit
- FIFO, Round Robin, Strict Priority
1
2
SchedulerBuffer
Hui Zhang, Fall 2012 15
Example: FIFO router
Most of today’s routers Drop-tail buffer management: when buffer is full
drop the incoming packet First-In-First-Out (FIFO) Scheduling: schedule
packets in the same order they arrive
Hui Zhang, Fall 2012 16
Data and Control Planes
Data plane: how each packet is processed? - Forwarding: header lookup and forward the packet to
right output port
- Switching: move packets from input port to output port
- Scheduling: manage buffer and bandwidth resource
Control plane: how forwarding tables are computed
- Router: routing protocols
- ATM and phone switches: signaling & routing protocols
- Ethernet switch: learning and spanning tree
Hui Zhang, Fall 2012 17
Signaling Protocol for Circuit-Switched and Virtual-Circuit-Switched Networks:
Signaling protocol establishes/tears down circuit - Signaling message are routed
- Signaling protocol fills the forwarding table
- What tables are maintained by a Circuit Switch processor?
- Are there routing protocols? Parameters used for establishing Virtual Circuits
- Source and destination Addresses
- Traffic Characteristics
- QoS Parameters
- Others? Parameters can be stored in forwarding table to help
forwarding decision
Hui Zhang, Fall 2012 18
Three Classes of Routing Protocols
Distance vector (RIP)- Distributed path computation
- Keep only local link data
- Bellman-Ford algotrithm
Link state (OSPF, IS-IS)- Local path computation
- Distribute all link data -- each node has whole topology
- Dijkstra’s algorithm
Path vector (BGP)- Distributed path computation
- Distribute routes (prefix + path) to every node --- each node stores all routes subject to policy
Hui Zhang, Fall 2012 19
Components of IP Control Plane (I)
Forwarding Information Base
LocalRIB
OSPFRIB
BGPRIB
RIPRIB
Route Selection
PP
RIPRIB
OSPFRIB
A B
OS
PF R
IP
BG
P
110 120
Machine : routing control processor Data structure: RIB (Routing Information Base) Protocol Instance Module: software module that
exchanges messages with protocol instance modules running on other routers
Hui Zhang, Fall 2012 20
Components of IP Control Plane (II)
Forwarding Information Base
LocalRIB
OSPFRIB
BGPRIB
RIPRIB
Route Selection
PP
RIPRIB
OSPFRIB
A B
OS
PF R
IP
BG
P
110 120
Protocol: define the interaction (message formats, message semantics, timing) among distributed set of protocol instance modules. The goal is to generate a consistent set of local RIBs at each protocol module
Hui Zhang, Fall 2012 21
Components of IP Control Plane (III)
Forwarding Information Base
LocalRIB
OSPFRIB
BGPRIB
RIPRIB
Route Selection
PP
RIPRIB
OSPFRIB
A B
OS
PF R
IP
BG
P
110 120
Local RIB: routing table entries set by configuration files Route redistribution: inject routes from one protocol
instance module to another protocol instance module (e.g OSPF to BGP)
Route selection: for each prefix, select one among multiple routes (each computed by one protocol instance)
Hui Zhang, Fall 2012 2222
Excerpts from a Router Configuration File interface Ethernet0 ip address 6.2.5.14 255.255.255.128 interface Serial1/0.5 point-to-point ip address 6.2.2.85 255.255.255.252 ip access-group 143 in frame-relay interface-dlci 28
router ospf 64 redistribute connected subnets redistribute bgp 64780 metric 1 subnets network 66.251.75.128 0.0.0.127 area 0 router bgp 64780 redistribute ospf 64 match route-map 8aTzlvBrbaW neighbor 66.253.160.68 remote-as 12762 neighbor 66.253.160.68 distribute-list 4 in
access-list 143 deny 1.1.0.0/16access-list 143 permit any
route-map 8aTzlvBrbaW deny 10 match ip address 4
route-map 8aTzlvBrbaW permit 20 match ip address 7
ip route 10.2.2.1/16 10.2.1.7