1776-ts manual - control technology internationl inc ... manual rev7.doc · web viewrevised: march...

Revised: March 31, 2000 Price: US $45.00

1776-TSTime Stamp/

Sequence of EventsRecorder Module

Control Technology International, Inc.15468 East Hinsdale Circle

Centennial, Colorado 80112-4225

Phone: (303) 400-0547FAX: (303) 400-0571

Email: [email protected]: www.ctii-usa.com

Copyright © 1996-2000 Control Technology International, Inc. All rights reserved.

Control Technology International cannot guarantee the accuracy of the information contained in this document and assumes no responsibility for errors or omissions. Neither is any liability assumed for damages resulting from the use of the informa-tion contained herein. Other product or company names mentioned herein may be the trademarks of their respective owners.

TABLE OF CONTENTS

INTRODUCTION .......................................................................... 1

FEATURES ................................................................................ 2 INPUTS..........................................................................................................................2OUTPUTS.......................................................................................................................2OTHER..........................................................................................................................2FOR THE INSTALLER.......................................................................................................2

CATALOG NUMBER ...................................................................... 3

PRE-INSTALLATION CONSIDERATIONS ............................................... 4 POWER REQUIREMENTS.................................................................................................4INITIAL HANDLING...........................................................................................................4

INSTALLATION ........................................................................... 5 SETTING THE DIP SWITCHES..........................................................................................5

Type I Filtering Algorithm..........................................................................................5Type II Filtering Algorithm.........................................................................................5Input Example with Recorded Times.........................................................................6Switch Settings for Filtering and Algorithm Selection.................................................7Switch Functions for IRIG-B Clock Selection.............................................................8IRIG-B (AM, TTL or RS422) Switch Settings for Multiple Modules.............................8IRIG-B (AM, TTL or RS422) Switch Settings a Single Module.................................10

KEYING THE I/O CHASSIS..............................................................................................14INSTALLING THE 1776-TS MODULE................................................................................15

WIRING TO THE 1776-TS MODULE ................................................... 16

INTERPRETING THE STATUS INDICATORS .......................................... 19

PROGRAMMING INFORMATION ...................................................... 19 READING/WRITING TO THE MODULE USING AN A-B PROCESSOR......................................19

Input Data File........................................................................................................20Output Data File......................................................................................................21

PROGRAMMING THE PLC5............................................................................................22Block Transfer Read or ControlNet I/O Transfer from 1776-TS Module...................22Block-Transfer Instruction Considerations...............................................................26

GENERAL INFORMATION ABOUT IRIG-B ............................................. 27 SPECIFIC NOTES ABOUT IRIG-B...................................................................................27

LEAP YEAR AND THE 1776-TS MODULE ............................................. 29 1776-TS MODULE POWER-ON INITIALIZATION................................................................311776-TS QUEUE INFORMATION.....................................................................................31DATE CONVERSION TABLE............................................................................................31

1776-TS-24VDC ......................................................................... 34

1776-TS-48VDC ......................................................................... 35

1776-TS-125VDC ....................................................................... 36

1776-TS-125VAC ....................................................................... 37

1776-TS-230VAC ....................................................................... 38

1776-TS CABLES AND CONNECTORS ................................................ 39 MODULATED IRIG-B CABLE..........................................................................................39DC LEVEL SHIFT (DEMODULATED) IRIG-B CABLE..........................................................39RS-422 IRIG-B INTERCONNECT CABLE.........................................................................40

1776-TS PLC PROGRAMMING EXAMPLE ............................................ 41

XSTAMP EVENT REPORTING AND DATA LOGGING ................................ 52 INTRODUCTION.............................................................................................................52Requirements.............................................................................................................52

1776-TS Time Stamp Module Page 1

Introduction

The 1776-TS module will time stamp 16 external inputs and 16 internal events with millisecond accuracy, while operating on the Allen-Bradley 1771 I/0 platform. The module may also be configured to provide the PLC clock with accurate time, and to synchronize that time across multiple PLCs.

The 1776-TS module allows events at one PLC, or at various PLCs within a facility, at plants across the nation, or in multiple locations around the world, to be time stamped with millisecond resolution. Data is stored in memory on the 1776-TS card until the PLC is able to retrieve the time stamped events. Analysis of the data provides information on which event occurred first, second, etc., in a fault or shutdown situation.

An IRIG-B input is required for the 1776-TS module to provide coordinated clocking information. It may be obtained from any commercial GPS satellite receiver or a stand-alone time code generator that provides a modulated, or a DC level shift (demodulated) IRIG-B output. Control Technology has a time code generator clock (Cat. No. IRIGB-105) that interfaces with the 1776-TS module.

The IRIG-B signal is connected to the first 1776-TS module. If additional modules are required, the first module will transmit the signal to other 1776-TS modules in the system. Distance between the first and last module in a system may be up to 4,000 feet. Up to 32 modules (512 points) may be daisy chained together with a single IRIG-B source. Multiple facilities are able to maintain millisecond clock accuracy among remote locations when using the module in conjunction with multiple GPS satellite receivers.

The module may be ordered with input levels of 24VDC, 48VDC, 125VDC, 125VAC or 230VAC. Any input transition, either ON to OFF, or OFF to ON will trigger an event. An event consists of one input that changes state during any one millisecond time period.

The module is able to record and store over 2,000 events before the PLC needs to retrieve data from the 1776-TS module. When an event occurs a record is made available for the PLC. The record includes data on which input changed, its current state and a time of day stamp (month, day, hour, minute, second and millisecond when the event occured).

This product incorporates technology which is licensed by Allen-Bradley Company, Inc. Allen-Bradley has not technically approved, nor does it warrant or support this product. All warranty and support for this product and its application is provided solely by Control Technology International, Inc.

Control Technology International, Inc. www.ctii-usa.com

http://www.ctii-usa.com/

1776-TS Time Stamp Module

FeaturesInputs Sixteen opto-isolated discrete PLC inputs (2 groups of 8) Amplitude modulated IRIG-B signal on coax cable DC level shifted (TTL) IRIG-B signal on modular cable (RJ-11) RS-422 IRIG-B signal on modular cable (RJ-11)

Outputs Date and time information across the A-B 1771 backplane using block transfers

and discrete I/O RS-422 IRIG-B pass-through signal on modular cable (RJ-11)

Other One millisecond resolution for all DC input modules Eight millisecond resolution for all AC input modules Isolated inputs and outputs Seventeen LED status indicators display the status of each input, and the active

state of the module Firmware stored in Flash ROM for easy updates Single-slot module, half-slot addressing (32-bit) Selectable filter settings to eliminate relay chatter 20,000 byte storage buffer to store 2,000 events per card

For the InstallerThis document provides information on: Important pre-installation considerations Power supply requirements Initial handling procedures Using the indicators for troubleshooting PLC programming directions Module specifications

Control Technology Internationl, Inc. www.ctii-usa.com



Catalog Number

When ordering 1776-TS modules, the input voltage range must be specified from the following chart. The selected voltage is part of the catalog number and is printed on the label attached to your module. For example, a module with inputs rated for 125 volts DC the catalog number would be 1776-TS-125VDC.

Catalog Number Input Voltage Range1776-TS-24VDC 20 to 30V DC1776-TS-48VDC 40 to 60V DC1776-TS-125VDC 100 to 150V DC1776-TS-125VAC 100 to 150V AC1776-TS-230VAC 200 to 250V AC

WARNING: Do not exceed the maximum voltage specified for the catalog number you have ordered. Exceeding this voltage may damage the module.




Pre-Installation Considerations

The 1776-TS module must be used in a Allen-Bradley series B or later 1771 I/O chassis (1771-A1B, -A2B, -A3B, -A3B1 and -A4B), or a 1771-AM1, or a -AM2 chassis. On power-up, the 1776-TS module configures itself for half-slot addressing. The 1776-TS module may also be used in single-slot addressing (local rack only) by leaving the adjacent slot open. When using single slot addressing the even numbered slots should contain the TS modules while the odd numbered slots should be left open. The module will then have access to the required extra input and output words generally used by this open slot.

Because the lowest order system byte is also used for block transfers, the PLC programmer must exercise caution to avoid writing into the reserved bits that exist in the lowest order system byte. Only half-slot addressing is supported if the 1776-TS modules are located in remote racks. In addition, all Block Transfer Read instructions should also address only the even number groups.

Power RequirementsThe module receives its power through the 1771 I/O chassis backplane from the chassis power supply. It requires 350 mA from the output of this supply. Add this amount of power to the requirements of all other modules in the I/O chassis in order to prevent overloading the chassis backplane and/or chassis power supply.

Initial HandlingObserve the following precautions to guard against electrostatic damage.

WARNING: Under some conditions, electrostatic discharge may degrade performance and/or damage the module.

Wear an approved wrist strap grounding device, or touch a grounded object to discharge yourself before handling the module.

Do not touch the backplane connector or connector pins.

If you configure or replace internal components, do not touch other circuit components inside the module. If available, use a static-free work station.

When not in use, keep the module in a static-shielded bag.




InstallationSetting the DIP SwitchesThe 1776-TS module contains two separate groups of DIP switches. The 4 or 6 position DIP switch bank (switches 5 and 6 are reserved for future use) determines the millisecond contact debounce and configuration of the block transfer on software revision level 4 and above. (revision 4 modules will begin shipping after March 31, 2000) The 8 position bank selects the type of IRIG-B source clock.

The first 3 switches (of the 4 or 6 position DIP) determine the filter debounce time. If switch 4 is off the filtering algorithm is set for Type I. If the switch is on, Type II is selected.

Type I Filtering AlgorithmType I filtering provides for the delay an input must remain in a steady state condi-tion before a new event will be recognized. The exception being that any single transition or multiple back to back transitions greater that 1 millisecond but less than the filter time will be recorded as a single event regardless of filter switch set-ting. You should set this switch to the amount of relay chatter time you would like to normally see filtered out of the event records buffer. Using an off/on then on/off transition as an example, assume that a steady state condition has preceded these events. The time stored for this on time will be the time at which the point first changed from off to on and then remained on for at least the filter time setting. The subsequent on to off time is the time at which the first on to off transition occurred and then remained off for at least the filter time setting. For normal operation a 15 millisecond setting is recommended.

Type II Filtering AlgorithmType II filtering is only available in firmware revision 4.0 and greater. It provides for the delay an input must remain in a steady state condition before a new event will be recognized. Only events greater than the filter setting will be recorded. Set this switch to the amount of relay chatter time you would like to see filtered out of the event records buffer. Using an off/on then on/off transition as an example, assume that a steady state condition has preceded these events. The time stored for this on time will be the time at which the point first changed from off to on and then




remained on for at least the filter time setting. The subsequent on to off time is the time at which the first on to off transition occurred and then remained off for at least the filter time setting. For normal operation a 15 millisecond setting is recom-mended.

Input Example with Recorded Times

The above waveform represents an input to the 1776-TS module. Below is infor-mation on how the 1776-TS module will report this waveform based on the Type of Algorithm and Filter Time that has been selected, along with the software revision level.

Revison 3&4 Software - Type I Algorithm - Filter Time of 15 milliseconds On Event @ point A (7:04:06.501)Off Event @ point B (7:04:06.535)

Revison 3&4 Software - Type I Algorithm - Filter Time of 25 milliseconds On Event @ point A (7:04:06.501)Off Event @ point C (7:04:06.555)

Revison 4 Software - Type II Algorithm - Filter Time of 15 milliseconds On Event @ point A (7:04:06.501)Off Event @ point B (7:04:06.535)

Revison 4 Software - Type II Algorithm - Filter Time of 25 milliseconds No event is recorded with these settings




Switch Functions for Filtering and Algorithm Selection

Sw 1

Sw2

Sw3

Sw4

Sw5

Sw6

Block Transfer & Filtering Algorithm

DebounceFiltering Time

OFF OFF OFF OFF --- --- Type I 0 millisecondsON OFF OFF OFF --- --- Type I 5 millisecondsOFF ON OFF OFF --- --- Type I 10 millisecondsON ON OFF OFF --- --- Type I 15 millisecondsOFF OFF ON OFF --- --- Type I 20 millisecondsON OFF ON OFF --- --- Type I 25 millisecondsOFF ON ON OFF --- --- Type I 30 millisecondsOFF OFF OFF ON --- --- Type II 0 millisecondsON OFF OFF ON --- --- Type II 5 millisecondsOFF ON OFF ON --- --- Type II 10 millisecondsON ON OFF ON --- --- Type II 15 millisecondsOFF OFF ON ON --- --- Type II 20 millisecondsON OFF ON ON --- --- Type II 25 millisecondsOFF ON ON ON --- --- Type II 30 milliseconds

* Note: Type II only available on software revision level 4.0 and above

Switch Settings for Filtering and Algorithm Selection

The following switch configurations will select the Type II Block Transfer & Filtering Algorithm along with a Debounce Filtering Time of 15 milliseconds. Your 1776-TS module might have either a 4 positon or 6 position DIP switch. For new installations the following switch positions are recommend as a starting point.




Switch Functions for IRIG-B Clock Selection

Switch Number

Function of the Switch if Movedto the ON Position

1 Selects Amplitude Modulated IRIG-B as the Clock Source2 Selects TTL Demodulated IRIG-B as the Clock Source3 Selects RS422 Demodulated IRIG-B as the Clock Source4 This Switch Must remain OFF in all configurations5 RS422 Pull Up Resistor, 1K to +5 volts6 RS422 120 Ohm Terminating Resistor7 RS422 Pull Down Resistor, 1K to 5 volt ground8 RS422 Output Driver to Pins 2&3 is Disabled

IRIG-B (AM, TTL or RS422) Switch Settings for Multiple Modules

The first 1776-TS module in a group must be set to receive either amplitude modulated IRIG-B, DC level shift demodulated IRIG-B or RS422 IRIG-B as the external master clock source.

The following DIP switch setting is for amplitude modulated IRIG-B coming into the BNC connector on the front of the 1776-TS module. In the Modulated IRIG-B diagram, the top modular jack is not used (no connection), and the bottom modular jack would generate differential RS-422 IRIG-B for subsequent 1776-TS modules.

Amplitude Modulated (first module)

The following DIP switch setting is for TTL DC level shift (demodulated) IRIG-B coming into the top modular jack on the front of the 1776-TS module (pin #1 is DC level shift IRIG-B signal, pin #4 is logic ground). In this instance, the BNC connector is not used (no connection), and the bottom modular jack would generate differential RS-422 IRIG-B for subsequent 1776-TS modules.

DC Level Shift (first module)




The following DIP switch setting is for RS422 IRIG-B coming into the top modular jack on the front of the 1776-TS module (pin #2 is the positive RS422 IRIG-B signal, pin #3 is the negative). In this instance, the BNC connector is not used (no connection), and the bottom modular jack would relay the differential RS-422 IRIG-B to subsequent 1776-TS modules. Pin 2 in the top and bottom jacks are physically tied together. Pin 3 in the top jack is also tied to pin 3 in the bottom jack.

RS-422 (first module)

All subsequent 1776-TS modules in the group (except for the last 1776-TS module in the chain) use the following DIP switch setting. In this case, the BNC connector is not used (no connection), the top modular jack is connected to the previous 1776-TS module in the chain (or the IRIGB-205 generator), and the bottom modular jack provides differential RS-422 IRIG-B for the next 1776-TS module in the chain.

(subsequent modules)

The last 1776-TS module in the chain uses the following DIP switch setting. In this setting, the BNC connector is not used (no connection), the top modular jack is connected to the previous 1776-TS module in the chain, and the bottom modular jack is not used (no connection).

(last module)




IRIG-B (AM, TTL or RS422) Switch Settings a Single Module

If a system only contains one 1776-TS module, then the DIP switches should be set to match the settings shown below.




IRIG-B Cabling for Amplitude Modulated Clock




IRIG-B Cabling for TTL DC Level Shift Clock




IRIG-B Cabling for RS-422 Clock




Keying the I/O ChassisUse the plastic keying bands shipped with each I/O chassis to key the I/O slots to accept only this type of module.

The module circuit board is slotted in two places on the rear edge. The position of the keying bands on the backplane connector must correspond to these slots to allow insertion of the module. You are able to key any connector in an I/O chassis to receive this module, except for the left-most connector which is reserved for adapter or processor modules. Place the keying bands between the following numbers labeled on the lower (“D”) backplane connector. Note that this setup is different than most of Allen-Bradley's I/O modules that place the keying bands on the upper (“C”) connectors.

Between 2 and 4 Between 12 and 14

You may change the position of these keys if system redesign and rewiring makes insertion of a different module necessary. After deciding which slot the module will be used in, it is recommended that the selected I/O slots be keyed to prevent accidental insertion of any other type of module.




Installing the 1776-TS Module

To install the 1776-TS module in your series B 1771 I/O chassis, follow the steps listed below.

WARNING: Remove power from the 1771 I/O chassis backplane and wiring arm before removing or installing an I/O module.

Failure to remove power from the backplane or wiring arm may cause module damage, degradation of performance, or injury.

Failure to remove power from the backplane may cause injury or equipment damage due to possible unexpected operation.

1. Turn off power to the I/O chassis.

2. Place the module in the plastic tracks on the top and bottom of the slot that guides the module into position.

3. Do not force the module into its backplane connector. Apply firm, even pressure on the module to seat it properly.

4. Snap the chassis latch over the top of the module to secure its position.

5. Connect the wiring arm to the module.

6. Make the wiring connections to the field wiring arm as indicated in the following section.




Wiring to the 1776-TS Module

Connections to the 1776-TS module are made to the 18-terminal field wiring arm (A-B cat. no. 1771-WF) shipped with the module. Attach the wiring arm to the pivot bar on the bottom of the I/O chassis. The wiring arm pivots upward and connects with the module so that you are able to install or remove the module without disconnecting the wires.

Connect one terminal of the input device to terminals 1 through 16. Connect terminals 17 and 18 to the common. Use stranded 14 or 16 gauge wire to minimize the voltage drop over long cable distances. Note that the inputs are isolated into two groups of 8 inputs. If isolation is not necessary, place a jumper wire between




terminals 17 and 18. If isolation is desired, use inputs 00 through 07 (terminals 1 through 8) with terminal 17 as the common, and use inputs 10 through 17 (terminals 9 through 16) with terminal 18 as the common.




The following table may be used to convert the input number to the appropriate terminal number of the 1771-WF wiring arm. Note, for example, that input 13 comes in on terminal 12, not 13. The inputs have been numbered to match the corresponding Allen-Bradley software which is based on the octal numbering system.

1771-WF WIRING ARMTERMINAL DESCRIPTION

1 INPUT 002 INPUT 013 INPUT 024 INPUT 035 INPUT 046 INPUT 057 INPUT 068 INPUT 079 INPUT 1010 INPUT 1111 INPUT 1212 INPUT 1313 INPUT 1414 INPUT 1515 INPUT 1616 INPUT 1717 00-07 COMMON18 10-17 COMMON




Interpreting the Status Indicators

The front panel of the 1776-TS module contains one green module active LED, and 16 red status LED indicators (see below). The 1776-TS module performs diagnostics when first powered up. Upon successful completion of the diagnostics, and an IRIG-B signal being successfully decoded, the active light will flash at a one-second rate (approximately one-half second ON, one-half second OFF). If the active LED stays ON without flashing it indicates that the module is functioning but not connected to a valid IRIG-B clock source. The module should default to this solid ON state whenever an IRIG-B signal is lost and there is power to the backplane. All modules connected to an IRIG-B source will flash ON and OFF at exactly the same time in a synchronized fashion.

The red status indicators are provided for system logic side indication of individual inputs. When a red LED is ON, voltage is present on the terminal. Please note that inputs 00 through 07 (wiring arm terminals 1 through 8) will light LED’s 00 through 07 in the left column, and inputs 10 through 17 (wiring arm terminals 9 through 16) will light LED’s 10 through 17 in the right column.

ACTIVE00 1001 1102 1203 1304 1405 1506 1607 17

Programming InformationReading/Writing to the Module using an A-B ProcessorThe 1776-TS configures itself as a 32-point I/O module. If 1/2-slot addressing is used, then 32 input bits and 32 output bits are available for each I/O slot of the rack. When 1/2-slot addressing is used, you are able to mix 8-point, 16-point, 32-point and 1776-TS modules in any order in the I/O chassis.

If the I/O rack is configured using 1-slot addressing, then the input and output word associated with the adjacent I/O slot must remain unused. This type of setup means that if the 1776-TS module is installed in slot 0 (using 1-slot addressing),




slot 1 must remain empty. If you are only planning on using one 1776-TS module for a given application, it may be possible to install a power supply module such as the A-B 1771-P4S in slot 1. In this special case, the 1776-TS can “steal” the unused input and output words from the power supply, not leaving any empty slot next to the 1776-TS module. Note that you may not place a complimentary module such as a 32-point input or 32-point output module in the empty slot adjacent to the 1776-TS module because the 1776-TS uses both the input and output words of the image table. When using 1 slot addressing this slot must remain empty, except in the special case of the power supply mentioned above. The Allen-Bradley processor reads the direct I/O slots during every scan. This I/O information is saved in memory words, with addresses corresponding to those of the I/O slot where the 1776-TS module is installed. For example, if the module is placed in rack 00, group 0 (using single-slot addressing), the information from/to the module will be available at words I/O:000 and I/O:001 as shown below (note that the bits shown as “-” are reserved for block transfers and should not be written to). The definition for each bit location is described in the following sections.

Input Data File

17 ---------- Data --------- 10 07 ---------- Data --------- 00 ├───┬───┬───┬───┬───┬───┬───┬───┤ ├───┬───┬───┬───┬───┬───┬───┬───┤I:000 │ NV│ IY│ │ │ │ BT│ OF│ SP│ │ - │ - │ - │ - │ - │ - │ - │ - │ └───┴───┴───┴───┴───┴───┴───┴───┘ └───┴───┴───┴───┴───┴───┴───┴───┘ └────── status information ─────┘ └─ reserved for block transfers ┘

├───┬───┬───┬───┬───┬───┬───┬───┤ ├───┬───┬───┬───┬───┬───┬───┬───┤I:001 │ 17│ 16│ 15│ 14│ 13│ 12│ 11│ 10│ │ 07│ 06│ 05│ 04│ 03│ 02│ 01│ 00│ └───┴───┴───┴───┴───┴───┴───┴───┘ └───┴───┴───┴───┴───┴───┴───┴───┘ └──── external inputs (high) ───┘ └──── external inputs (low) ────┘

NV (bit 17) indicates that the module has lost its master clock reference signal and any time stamp information is Not Valid time and date information. This will occur approximately a half second after the last second tick of the master clock has gone away. The clock inside the module will continue time stamping operation to an accuracy of 0.1%. This feature allows the module to continue time stamping events for sequence of operation. Events within a single module will be time stamped with millisecond resolution, but the resolution between modules is now lost. The master time between units can now drift. A 1 indicates not valid, a 0 indicates valid time stamp information.

IY (bit 16) indicates that the module has not been told the current year, or the data provided is an Invalid Year. A 1 indicates a invalid year, a 0 indicates the year is within range.




BT (bit 12) indicates that time stamp information is available and ready for a Block Transfer from the PLC. A 1 indicates data is waiting for block transfer, a 0 indicates the queue is empty.

OF (bit 11) indicates that an OverFlow condition has occurred and time stamp information has been lost. More than 2,000 events were recorded and the PLC has not emptied the buffer by doing BTRs from the TS module. A 1 indicates that the queue overflowed. This bit will latch ON until it is cleared by the PLC.

SP (bit 10) indicates the Second Pulse “heartbeat” from both the master clock and module. This bit is “ON” for approximately one-half second then “OFF” for one-half second. A “watchdog” timer in the PLC should monitor this bit if master clock and/or module failure detection is desired.

External Inputs 00 - 07, 10 - 17 show the status of the 16 external inputs tied to the 1776-TS module. A 1 indicates that the input is ON, and a 0 indicates that the input is OFF.

Output Data File

17 ---------- Data --------- 10 07 ---------- Data --------- 00├───┬───┬───┬───┬───┬───┬───┬───┤ ├───┬───┬───┬───┬───┬───┬───┬───┤

O:000 │ CL│ year-(1900 or 2000) │ │ - │ - │ - │ - │ - │ - │ - │ - │└───┴───┴───┴───┴───┴───┴───┴───┘ └───┴───┴───┴───┴───┴───┴───┴───┘└───────── clear/year ──────────┘ └─ reserved for block transfers ┘ do not write to these bits

├───┬───┬───┬───┬───┬───┬───┬───┤ ├───┬───┬───┬───┬───┬───┬───┬───┤O:001 │ 17│ 16│ 15│ 14│ 13│ 12│ 11│ 10│ │ 07│ 06│ 05│ 04│ 03│ 02│ 01│ 00│

└───┴───┴───┴───┴───┴───┴───┴───┘ └───┴───┴───┴───┴───┴───┴───┴───┘└──── PLC time stamp (high) ────┘ └───── PLC time stamp (low)─────┘

CL (bit 17) tells the module to CLear the overflow flag. This is a single shot that will clear on the leading edge of a 0 to 1 transition. If the master clock has been lost this bit will also reset the time of year to MO=1, DAY=1, HR=0, MIN=0, SEC=0, and MS=0.

Year – (1900 or 2000) (bits 10 through 16) tell the module the current year so it is able to determine a determine leap year. The amount to subtract is dependent upon whether the Block Transfer & Filtering Algorithm is Type I (DIP Switch 4 is OFF) or Type II (DIP Switch 4 is ON). For example, the year 2002 would be entered as either 102 (binary – Type I) or 2 (binary – Type II). The year 2012 would be entered as either 112 (binary – Type I) or 12 (binary – Type II). The year information is used by the TS module only to determine if it is a leap year.




PLC Time Stamp 00 - 07, 10 - 17 are outputs controlled by the PLC (1776-TS internal inputs) that the module will time stamp both OFF to ON and ON to OFF transitions.

Programming the PLC5

Block Transfer Read or ControlNet I/O Transfer from 1776-TS ModuleThe 1776-TS BT (Block Transfer) handshake bit should be used to qualify BTR or CIO enables from the module. The BT bit is TRUE only when the module has file oriented data (messages) ready for transfer. This feature eliminates the need for polling the module with BTRs or CIOs and handling the conditions of ignored Block Transfer Reads or ControlNet I/O Transfers. All data returned by the module in response to a BTR or CIO is considered valid by the module (i.e. when the BTR/CIO completes its operation, the event has been transferred from 1776-TS memory to PLC memory). Events are loaded into the 1776-TS queue and unloaded from the 1776-TS queue in FIFO (first in first out) fashion. See the TSDEMO1 program in the appendix for a reference programming example.

Block Transfer Read Handshake

║ BT EN ║║ I:000 N7:0 ┌BTR────────────────────┐ ║╟──] [───]/[─────────────────────────────┤BLOCK TRANSFER READ ├─(EN)─╢║ 12 15 │Rack 00│ ║║ │Group 0├─(DN) ║║ │Module 0│ ║║ │Control block N7:0├─(ER) ║║ │Data file N9:0│ ║║ │Length 5│ ║║ │Continuous N│ ║║ └───────────────────────┘ ║

ControlNet I/O Transfer Handshake

║ BT EN ║║ I:000 CT9:0 ┌CIO────────────────────┐ ║╟──] [───]/[─────────────────────────────┤ControlNet I/O Transfer├─(EN)─╢║ 12 EN │Control CT9:0│ ║║ │ Setup Screen ├─(DN) ║║ └───────────────────────┘ ║




The Setup Screen for the CIO instruction appears as follows:

The only variables to the above image when using a CIO instruction to transfer time-stamped data are the PLC-5 Data Table Address (select the first of the five integer words into which to write), the Local ControlNet Node (should be the ControlNet node number of the remote rack) and the Slot Number (the physical location of the module in the remote rack, always an even number).

NOTE: If using a 1771-ACNR in a redundant ControlNet or redundant PLC application, insure the 1771-ACNR is at a minimum firmware revision G for correct module operation.




5 Word Block Transfer Format

Each “time stamp” records the following information:

NAME RANGE BITS USEDMONTH 1 - 12 4

DAY 1 - 31 5HOUR 0 - 23 5

MINUTE 0 - 59 6SECOND 0 - 59 6

MILLISECOND 0 - 999 10

A Block Transfer Read (BTR) or ControlNet I/O Transfer (CIO) from the 1776-TS module will return five, 16-bit words. The 5 word (10 byte) transfer from the TS module to the PLC is formatted as shown below. If the words are stored in loca-tions N9:0 through N9:4, the file would contain the following information. Mask off all unused bits (those shown with an x).

Five Word Transfer – Type I15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

N9:0 REF I/E x x MONTH x TYPE DAYN9:1 x x x HOUR x x MINUTEN9:2 SECOND MILLISECONDN9:3 INTERNAL/EXTERNAL INPUTS (00 - 07, 10 - 17)N9:4 INTERNAL/EXTERNAL INPUTS CHANGE MASK (00 - 07, 10 - 17)

x indicates bits that are reserved for system use

Five Word Transfer – Type II15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

N9:0 REF I/E OF x MONTH x TYPE DAYN9:1 REV HOUR x x MINUTEN9:2 SECOND MILLISECONDN9:3 x x x x YEARN9:4 SEQUENTIAL TRANSACTION NUMBER ON? x x I/E INPUT NUMBER

x indicates bits that are reserved for system use

REF (word 0, bit 15) indicates if the REFerence time stamp information is valid or invalid (i.e. is the TS module receiving the IRIG-B source clock at the time this event occurred). If false (0), then the module is receiving a valid reference signal and the recorded data is valid. If true (1), then the recorded information is not valid. Not valid means it is time stamped only to the internal TS module accuracy.

I/E (word 0, bit 14, both Type I & Type II, and word 4, bit 4, Type II only) indicates whether or not the time stamp information is from the Internal inputs (PLC outputs) or External inputs (wiring arm). If true (1), then the module observed one or more changes from the PLC. If false (0), then the module observed one or more external inputs change state.

OF (word 0, bit 13, Type II only) defines whether the 1776-TS was in an overflow state at the time of the event.




MONTH indicates the month of the year that the event occurred. January is 1, February is 2, March is 3, ... December is 12 (binary data 1 - 12).

TYPE (word 0, bits 5 & 6) defines whether the record is of Type I or Type II. Type I will be a binary 00 and Type II will be a binary 01.

DAY indicates the day of the month that the event occurred (binary data 1 - 31).

REV (word 1, bits 13-15) describes the software revision number.

HOUR indicates the hour of the day that the event occurred in standard “military” (24-hour) time format. A time of 12:00 hours indicates noon, and 00:00 hours indicates midnight (binary data 0 - 23).

MINUTE indicates the minute that the event occurred (binary data 0 - 59).

SECOND indicates the second that the event occurred (binary data 0 - 59).

MILLISECOND indicates the millisecond that the event occurred (binary data 0 - 999). There are 1,000 milliseconds in every second.

INTERNAL/EXTERNAL INPUTS (Type I only) give the actual status (1 for ON, 0 for OFF) of all 16 inputs for the recorded “time stamp”. Bits 0 through 7 correspond to inputs 00 through 07, and bits 8 through 15 correspond to inputs 10 through 17, respectively.

INTERNAL/EXTERNAL INPUTS CHANGE MASK (Type I only) lists the bit(s) that have changed since the last “time stamp”. If the corresponding input changed from a 0 (OFF) to a 1 (ON), or from a 1 (ON) to a 0 (OFF) since the last “time stamp”, then the respective mask will contain a 1 (change). If the input did not change since the last “time stamp”, then it will contain a 0 (no change). Bits 0 through 7 correspond to inputs 00 through 07, and bits 8 through 15 correspond to inputs 10 through 17.

YEAR (Type II only) reflects the year written to the 1776-TS module.

SEQUENTIAL TRANSACTION NUMBER (Type II only) incremented by one for each new record. Reset to 0 after reaching 255.

ON? (Type II only) equals 1 if the record was an off to on transition, and 0 if the record was an on to off transition.

INPUT NUMBER (Type II only) equals the input number that changed. Has a value from 0 to 15.




Block-Transfer Instruction ConsiderationsThis section describes information to remember when using block-transfer instructions. These notes are from the Allen-Bradley Processor Release Notes (Publication 1785-6.2.1 - May, 1995).

General Considerations When performing block-transfers (local, extended local, or remote) in any PLC-

5 processor, clear the output image table corresponding to the block-transfer module's rack location before changing to RUN mode; do not use this area of the output image. If you do not clear the output image table, then you encounter block-transfer errors because unsolicited block transfers are being sent to the block transfer module. For example, if a block transfer module is installed in rack 0, group 1, then clear output word O:001 to 0 and do not use the word for storing data.

If you use remote block-transfer instructions and have the time-out bit (.TO) set to 1, then the processor disables the 4 sec timer and requests additional block transfers anywhere from 0-1 sec before setting the error (.ER) bit.

Considerations For Processor-Resident Local Racks Within the processor-resident local rack, limit the number of continuous-read

block transfers to 16 transfers of 4 words each, or 8 transfers of 64 words each. If you try to block transfer more than this limit, a checksum error (error code -5) occurs.

Do not program IIN or IOT instructions to a module in the same physical module group as a BT module unless you know a block transfer is not in progress. If you must program this, then use an XIO instruction to examine the EN bit of the block transfer instruction to condition the IIN and IOT.

Programming Considerations Do not program an IIN, IOT, BTR, or BTW instruction to a module group using

PIIs.

Do not use PIIs together with block-transfers in the local rack. If you need fast block-transfer throughput, use an extended local I/O rack.

The “Classic 5” (PLC-5/10, 5/12, 5/15 and 5/25) and the “NP 5” (PLC-5/11, PLC-5/20, etc.) processors handle block transfer writes differently. In the “Classic 5” processors, the block transfer data is buffered when the instructions become enabled. “NP 5” processors do not buffer the block transfer data but, instead, send the block transfer data as it is needed. Therefore, it is important for the block transfer data not to change while the block transfer is in progress, or some changing data may be transferred which may cause unpredictable results.




General Information About IRIG-BThe task of standardizing instrumentation timing systems was assigned to the Tele-Communications Working Group (TCWG) of the IRIG (Inter-Range Instrumentation Group) by the Steering Committee in October, 1956. Their charter was to develop a series of time code formats suitable for recording on: magnetic tape, recording oscillographs, strip charts, film and for real-time transmission, meeting the requirements of both manual and automatic data reduction. The IRIG time codes are a group of rate-scaled serial time formats containing up to three coded expressions. The first is time-of-year in Binary Coded Decimal (BCD) and includes days, hours, minutes, and seconds. The second is a set of elements reserved for encoding various identification, control, and other specific functions. The third is a time-of-day code word in Straight Binary Seconds (SBS). The IRIG time code formats are serial, width-modulated codes which can be in either DC level shift (demodulated) or amplitude modulated (AM) format.

IRIG Format B, Signal B00, is composed of the following:1. PPS (pulse-per-second) frame reference markers (P0 and PR)2. Binary coded decimal time-of-year code word (30 bits)3. Control functions (27 bits)4. Straight binary time-of-day code word (17 bits)5. PPS position identifiers (P0 through P9)6. PPS index markers

Specific Notes About IRIG-BThe beginning of each 1.0 second time frame is identified by two consecutive 8.0 millisecond elements (P0 and PR). The leading edge of the second 8.0 ms element (PR) is the “on time” reference point for succeeding time codes. 10 PPS position identifiers P0, P1 ... P9 (8.0 ms duration) occur 10 ms before 10 PPS “on time” and refer to the leading edge of the succeeding element.

The two time-code words and the control functions presented during the time frame are pulse width coded. The binary “zero” and index markers have a duration of 2.0 ms, and the binary “one” has a duration of 5.0 ms. The leading edge is the 100 PPS “on time” reference point for all elements.

The binary coded decimal (BCD) time-of-year code word consists of 30 digits beginning at index count 1. The binary coded sub-word elements occur between position identifiers P0 and P5, (7 for seconds, 7 for minutes, 6 for hours; 10 for days) until the code word is complete. An index marker occurs between the decimal digits in each sub-word to provide separation for visual resolution. The least significant digit occurs first. The BCD code recycles yearly.




Twenty-seven control functions occur between position identifiers P5 and P8. Any control function element or combination of control function elements can be pro-grammed to read a binary “one” during any specified number of time frames.

The straight binary (SB) time-of-day code word occurs between position identifiers P8 and P0. Seventeen digits give the time-of-day in seconds with the least signifi-cant digit occurring first. A position identifier occurs between the 9th and 10th bi-nary coded elements. The straight binary code recycles every 24 hours.

The hardware design of the 1776-TS module has an additional 100 micro-second delay when decoding modulated IRIG-B. The reason being that the true leading edge of (TTL) IRIG-B occurs at the zero crossing on the modulated signal, but the comparator cannot switch until it sees the 3:1 ratio occur. When receiving demodulated IRIG-B, this delay will not be present.




Leap Year and the 1776-TS ModuleLeap years occur every four years (1992, 1996, 2000, 2004, 2008, etc., excluding 2100, 2200, 2300, 2500, etc.) and determines whether or not the month of February has 28 or 29 days. Because IRIG-B only provides the Julian date (1 - 365, or 366 in the case of a leap year), the PLC must provide each 1776-TS module with the current year (less 1900, Type I, or less 2000, Type II) in the high byte (lower word) of the module output area. It may range from 0 to 127 (1900 through 2027, Type I, and 2000 through 2127, Type II). For the year 2006, a value of 106 (Type I) or 6 (Type II) would be entered, for the year 2015, a value of 115 (Type I) or 15 (Type II) would be entered. A value outside this range will generate an invalid year error bit from the module. The year provided is used to correctly calculate the current month and day from the Julian date.

The correct year must be provided and also match the leap year setting of the IRIG-B generator. Note that IRIG-B has been defined to post-announce the time (i.e. the IRIG-B 1 PPS zero crossing marker comes before the time is actually announced). Because of this, the 1776-TS module must advance the time by 1 second in order to pre-announce the internal 1pps marker. If the leap year input does not match the IRIG-B generator, then a one second (year) error will occur at midnight on the start of a new year. For example, if the IRIG-B generator is set for a leap year (i.e. it will generate day 366), and the 1776-TS module is not, then the following time sequence errors will be generated by the module. (X indicates an ERROR! Time shown in parenthesis is the “correct” time from the IRIG-B master clock.)

059 02/28 23:59:59060 03/01 00:00:00 X (060 02/29 00:00:00)...365 12/31 23:59:59 X (365 12/30 23:59:59)001 01/01 00:00:00 X (366 12/31 00:00:00)366 13/01 00:00:01 X (366 12/31 00:00:01)...366 13/01 23:59:59 X (366 12/31 23:59:59)367 13/02 00:00:00 X (001 01/01 00:00:00)001 01/01 00:00:01

Likewise, if the 1776-TS leap year flag is set, but the IRIG-B generator is not (i.e. rollover occurs after day 365), then the following time sequence errors will be generated.

059 02/28 23:59:59060 02/29 00:00:00 X (060 03/01 00:00:00)...365 12/30 23:59:59 X (365 12/31 23:59:59)366 12/31 00:00:00 X (001 01/01 00:00:00)001 01/01 00:00:01




There are two points where the setting of the 1776-TS leap year flag is important. The first is on February 28th at 23:59:59 where a decision must be made to generate February 29th (a leap year), or skip to March 1st. An incorrect setting of the leap year flag at this point will be obvious such that for the remainder of the year, the month/day will be wrong by one day. The second point where the leap year setting is important is for day-of-year. Note that day-of-year remains correct up until day 365 at 23:59:59 where a decision must be made to generate day 366, or rollover to day 001 (January 1st). The gross errors generated above (day 367, month 13, etc.) are intentional in order to draw attention to the problem, and to not generate any two similar date/time stamps during the same year period. Clearly one could try to “fix” the 13th month problem by generating another December 31st, however any time stamping information gathered would become misleading and destroy the validity of the time decode.

It is also very important that the leap year flag not change “early” (before the end of the year) by another clock that is running faster than the master IRIG-B clock and controlling the leap year setting (via the year being told to the 1776-TS module). Changing the year should be done after the new year starts and before February 28th at 23:59:59 to prevent any “glitches” in the time code generation due to clock synchronization problems.

PLC-5 Real Time ClockMemory Locations

S:18 YearS:19 MonthS:20 DayS:21 HourS:22 MinuteS:23 Second




1776-TS Module Power-On InitializationOn initial power-on the 1776-TS module reads its inputs and updates the masks in order that nothing is reported at startup (if you need to know the current state of the inputs, simply read them directly from the input area). Because the 1776-TS module needs to know the current year in order to compute the correct date, it will wait an additional 1 - 2 seconds after the PLC processor switches to RUN mode before time stamping/sequence of events recording begins. During this time the PLC program should set the year for each module and determine the initial state of the 1776-TS internal inputs (PLC outputs).

For example, an A-B PLC-5/20 (1785-L20B) PLC processor in RUN mode normally takes about 5 seconds after power-on before it starts its program scan. This means that the earliest a 1776-TS module will start recording events after a power-on is approximately 6+ seconds.

1776-TS Queue InformationThe 1776-TS time stamp module queue is able to store up to 250 high speed events in a pre-processor buffer. These records are pulled out one at a time and processed by the filter routine. They are then stored in a 2,000 x 10 byte storage buffer where they await transfer to the PLC via a BTR instruction. External events recorded at the wiring arm are run through the filtering processor, whereas internal PLC events are sent directly to the storage buffer. All external events will be logged with a change mask that will have only one of the sixteen bits set. The internal events can have a change mask with multiple bits set. In the case where both buffers are full and another event occurs, the overflow bit will become set and the current event will be discarded. All events will continue to be discarded until there is enough room in the queue to store more events. The OF (overflow) bit is latched internally and will remain set until it is cleared by setting the CL (clear overflow) bit. The overflow bit does not clear itself automatically.

Date Conversion TableThe conversion tables on the following pages are useful for converting between the Julian date (day-of-year) and month/day formats. First determine whether the year is a leap year (1992, 1996, 2000, 2004, 2008, etc.) in order to decide which column (STD or LEAP) to use. For example, March 8th (1996) would use the LEAP column and converts to day 068 (of 1996).




DAY STD LEAP DAY STD LEAP DAY STD LEAP DAY STD LEAP001 01/01 01/01 049 02/18 02/18 097 04/07 04/06 145 05/25 05/24002 01/02 01/02 050 02/19 02/19 098 04/08 04/07 146 05/26 05/25003 01/03 01/03 051 02/20 02/20 099 04/09 04/08 147 05/27 05/26004 01/04 01/04 052 02/21 02/21 100 04/10 04/09 148 05/28 05/27005 01/05 01/05 053 02/22 02/22 101 04/11 04/10 149 05/29 05/28006 01/06 01/06 054 02/23 02/23 102 04/12 04/11 150 05/30 05/29007 01/07 01/07 055 02/24 02/24 103 04/13 04/12 151 05/31 05/30008 01/08 01/08 056 02/25 02/25 104 04/14 04/13 152 06/01 05/31009 01/09 01/09 057 02/26 02/26 105 04/15 04/14 153 06/02 06/01010 01/10 01/10 058 02/27 02/27 106 04/16 04/15 154 06/03 06/02011 01/11 01/11 059 02/28 02/28 107 04/17 04/16 155 06/04 06/03012 01/12 01/12 060 03/01 02/29 108 04/18 04/17 156 06/05 06/04013 01/13 01/13 061 03/02 03/01 109 04/19 04/18 157 06/06 06/05014 01/14 01/14 062 03/03 03/02 110 04/20 04/19 158 06/07 06/06015 01/15 01/15 063 03/04 03/03 111 04/21 04/20 159 06/08 06/07016 01/16 01/16 064 03/05 03/04 112 04/22 04/21 160 06/09 06/08017 01/17 01/17 065 03/06 03/05 113 04/23 04/22 161 06/10 06/09018 01/18 01/18 066 03/07 03/06 114 04/24 04/23 162 06/11 06/10019 01/19 01/19 067 03/08 03/07 115 04/25 04/24 163 06/12 06/11020 01/20 01/20 068 03/09 03/08 116 04/26 04/25 164 06/13 06/12021 01/21 01/21 069 03/10 03/09 117 04/27 04/26 165 06/14 06/13022 01/22 01/22 070 03/11 03/10 118 04/28 04/27 166 06/15 06/14023 01/23 01/23 071 03/12 03/11 119 04/29 04/28 167 06/16 06/15024 01/24 01/24 072 03/13 03/12 120 04/30 04/29 168 06/17 06/16025 01/25 01/25 073 03/14 03/13 121 05/01 04/30 169 06/18 06/17026 01/26 01/26 074 03/15 03/14 122 05/02 05/01 170 06/19 06/18027 01/27 01/27 075 03/16 03/15 123 05/03 05/02 171 06/20 06/19028 01/28 01/28 076 03/17 03/16 124 05/04 05/03 172 06/21 06/20029 01/29 01/29 077 03/18 03/17 125 05/05 05/04 173 06/22 06/21030 01/30 01/30 078 03/19 03/18 126 05/06 05/05 174 06/23 06/22031 01/31 01/31 079 03/20 03/19 127 05/07 05/06 175 06/24 06/23032 02/01 02/01 080 03/21 03/20 128 05/08 05/07 176 06/25 06/24033 02/02 02/02 081 03/22 03/21 129 05/09 05/08 177 06/26 06/25034 02/03 02/03 082 03/23 03/22 130 05/10 05/09 178 06/27 06/26035 02/04 02/04 083 03/24 03/23 131 05/11 05/10 179 06/28 06/27036 02/05 02/05 084 03/25 03/24 132 05/12 05/11 180 06/29 06/28037 02/06 02/06 085 03/26 03/25 133 05/13 05/12 181 06/30 06/29038 02/07 02/07 086 03/27 03/26 134 05/14 05/13 182 07/01 06/30039 02/08 02/08 087 03/28 03/27 135 05/15 05/14 183 07/02 07/01040 02/09 02/09 088 03/29 03/28 136 05/16 05/15 184 07/03 07/02041 02/10 02/10 089 03/30 03/29 137 05/17 05/16 185 07/04 07/03042 02/11 02/11 090 03/31 03/30 138 05/18 05/17 186 07/05 07/04043 02/12 02/12 091 04/01 03/31 139 05/19 05/18 187 07/06 07/05044 02/13 02/13 092 04/02 04/01 140 05/20 05/19 188 07/07 07/06045 02/14 02/14 093 04/03 04/02 141 05/21 05/20 189 07/08 07/07046 02/15 02/15 094 04/04 04/03 142 05/22 05/21 190 07/09 07/08047 02/16 02/16 095 04/05 04/04 143 05/23 05/22 191 07/10 07/09048 02/17 02/17 096 04/06 04/05 144 05/24 05/23 192 07/11 07/10

DAY STD LEAP DAY STD LEAP DAY STD LEAP DAY STD LEAP




193 07/12 07/11 241 08/29 08/28 289 10/16 10/15 337 12/03 12/02194 07/13 07/12 242 08/30 08/29 290 10/17 10/16 338 12/04 12/03195 07/14 07/13 243 08/31 08/30 291 10/18 10/17 339 12/05 12/04196 07/15 07/14 244 09/01 08/31 292 10/19 10/18 340 12/06 12/05197 07/16 07/15 245 09/02 09/01 293 10/20 10/19 341 12/07 12/06198 07/17 07/16 246 09/03 09/02 294 10/21 10/20 342 12/08 12/07199 07/18 07/17 247 09/04 09/03 295 10/22 10/21 343 12/09 12/08200 07/19 07/18 248 09/05 09/04 296 10/23 10/22 344 12/10 12/09201 07/20 07/19 249 09/06 09/05 297 10/24 10/23 345 12/11 12/10202 07/21 07/20 250 09/07 09/06 298 10/25 10/24 346 12/12 12/11203 07/22 07/21 251 09/08 09/07 299 10/26 10/25 347 12/13 12/12204 07/23 07/22 252 09/09 09/08 300 10/27 10/26 348 12/14 12/13205 07/24 07/23 253 09/10 09/09 301 10/28 10/27 349 12/15 12/14206 07/25 07/24 254 09/11 09/10 302 10/29 10/28 350 12/16 12/15207 07/26 07/25 255 09/12 09/11 303 10/30 10/29 351 12/17 12/16208 07/27 07/26 256 09/13 09/12 304 10/31 10/30 352 12/18 12/17209 07/28 07/27 257 09/14 09/13 305 11/01 10/31 353 12/19 12/18210 07/29 07/28 258 09/15 09/14 306 11/02 11/01 354 12/20 12/19211 07/30 07/29 259 09/16 09/15 307 11/03 11/02 355 12/21 12/20212 07/31 07/30 260 09/17 09/16 308 11/04 11/03 356 12/22 12/21213 08/01 07/31 261 09/18 09/17 309 11/05 11/04 357 12/23 12/22214 08/02 08/01 262 09/19 09/18 310 11/06 11/05 358 12/24 12/23215 08/03 08/02 263 09/20 09/19 311 11/07 11/06 359 12/25 12/24216 08/04 08/03 264 09/21 09/20 312 11/08 11/07 360 12/26 12/25217 08/05 08/04 265 09/22 09/21 313 11/09 11/08 361 12/27 12/26218 08/06 08/05 266 09/23 09/22 314 11/10 11/09 362 12/28 12/27219 08/07 08/06 267 09/24 09/23 315 11/11 11/10 363 12/29 12/28220 08/08 08/07 268 09/25 09/24 316 11/12 11/11 364 12/30 12/29221 08/09 08/08 269 09/26 09/25 317 11/13 11/12 365 12/31 12/30222 08/10 08/09 270 09/27 09/26 318 11/14 11/13 366 - 12/31223 08/11 08/10 271 09/28 09/27 319 11/15 11/14224 08/12 08/11 272 09/29 09/28 320 11/16 11/15225 08/13 08/12 273 09/30 09/29 321 11/17 11/16226 08/14 08/13 274 10/01 09/30 322 11/18 11/17227 08/15 08/14 275 10/02 10/01 323 11/19 11/18228 08/16 08/15 276 10/03 10/02 324 11/20 11/19229 08/17 08/16 277 10/04 10/03 325 11/21 11/20230 08/18 08/17 278 10/05 10/04 326 11/22 11/21231 08/19 08/18 279 10/06 10/05 327 11/23 11/22232 08/20 08/19 280 10/07 10/06 328 11/24 11/23233 08/21 08/20 281 10/08 10/07 329 11/25 11/24234 08/22 08/21 282 10/09 10/08 330 11/26 11/25235 08/23 08/22 283 10/10 10/09 331 11/27 11/26236 08/24 08/23 284 10/11 10/10 332 11/28 11/27237 08/25 08/24 285 10/12 10/11 333 11/29 11/28238 08/26 08/25 286 10/13 10/12 334 11/30 11/29239 08/27 08/26 287 10/14 10/13 335 12/01 11/30240 08/28 08/27 288 10/15 10/14 336 12/02 12/01




1776-TS-24VDCExternal Inputs per Module 16 (2 groups of 8)Internal (PLC) Inputs per Module 16Module Location 1771-A1B, -A2B, -A3B, -A3B1, -A4B I/O chassis

and 1771-AM1, -AM2 chassisInput Voltage Range 20 to 30 V DCTypical Input Current Rating 1.6 mA @ 20 V DC

2.0 mA @ 24 V DC2.5 mA @ 30 V DC

Maximum Off-State Voltage 7 V DCMinimum On-State Voltage 20 V DCInput Impedance 12 K ohmsMaximum Earth to Input Voltage 55 Peak VoltsTime Stamp Accuracy Low to high 1 millisecond

High to low 1 millisecondPower Dissipation (typical) 2.3 WattsThermal Dissipation (typical) 7.8 BTU/hrBackplane Current 350 mA @ 5V DC 5%Opto-electrical Isolation 2500 V AC RMSEnvironmental Conditions Operational Temperature Storage Temperature Relative Humidity

0 to 50 C (32 to 122 F)-40 to 85 C (-40 to 185 F)5 to 95% (non-condensing)

Keying (Lower Connector) Between 2 and 4Between 12 and 14

Conductors Wire Size

Category

14 gauge stranded maximum3/64 inch insulation maximum

2Field Wiring Arm A-B Catalog Number 1771-WFAmplitude Modulated IRIG-B Input Connector Tracking Range Amplitude Impedance Direction

3:1 modulated carrierBNC, female1 KHz 10%0.1 to 10 Vpp

600 ohm balanced, transformer coupledForward

DC Level Shift IRIG-B Input Connector Tracking Range Amplitude Impedance Timing Direction

Serial, width modulatedTop modular connector, RJ-11, pins 1 & 4

100 PPS 10%0 V DC to 5 V DC 10%

470 ohmsRising edge on time

ForwardRS-422 IRIG-B Input Connector Tracking Range Timing Direction

RS-422 differentialModular connectors, RJ-11, pins 2 & 3

100 PPS 10%Rising edge on time

Forward






1.8 mA @ 48 V DC2.2 mA @ 60 V DC






Category







100 PPS 10%0 V DC to 5 V DC 10%





Forward






1.8 mA @ 125 V DC2.2 mA @ 150 V DC






Category







100 PPS 10%0 V DC to 5 V DC 10%


Forward




1776-TS-125VACExternal Inputs per Module 16 (2 groups of 8)Internal (PLC) Inputs per Module 16Module Location 1771-A1B, -A2B, -A3B, -A3B1, -A4B I/O chassis

and 1771-AM1, -AM2 chassisInput Voltage Range 100 to 150 V ACTypical Input Current Rating 1.5 mA @ 100 V AC

1.8 mA @ 125 V AC2.2 mA @ 150 V AC

Maximum Off-State Voltage 35 V ACMinimum On-State Voltage 100 V ACInput Impedance 68 K ohmsMaximum Earth to Input Voltage 165 Peak VoltsTime Stamp Accuracy Low to high 8 millisecond





Category







100 PPS 10%0 V DC to 5 V DC 10%





Forward




1776-TS-230VACExternal Inputs per Module 16 (2 groups of 8)Internal (PLC) Inputs per Module 16 (2 groups of 8)Module Location 1771-A1B, -A2B, -A3B, -A3B1, -A4B I/O chassis

and 1771-AM1, -AM2 chassisInput Voltage Range 200 to 250 V ACTypical Input Current Rating 1.5 mA @ 200 V AC

1.8 mA @ 230 V AC1.9 mA @ 250 V AC

Maximum Off-State Voltage 70 V ACMinimum On-State Voltage 200 V ACInput Impedance 130 K ohmsMaximum Earth to Input Voltage 265 Peak VoltsTime Stamp Accuracy Low to high 8 millisecond





Category







100 PPS 10%0 V DC to 5 V DC 10%





Forward




1776-TS Cables and ConnectorsModulated IRIG-B CableThis cable connects the master clock to the first 1776-TS module in the group. It is constructed of RG-58A/U coaxial cable (50 ohm) with BNC (male) connectors on each end. The center conductor carries the amplitude modulated IRIG-B signal, and the outer shield is connected to system ground.

DC Level Shift (Demodulated) IRIG-B CableThis cable connects the master clock to the first 1776-TS module in the group. It is constructed of RG-58A/U coaxial cable (50 ohm) with a BNC (male) connector on one end and a modular 4-4 plug (AMP 5-641335-3) on the other end. A splice is made in the center of the cable to switch from coaxial cable to 26 AWG modular cable per the table listed below. Pins 2 and 3 are not connected and need to be in-sulated. Heat shrink tubing is then placed over the splice to give it a professional appearance.

Coaxial Cable Name Modular CableCenter Conductor Demodulated IRIG-B Pin 1

No Connection - Pin 2No Connection - Pin 3Outer Shield System Ground Pin 4




RS-422 IRIG-B Interconnect CableThis cable connects the first 1776-TS module to succeeding 1776-TS modules. It is constructed of 26 AWG flat modular cable with 6-position/4-contact plugs (AMP part number 5-641335-3) on each end. The cable is assembled in straight through wiring style with one connector installed with the cable ridge up, and the other end with the cable ridge down. Only the center pair is used; therefore a 2-conductor cable is best, but 4-conductor cable may also be used. If the cable is to be run more than several feet, then low-capacitance Category 3, 4, or 5 unshielded twisted-pair cable should be used in place of the flat modular cable. Cable lengths up to 4,000 feet (total) may be used with Category 3, 4, or 5 twisted-pair cable. Up to 32 modules may be connected together using RS-422 IRIG-B interconnect cables.

Modular Connector Wire Color Modular Connector1 (NC) Black 1 (NC)

2 Red 23 Green 3

4 (NC) Yellow 4 (NC)




1776-TS PLC Programming Example

TSDEMO1 is a sample PLC program that demonstrates a method of retrieving the time stamped information from the 1776-TS Time Stamp/Sequence of Events Recorder Module (Set to Type I) via a BTR instruction.




TSDEMO1 1776-TS Sample Demo Program Control Technology International, Inc. File #2 Proj:TSDEMO1 Page:00001 07:34 08/28/97 ------------------------------------------------------------------------------- | |Assumes the TS module is in the 4th slot (group 6-7) of the I/O rack if using |1/2 slot addressing, or the 7th slot (group 6) if using 1 slot addressing. Be |sure to check all dip switches on the module and rack. This rung downloads |the year from the PLC to the TS module on power up and once every hour at 30 |minutes past the hour. The IRIG-B protocol doesn't include year data. | | | Subtract 1900 | Real time before loading | clock to the TS | MINUTE Single Shot module (Type I) | +--CMP-----------+ B3 +--MOV-----------+ 0+-++Compare +-----[ONS]----+----------++Move +------+- | ||Expression: | 0 | ||Source: S:18| | | || S:22 = 30| | || 1997| | | |+----------------+ | ||Dest: N7:0| | | | | || 97| | | |First scan | |+----------------+ | | |of ladder | | | | |or SFC | |Subtract 1900 | | |step | |before loading | | | S:1 | |to the TS | | +----] [-------------------------+ |module (Type I) | | 15 |+--SUB-----------+ | | ++Sub +------+ | ||A: N7:0| | | || 97| | | ||B: 1900| | | ||Dest: N7:0| | | || 97| | | |+----------------+ | | |Subtract 1900 | | |before loading | | |to the TS | | |module (Type I) | | |+--BTD----------------+ | | ++Bit Field Distributor+-+ | |Source: N7:0| | | 97| | |Source Bit: 0| | |Dest: O:006| | | 24576| | |Dest Bit: 8| | |Length: 7| | +---------------------+




TSDEMO1 1776-TS Sample Demo Program Control Technology International, Inc. File #2 Proj:TSDEMO1 Page:00002 07:34 08/28/97 ------------------------------------------------------------------------------- | |This rung moves a 1 into N10:10/0 for viewing from that file. If a 1, there is |data in the TS module that is waiting to be transferred to the PLC. Also in |file N10:11/0 is a data bit to show if data that has been transferred from the |TS module to files N9 and N10. Setting bit N10:12/0 to a 1 will transfer data |from the TS module to the PLC. | |DATA BT BIT |rack 0 group 6 Move a 1 to N10 |there is new :10/0 if there |data in the TS is data in the |module TS module | I:006 N10:10 1+-------] [----------------------------------------------------( )-------- | 12 0 | |This rung is important if you wish to retrieve data from the TS module over the |data highway using Visual Basic, RSView, etc. This rung will make sure bit |N10:12/0 will only get set at one place in the ladder program. This will |prevent unexpected results. Make sure bit I6/12 is on and bit N10:12/0 is off |before setting bit B3/4 on, to retrieve new data from the TS module. | |Use this bit if |you need to set FETCH DATA BIT |bit N10:12.0 move data from |outside the PLC 1776-TS module |program Single Shot to PLC memory | B3 B3 N10:12 2+-------] [-----------[ONS]------------------------------------(L)-------- | 4 5 0 | |This rung enables data transfer from the TS module to the PLC. If setting bit |B3/4 outside the PLC program (with a Visual Basic program, etc.), make sure |the PLC is not in program mode. If in program mode the data read from file |N10:0-9 will not be valid and will remain it is last state. Loss of data from |the TS module can happen if this is not observed. | |DATA BT BIT Data Xfer Bit |rack 0 group 6 FETCH DATA BIT set when data |there is new move data from Block transfer is transferred |data in the TS 1776-TS module read instruct. from TS module |module to PLC memory enabled bit to PLC memory | I:006 N10:12 BT11:0 B3 3+-------] [--------------] [--------------]/[------------------(L)-------- | 12 0 EN 2




TSDEMO1 1776-TS Sample Demo Program Control Technology International, Inc. File #2 Proj:TSDEMO1 Page:00008 07:34 08/28/97 ------------------------------------------------------------------------------- | |When bit N10:12/0 is set (FETCH DATA BIT) data is transferred from the TS module |to files N9 and N10. This bit can be set by other rungs in the program or by |an external program such as Visual Basic. This bit is self clearing. Before |turning this bit on, one should look to see if the DATA BT BIT is set (there is |data in the TS module). Monitor the XFER VALID BIT to see if transfer was good. | | XFER VALID BIT |FETCH DATA BIT data in files |move data from N9 and N10 has |1776-TS module been transferred |to PLC memory from TS module | N10:12 N10:11 19+-------] [------------------------------------------+-------(U)-------+- | 0 | 0 | | |FETCH DATA BIT | | |move data from | | |1776-TS module | | |to PLC memory | | | N10:12 | | +-------(U)-------+ | 0 | |Be sure to remove this rung from any final product. It copies the input bits |from an 8 point simulator module in rack 0, group 2, to the output bits of |the TS module at rack 0, group 7. This is to demonstrate the internal time |stamping ability of the TS module. Note that when this event is time stamped |bit N10:0/0 is set to a one. This is how to tell the event was internal. | | +--MOV-----------+ 20+-----------------------------------------------------+Move +-- | |Source: I:002| | | 255| | |Dest: O:007| | | 0| | +----------------+ | |To test the program go to integer file N10 word 12. Monitor word 10 to see if |the TS module has valid data. If so, then write a 1 to word 12. If word 11 |contains a one, the transfer was successful, and file N10:0-9 has valid data. |Continue to write ones to word 12 to empty the 1776-TS buffer. Check work 0, |make sure bit1=0 after the transfer, else there was an invalid time reference. | 21+------------------------------------------------------------------[END]--




TSDEMO1 PLC-5 Cross Reference Report-Sorted by Address Control Technology International, Inc. Cross Reference Report Page:00009 07:34 08/28/97 ------------------------------------------------------------------------------- O:006 - BTD - File #2 - 0 O:007 - MOV - File #2 - 20 I:002 - MOV - File #2 - 20 I:006/12 - DATA BT BIT rack 0 group 6 there is new data in the TS module -] [- - File #2 - 1, 3 S:1/15 - First scan of ladder or SFC step -] [- - File #2 - 0 S:18 - Real time clock YEAR MOV - File #2 - 0, 10 S:22 - Real time clock MINUTE CMP - File #2 - 0 B3/0 - Single Shot ONS - File #2 - 0 B3/2 - Data Xfer Bit set when data is transferred from TS module to PLC memory -(L)- - File #2 - 3 -(U)- - File #2 - 18 -] [- - File #2 - 4, 5 B3/3 - The data from the TS module is now in file N9, words 0-4 -(L)- - File #2 - 5 -(U)- - File #2 - 18 -] [- - File #2 - 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18 B3/4 - Use this bit if you need to set bit N10:12.0 outside the PLC program -] [- - File #2 - 2 B3/5 - Single Shot ONS - File #2 - 2 R6:1 - Clear the file before moving new data in FAL - File #2 - 6 N7:0 - Subtract 1900 before loading to the TS module BTD - File #2 - 0 SUB - File #2 - 0 MOV - File #2 - 0 N9:0 - Ref Valid 15 Int/Ext 14 Month 11-08 Day 04-00 BTR - File #2 - 4 BTD - File #2 - 7, 11, 12 FILE N9:0 LEN:5 - BTR - File #2 - 4 N9:1 - Hour 12-08 Minute 05-00 BTD - File #2 - 13, 14 FILE N9:1 LEN:5 - BTR - File #2 - 4 N9:2 - Seconds 15-10 MilliSec. 09-00 BTD - File #2 - 15, 16 FILE N9:2 LEN:5 - BTR - File #2 - 4 N9:3 - MOV - File #2 - 9 FILE N9:3 LEN:5 - BTR - File #2 - 4 N9:4 - MOV - File #2 - 8 FILE N9:4 LEN:5 - BTR - File #2 - 4 N10:0 - See if the time reference IRIGB signal is OK, & a valid year is loaded to TS FAL - File #2 - 6 BTD - File #2 - 7 FILE N10:0 LEN:10 - FAL - File #2 - 6 N10:1 - Change Mask MOV - File #2 - 8 FILE N10:1 LEN:10 - FAL - File #2 - 6 N10:2 - Status off/on MOV - File #2 - 9 FILE N10:2 LEN:10 - FAL - File #2 - 6 N10:3 - Year MOV - File #2 - 10




TSDEMO1 PLC-5 Cross Reference Report-Sorted by Address Control Technology International, Inc. Cross Reference Report Page:00010 07:34 08/28/97 ------------------------------------------------------------------------------- FILE N10:3 LEN:10 - FAL - File #2 - 6 N10:4 - BTD - File #2 - 11 FILE N10:4 LEN:10 - FAL - File #2 - 6 N10:5 - BTD - File #2 - 12 FILE N10:5 LEN:10 - FAL - File #2 - 6 N10:6 - BTD - File #2 - 13 FILE N10:6 LEN:10 - FAL - File #2 - 6 N10:7 - BTD - File #2 - 14 FILE N10:7 LEN:10 - FAL - File #2 - 6 N10:8 - BTD - File #2 - 15 FILE N10:8 LEN:10 - FAL - File #2 - 6 N10:9 - BTD - File #2 - 16 FILE N10:9 LEN:10 - FAL - File #2 - 6 N10:10/0 - Move a 1 to N10 :10/0 if there is data in the TS module -( )- - File #2 - 1 N10:11/0 - XFER VALID BIT data in files N9 and N10 has been transferred from TS module -(L)- - File #2 - 17 -(U)- - File #2 - 19 N10:12/0 - FETCH DATA BIT move data from 1776-TS module to PLC memory -(L)- - File #2 - 2 -(U)- - File #2 - 19 -] [- - File #2 - 3, 19 BT11:0 - Read the module at rack 0 group 6 module 0 location, put file in N9:0 BTR - File #2 - 4 BT11:0.DN - Block transfer read is now complete -] [- - File #2 - 5 BT11:0.EN - Block transfer read instruct. enabled bit -]/[- - File #2 - 3 BT11:0.ER - Check to make sure there was no error on the block transfer -]/[- - File #2 - 17




Xstamp Event Reporting and Data Logging IntroductionDesigned to complement the popular 1776-TS Time Stamp Module in the capturing and recording of sequence of events, the Xstamp Event Reporting and Data Loggging Software Package runs with either Microsoft® Windows95 or Windows NT, offering an intuitive software package that is easy to set up and run.

The Xstamp software package acts as a node on the Allen-Bradley Data Highway, leaving the remaining 63 nodes available for PLC-5 series programmable controllers. Each PLC on the data highway can support up to 96 1776-TS Time Stamp Modules (PLC-5/80), with one Xstamp package capable of scanning 6,048 different Time Stamp Modules. That’s over 96,000 external and 96,000 internal inputs.

A description can be associated with each input, providing the user with very readable data. The main interface dynamically displays the event’s date and time (to millisecond accuracy), the module’s location (including Data Highway, Rack, and Group), the input bit that changed, whether the bit turned ON or OFF, the validity of the IRIG-B source clock, whether the event’s input was external (received by the Time Stamp Module wiring arm), and finally the input bit description. All events are also permanently logged to a Microsoft® Access database, with optional logging to a printer as events occur. Access allows data to be easily manipulated for custom data manipulation and report writing.

Adding a new processor or module to Xstamp is as easy as inputting the Processor Name, Data Highway Location, and the location of the Xstamp PLC integer file. Xstamp scans the PLC integer file to find new Time Stamp Modules and starts logging immediately. Xstamp is compatible with all revisions of 1776-TS modules, set as Type I or Type II.

Requirements (1) Windows95/NT Pentium-based computer (1) Allen-Bradley 1784-KTX ISA Bus PC Card (or 1784-PCMK Card for laptop

computers) (1) Rockwell Software RSLinx OEM/RSJunction Box DDE Bundle (1) Microsoft® Access 97 (1 or more) 1776-TS Time Stamp Modules



1776-ts manual - control technology internationl inc ... manual rev7.doc · web viewrevised: march...

Documents