1).bias dependence of gaas and ip mesfet parameters
TRANSCRIPT
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Bias Dependenceof GaAs and InP MESFET Parameters
REINHART
W.
H. ENGELMANN A N D CHARLES
A.
LIECHTI,
SENIOR
MEMBER,
IEEE
Abstract-A comparative analysis of the bias dependence
aE
critical RF parameters in GaAs and InP metal-semiconductor
field-effect transistors MESFET’s) led to the following
conclu-
sions.
1) The drain-gate feedback capacitance in GaAs MESFET’s
f i
lower than in InP MESFET’s, because of a stronger tendency
i n
GaAs to form stationary Gunn domains at the typical drain bias
levels employed.
2) The drain-sourceoutput resistance in InPMESFET’s is lower
than
in
GaAsMESFET’s mainly forhigh drain current units, fac’t
which is linked to substrate related softer pinch-off behavior
i o
InP.
3 ) The current-gain cutoff frequency f ~ n the current satu-
ration range of the GaAs MESFETdecreases strongly with draiu
bias as a result of the formation of the stationary Gunn domain.
n
the InP MESFET, his effect is weaker. At the optimum bias, r sa
only
10-20
percent higher in InP MESFET’s than in GaAs ones.
LISTOF
SYMBOLS
Drain-gate capacitance.
Fringing edge capacitance of gate stripe.
Gate-source capacitance.
Capacitance of high-field region.
Depletion-layer penetration.
= ( 2 d J e f f / q n ) 1 / 2 ,
effective epilayer thickness.
Velocity-peak field.
Velocity-valley field.
Unilateral-power-gain cutoff frequency.
Current-gain cutoff frequency.
Intrinsic dc transconductance.
Drain current.
Metallurgical gate length.
Parasitic source inductance.
= 1- a)&,
length of depletion-layer fringing
Drain portion of depletion-layer length.
Length of high-field region.
Source portionof depletion-layer length
(effective length of gradual channel).
Epilayer carrier density.
Electron charge.
Parasitic drain resistance.
Parasitic gate esistance.
Intrinsic channel esistance.
Parasitic source esistance.
= Vbexp)
+
VB, ffective pinch-off potential.
Built-in potential.
beyond gate stripe.
=
VDS- VGS,
rain-gate bias.
drain-source bias.
Experimental saturation voltage.
Gate-source bias.
Experimental pinch-off voltage.
Electron velocity.
Peak velocity.
Valley velocity.
Channel width.
= Gnoe-jWTO,ntrinsic transconductance.
Permittivity.
Radian frequency.
I
I. INTRODUCTION
NTEREST in metal-semiconductorield-effect
transistors (MESFET’s) for microwave applications
has grown steadily in recent years [l] . After
Si
devices [2],
GaAs realizations were studied extensively because f their
higher frequency capabilities [3].
Initial work by Barrera and Archer [4] on the InP
MESFET with a 1-pm gate lengthevealed a 50-percent
increase of the current-gain cutoff frequency f T , beyond
best values generally observed inaAs devices of the same
geometry and doping (Table I).This compared to a theo-
retically predicted 30-percent ncrease in f T for the satu-
rated InP MESFET based on the idealized model of
Turner andWilson [6], [7] as result of a 47 percent higher
electron peak velocity in InP. On the other hand, the
combined influence of a much larger drain-gate feedback
capacitance1c d g , a smaller drain-source output resistance
R d , , and a somewhat larger input resistance R i
+
Rg+ R,,
in the InP MESFET,ave rise o somewhat lower available
power gain and hence a lower unilateral power-gain cutoff
frequency f m a x [4] since
[5]
fmax
f T / [ 2 d ( R i R g
+
R s ) / R d s + 2 r f T R g C d g l .
It
was desirable to determine if the substantially higher
c d g
and the ower
R d ,
values in IriP MESFET’s resulted
from fundamental material propertiesr from remediable
flaws in the materials and MESFET fabrication technol-
ogy. In addition, theelatively large discrepancy between
experimental and theoretically estimated
f T
values (Table
I) needed some explanation. The idealized theoretical
model is based on the hypothesis tha t the electron dri ft
velocity saturates in the channel a t its peak value
up
[6],
171. The effect of the actual elocity drop at fields beyond
Manuscript received March
3,1977;
revised July 6,1977.This wcrk the velocity peak was not considered, In ordero arrive at
was sup orted
in
part
by
USAECOM, Fort Monmouth,NJ, under Cc
n-
tract D-+ AB07-75-C-1300.
94304.
The authors arewith Hewlett Packard Laboratories, Palo Alto, (:A
8 1
1 For thedefinition of the equivalent circuit elements, see41.
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ENGELMANN AND LXECHTI:
GaAs
AND InPMESFETPARAMETERS
1289
TABLE
I
Summary of Initial MESFET Comparison [
41
L
= 1
pm,
w
= 500 p m ,
n = 10
~ m - ~ ;
Ds =
0)
G a A s
n P
fl (GHz)
E x p e r i m e n t
130-24
l h e o r y
25 32
vp
(107
c m
s - 1 ) *.7 2.5
*Used in theoretical model for
f r
R / '
TABLE I1
Experimental MESFET Properties at DC
V D S
= 5v, VG , =
~
&:
l?_p
5162-6 1 . 1 x 1017 5200 0 .9 iO.l
5 8 . 5
0
SC126.7-14
1 . 0 x 10
3000
0.9
iO.l
43.0 0 . 92
SC126.7-18 1. 0
~ 1 0 ' ~
3000
1 . 0 0 , l 1 1 5 . 0 1 . 5
u
InP:
S A 6 2 - 6 1.15
44 4.0 0.97
2.1 (1.80 2 . 9
0.20
0.074
St l26.7-14
2.05
38
6 .5
1 . 80
1.9 0.50 2.4 0.18
0.060
SC126.7-18
3 .0
104
6.5
2.32
3.6 0.45 4.05 0.24
0.120
A P P R O X I M A T I O N S FOR M E S F E T I N S A T U R A T I O N :
R / '
( 1 1 G H z ) .
Ri + R, + Rg
LI Gm4
Cgs
C g s ( l l G H r ) .
Car
C& ( 3 G H z l
a
Cdg
Y ~ ( 1 l G H z l
Y =
Grn,r;wO
R& ( 3 G H z l a Rdr
Fig.
1.
MESFET
?r
circuit model with approximations for equivalent
circuit elements defined in4].
a deeper understanding f the striking differences found
between GaAs and InP MESFET's and their possible
relatilon to the
electron-drift-velocity/field
haracteristic,
we undertook acomprehensive study of important MES-
FET parameters as functions of drain-source and gate-
source bias.
In general, a determinationof the element values of the
equivalent circuit of a MESFET follows from a model
optimization procedure based on measured and calculated
s
parameters [4],8]. T o avoid this relatively lengthy pro-
cedure for each different bias condition, we estimated the
crucial equivalent circuit elements from a setof T (circuit)
parameters (Fig.
1)
ha t can be derived from the setof
s
parameters directly. The approximations of Fig.
1
are
based on a detailed investigationf the P parameters of a
saturated MESFET as function of frequency [9].
11.
PARAMETERS
F MESFET's STUDIED
The GaAs and InP MESFET's studied were fabricated
from the same mask set with a center-fed gate,ominally
1
pm long and 500 pm wide. Equivalent technologies were
used including a gate-trough etch to adjust the FET
channel hickness [4].Active n-type epilayerswitha
1
I
1
2
4 6
8 - 7 0
v,,/v
-
(a)
nP: S C 1 2 6 . 7 - 1 4
80
70
L ' 8 1
f
4 2
3
.
vv
-
(b)
Fig. 2. Drain current characteristics
ID
versus
VDS
t
VGS=
0 illus-
trating the definition
of
Vp&i.(a) GaAs MESFET. b) InP MES-
FET.
doping density close to
lOI7
cm-3 were grown n Cr-doped
semi-insulating substrates using liquid.-phase epitaxy in
both cases. The dc properties of one GaAs and two InP
MESFET's, which were investigated in detail, are sum-
marized in Table
11.
The second InP MESSFET is included
to show the influence of a large drain saturation current
on RF properties. The experimental drain saturation
voltage Vb , ,',s defined n a somewhat arbitrary but con-
venient way, by the drainbias at which1 the drain current
saturates towo-thirds the extrapolated ohmic value (Fig.
2). V@:ii
is this saturation voltage corrected for the esti-
mated voltage drop across the source and drain parasitic
series resistances R , + E d . A convenient experimental
pinch-off voltage
Vb""p)
follows from B rough linear ex-
trapolation of the transconductance versus gatebias
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1290 IEEE TRANliACTIONS
O N
ELECTRON DEVICES,
VOL.
ED-24, NO. 11, NOVEMBER 1977
80
~ 8 0 1 1
V G, i
v
-
v,,i
v
-
Fig.
3.
Transconductance pinch-off behaviorat
VDS= 4
V illustrai ing
thedefinition of (intrinsic a circuit ransconductance
1
YL, at
11
GHz). (a) G aAskESFET . (b) InPMESFET.
TABLE I11
Experimental MESFET Parameters at RF, VDS
= 5
V, VGs :=0
G
:
I
SG6 2 -6 8 8
34 I 2 5 5
3
1
0 . 0 1 8 7 - 1 5 6 0 320 3.CC7 0 51
1
3
iCl25,1-14 4 . 3 18 1 6 s 5 0 3
1.3
0.110
1 . 0 2
3 3 5
0.1C6
0.45
I
SC I6,7-18
5.1
21
1 5 . 7 I
5 4 . 7
.
3 107 55
8
0 0 5 3 0 5 2 : 7
1 P '
curves2 (Fig.
3)
and the built-in potential
VB
from the
voltage dependence of the gate capacitance at V D S= 0. An
effective open channel thickness,ff is then derived from
the effective pinch-off potential U,ff = Vbexp) + VB.The
channel constriction
d,
at the drain end of the gradual
channel region isestimated from the Turner-Wilson model
[6],
[7].
Pertinent RF parameters a t the bias condition
V ~ I S
= 5
V, VGS
=
0
are listed in Table
111,
including the
T
~ a -
rameters of Fig. 1at the ppropriate frequencies.
111. FEEDBACK
APACITANCE
d g
The dependence of the circuit feedback capacitance
Czg
3 GHz) on the bias between the drain and gateV;IG
is shown in Fig.. Fig. 4(a) and b) compares the GaAs with
the equivalent InP MESFET or three bias conditions:
I.)
the gate shorted to the ource (
VGS=
0) and the drain bias
VDSaised into saturation circles);2) the channel current
kept a t zero
(VDS
0) and a negative gate bias (-Vs:g)
applied toward and beyond channel pinch-off (triangles);
3)
the drain bias
VDS
ixed in saturation and the gate bills
VGS aried (dots, dashed lines).Fig. 4(c) summarizes the
first case (VGS
=
0) including thehigh-current Inl.
MESFET.
Most striking is the strong decrease of C i g or the G d s
MESFET at VGS
=
0, extending beyond saturation and
covering almost an order
of
magnitude in the saturation
range (Fig. 4(a)). Thiss quite contrary to theehavior i n
the channel current-free state OS= 0. Here C;, also dt -
creases strongly as long as the depletion layer mows
There is a certain dependencef V(exp)on
DS[18];
e adopted VL
and theVDS ependence are inconsistent withhe Turner-Wilson model
= 4
V
asour standard for comparisonofdevices. The linear extrapolation
[6]
7 ] ,
but the simplified definition forV P s well justified for coa .
paratwe purposes.
Zero
Bias
V a lue
0.01
0.1
1 0 10
~ v D , - v G ~ l l v-
(a)
1
o
e
C
126 .
7-14
Zero
Bias
Value
I
Y
0
.
:s
0.1
v, = 4 v
I I
cvos-vG, l /v
(b)
0.1 1
o
1 0
1 o
v =
0
G S A 62-6
+ E:
C 1 2 6 . 7 - 1 4
'.\b
o
S C 1 2 6 . 7 - 1 8
\.
\
c
\\
\ \ \
0.011 I
0.1 1 0
v i v-
(C)
Fig. 4.
a
circuit drain-gate capacitance
C i
at 3 GHz versus drain-gate
bias, VDG VDS
-
VGS. (a) GaAs MES6ET. (b)
InP
MESFET. (c)
Comparison betweenGaAs and InP MESFET s at
GS
=
0.
toward channel pinch-off at
Vbexp),
confining the capaci-
tance to the ringing depletion-layer edge. However, more
gradual decrease follows beyond
Vbexp),
which is expected
from the lateral movement of this depletion-layer edge
toward the drain. Thus at given
VDG,
he GaAs MESFET
has amuch smaller
C g
n saturation than n the pinch-off
condition, particularly when
VDG
s large. This leads
t o
a
strong increase of
C i g
when a negative gate bias (-VGS)
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AND LIECHTI
G U S
AND InP MESFETPARAMETERS
1291NGELMANN
a.)
b.)
S.I.
SUBSTRATE
Fig. 5. Depletion-layer fringing. (a) Before pinch-off. (b)After pinch-
off.
is
ap.plied to he aturated GaAs MESFET toward
pinch-off (dashed lines,Fig. 4(a)).
From purely geometrical electrostatic arguments for
drain-,side ringing of the gate depletion-layer capacitance,
no maljor difference in Cdg between the current saturation
and tlhe pinch-off state is expected. In fact, the bias de-
pendence of
C
for the InP MESFET’sFig. 4(b))seems
to agree at least qualitatively with such aimple geomet-
rical viewpoint. In the case of the GaAs MESFET, how-
ever, a fringing capacitance equivalence between the sat-
urated and the inch-off MESFET is retained only at the
limiting bias values, viz., at VDS V {l, VGS 0 , and at
VDS
= 0,
VGS -Vbexp),espectively. Thus theabove re-
sults strongly suggest that the
low
of charges in the lon-
gitudinal channel field between the drain and source is
respo:nsible for reducing the feedback capacitance
c d g
in
the saturated GaAs MESFET. Before discussing this
question further (Section 111-B), a more quantitative
analylsis of depletion-layer fringing is appropriate.
A . Fringing Capaci tance of Gate S t r ipe
The gate fringing capacitance can be estimated from
published calculations of the depletion-layer geometry of
a biased metal stripe n a plane semiconductor surfacef
infinite extension
[lo].
As indicated in Fig. 5(a), deple-
tion-l#ayer ringing tha t is relevant for
c d g
extends under-
neath the metal stripey a fraction
a
of the undisturbed
depletion-layer penetration dd. Deviating from previous
estim,ates
[2],
[ll] he total ringing capacitance
C j
is as-
sumed to be composedof this internal egion I1 inaddition
to the externalegion I. I t follows, independently of
d d ,
cj
= S€W
1)
where
]permittivity of the semiconductor,
w
stripe length (corresponds
t o
“width” of gate),
6 =
61
+ 611. 2)
For region I, including the effect of the air-semiconductor
interface [lo],
61
=
0.71 +
0.86 to/€ =
0.78. (34
For region
11,
we estimate
611
=
2a 0.70
(3b)
by considering the depletioncharge ncrement both
TABLE IV
Gate F ringing Capacit ance a t Diffe rent 13ias Condit ions
~ _= === ___________i_j ;l
~ -.-:~
===
l -
B i a sa p a c i t a n c e
C o n d i t i o n *a l u e s
GaAs
( S A 6 2 - 6 )
n P
(SC126 .7 -14 )
0
C /pF.10.23
Cf /pF 0.086 0.091
‘ f ,excess /PF 0.01 0.15
0 C iS / p F 0.30
0.42
C ig / p F
0.32 0 . 6 3
‘g,exp/PF
0.62 1.05
‘g , theo r /OF
0.58 0 .68
‘ f ,excess /PF
0 .02.19
*
B i a s o n d i t i o n :
V D s
= Vi::
G S = 0
o r
- _-
V D S =
0, V G S
= - v ( e x p )
Cf,excess = ‘f
@
V S
=
0,
VGS =
0
‘ f ,excess,expg , theor)
= L(C .
downward and to theeft in Fig. 5(a). We conjecture tha t
c d g - Cf
for the two limiting cases VDS
=
V :t, VGS
= o
and VOS=
0 ,
VGS
-
V p )Table
IV,
bias condition
0
Experimental
(C
at
3
GHz) and theolretical ( C j )values
are in good agreement for the GaAs MESFET; for the InP
MESFET, however, experimental values are more than
two times larger. Factors contributing to an increase of the
observed
c d g
values are the presence of a gate trough,
possible surface charge effects (both increasing
SI),
and
incomplete saturation or channel pinch-off (increasing
611).
In the InPMESFET’s, pinch-off behavior is indeed much
softer and, hence, less complete at
Vbe.xp),
han in GaAs
devices as is evident from Figs.
3
and 4..
To test the importance of gate-trough and/or surface
charge effects, we measured the totalgate capacitanceat
zero bias, which can be estimated from lCg exp
= C i s
+ C
at
2
GHz (Table
IV,
bias condition
@a .
For the GaAs
MESFET, again, agreement with the theoretical value,
Cg,theor, is satisfactory3 when fringing at a planar surface
is included [lo] . The InP unitn the other hand exhibits
experimental values that are about50percent larger. Here,
the excess in fringing capacitance per side is 0.19pF, which,
within the experimental error, matches with the excess
capacitance deducedfrom C at bias clondition0.EM
studies of the cross-sectioned MESFElT chips revealed
that most of the excess fringing capacit,ance results rom
the gate trough. The GaAs unit had a gate-trough depth
of only 0.16 pm, in contrast toa depth (of0.43 pm for the
InP unit. In addition, thenP trough exhibited an asym-
metry to themetallurgical gate that exp1,ains he difference
in C i sand C of Table
IV.
We thus conclude that gate-
trough etching shouldbe kept toa minimum to avoid an
Note that the xperimental accuracy of L (Table 11)is not better than
10percent.
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8/20/2019 1).Bias Dependence of GaAs and Ip MESFET Parameters
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1292
IEEE TRANS1,CTIONSNLECTRONEVICES, VOL. ED-24 NO.
11,
NOVEMBER 1977
increase in the drain-gate fringing capacitance. Surfice
charge effects appear tohave little influence if present a t
all.
B. I n f l u e n c e of a S ta t ionary Gunn Domain Region
After having attained an understandingf the geom s t-
rical fringing capacitance, we willnow return o he
problem of the experimentally observed large c d g diff x -
ence, for the GaAs MESFET, between the bias cases
w
th
and without current flow. The minimum value measured
for the GaAs unit is about c d g = 0.014 pF in current SEL LU-
ration at VDS
=
8 V, VGS= 0, which compares to c d g =
0.057 pF in pinch-off a t V D S=
0, VGS
= -8
V
(Fig. 4(s)).
For a large enough drain-gate bias
VDG,
he depletim-
layer penetration Id toward the drain can be estimated
from c d g assuming aparallel-platecapacitance C p of
separation l p in series with a fringing capacitance C;
w
(SI
+
~ ) E WFig. 5(b)). With ; = 0.062 pF (SI
=
0.71,
CY =
(0.25)
and deff 0.20 pm (Table 11),one obtains Id = 0.22 pm :'or
the pinch-off case, and a four times larger value, viz.,
1,
=
0.84 pm, for he current saturation ase. On he other hand,
estimating
d
from the drain-gate potential,
U D G
=
v , ~
+ VB
according to electrostatic arguments, viz., l d / l j w
(UDG/Ueff)lI2 U D G 8.8 V, U,ff
=
2.9V (Table
II),
a i d
f
= 1
-
a)d,ff
=
0.13 pm], yields
l d
= 0.23 pm, whic:h is
consistently only with the above value for the pinched-',ff
transistor. Thisproves quantitatively that the propertes
of the carrier flow have to be taken into considerationbr
explaining the low c d g values observed in the saturated
GaAs MESFET.
It has been shown by two-dimensional model calcu la-
tions [12], [13] that velocity saturation in the constricting
channel establishes a charge dipole layer acrosshe velocity
saturated portion of the channel. The Gunn effect en-
hances such a dipole-layer formation and rapidlynduces
fields beyond valley velocity saturation ( E
>
E ,
= 1 2
kV/cm) [14]. The finite scattering timesof the electrcns
cause velocity overshoot effects [15]-[17] resulting in a
positional shift of the charge dipole layer toward the drain
[ E ] .
In fact, high fields may even extend as far as di redy
below the planar metallurgical drain contact andstablish
valley velocity aturation over a substantialportion of the
entire region betweengate and metallurgical drain contacts
(according to [15] most electrons are ifted to theirheevy
state in this region). We thus conjecture tha t the rapid
decrease in c d g with drainbias beyond MESFET satulna-
tion is a direct result f the growing charge dipole layer.
The situation is qualitatively illustrated in Fig. 6
[ lE l ] .
The "gradual" portion of the channel terminates t a po-
sition where the field E reaches a value E,
5
E p core-
sponding to the sustaining field appropriate for a 8 1 a -
tionary Gunn domain EPs the field at the eak veloc: y
up of an effective d y n a m i c u ( E )characteristic). Furtker
down stream, electron accumulation under the constricting
channel rapidly ncreases the field to
E
> E,, causing the
electron drift velocity to saturate at itsalley value,
w --+
vu These high fields can penetrate far toward theedid-
E <
Ep E-E, E > E v
Y < V P
5
Y
x -
GRADUALCHANNEL UNNOMAIN
Fig. 6. Location and equivalent circuit f stationary Gunndomain.
lurgical drain contact since, ecause of the reduced drift
velocity, electron depletion due to channel widening need
not be large. t is thus expected that most of the additional
drain-gate potential appliedbeyond the MESFET satu-
ration voltage does not dropbetween the drain dge of the
gatedepletion layer and he gatecontact as in the
pinched-off MESFET, but across the high-field region
between the metallurgical drain contact and the deple-
tion-layer edge [18]. Dynamically, this high-field region
acts as a capacitance,ch between the drain and gate in
series with he fringing capacitanceC j of the gate depletion
layer. The dynamic parallel resistance Rh of the high-field
portion is considered to be negligibly high because of ve-
locity saturation. WithCdg
=
0.014 pF (VDS 8 V, VGS
=
0)and C f = 0.086 pF (taken rom
VDS
V&&
VGS
= 0),
this capacitance is Ch
=
0.017 pF, which corresponds to a
length of the high-field region of lh = 0.66 pm. Assuming
a potential drop cross the fringing gate depletion layer of
about 2 V (pinch-off voltage,V p ) ) ,he average field along
lh becomes larger han 90 kV/cm. This value compareswell
with even the highest valley velocityields for GaAsquoted
in the literature( E ,
=
85 kV/cm [19], also, cf., [20]).Even
though these estimates areairly rough, they demonstrate
that the high-field domain model is consistent with the
experimental data.
The bias behaviorof the feedback capacitance C:g of the
InP MESFET's, on the other hand, uggests that the for-
mation of the high-field dipole domain is fairly weak in
current saturation (Fig. 4(b) and (c)) and,ence, the ca-
pacitance is mainlydetermined by the gate depletion layer
as in the pinch-off case.
A
qualitative explanation ollows
from the differences in the drift elocity versus field rela-
tionship [20] between GaAs and InP: In nP the egative
mobility is typically a factorof two smaller and the ields
for valley velocity aturation are substantially arger, viz.,
by a factor of five. Thus substantially higher drain bias
levels than currentlypossible appear to be necessary for
In P FET's to induce similar Gunn domain effects as ob-
served in GaAs MESFET's.
The length
lh
of the velocity saturated region (Fig.6) can
also be estimated from the phase shift in the intrinsic
transconductance Y, if the delay in the restof the device
is neglected (cf., [21]). In the GaAs MESFET, the delay
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8/20/2019 1).Bias Dependence of GaAs and Ip MESFET Parameters
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ENGELMANN AND LIECHTI:
GaAS AND InP
MESFET
PARAMETERS
time ;ri (see Fig. 1)was found to increase with drain bias
consistent with he simultaneous decreaseof cdg A t
VOS
=
9 V, we obtained ;
=
5.6 ps which leads to
lh
= 0.85 ym
assuming a delay analogous to thatn a collector depletion
layer ‘ofa bipolar transistor [ ZS ] , h = 2uu7i,with
v u =
0.75
X l o 7cm/s (estimated a t 15 percent below the room tem-
perature value due to elf heating, cf., [ 2 5 ] ) .This is quite
consistent with the
0.66
ym deduced from
c d g .
On the
other hand, no clear trend for the VDS ependence of
7;
evolv’edwith the InPMESFET’s
[9].
Another fact that might contribute to reduced space
charge effects in InP MESFET’s is their very soft pinch-off
behavior mentioned previously (Figs.3 and 4 ) . The softer
pinch-off implies less constriction of the flow of charge
carriers and hence less tendency for space charge forma-
tion. Additionally, the high gate leakage currents that flow
in InP MESFET’s [ 4 ]at the larger drain-gate bias (Fig.2 )
are expected to affect the field distribution in the region
between the depletion-layer edge and drain and may
prevent a substantial uildup of field.
In conclusion, the main reason for the larger feedback
capacitance
I
in current saturation in InP MESFET’s
as compared to GaAs ones has been linked to a reduced
field buildup and, hence, to aess complete velocity sa tu-
ration a t the “valley” velocity in InP at the bias values
employed.
Iv.
OUTPUT RESISTANCE
Rds
T:he bias dependence of the T circuit output resistance
R i s
3
GHz) is presented in Fig. 7. The drain bias plots
(VGS
0,
Fig. 7(a)) exhibit about an equal relative increase
of R i s up to theaturation voltage Vg”dfor both GaAsand
InP. However, beyond
V@$,
the resistance R i s increases
further for the GaAs MESFET by a much larger factor
than for the InP ersions. This difference appears to result
from the softer pinch-off behavior in InP devices already
noted in Figs.
3
and 4,which is clearly evidenced again by
the pinch-off behavior of R i s in Fig. 7(b). In thisonnec-
tion, i t is of interest tonote tha t in InP devices
R i s
tends
to increase for units with lower drain current
ID .
Fig. 8
shows data taken for a number of fabrication runs covering
a large range in epilayer dopingand gate-trough depth and
employing a variety of different substrates. An inverse
proportional relationship between Rds and
ID
is expected
when the RF current simply scales with the dc current.
Such a relationshipemerges for higher current InP units
(Fig.
8).
In GaAs MESFET’s, on the other hand, variations
in substrate, interface quality, and gate-trough depthlay
a major role in determining
Rds
and no correlation to
10
evolved. Here, Rds appears to be strongly influenced by he
varying properties
of
an epi-substrate interface depletion
layer resulting from electron trapping. Drain current re-
laxation effects and gating by substrate bias (“back gat-
ing”) as observed in GaAs MESFET’s have been related
to tlhese interface properties [ 2 2 ] , [ 2 3 ] .
o
far, we were not
able to produce “back gating” n InP units.
These facts taken together lead to the tentative con-
clusion that no electron trapping occurs at theepi-sub-
1000 I
I I
I
v
= 0
t
:B;
.
1293
v 1v
(b)
Fig. 7. P circuit drain-source resistanceR;,
at
3 GHz: (a)versus drain
bias VDS t
VGS=
0; (b) versus gate bias
VGs
at VDs
=
4 V.
101
10
20
40 60 8 100
200
I
1,ImA
-
m
Fig. 8. P circuit drain-source resistanceR i , at 3
GHz
versus drain sat-
uration current
ZD
a t VGS
= 0 for
different InP MESFET uns.
strate interface in InP.This also explains the softer
pinch-off behavior since carriers can be injected into the
substrate more easily if no enhanced interface barrier is
present. The absence of electron trapping might be related
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NOVEMBER
1977
v =
0
-.
*
GaAs: SA62-6
-.
nP:
SC126.7-14
SC126.7-18
ob
2 4
6 8 10
11
V,JV
-
Fig. 9. Current-gain cutoff frequency
f T
versus drain bias VDS t
V G S = 0.
to a different nature of the deep evels in the lower resilr-
tivity, Cr-doped InP substrates used (103-104 a-cm, LIS
compared to lo6-los Qcm or GaAs).
v. CURRENT-GAIN UTOFF
FREQUENCYT
The current-gaincutoff frequency
f T
was directly de -
termined from current-gain versus frequency curves
2s
deduced from the measured s parameters [9].As a function
of drain bias (Fig. 9), we observe a rise toward a peak 2 t
about 1-2 V above the saturation voltage. The decrease c f
f~
beyond this peak is particularly strong in the GaAs
MESFET. Thissuggests that thedecrease is related to the
Gunn domain formation discussed in Section 111. For
testing this contention [18],we consider the following re-
lationships for the intrinsic small-signal transconductanc
2
G,
(cf., [21], [24]) and for the gate-source capacitanc,?
cg,
:
and, hence,
5 )
Here,
V
is the average drift velocity in he gradual channe
region and I , is its effective length; is the average gate
depletion-layer penetration; and
Q
is the total charge irl
the gradual channel egion. It can be shown [18] ha t
k
hardly affected byhe drainbias. Thus the drainias de.
pendence of G,, and
Cg,
Figs. 10 and 11) s indicative
aj’
that of
V
and
l,,
respectively. Fig. 10 then clearly indicates
that
i7
falls off more strongly in GaAs than in I nP with
drain bias VDS beyond its maximum value.This reduction
of
5
with drain bias can be considered as evidence for the
formation of a Gunn domain at the drain end of the
channel: Because of current continuity, the lower carrier
velocity in the high domain fields requires a simultaneous
drop in carrier velocity further upstream in the gradual
channel region, as long as the educed velocity in the do-
main is not completely compensated by carrier accumu-.
Fig.
10.
6 0
1
50
b 40-
E
LE 30-
.
20
-
10-
r
S A 6 2 -6
I np:
SC
126.7-14
SC 126,7-18
I I
- 1 0 2
4
6
8 10
12
VDSIv
-
drain bias
VDS
t
VGS 0.
Intrinsic
a
circuit transconductance
IYL
at
11
GHz
v= 0 G SA 62-6
+ LP:
C 126. 7-14
versus
0.1
1
-1
0
2 4 6 10
v,v
-
Fig.
11. a
circuit gate-source capacitance C“ at
11GHz
versus drain bias
vDS at vGS
=
8.
lation and/or channel widening [MI. Fig. 10 is thus con-
sistent with the conclusion, reached in Section III-B, that
stationary Gunn domain formation is stronger in GaAs
than in InP. Fig. 11,on the other hand, suggestsan increase
of 1, beyond saturation that s similar for both GaAs and
In P devices.
It
has been argued [18] tha t thencrease of 1,
is linked to carrier relaxationeffects [15] within the short
channel (velocity “overshoot”). Hence, it appears that
these effects are at east as strong in InP as n GaAs (cf.,
[17]) even though the stationary Gunn domainhat actu-
ally has formed is weaker in InP. On the other hand, a
field-dependent surface conduction (a surfacenversion
layer spreading from the gate toward drain) might cause
a similar effect.
The stronger decrease of the current-gain cutoff fre-
quency
f T
for GaAs MESFET’s than or InP equivalents,
as demonstrated in Fig. 9, is thus mainly caused by a
stronger reductionof the average carrier velocity
V
in the
gradual channel from which a stronger stationary Gunn
domain growth is inferred.
Fig. 9 reveals that the riginally reported improvement
of
f~
for In P over GaAs MESFET’s obtained at VDS
= 5
V (Table I)
[4]
s partly due to the strong reductionf f~
already present in GaAs at this bias. In fact, or the units
shown, the f~ peak at the ptimum drainbias of the GaAs
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’20
v=s=O
8
I
‘I
2
:
=
-2 -
O-
?
-4
-6
-10-
-8
-1412 2 0 2 4 8 10
VDS/V
-
Fig.
12.
Maximum available gain (MAG) at
11
GHz versus dra in bias
VDS
or VGS
= 0.
MESFET happens to be even higher than those of the two
In P MESFET’s.
Typ ica l
peak values, however, are still
some,what higher in In P devices ranging from 18-24 GHz
as compared to 16-20 GHz in GaAs devices.
Folr completeness, Fig. 1 2 compares the maximum
available power gain of the two kinds of devices at 10 GHz.
As already pointed out in 4], he gain is lower in the InP
devices due to the ombined influence of
c d g , R d s
and of
R, + R, + R i (see Section I).
VI. DISCUSSIONND CONCLUSION
The investigation of the bias dependence of MESFET
parameters in GaAs and in InP led to the ollowing con-
clusions.
1)
The roughly five times higher feedback capacitance
c d g in current-saturated InP MESFET’s asompared to
GaAs, ones (VDS 5
V,
VGS=
0,
see Table I) is mostly a
consequence of a weaker Gunn domain formation in nP
between the gate and drain at the drain bias levels em-
ployed. This leads to a lesser degree of decoupling of the
depletion-layer fringing capacitance from the dra in, par-
ticularly far beyond the onsetof current saturation.
2)
The small drain-source resistance R d s , frequently
observed in InP MESFET’s, was found to be correlated to
high drain current.We suggest th at a softerpinch-off be-
havior in InP is responsible for this trend. The ower re-
sistivity of the InP ubstrates
lo3-lo4
Q cm, Cr-doped,
as colmpared to
lo6-los
f2
cm for GaAs) th at were avail-
able for this study and the apparent bsence of trapped
charges at the nterface are most ikely the cause for this
behavior.
3)
The different behavior between GaAs and nP
MESFET’s in the bias dependence of the current-gain
cutoff frequency
f T
was linked to the ame Gunn domain
formation phenomenon that causes the c d g variation.
When a Gunn domain forms at the drain side of the
chanmel, the average carrier velocity in thechannel is re-
duced.
A t
the drain bias levels generally employed (VDS
= 4-5 V), this effect is stronger in GaAs than in InP and
hence, InP MESFET’s appear to ave a relatively higher
f~ value over GaAsones than theoretically estimated [4].
However, at theoptimum bias level for
f ~
he improve-
ment for InP against GaAs in only 10-20 percent ascom-
pared to the0 percent theoretical estimate.
4) The lower absolute value of the experimental cur-
rent-gain cutoff frequency f~ as compared to the theo-
retical estimates n both materials 4] tollows artly from
the fact that the verage carrier velocity in the channel is
significantly below the velocity peak value.A t higher drain
bias levels, in addition, an effective llengthening of the
channel beyond the metallurgical gate lengthL contributes
to the eduction in f ~ .or a GaAs MESFET, e.g., at a drain
bias of
VDS
= 4 V (VGS= 0), the average carrier velocity
U
in the gradual channel was estimated at about 30 percent
below the peak value up and theeffectlive channel length
1 was estimated at about 35 percent above L [MI. In ad-
dition, current saturation measurements n ungated de-
vices led to up values that are lower than expected from
theoretical estimates [4]. We determilned for GaAs at a
doping level near 1017 a value of u p
w
1.4
X
lo7
cm/s
[18] (theoretical value 1.7
X
107 cm/s [ E]) and for InP at
a doping evel near 0.5 X 1017 cm-3 a value ranging from
1.3-1.7 X l o7cm/s [9b]. These lower up values, in combi-
nation with the furtherreduction for the average channel
velocity, explain why the theoretical estimates for f~ in
Table I are too favorable.
The difference in Gunn domain formation between
GaAs and InP s related to the fundamentalifference in
the carrier velocity/field characteristic o f the two materials.
Similar Gunn domain effects as in GaAs would be expecte
in InP at drain bias levels that are at; least three times
higher than in GaAs, i.e., considerably beyond the cur-
rently achievable Schottkygate unction breakdown
values.
We have also speculated that the different epilayer-
substrate interface properties in aAs and InP which are
believed to cause the differences in Rtls might affect the
process of Gunn domain formation. This contention would
predict stronger Gunn domain formation in InP FET’s,
with its obvious effects on c d g and fT by providing an
enhanced interface barrier. This, of course, should also lead
to largerR d s values. Higher resistivity Fe-doped substrates
[26] or heteroepitaxial interfaces [27] should be investi-
gated in this context. On the other hanld, better control of
the GaAs epilayer-substrate interface may lead to less
electron trapping and, ence, a reductionof the interface
barrier causing a weakening of the Gunn in domain in
current saturation. This would be particularly desirable
for power FET’s which require ahigh drain bias capabili-
ty.
The overall conclusion of this investigation is then that
an
f~
advantage over GaAs is present in InP but s mar-
ginal. However, the generally higher fields of the InPve-
locity/field curve and its reduced tendencyor Gunn do-
main formation canbe of potential significance for a high
power device. n order to sustain the high drain bias levels
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TRANSA(YI0NS O N ELECTRON DEVICES, VOL.
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NO. 11, NOVEMBER
1977
necessary for such an application, a eakage-free gate is
of
paramount importance,
of
course. Replacement of the
Schottky gate by a p-n junction or an insulated gate all-
pears to be necessary.
An
additional advantage for
tile
high-power application would be he higher thermal con-
ductivity of InP.
ACKNOWLEDGMENT
The authorsexpress their gratitude to
.
Lizenby for his
measurement and computation assistance, to
.
Barrera
for supplying some
of
the InP MESFET’s and for
h..s
stimulating interest in the study, and to.
J.
Archer and
R. Van Tuyl for many critical comments to the manu-
script.
REFERENCES
[l] C. A. Liechti, “Microwave field-effect transistors-1976,’’
ZEE
E
Trans. Microwave Theory Tech., ol. MTT-24, pp.279-300, Jure
1976.
[2]
P.
Wolf, “Microwave properties of Schottky-barrier field-effect
transistors,” ZBM J Res. Develop.,vol.
14,
p. 125-121,1970.
[3]
ZEEE
Trans. Microwave Theory Tech. (Special Issueon Microware
Field Effect Transistors), vol. MTT-24, June1976.
[4]
J.
S. Barrera and R. J. Archer, “InP Schottky-gate field-effect
transistor,”
ZEEE
Trans.ElectronDevices, vol. ED-22, PI).
[5] S. Ohkawa, K. Suyama, and H. Ishikawa, “Low noiseGaAs fie]