390 Chapter 7 Logic Circuits

,,,,|1Pll$jffi s.':,'Section 7.1: Basic Logic Circuit Concepts*P7.1. State three advantages of digital technology

compared with analog technology.P7.2. Define these terms: bit, byte, and nibble.P7.3. Explain the difference between positive logic

and negat ive Iogic.P7.4. What are noise margins? Why are they impor-

tant?P7.5. How is serial transmission of a digital word

different from parallel transmission?

Section 7.2: Representation of Numerical Datain Binary Form

P7.6. Convert the following binary numbers to dec-imal form: a.* 101.101; b. 0111.11; c. 1010.01;d. 111.111; e. 1000.0101; f .* 10101.011.

P7.7. Express the following decimal numbers in bi-nary form and in binary-coded-decimal form:a. 17 ; b. 8.5; c.* 9.7 5; d. 73.03125; e. 67.37 5.

P7.8. How many bits per word are needed to rep-resent the decimal integers 0 through 100? 0through 1000? 0 through 106?

P7.9. Add these pairs of binary numbers: a.* 1101.11and 101.111; b. 1011 and 101: c. 10001.111 and0101.001.

P7.10. Find the result (in BCD format) of addingthe BCD numbers: a. * 10010011.0101 and00110111.0001; b. 01011000.1000 and10001001.1001.

P7.lL Express the following decimal numbers in bi-nary, octal, and hexadecimal forms: a. I73:b.299.5; c.735.75; d.. 313.0625: e.112.25.

P7.12. Write each of the following decimal numbers asan eight-bit signed two's-complement number:a. 19; b. -19; c.* 75; d.* -87; e. -95; f .99.

P7.13. Express each of the following hexadecimalnumbers in binary, octal, and decimal forms:a. FA.F16 ; b. 2A.16;' c.777 .7 6.

P7.14. Express each of the following octal numbersin binary, hexadecimal, and decimal forms:a.777.7 s ' , b . 123.5s; c .24.4s.

P7.15. What number follows 777 when countine ina. decimal; b. octal; c. hexadecimal?

P7.16. What range of decimal integers can be repre-sented by a. three-bit binary numbers; b. three-digit octal numbers; c. three-digit hexadecimalnumbers?

"P7.17. Starting with the three-bit Gray code listed inFigure 7.9, construct a four-bit Gray code. Forwhat applications is a Gray code advantageous?whv?

P7.18. Convert the following numbers to decimalform: a. x FA5.616; b.* 725.3s; c. 3F4.816;d.73.25s; e. FF.F016.

P7.19. Find the one's and two's complements of thebinary numbers: a. * 11101000; b. 00000000;c. 10101010; d. 11111100; e. 11000000.

P7.20. Perform these operations by using 8-bit signedtwo's-complement arithmetic: a. I71p * 1516;b. 17rc - 15ro; c .* 331s -37rc; d. 15ro - 63rc;e.49rc - 44n.

P7.21. Describe how to test whether overfiow or un-derflow has occurred in adding signed two's-complement numbers.

Section 7.3: Combinatorial Logic Circuits

P7.22. What is a truth table?*P7.23. State De Morgan's laws.P7.24. Draw the circuit symbol and list the truth table

for the following: an AND gate, an OR gate.an inverter, a NAND gate, a NOR gate, andan XOR gate. Assume two inputs for each gate(except the inverter).

P7.25. Describe a method for proving the validity of aBoolean algebra identity.

Denotes that answers can be found on the OrCAD CD and on the website www. myengi neeri ng1 ab. com

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Figure P7.36

P7.37. Sometimes "bubbles" are used to indicate in-verters on the input lines to a gate, as illustratedin Figure P7.37. What are the equivalent gatesfor those of Figure P7 '37? Justify your answers.

a ----ft s_a + aB -----4-/

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Section 7.4: Synthesis of Logic Circuits

P7.38. Using the sum-of-products approach, describethe synthesis of a logic expression from atruth table. Repeat for the product-of-sumsapproach.Give an example of a decoder.Consider TableP'l .40. A, B, and C representlogic-variable input signals; F through K are

Table P7.40

B C

(a)

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P7.4\. Repeat Problem P7.40 for G 'P7.42. Repeat Problem P7.40for H .P7,43. Repeat Problem P7.40for I .P7.4. Repeat Problem P7.40 for J .P7.45. Repeat Problem P7.40for K.P7.6. Show how to implement the sum-of-products

circuit shown in Figure P7.46 by using onlyNAND gates.

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Figure P7.46

implement the product-of-sumsin Figure P7.47 by using onlY

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P7.48.

Figure P7.47

Design a logic circuit to control electrical powerto the engine ignition of a speed boat. Logic out-put 1 is to become high if ignition power is to beapplied and is to remain low otherwise. Gaso-line fumes in the engine compartment presenta serious hazard of explosion. A sensor pro-vides a logic input F that is high if fumes arepresent. Ignition power should not be appliedif fumes are present. To help prevent accidents,ignition power should not be applied while theoutdrive is in gear. Logic signal G is high ifthe outdrive is in gear and is low otherwise.

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394 Chapter 7 Logic Circui ts

P7.57. a. Construct a Karnaugh map for the logicfunction

F : A B E D + A B C D + A B C D + A B C Db. Find the minimum SOP expression. c. Re-alize Ihe minimum SOP function, using AND,OR, and NOT gates. d. Find the minimum POSexpression.

*P7.58. Consider Table P7.58 in which A, B, C,and Dare input variables. F, G, H, and 1 are theoutput variables. a. Construct a Karnaugh mapfor the output variable F. b. Find the minimumSOP expression for this logic function. c. UseAND, OR, and NOT gates to realize the mini-mum SOP function. d. Find the minimum POSexpression.

F G

P7.59. Repeat Problem P7.58 for output variable G.P7.60. Repeat Problem P7.58 for output variable -F1.P7.61. Repeat Problem P7.58 for output variable 1.P7.62. We need a logic circuit that gives an output X

that is high only if a given hexadecimal digit is

even (including 0) and less than 7. The inputsto the logic circuit are the bits Bs, 84, 82, and-B1 of the binary equivalent for the hexadecimaldigit. (The most significant bit is Bs, and theleast significant bit is .B1 .) Construct a truthtable and the Karnaugh map; then, write theminimized SOP expression for X.

P7.63. We need a logic circuit that gives an output Xthat is high when an error in the form of anunused code occurs in a given BCD codeword.The inputs to the logic circuit are the bits Bg, Ba,82, and ,B1 of the BCD codeword. (The mostsignificant bit is Bs, and the least significant bitis 81 .) Construct the Karnaugh map and writethe minimized SOP and POS expressions for X.

P7.64. We need a logic circuit that gives a high outputif a given hexadecimal digit is 4, 6, C, or E.The inputs to the logic circuit are the bits Bs,Bq, Bz, and 81 of the binary equivalent for thehexadecimal digit. (The most significant bit is83, and the least significant bit is 81 .) Constructthe Karnaugh map and write the minimizedSOP and POS expressions for X.

P7.65. We need to design a logic circuit for interchang-ing two logic signals. The system has three in-puts 11 , 12,and S aswellastwooutputs Or and02. When S is low, we should have 01 = 1r andOz = Iz. On the other hand, when S is high,we should have 01 = Iz and Oz = It. Thus, Sacts as the control input for a reversing switch.IJse Karnaugh maps to obtain a minimal SOPdesign. Draw the circuit.

P7.66. A city council has three members, A, B, andC. Each member votes on a proposition (1 foryes, 0 for no). Find a minimized SOP logicexpression having inputs A, B, and C andoutput X that is high when the majority vote isyes and low otherwise. Show that the minimizedlogic circuit checks to see if any pair of the threeboard members have voted yes. Repeat for acouncil with five members. (Hint:In this case,the circuit checks to see if any group of threehas all voted yes.)

P7.67. A city council has four members, A, B, C,and D. Each member votes on a proposition (1

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x's to be either 1s or 0s to make the expressionas simple as possible. b. Repeat (a) for B 'c. Repeat (a) for C ' d. Repeat (a) for D '

P7.73. Another code that is sometimes used to rep-resent decimal digits is the excess-3 code' Toconvert a decimal digit to excess-3, we add 3to the digit and express the sum as a four-bitbinary number. For example, to convert thedecimal digit 9 to excess-3 code, we have

9ro * 3ro - I2rc: 11002

Thus, 1100 is the excess-3 codeword for 9' Theexcess-3 codewords for the other decimal digitsare shown in Table P'7.'71.

We want to design logic circuits to convertBCD codewords to excess-3 codewords' a' Fillin the Karnaugh map for W, placing x's (don'tcares) in the squares for BCD codes that donot occur in the table' Find the minimum SOPexpression allowing the various x's to be either1s or 0s to make the expression as simple aspossible. b. Repeat (a) for X' c' Repeat (a) forY. d. RePeat (a) fot Z.

P7.74. We want to design logic circuits to convert theexcess-3 codewords of Problem P7'73 to BCDcodewords. a. Fill in the Karnaugh map forA, placing x's (don't cares) in the squares forexciss-3 codes that do not occur in the table'Find the minimum SOP expression allowingthe various x's to be either 1s or 0s to make theexpression as simple as possible' b' Repeat (a)toi r . c. Repeat (a) for C . d. Repeat (a) for D '

Section 7.6: Sequential Logic Circuits

P7.75. Use NOR gates to draw the diagram of an SRflip-floP. RePeat using NAND gates'

P7.76. Oiaw the circuit symbol and give the truth tablefor an SR fliP-floP.

P7.77. Draw the circuit symbol and give the truth tablefor a clocked SR fliP-floP.

P7,78. Explain the distinction between synchronousand asynchronous inputs to a flip-flop'

P7.79. What is edge triggering?P7.80. Draw the circuit symbol and give the truth table

for a positive-edge-triggered D flip-flop'

.P7.81. Assuming that the initial state of the shift reg-ister shown in Figure P7.81 is 100 (i'e', Qo: I'Qr : 0 , and Q2: 0), find the successive states'After how many shifts does the register returnto the starting state?

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Figure P7'81

P7.82. Repeat Problem P7.81 if the XOR gate is re-placed with a. an OR gate; b. an AND gate'

P7.83. The D flip-flops of Figure P7'83 are positive-edge triggered. Assuming that prior to / : 0,the states are Qs : Q1' :0' sketch the voltagewaveforms at Qg and Or versus time' Assumelosic levels of 0 V and 5 V'

Figure P7'83

P7.84. The D flip-flops of Figure P7 '84 are positive-edge triggered, and the Cl input is an asyn-chronous clear' Assume that the states areQo : Qt : Q2 : Qz : 0 at t :0. The clockinput VrN is shown in Figure P7'83' Sketch the

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