2 assembly language.pdf

8/14/2019 2 assembly language.pdf

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PIC18F452 Assembly Language

Microchip Technologies code templates absolute vs relocatable code

if absolute code, after assembly, addresses are all

resolved if relocatable code, after assembly, user data

references are noted as ??

machine code is incomplete until linking is done relocatable code requires linker

code differs only in the manner that data is defined


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Program structure ...preliminary directives

LIST directiveLIST

P=18F452, F=INHX32

INCLUDE directive#include

CONFIGURATION bits initialize processor

configuration

specific to target board

P= define processor

F = format of hex file

C

= columns in listing

(wide to avoid text wrap)N = 0 = turn off headers(for hardcopy output)

ST

= symbol table

MM

= memory map

X

= macro expansion

(useful to verify that the

macro expansion is correct)


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Constants prefix notation

hexadecimal (default)HA3 0xA3decimal D163 163octal O243

binary B10100011

ASCII character AC

CASCII string string

NOTE: AB

is not same as A,B


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Program Structure data defn data memory

CBLOCK 0x000

UDATA

value1,value2

value1

RES

1

result value1 RES 1queuehd,queuetail

queue:40

queue

RES

40

longv:0,val_h,val_l longv RES 0ENDC val_h

RES

1

val_l

RES

1


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Program Structure data defn

EEPROM memoryORG

0xF00000DE

string,5,3

program memory

program BRA

somewhere

NOP

ARRAY

DB

0x00,0x01,0x02,1

DA

ERROR,1

END


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Program Structure interrupt vectors

Interrupt vectors and service routines reset at 0x0000

should go to the start of the program

high priority at 0x0008

low priority at 0x0018

normally, go to the start of the two ISRs for now, use BRA $


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Program Structure main, s/r

syntax for a line of code

wait btfss PIR1,ADIF ; wait for A/D conversion; to complete use tabs to separate components

case sensitive (default), modifiable in MPLAB

label (32 character max) begins with character or _

contains character, number, _, ?

end with :, tab, space, EOL


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Memory Organization

program memoryprograms

data (not modifiable)implemented

not implemented


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Memory Organization

data memory byte addressable

GPR

general purpose registers file registers

data memory

SFR special function registers

not implemented

SFR

GPR


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Memory Organization

data memory alternate view


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Addressing Modes literal

1. literal addressing (immediate)operand part of instruction

e.g. movlw 5

e.g. movlb 3

operand


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Addressing Modes literal

other instructions

andlw k WREG [WREG] AND k

iorlw k WREG [WREG] OR k

xorlw k WREG [WREG] XOR k

addlw k WREG [WREG] + k

sublw k WREG k - [WREG]

mullw k PRODH:PRODL [WREG] * k

retlw k return from subroutine

WREG k

PC (TOS)


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Addressing Modes direct

2. Register direct, memory direct

operand address(es) in instruction

address

operand


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Addressing Modes directe.g. MOVWF NUM1

NUM1 [WREG]

MOVWF NUM1,0

MOVWF NUM1,1

Notation:

in text movwf f(,BANKED)

in datasheet movwf f(,a)

in reference manual


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in code:movwf ANS,0movwf

ANS,A

movwf ANSmovwf

ANS,1

movwf ANS,BANKEDmovwf PORTB


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text movf f,F/W(,BANKED)datasheet movf f,(d(,a))

e.g. movf RESULT,We.g. movfRESULT,F

** strongly recommend that you use F/W

instead of 1/0 for readability


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register to register or memory to memory banking does not apply

movff fS,fD fD [ fS]

e.g. movff NUM1,NUM2

e.g. movff Num2,W

multiply

mulwf f(,BANKED) PRODH:PRODLWREG * f

e.g. mulwf INDEX


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Reading

Text: Chapter 1: 1.5 Memory Organization

1.9 Addressing Modes

PIC18FXX2 Data Sheet [pdf, 332pp; 2006

Microchip Technology Inc.] Section 4. Memory Organization - 4.1, 4.7, 4.9-4.13

data memory map for PIC18F452

datasheet - fig 4.7; text - fig 1.4 special function register map

datasheet - fig 4.1; text - table 1.2
http://www.wlu.ca/science/physcomp/nznotinas/cp316/PIC_documentation/pic18fxx2_datasheet.pdfhttp://www.wlu.ca/science/physcomp/nznotinas/cp316/PIC_documentation/pic18fxx2_datasheet.pdf

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