2012 ieee radar conference, may 7-11, atlanta plenary talk advances in technologies and...

2012 IEEE Radar Conference, May 7-11, Atlanta

Plenary Talk

Advances in Technologies and Architectures Advances in Technologies and Architectures for for

Low-Power and Highly Integrated Ubiquitous Low-Power and Highly Integrated Ubiquitous RadarsRadarsProf. Sergio Saponara, PhD

[email protected]

Department of Information EngineeringDepartment of Information EngineeringUniversity of PisaUniversity of Pisa .


Outline of the Talk

Scenarios, applications and requirements for highly-integrated low-power RADAR

RADAR architecture, integration levels, RF/mm-Wave transceivers and ADC

Ubiquitous low-power RADAR case studies: E-health (UWB and Doppler)

Automotive (FMCW)

HW-SW implementing platforms for RADAR DSP

Conclusions


The electronic components market is growing, driven by digital-based highly integrated applications in Si-based tech. addressing societal needs: health, energy, security, safety, transport..

Not only nanoscale CMOS (more Moore) but also (more than Moore) System-in-Package integration of passives, RF & mm-Wave, high voltage, sensors/actuators (MEMS)

..

Source: World Semiconductor Trade Statistics


Ubiquitous RADAR applications

Pushed by military applications in II world war with high-power, large size

and long-distance systems, today RADAR can be ubiquitous adopted for:

Safer transport systems in automotive, railway, ships …

Bio-signal detection for health care and elderly/infant monitoring

Info-mobility in urban, airport or port scenarios

Civil engineering, (structural health monitoring, landslide monitoring, ground penetration for detecting pipes, electric lines,….)

Distributed surveillance systems (smart cities, airports, banks, schools)

mm-wave body scanner for security

Environmental monitoring and civil protection

Contactless industrial measurements and in harsh environments

Through-wall target detection


Ubiquitous highly-integrated low-power RADAR

RADAR sensing advantages w.r.t. other technologies:

operations in all weather and bad light conditions

contactless sensing and no line of sight sensing

non ionizing radiations

ground penetrating capabilities

multi parameter sensing (target detection, distance, speed, angles)

RADAR sensing suited to address societal needs (safety, security, health, transport ) ubiquitous adopted for large

volume applications?


W.r.t. conventional RADARs with large transmitted-power x antenna aperture product, the realization of highly-integrated RADARs with low power consumption, size, weight and cost (using standard technologies) is needed to enable its ubiquitous adoption in large–volume markets

Transmitted Power < 10-15 dBm

Short wavelength for miniaturization (3.9 mm@77 GHz)

Range from < 1m to < 100-200 m

Detection also with low SNR of 10-20 dB

Cross section from tens of cm2 to m2

DSP techniques to improve performance and solve range-speed ambiguities

Receiver sensitivity down to -100 dBm

Multiple channels may be used for channel diversity gain

Ubiquitous RADAR design needs

43

2

)4( R

GGPP rttr


At λ of few mm there is potential for high miniaturization, even the antenna

integration

77-81 GHz suited for LRR and SRR, 60 GHz reserved for short range radio

Today, good microwave and mm-Waves performance for Si-based

technologies

Highly integrated ubiquitous RADAR frequency


Outline of the Talk

Scenarios and applications for highly-integrated low-power RADAR



Automotive (FMCW)


Conclusions


RADAR as mixed analog-digital system

High peak power in integrated systems problematic limit on range, performance gain from DSP rather than power

Integrated high freq T/R (LNA, Mixer, switch, stable LO, ) and embedded I/F and BB DSP platforms (ADC/DAC + MCU + FPGA/DSP)

Signal ProcessingTX: waveform gener (DDS),

DUCRX: DDC,

beam-forming, PC-match filter,

FFT, ..

ADC

DAC

ANALOG DOMAIN

(PA, LNA, LO, MIXER, AGC,

FILT, T/R Switch, Phase

Shift)

Data Processin

g(adaptive threshold,

CFAR detection, tracking,

classification ..)

Control & Interface

(user or networking or

mission processor)

DIGITAL DOMAIN


Low-power RADAR integration levels

System-on-Chip (SoC), System-in-Package (SiP) or Single-board RADAR

SiP is a more viable solution for RADAR than fully SoC

(increased miniaturization entails also increased tech. complexity)


Pro/Con of RADAR integration

Pro of Highly Integrated RADAR

Component assembly minimized reducing cost, increasing reliability

& lifetime

Small size, small weight, low power consumption

Increased reproducibility and lower cost for large volume production

Con of Highly Integrated RADAR

IC design has high Non Recurring Costs (CAD tools, foundry cost,

design time and team design cost) cost is minimized only for large volume production

A single technology can not offer

optimal performance for all RADAR

subsystems (CMOS optimal for BB

DSP, not for antenna design or RF PA

or mm-Wave analog design)

Low transmit power limits possible

applications to short range ones


High transmit power and large aperture antenna RADAR realized

assembling multiple electronic boards, optimized for each subsystem

For low-power ubiquitous RADAR assembling all sub-systems on the

same single printed circuit board (PCB)

- single chip (few mm2) TX and RX chains at micro or mm-Wave domain and solid-state power amplifier (CMOS, SiGe, MMIC III-V technologies)

- ADC/DAC in CMOS tech. IC

- single chip baseband signal processing

(DSP, FPGA or ASIC) in CMOS

- memory modules (RAM and NV)

- Antenna printed on the PCB

Pulsed RADARs can use a single

time-division antenna for TX/RX

FMCW RADARs use separate TX/RX antennas

RADAR-System-on-a-Board


Integrated antennas

Antenna integration trend at board level (printed antenna on PCB), package level (with LTCC realizing multi-layer circuits with integrated passives including the antenna), at chip level using MMIC or SoI

At mm-waves (77 GHz RADAR or 60 GHz radio λ is few mm) realizing an integrated antenna becomes feasible (limited to short-range)

Lot of works still to do to meet RADAR antenna spec (high gain, array for beam-forming or DOA estimation) RADAR antennas are off-chip

Single-chip antennas on MMIC or SOI tech. proposed in literature for 60 and 77 GHz (few dB gain) only for SRR or using special dielectric lens antenna or smart resonator to improve the characteristics


mm-Wave on-chip integrated antenna

C. Person, IEEE BCTM

2010

Antenna typeF

(GHz)

Tech GainBW

(GHz)Feeder Imped.

4 array Dipole 77 SiGe 2 2 Differential 45ΩSlot Dipole 24 GaAs 2 1.4 CPW 50 Ω

Zig zag 24 CMOS 1.5 N/A N/A 30 ΩAp. Coupled

Patch60 CMOS 7 7.8 Balanced 100 Ω

Dipole 60 SiGe 2.35 7 CPS 30 ΩSlot Antenna 60 CMOS 10 5 N/A N/A

Cavity backed folded dipole

60 SiGe 7 18 CPS 50 Ω

Folded Dipole 60 SiGe 8 8 CPW 100 ΩYagi 60 SiGe 7 9.4 N/A 50 Ω

Spiral 60CMOS SOI

4.2 15 CPW 50 Ω

(J. Hasch et al., IEEE Tran. Micr Theory Tech, 2012)


Competing semiconductor tech. for RADAR

FTGain/NF

ratioCost

PowerConsumption

Suited for

HBT High High Medium High Analog, RF

Si CMOS Medium Medium Low Low Digital

SiGe BiCMOS

High High Medium MediumAnalog, RF,

mixed-signal

III-VHEMT

Very High High High Medium mm-wave


CMOS technology dominates logic & memory

M. Bhor, IEEE ISSCC0’9


SiGe vs. CMOS vs. III-V technologies

For future, for large volume applications (60 GHz radio, RADAR?) the trend will be using CMOS also for mm-wave circuits. As an effect of device scaling a Ft higher than 150 GHz can be obtained

Realizing a mm-wave transceiver in scaled CMOS technology (65 nm or lower), as baseband DSP, entails a lower area, higher integration and lower cost for large volume markets but also lower performance vs. 130nm BiCMOS SiGe tech


CMOS capability- LNA (Gain & NF)

State-of-art designs up to 10-20 GHz in CMOS technology have good performances: gain higher than 20 dB, NF lower than 4 dBAt higher frequencies the performances start decreasing. Around 77 GHz (W-band) acceptable but non optimal performance are achieved today (gain lower than 20 dB, NF higher than 4 dB)

10

15

20

25

1 10 100F (GHz)

Ga

in,

dB

- C

MO

S L

NA

0

2

4

6

8

10

1 10 100F (GHz)

NF

, d

B -

CM

OS

LN

A


CMOS and SiGe capability- PA

0

5

10

15

20

25

30

35

1 10 100 1000F (GHz)

Po

ut

TX

, d

Bm

- C

MO

S P

A

A. Scavennec et al., IEEE Microwave Mag.

2009


Migration to SOI for better passive integration

In SOI technology the high resistivity of the substrate on which n- and p-MOSFET are created allows dielectric isolation of circuit elements (bulk 20 Ω/cm, SOI > 1000 Ω/cm)

Junction capacitances are reduced increasing maximum operating freq

Reduced noise coupling between digital-analog parts in the same chip

The performances of CPS, CPW or antennas in SOI CMOS are improved due to a reduced amount of energy loss in the supporting substrate


Incidence of substrate resistivity on achievable radiation efficiency and gain

Integrated antenna in CMOS SOI

F. Gianesello, IEEE SOI 2010


ADC – RADAR requirements ADC operating at IF: sampling rates up to tens, or even hundreds, of MS/s

ADC sampling at several GS/s available but too power hungry and poor bit resolution Mixer is needed, full-digital RADAR is not convenient

Multi-channel ADC required (e.g. 4 in last LRR automotive Bosch RADAR)

Bit resolution typically higher than 10 b, e.g. a nominal 14b-16 b required for 12 b-14 b ENOB (70 dB dynamic)

Figure of Merit (FoM) in CMOS tech.

from fJ to pJ per conversion-step

M. Mishali et al. IEEE Signal Proc. Mag. 2011


Outline of the Talk




Automotive (FMCW)


Conclusions


Needs for health monitoring

Due to aging population and needs of national health system cost reduction there is high interest in monitoring electronic health devices, specially for heart or respiratory pathologies (CHF, BPCO)

A low-cost RADAR can be used as contactless sensor for monitoring heart rate or breath rate in patient with cardiopulmonary illness or to monitors babies while sleeping against sudden infant death syndrome

Acquired RADAR data are then processed by an home gateway an send to Hospital Information Server


Why RADAR for vital signs sensing

A RADAR senses the mechanical activity of heart or chest instead of the electrical one; from that the heart/breath rate is detected and estimated

The RADAR bio sensor can ensure continuous home monitoring avoiding wires, gels, LOS requirement, electrodes of conventional solutions based on SpO2 measures and multi-lead ECG acquisition (prone to electrode error positioning when done outside hospital )

Sensor RADAR requirements are low-power and high miniaturization for portability/wearability, short-range, low cost for large volume market CMOS silicon integrated approach should be followed

No ionizing effect


Recent proposals based on Ultra Wide Band pulsed RADAR (within 3-10 GHz range) for very low power and low complex short-range (tens of cm) contactless vital sign detection

Correlator-type receiver (Zito, De Rossi, Neri, architecture 2007-2010, implementation in 90 nm CMOS 2011-2012), (Ta-Shun Chu et al., 130 nm CMOS implementation in 2011)

Doppler RADAR based on transmission of un-modulated signal and the analysis of the received echo phase modulated by the chest/heart movement (Dracourt 2004, several works by J. Li, J. Lin et al.). Various designs at 450 MHz, 1.6 GHz, 2.4 GHz, 5.8 GHz in various technologies (250 nm CMOS and BiCMOS, 130 nm CMOS,..)

Which RADAR architecture?


UWB pulsed RADAR

Very low power spectral density (-41.3 dBm/MHz from 3.1 to 10 GHz, 14 bands each of 500 MHz) – ETSI/FCC regulation

Robust against interference, no ionization effect

Transceiver activated when needed (low power)narrowband

UWB

noise

Narrowband


UWB pulsed RADAR

Due to low power the RADAR is limited to detection of heart/breath rate of few Hz, at distances of tens of cm

Single TX/RX antenna multiplexed in time

Transmitter: pulse generator in the TX path transmits short pulses, typ 200-400 ps, towards the human body with fPR > 1 MHz so that the heart can be considered motion-less between consecutive pulses. The energy level of each pulse amounts to few pJ

Low-complex cross correlation receiver architectureZito et al., IEEE TBCS, 2011


UWB pulsed RADAROutput signal modulated by the heart movement (RCS of tens of cm2 )

After a TOF (e.g. few ns for 15-30 cm distance) the signals reflected by the target is captured by the RX antenna

The signal amplified by the LNA is multiplied with a delayed replica of the transmitted pulses generated on-chip by a Shaper circuit

The output signal amplitude is related to the heart position. Vital signs vary within a few Hertz

A 3dB integrator band (Bint) of 100Hz allows an accurate detection

Vo (t) at multiplier output

Vout (t) at integrator output


Correlation-type ReceiverAveraging several pulses allows increasing SNR (40 dB, 104 pulses)

At the low frequency (DC-100 Hz) of the baseband bio-signal the MOS transistors suffer 1/f flicker noise, higher than thermal noise (KTB term)

To have NFtot~NFLNA 20 dB gain required for the LNA if NF2<15 dB

LNA in 90 nm CMOS: 22.7dB gain, 6dB NF, -19dBm ICP1,<35 mW, <0.7 mm2

)log(10intB

fSNR PR

imp

(6)

123121 /)1(/)1( GGNFGNFNFNFtot

Fully differential Gilbert cell mul in 90 nm CMOS with NF 14.3 dB, 12 dB gain, 3.7 mW, 0.3 mm2


Pulse generator based on triangular pulse generation (TPG) and shaping network (SN): two triangular pulsed (delayed by a pulse period) generated and shaped by a CMOS differential pair

Transmitter


fPR in the range 1-10 MHz, pulses of 300-400 ps and 7-8 pJ

energy

BB digital processing can be realized with a simple MCU: low-speed ADC required (12b in ISSCC’11), low data rate serial connection, mainly control tasks to be implemented

Whole chip by Zito et al. in 90 nm CMOS has <2 mm2 area, < 80 mW power consumption, 40dB SNR integrator improvement, <1m range

RADAR packaged in QFN32 and mounted on a test-board including antennas (TX and RX) with 2.3 dBi gain at 3.5 GHz, band 2.8 to 5.4 GHz covering the range of interest from 3 to 5 GHz.

Performance of state of art UWB RADARs


Doppler Bio RADARUn-modulated signal transmitted towards the human body, where it is phase modulated by the physiological movement,

then reflected and captured by the receiver (h and r are

heart and respiratory rate)

Using the same TX signal as RX LO signal, the receiver down-converts the echo signal into BB with no frequency offset. Here it is digitized and the physiological movement can be identified by DSP (FFT or wavelet)

C. Li et al., IEEE TIM 2010


Doppler Bio RADARDR at 5.8 GHz (1 GHz bandwidth) realized in 130 nm CMOS technology powered by 1.5V batteries with direct conversion quadrature receiver

The LNA has 2.56 dB NF and 24 dB gain; the whole RX chain has min 37 dB gain, -32 dBm P1dB, sensitivity of -101 dBm

The system is sized to ensure 10-20 dB SNR, using a baseband sampling rate of 20 Hz (ADC is sized for 1 kHz)

Off-chip 2x2 patch antennas (separate for TX and RX) were used

With 7 dBm output power detection up to 3 m can be done

C. Li et al., IEEE Tran. Micr. Theory Tech. 2010


Automotive RADAR – Why?

Automotive RADARs as core sensor (range, speed) of driver assistance systems: long range (LRR) for Adaptive Cruise Control, medium range (MRR) for cross traffic alert and lane change assist, short-range (SRR) for parking aid, obstacle/pedestrian detection

W.r.t. to other sensing technologies

RADAR is robust in harsh environments

(bad light or weather, extreme temperatures)

Multiple RADAR channels required for

additional angular information

Data fusion in the digital domain with

other on-board sensors


First tentative for mm-wave automotive RADAR since 70’s but integrated-unfriendly technologies lead to large size, high cost

Since 1998-1999 first generation of RADAR sensors (Daimler, Toyota)

Since 2000 MMIC GaAs-based RADAR in premium cars

Last generation based on 180/130 nm SiGe chipset and advanced packaging with integrated antenna commercially available (e.g. Bosch)

Radar CMOS transceivers recent announced in 65 nm and 90 nm

High RADAR frequency (small λ) allows small size and weight; highly integration with SiGe and future CMOS tech. will reduce assembly and testing costs and hence final user cost much below US$1000

Market expanding at 40%/year and is expected increasing with all premium/middle cars having a RADAR in next years (7% of all vehicles sold world-wide, mainly in Europe, Japan and US, will have RADARs)

Automotive RADAR –a bit of Story


Automotive RADAR – Regulation

24 GHz and 77 GHz are the dominant bands for automotive

77-81 GHz is promising since offers 4 GHz bandwidth


Automotive RADAR – 24 vs. 77 GHz

77 GHz is more challenging for designers: given the same technology the node performances (gain, NF, ..) at 24 GHz are better but 77 GHz RADARs reduce size, volume, weight and hence cost

77 GHz offers more opportunity for high performance RADAR design:

λ is 3 times smaller (few mm) smaller antenna size for a given beam-width spec and/or better angular separability for the same size

Combination of high transmit power and high bandwidth available at 77 GHz for long range operation and fine distance separability

Due to SiGe and CMOS technologies evolution 77 GHz is affordable

77-81 GHz (under regulation worldwide) offers 4 GHz Bandwidth with EIRP max PSD of - 3dBm/MHz (-9 dBm/MHz outside the vehicle)


Automotive RADAR – Technical spec


RCS pedestrian: 0.3 -0.5 mm2, RCS vehicle: 1-20 m2


Automotive commercial RADARs

Product size is in the order of 7 cm per side in LRR, 5 cm per side or lower in MRR and SRR

Products exist with mechanical (slowly, increased size) or electronic beam forming (increased electronic complexity affordable in new tech nodes)

Multi channel transceivers required

All use FMCW RADAR technique



FMCW automotive RADAR principle

Received signal at the ADC (with up and down chirp , two targets are

ambiguous; with four chirps two targets can be easily resolved)- LFMCW, FSKCW, MFSCW


FMCW automotive RADAR equations

43

2

)4( R

GGPP rttr

FFT

r

BWNFTK

PSNR

r

d

vf

2

2

)(

2

ff

B

cTR cpi

2

)(

2

ff

f

cv

cR

Receiver power and SNR (min 10 dB required)

Range and relative speed detection from batiment frequency analysis (with FFT in digital domain)

The FMCW sweep frequency B and the time sweep determine the achievable range resolution and speed resolution


Automotive RADAR with SiGe mm-Wave T/R

Commercially available from Bosch based on SiGe Infineon Chipset

2 PCB boards

FCMW modulation

LRR 7dBm Pout, 4 channels (2 TX/RX, 2 RX only), dielectric lens antenna provides high gain for Rmax 250m

Alternative versions with PCB or on-chip Integrated antennas

Power consumption in the order of Watts

B. Fleming, IEEE Vehicular Tech. Mag. 2012


Block diagrams of automotive RADAR with SiGe mm-Wave T/R



JSSC2011 JSSC2010 IEEEAESM 2012

Technology65 nmCMOS

90nmCMOS

guidelines for CMOS

Powerconsumption

243 mW 517 mw N/A

Area 1 mm2 6.8 mm2 N/A

Carrier frequency 77 GHz 77 GHz 77 GHz

Resolution 20 cm N/A < 1m

Doppler resolution 5 km/h N/A ~5 km/h

Range andantenna gain

106 m withoff-chip 24 dB

antenna

10 m withoff-chip 20 dB

antenna

>100m with off-chip 24 dB antenna,

<10 m with on-chip 4 dB antenna

On-chip PA output 5 dBm -2.8 dBm <10 dBm

RX gainLNA+mixer+IF

~38.7 dB23 dB

LNA+mixer~40 dB

Sweep time Tm 1.5 ms 0.5 ms ~1 ms

Sweep freq. B 700 MHz 614 MHz 150-750 MHz

FFT points 2048, 3 MS/s 4096, 2 MS/s up to 8192, few MS/s

Performance of CMOS transceivers

Today SiGe-based RADAR T/R for commercial automotive RADAR

Tomorrow CMOS-based expected (given technology evolution and trends towards more digital systems)


Single and multi beam-forming

To form a beam in a direction, each element of the array is followed by a time delay (phase shifters for narrow band)

when all the outputs are summed they add up coherently to form a beam

Analog beam-forming

Digital beam-forming

Figures from Skolnik bookAnalog/digital beam-forming


DOA estimation - Monopulse

It needs two beams for each angular coordinate

Sum and difference Δ patterns are used

H. Rohling, Automotive Radar tutorial, 2008

-1

-0.5

0

0.5

1

-8 -6 -4 -2 0 2 4 6 8

azimuth (degrees)

Nor

mal

ized

an

ten

na

pat

tern

Example, with Gaussian antenna pattern and -3dB beam-width=3o


Outline of the Talk




Automotive (FMCW)


Conclusions


Implementing platforms for RADAR DSP

Ubiquitous integrated RADAR applications (automotive, bio,..) needs low-power consumption (reduced power supply and thermal issues and increased portability) but can require high computational capabilities and large data transfer rate and memory storage size

Energy-flexibility trade-off to be found between SW-oriented (GPP, DSP, GPU, Microcontroller) and HW-oriented (ASIC, FPGA) platforms

R. Whil, IWPC 2011


Custom SoC or MCU for RADAR

Custom SoC design can provide the best in terms of performance (analog/RF/digital) for a given technology at minimum area and power occupation. Flexibility can be achieved adding in the ASIC also programmable cores

ASIC development time and costs are high rather than designing custom SoC for RADAR in next years an architecture based on MCU+ (DSP/FPGA) is more suited

Thanks to the availability of IP cores such designs can be seen also a prototyping step towards a migration to SoC if and when RADAR becomes a commodity

MCU has low-cost & low-power, on-chip ADC/DAC, but low-performance capabilities (MIPS rather than GOPS, integer operations, low data–rate digital I/O)

For RADAR, MCU suitable for applications needing control of data/operation flow but a co-coprocessor is needed for DSP

RADAR is not yet a commodity with accepted/frozen standards


Why not General Purpose Processors (GPP)?

GPP are evolving as SW-programmable computing architecture with many cores, large operand size (64b or higher), tens of GOPS, multiple cache levels (several Mbytes on chip) and fast connections to off-chip DDR memories or networks

However the energy efficiency (<<1GFLOPS/Watt) and absolute power (tens of Watts) are far from specs of highly-integrated low-power RADAR applications

Intel I5 multicore example


Digital Signal Processors

SW-programmable with instruction set optimized for DSP (e.g. ALU with HW resources for fast MAC, fixed or floating point versions available)

Different architectural approaches: SIMD, VLIW up to GPU (TFLOPS performance higher than multi-core GPP and with better energy efficiency for DSP tasks)

DSP for consumer, automotive and biomedical markets already available

DSP available also as IP cores (soft or hard macro) to be integrated in custom IC


GPU vs GPP Comparison of computational and bandwidth capabilities and

power cost

of some GPP and GPUs


GPU vs GPP

NVIDIA GTX260 GPU tested against Core2Duo GPP E8x series for several RADAR DSP classic algorithms

GPU has a speed-up from 10% up to two orders of magnitude vs. GPP depending: the algorithms, the size of the input array data, the regularity and parallelization degree of the data flow, the bottleneck caused by memory transfers

Large speed-up for filters

Smaller speed-up for CFAR

The GPU kernel is faster than

the GPU computing platform

considering also memory system

Patterson et al, SAAB 2010


FPGA (Field Programmable Gate array)

FPGAs are evolving from reconfigurable HW devices to complex Systems on Programmable Chip (SoPC) with: integrated reconfigurable logic blocks (FF, LUT) and I/O blocks, memory blocks, DSP-units (Mult Add,) soft/hard SW cores (Microblaze, Nios, ARM Cortex,..)

Different FPGA technologies exist: Flash (ProAsic), Anti-fuse (AX, RTAX) , SRAM (Virtex, Spartan, Cyclone, Stratix) some already qualified for automotive or even space/military applications

For DSP intensive applications SRAM-based are typically preferred

Mixed-signal FPGAs also exist(Fusion)

FPGA designs for DSP require algorithmic

and HW know-how: HDL and synthesis tools


High-end FPGA for RADAR DSPHigh-end FPGAs for intensive RADAR DSP are available but cost (>1000 USD) and power consumption are too high for ubiquitous low-power apps

Virtex6 LX760 FPGA in 40 nm for FFT

processing has 380 GFLOPS at 50 W

Stratix Altera FPGA in 28 nm with

variable precision DSP blocks, 2 TMACs

Efficiency (GFLOPS/W, GFLOPS/mm2):

- FPGA worse vs. Custom IC

(1 order of magnitude)

- better performance by 1 order of

magnitude vs. GPP

- slightly better than GPU (GTX480) E. Chung, IEEE Micro 2010


Cost-effective FPGA for RADAR DSP

To fit the DSP RADAR requirements of low-cost low-power applications the challenge is an optimized algorithmic-architecture co-design on less complex FPGA families with HW-SW capabilities

MCU+DSP functionalities of a FMCW automotive RADAR realized in Xilinx Virtex2Pro (Microblaze + radix-2 FFT processor 2048-point, 14 b)

Control and DSP tasks of a 77 GHz FMCW RADAR with GaAs MMIC front-end and MEMS switch realized in Spartan-3A and Virtex-5 SX50T (switch control, TX sweep gen, Hamming filtering, FFT, CFAR, peak pairing)

11b ADC, 10b DAC, 12b/16b

DSP data/coefficient resolutionS. Lal, IEEE RSP 2011


Cost-effective FPGA for RADAR DSP

Virtex5 SX50T: 8160 slices (4 LUT+4FF), 5000 kb RAM; 288 DSP48 unit (25x18 mul+acc +adder), 12 DCM 6 PLL, fast I/O

Spartan3 A-DSP (XA3SD1800A): 16640 slices (2LUT+2FF), 1500 kb RAM, 84 18x18 mul, 8 DCM, automotive grade device exist

S. Lal, IEEE RSP 2011


Conclusions RADAR sensing suited to address societal needs of safety, security, health-care, intelligent transport with big advantages vs. other technologies

Differently from high power and large antenna RADARs, highly-integrated systems with low power consumption, size, and cost are needed for the ubiquitous adoption of RADARs in large–volume markets

Opportunities for miniaturization at mm-waves (λ of few mm)

Key enabling factor is the realization, in Si-based CMOS or BiCMOS tech., of integrated transceivers for the RADAR front-end with enough NF, gain and power to meet automotive or bio RADAR requirements

The path to full CMOS/CMOS SOI to be completed as well as advanced concepts for System-in-Package integration to be further explored


Conclusions ADC at IF and increasing RADAR signal processing in the digital domain (FFT, filtering, pulse comp., beam-forming, CFAR, tracking), with cost-effective embedded platforms (MCU+FPGA), allows for high performance RADAR in standard tech. at low power and low size

Proof-of-concept demonstrators of ubiquitous low-power RADAR and first commercial solutions recently available for UWB pulsed RADAR for bio and FMCW automotive RADAR (LRR, MRR and SRR)

RADAR advances also at system and algorithmic level:

- Sensor fusion of RADAR systems with other sensor technologies

- Networks of small RADARs used to improve the performance in terms of angular, speed, range accuracy and number of tracked targets

- In networked RADAR scenario new DSP functions to be adopted (e.g. code division multiple access to avoid crowding, MIMO techniques)


Acknowledgment

Discussions with

Bruno Neri, Full Professor of RF electronics

and

Maria S. Greco, Associate Professor of Telecommunications

at University of Pisa

are gratefully acknowledged

Thanks for your attention

2012 ieee radar conference, may 7-11, atlanta plenary talk advances in technologies and...

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