1FEATURESPINOUT ASSIGNMENT

1 8

2 7

3 6

4 5

LVTTLLVPECL

D0

D0

D1

D1

VCC

Q0

Q1

GND

APPLICATIONS

DESCRIPTION

SN65LVELT23

www.ti.com......................................................................................................................................................... SLLS929A–JUNE 2009–REVISED AUGUST 2009

3.3-V Dual Differential LVPECL/LVDS Buffer to LVTTL Translator

• Dual 3.3-V Differential LVPECL/LVDS to LVTTLBuffer Translator

• 24-mA LVTTL Ouputs• Operating Range

– PECL VCC = 3 V to 3.6 V WithGND = 0 V

• Support for Clock Frequencies to >180 MHz• 2-ns Typical Propagation Delay• Internal Input Pullup and Pulldown Resistors• Built-in Temperature Compensation• Drop-In Compatible to MC100LVELT23

Table 1. PIN DESCRIPTION• Data and Clock Transmission Over Backplane PIN FUNCTION• Signaling Level Conversion for Clock or Data D0, D0, D1, D1 PECL inputs

Q0, Q1 TTL outputsVCC Positive supply

The SN65LVELT23 is a low-power dual GND GroundLVPECL/LVDS to LVTTL translator device. Thedevice includes circuitry to maintain inputs at VCC/2when left open. The SN65LVELT23 is housed in anindustry-standard SOIC-8 package and is alsoavailable in a TSSOP-8 option.

ORDERING INFORMATION (1)

PART NUMBER PART MARKING PACKAGE LEAD FINISHSN65LVELT23D LVEL23 SOIC NiPdAu

SN65LVELT23DGK SIMI MSOP NiPdAu

(1) Devices with lead (Pb)-bearing terminals not initially available; contact TI sales representative for further information.

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Copyright © 2009, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.

ABSOLUTE MAXIMUM RATINGS

POWER DISSIPATION RATINGS

THERMAL CHARACTERISTICS

KEY ATTRIBUTES

SN65LVELT23

SLLS929A–JUNE 2009–REVISED AUGUST 2009......................................................................................................................................................... www.ti.com

PARAMETER CONDITION VALUE UNITAbsolute supply voltage, VCC 3.8 VAbsolute input voltage, VI GND = 0 and Vi ≤ VCC 0 to 3.8 V

Continuous 50Output current mA

Surge 100Operating temperature range –40 to 85 °CStorage temperature range –65 to 150 °C

POWER RATING THERMAL RESISTANCE, DERATING FACTOR POWER RATINGCIRCUIT-BOARD JUNCTION-TO-AMBIENT,PACKAGE TA < 25°C TA > 25°C TA = 85°CMODEL NO AIRFLOW(mW) (mW/°C) (mW)

Low-K 719 139 7 288SOIC

High-K 840 119 8 336Low-K 469 213 5 188

MSOPHigh-K 527 189 5 211

PARAMETER PACKAGE VALUE UNITSOIC 79

θJB Junction-to-board thermal resistance °C/WMSOP 120SOIC 98

θJC Junction-to-case thermal resistance °C/WMSOP 74

CHARACTERISTICS VALUEMoisture sensitivity level Level 1Flammability rating (oxygen index: 28 to 34) UL 94 V-0 at 0.125 in. (3.18 mm)ESD human-body model 2 kVESD charged-device model 1.5 kVInternal pulldown resistor 50 kΩInternal pullup resistor 50 kΩMeets or exceeds JEDEC Spec EIA/JESD78 latchup test

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Product Folder Link(s): SN65LVELT23

LVTTL OUTPUT DC CHARACTERISTICS (1) (VCC = 3.3 V; GND = 0 V) (2)

LVPECL INPUT DC CHARACTERISTICS (1) (VCC = 3.3 V; GND = 0.0 V) (2)

AC CHARACTERISTICS (1) (VCC = 3.3 V; GND = 0.0 V) (2) (3)

SN65LVELT23

www.ti.com......................................................................................................................................................... SLLS929A–JUNE 2009–REVISED AUGUST 2009

–40°C 25°C 85°CPARAMETER CONDITION UNIT

MIN TYP MAX MIN TYP MAX MIN TYP MAXIOS Output short-circuit current –120 –30 –120 –30 –120 –30 mAVOH Output high voltage (3) IOH = –3.0 mA 2.4 2.4 2.4 VVOL Output low voltage IOL = 24 mA 0.5 0.5 0.5 V

(1) Device meets the specifications after thermal equilibrium has been established when mounted in a socket or printed circuit board withmaintained transverse airflow greater than 500 lfpm (2.54 m/s). Electrical parameters are assured only over the declared operatingtemperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values areapplied individually under normal operating conditions and not valid simultaneously.

(2) All values vary 1:1 with Vcc; Vcc can vary ±0.3 V(3) LVTTL output RL = 500 Ω to GND

–40°C 25°C 85°CPARAMETER UNIT

MIN TYP MAX MIN TYP MAX MIN TYP MAXICCH Power-supply current (outputs set to high) 10 21 25 10 21 25 10 21 25 mAICCL Power-supply current (outputs set to low) 15 21 27 15 21 27 15 21 27 mAVIH Input high voltage (3) 2135 2420 2135 2420 2135 2420 mVVIL Input low voltage (3) 1490 1825 1490 1825 1490 1825 mV

Input high-voltage common-mode rangeVIHCMR 1.2 VCC 1.2 VCC 1.2 VCC V(differential) (4)

IIH Input high current 150 150 150 µAIIL Input low current –150 –150 –150 µA

(1) Device meets the specifications after thermal equilibrium has been established when mounted in a socket or printed circuit board withmaintained transverse airflow greater than 500 lfpm (2.54 m/s). Electrical parameters are assured only over the declared operatingtemperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values areapplied individually under normal operating conditions and not valid simultaneously.

(2) Input and output parameters vary 1:1 with VCC. VCC can vary ±0.3 V.(3) LVTTL output RL = 500 Ω to GND(4) VIHCMR minimum varies 1:1 with GND, VIHCMR maximum varies 1:1 with VCC.

–40°C 25°C 85°CPARAMETER UNIT

MIN TYP MAX MIN TYP MAX MIN TYP MAXfMAX Maximum switching frequency (4) 180 300 180 300 180 300 MHztPLH/tPHL Propagation delay to output at 1.5 V 1.2 1.6 2.2 1.2 1.7 2.2 1.2 1.8 2.2 nstSK++ Output-to-output skew++ 30 160 30 150 30 150 pstSK– – Output to output skew– – 45 180 45 160 45 135 pstSKPP Part- to-part skew (5) 60 200 60 200 70 200 pstJITTER Random clock jitter (RMS) 4 10 4 10 4 10 psVPP Input voltage swing (6) 200 800 1000 200 800 1000 200 800 1000 mVtr/tf Output rise/fall times (0.8 V – 2 V) 330 585 900 330 600 900 330 630 900 ps

(1) Device meets the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit boardwith maintained transverse airflow greater than 500 lfpm (2.54 m/s). Electrical parameters are assured only over the declared operatingtemperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values areapplied individually under normal operating conditions and not valid simultaneously.

(2) Input parameters vary 1:1 with VCC. VCC can vary ±0.3 V.(3) TTL output RL = 500 Ω to GND and CL = 20 pF to GND; see Figure 1.(4) fmax measured for VOL < 0.5 V and VOH > 2.4 V. See Figure 5.(5) Skews are measured between outputs under identical conditions.(6) 200-mV input assured full logic swing at the output.

Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 3

Product Folder Link(s): SN65LVELT23

Typical Output Loading Used for Device Evaluation

GND

Application

TTL Receiver

Characteristic Test

AC TEST LOAD

RL

*CL

*CL Includes FixtureCapacitance

2.0 V

0.8 V

tr t

f

IN

tPLH

tPHL

OUT

IN

1.5 V 1.5 V

D

D

VPP(min) VPP(max)

SN65LVELT23

SLLS929A–JUNE 2009–REVISED AUGUST 2009......................................................................................................................................................... www.ti.com

Figure 1. TTL Output Loading Used for Device Evaluation

Figure 2. Output Rise and Fall Times

Figure 3. Output Propagation Delay

Figure 4. Input Voltage Swing

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Product Folder Link(s): SN65LVELT23

f − Frequency − MHz

0

1

2

3

4

5

0 50 100 150 200 250 300 350 400 450 500

PO

− O

utpu

t Vol

tage

− V

G001

VCC = 3.3 V

VOL @ TA = −40°C

VOL @ TA = 85°C

VOL @ TA = 25°C

VOH @ TA = 85°C

VOH @ TA = −40°CVOH @ TA = 25°C

SN65LVELT23

www.ti.com......................................................................................................................................................... SLLS929A–JUNE 2009–REVISED AUGUST 2009

OUTPUT VOLTAGEvs

FREQUENCY

Figure 5.

Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 5

Product Folder Link(s): SN65LVELT23

SN65LVELT23

SLLS929A–JUNE 2009–REVISED AUGUST 2009......................................................................................................................................................... www.ti.com

REVISION HISTORY

Changes from Revision Original (June 2009) to Revision A ......................................................................................... Page

• Changed MIN and MAX values for tPLH/tPHL in AC CHARACTERISTICS table..................................................................... 3

6 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated

Product Folder Link(s): SN65LVELT23

PACKAGE OPTION ADDENDUM

www.ti.com 18-Oct-2013

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status(1)

Package Type PackageDrawing

Pins PackageQty

Eco Plan(2)

Lead/Ball Finish(6)

MSL Peak Temp(3)

Op Temp (°C) Device Marking(4/5)

Samples

SN65LVELT23D ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM -40 to 85 LVEL23

SN65LVELT23DGK ACTIVE VSSOP DGK 8 80 Green (RoHS& no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM -40 to 85 SIMI

SN65LVELT23DGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS& no Sb/Br)

CU NIPDAU | Call TI Level-1-260C-UNLIM -40 to 85 SIMI

SN65LVELT23DR ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM -40 to 85 LVEL23

(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availabilityinformation and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement thatlead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used betweenthe die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weightin homogeneous material)

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuationof the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finishvalue exceeds the maximum column width.

PACKAGE OPTION ADDENDUM

www.ti.com 18-Oct-2013

Addendum-Page 2

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on informationprovided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken andcontinues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device PackageType

PackageDrawing

Pins SPQ ReelDiameter

(mm)

ReelWidth

W1 (mm)

A0(mm)

B0(mm)

K0(mm)

P1(mm)

W(mm)

Pin1Quadrant

SN65LVELT23DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 8-Apr-2013

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

SN65LVELT23DR SOIC D 8 2500 367.0 367.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 8-Apr-2013

Pack Materials-Page 2

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