4. Current and Voltage Sources

Analog Design for CMOS VLSI Systems

Franco Maloberti

4. Current and Voltage Sources1

Analog Design for CMOS VLSI SystemsFranco Maloberti

Current mirrorsA current mirror gives a replica (attenuated or amplified, ifnecessary) of a bias or signal current.

The most used current mirrors are:

simple current mirror

Wilson current mirror

improved Wilson current mirror

cascode current mirror

modified cascode current mirror

high compliance current mirror

regulated cascode current mirror

4. Current and Voltage Sources2

Analog Design for CMOS VLSI SystemsFranco Maloberti

Current mirrorsA current mirror gives a replica (attenuated or amplified, ifnecessary) of a bias or signal current.

The most used current mirrors are:

simple current mirror

Wilson current mirror

improved Wilson current mirror

cascode current mirror

modified cascode current mirror

high compliance current mirror

regulated cascode current mirror

4. Current and Voltage Sources3

Analog Design for CMOS VLSI SystemsFranco Maloberti

Simple current mirror

VDS1 = VGS1 = VGS2

to simplify the calculations let λVDS1 = 0

€

IRef = I1 =µCox

2WL

1

VGS1 −VTh( )2

1+ λVDS1( )

€

IOut = I2 =µCox

2WL

2

VGS1 −VTh( )2

1+ λVDS2( )

€

IOut = IRef

WL

2

WL

1

1+ λVDS2( )

€

rout = rds2 =1

λIOut

4. Current and Voltage Sources4

Analog Design for CMOS VLSI SystemsFranco Maloberti

Factors affecting the mirror accuracy:

channel length modulation

offset between the threshold voltages

imperfect geometrical matching

technological parameter mismatch

parasitic resistances

€

IOut

IRef

=

µCox( )2

WL

2

VGS −VTh2( )2

1+ λVDS2( )

µCox( )1

WL

1

VGS −VTh1( )21+ λVDS1( )

€

1+ λVDS2( )1+ λVDS1( )

€

VGS −VTh2( )2

VGS −VTh1( )2

€

WL

2

WL

1

€

µCox( )2

µCox( )1

4. Current and Voltage Sources5

Analog Design for CMOS VLSI SystemsFranco Maloberti

Accuracy:

€

δIOut

IOut

2

=δWW

2

+δLL

2

+δCox

Cox

2

+δµµ

2

+ 2δVTh

VGS −VTh

2

+ 2δVGS

VGS −VTh

2

The threshold mismatch is inversely proportional to the overdrive

The threshold of the MOS transistors placed in close proximity arematches within few mV. By contrast, for MOS transistors which arehundred of microns apart have threshold voltages that can differ byfew tens of mV.

The last term refers to a mismatch in VGS. It can derive from resistivevoltage drop, due to a parasitic resistance in series with the source.

The metal resistance is in the order of 20-50 mΩ/, with 10 squaresit result 0.2-0.5 Ω. If the current is 10 mA results an equivalent offsetof 2-5 mV.

(δµ/µ) and (δCox/Cox) are minimized with closed and centroid commonstructures.

(δW/W) and (δL/L) depends on the lithographic process.

4. Current and Voltage Sources6

Analog Design for CMOS VLSI SystemsFranco Maloberti

For large W a goodstrategy is splittingthe transistors inton equal partsconnected inparallel.

€

δIOut

IOut

2

=1n

δWW

2

+δLL

2

+K

Inter-digitizedstructures reduceparasiticcapacitances.

4. Current and Voltage Sources7

Analog Design for CMOS VLSI SystemsFranco Maloberti

Wilson current mirror

Increases the output resistance.

vg2 = vs3 = ix / gm2 vg3 = -gm1 vg2 rT rT = rds1 // RL

€

rout =1

gm2

+ 1+gm3

gm2

1+ gm1rT( )

rds3

€

vx =ix

gm2

+ ix −gm3vgs3( )rds3

RL must be large

there is a systematic error because VDS1 = VGS3 + VDS2

4. Current and Voltage Sources8

Analog Design for CMOS VLSI SystemsFranco Maloberti

Improved Wilson current mirror

VDS1 = VGS3 + VDS2 - VGS4

VDS1 = VDS2 if VGS3 = VGS4

4. Current and Voltage Sources9

Analog Design for CMOS VLSI SystemsFranco Maloberti

small signal analysis

€

vg3 = −gm1vg2 ′ r TRLgm4

1+ RLgm4

€

′ r T = rds1 // RL +1/ gm4( )

€

rout ≈ rds3

gm3

gm2

gm1vg2 ′ r TRLgm4

1+ RLgm4

The output swing in the Wilson and improved Wilsonschemes is limited to

Vout,min = VGS1 + Vsat,3 = VTh,n + Vsat,1 + Vsat,3

4. Current and Voltage Sources10

Analog Design for CMOS VLSI SystemsFranco Maloberti

Cascode current mirror

It increases the output resistance without feedback loop. Ithas the same resistance of the cascode load.

vx = rds2ix + rds3 (1 + gm3 rds2) ix rout ≈ rds3 gm3 rds2

The output swing is limited to

VG3 = VGS1 + VGS4 - VGS3 Vout,min = VS3 + Vsat,3 ≈ VTh + 2Vsat

4. Current and Voltage Sources11

Analog Design for CMOS VLSI SystemsFranco Maloberti

Modified cascode current mirror

The function of the transistor M4 is to shift the voltageVDS1 of the amount enough to bias the gate of M3 withoutbringing M2 out of saturation.

The use of M4 (matched with M3) allows to get VDS1 =VDS2 (this is paid with the output swing limitation).

The output swing is improved by the use of a level shiftVsat < ∆V < VTh.

4. Current and Voltage Sources12

Analog Design for CMOS VLSI SystemsFranco Maloberti

The geometrical dimensions of M1, M6, M4, M5 determine,with Vov,4, ∆V.

€

ΔV = VGS4 −VGS5 =2I4L4

µCoxW4

−2I5L5

µCoxW5

4. Current and Voltage Sources13

Analog Design for CMOS VLSI SystemsFranco Maloberti

Layout

4. Current and Voltage Sources14

Analog Design for CMOS VLSI SystemsFranco Maloberti

Separate biasing in the cascode

All transistors operate in saturation

I = I1 = I2 = I3 = I4 (current scaling is possible)β1 = β2 = β3 = β

Vov1 = Vov2 = Vov3 = Vov

I4 = β4 (Vov4)2; I2 = β (Vov)2; I3 = β (Vov)2

VDS2 = Vov

VGS3 = VTH + Vov

VGS4 = VTH + 2 Vov Vov4 = 2 Vov

therefore β = 4 β4

€

WL

1

=WL

2

=WL

3

= 4WL

4

4. Current and Voltage Sources15

Analog Design for CMOS VLSI SystemsFranco Maloberti

Current gain:

systematic error due to VDS1 ≠ VDS2

systematic error due to body effect on M3

output swing Vout, min = 2 VDSsat

output impedance: rout = rout4 gm2 rout2

4. Current and Voltage Sources16

Analog Design for CMOS VLSI SystemsFranco Maloberti

High-compliance current mirror

M1 = M2; M3 = M4 therefore Iout = Iref

To properly work, we must impose VDSsatM4 < VTh1

4. Current and Voltage Sources17

Analog Design for CMOS VLSI SystemsFranco Maloberti

Regulated-cascode current mirror

Output impedance:

Rout = (gm3rout3)rout2(gm4rout4)

Output swing:

Voutmin = VGS4 + VDSsat3 ≈ VTh + 2 Vsat

4. Current and Voltage Sources18

Analog Design for CMOS VLSI SystemsFranco Maloberti

Adjustable current mirror

Degeneration resistances achieved with MOS transistorsin the triode region.

The voltages at the gates of M3 and M4 control the mirrorfactor.

4. Current and Voltage Sources19

Analog Design for CMOS VLSI SystemsFranco Maloberti

Current referencesMost of the analog blocks require a reference current.These simple current references depend on supply.

€

IRef =VDD −VGS1

RL

The current accuracy is:

€

δIRef

IRef

2

=δ VDD −VGS1( )VDD −VGS1

2

+δRL

RL

2

The global inaccuracy is around ±32%.

The dependence on supply is critical when supply lines areaffected by spur signals.

4. Current and Voltage Sources20

Analog Design for CMOS VLSI SystemsFranco Maloberti

Self biased (or bootstrapped) current reference

Two operating points: It isnecessary to use a start-upcircuit.

€

VGS1 = VTh +I1

µCox

2WL( )

1

€

VGS1 = RI1

for VGS1 > VTh

€

WL

4

=WL

3

4. Current and Voltage Sources21

Analog Design for CMOS VLSI SystemsFranco Maloberti

Self biased micro-current generator

For k = 10, VR ≈ 60 mV,so R = 60 kΩ for I = 1 µA.

€

WL

4

=WL

3

€

WL

2

= kWL

1

k > 1

Assume M3 = M4 ideal mirror I3 = I4 Assume VTh1 = VTh2

€

I1µCox

2WL( )

1

=I2

µCox

2WL( )

2

+ RI2

4. Current and Voltage Sources22

Analog Design for CMOS VLSI SystemsFranco Maloberti

Start-up circuit

static dynamic

Monitor if the current is zero and inject a current that startsthe circuit.

4. Current and Voltage Sources23

Analog Design for CMOS VLSI SystemsFranco Maloberti

VBE-based current generator

The voltage across the resistance and the diode voltageare made equal by the feedback loop action.

4. Current and Voltage Sources24

Analog Design for CMOS VLSI SystemsFranco Maloberti

VT-based current generator

Both VT and R have positivetemperature coefficient.

For a p-well a vertical npntransistor with the collectortied to VDD is available (thecomplementary for n-well).

€

WL

4

=WL

3

€

WL

2

=WL

1

I1 = I2 VA = VB

€

VBE1 = VT lnI1

AISS

€

VBE2 = VT lnI1

nAISS

€

RI1 = VBE1 −VBE2 = VT lnI1

AISS

nAISS

I1

€

I1 =VT

Rlnn

4. Current and Voltage Sources25

Analog Design for CMOS VLSI SystemsFranco Maloberti

Voltage references

VBE multiplier

VT multiplier

Threshold voltage difference

Band-gap

4. Current and Voltage Sources26

Analog Design for CMOS VLSI SystemsFranco Maloberti

VBE multiplier

VOUT has a negative temperature coefficient

€

WL

1

=WL

2

=WL

5

VA = VB

€

I =VBE

R

€

WL

3

=WL

4

VOUT = k R I = k VBE

4. Current and Voltage Sources27

Analog Design for CMOS VLSI SystemsFranco Maloberti

VT multiplier

I = VT / R ln n

VOUT = k VT ln n

4. Current and Voltage Sources28

Analog Design for CMOS VLSI SystemsFranco Maloberti

Threshold voltage difference

M1 and M2 have different threshold (enhancement anddepletion or enhancement and enhancement)

VOUT = -VTh1 + VTh2

4. Current and Voltage Sources29

Analog Design for CMOS VLSI SystemsFranco Maloberti

Band-gap reference voltage

To obtain a reference voltage with zero temperaturecoefficient (in a defined temperature range) it is necessaryto have:

VBG = VBE + m VT

VBE has negative temperature coefficient (- 2.2 mV/°C at 300 K)

VT has positive temperature coefficient (+ 0.086 mV/°C at 300 K)

m ≈ 25.6

4. Current and Voltage Sources30

Analog Design for CMOS VLSI SystemsFranco Maloberti

Band-gap idea

a) implementation adding voltages

b) implementation adding currents and transforming currentinto voltage

4. Current and Voltage Sources31

Analog Design for CMOS VLSI SystemsFranco Maloberti

Band-gap based on voltage processingp-well process

€

ΔVBE = VT lnI1

A1ISS

A2ISS

I2

= R3I2

€

I1I2

=WL

1

WL

2

€

VBG = V2 −VAG + R2I2 = VBE1 +R2

R3

ΔVBE

€

VBG = VBE1 +VT

R2

R3

ln(W / L)1A2

(W / L)2 A1

€

m =R2

R3

ln(W / L)1A2

(W / L)2 A1

4. Current and Voltage Sources32

Analog Design for CMOS VLSI SystemsFranco Maloberti

Other solutions

current provided by the op-amp double band-gap

4. Current and Voltage Sources33

Analog Design for CMOS VLSI SystemsFranco Maloberti

Band-gap based on current processingp-well process

€

VBG = VBE

R3

R2

+VT

R3

R1

ln k( )

4. Current and Voltage Sources34

Analog Design for CMOS VLSI SystemsFranco Maloberti

Combining the two op-amps

4. Current and Voltage Sources35

Analog Design for CMOS VLSI SystemsFranco Maloberti

Curvature error

€

VBG = VG(T ) − VG(T0) −VBE (T0)[ ] TT0

- η -α( )VT lnTT0

η is a process dependent parameter whose value rangesfrom 3 to 4

€

IE = IE0

TT0

α

1257

1258

1259

1260

1261

-20 -10 0 10 20 30 40 50 60 70Temperature [°C]

4. Current and Voltage Sources36

Analog Design for CMOS VLSI SystemsFranco Maloberti

Layout of a 8+1 BJT

common centroid arrangement

common well (same base voltage)