A Real-time TFT Compensation through Power Line Current Sensing for High-resolution AMOLED Displays

Jun-Suk Bang, Hyun-Sik Kim, Sang-Hui Park, Geon-Hee Kim and Gyu-Hyeong Cho Div. of Electrical Engineering, School of EECS, KAIST, Daejeon, Korea

Abstract

A real-time compensation method for TFT variation is

proposed for AMOLED displays. This method enables a

column driver to sense TFT current of each pixel using a

power line as a current sensing line while driving a pixel

without increasing a scan time. A fast OLED degradation

sensing is also possible to compensate the image sticking

problem. A target application of the proposed driver is a

simultaneous emission full-HD AMOLED TV, whose scan

time is 7.5s at a scan frequency of 120Hz.

1. Introduction

AMOLED display is currently being a strong candidate for a

high-quality TV market because of its fast response time, wide

viewing angle and high contrast ratio. A high-resolution TV

requires a fast driving speed of a column driver IC, which makes

most of AMOLED displays in the market rely on a voltage-

driving scheme. However, temporal and spatial TFT variation

causes image degradation. The threshold voltage (VTH)

compensation in pixel circuits, a solution for this problem,

reduces an aperture ratio due to additional TFTs and capacitors.

Although current driving schemes have been proposed for an

accurate driving, their slow driving speed is not appropriate to a

high-resolution displays requiring the scan time of less than

10s [1], [2]. External compensation scheme which externally

compensates VTH variation (∆VTH) has also been proposed [3].

However, this scheme requires an additional calibration time to

measure TFT characteristics, such as the VTH and mobility.

Another issue of the AMOLED display is the image sticking

problem due to the finite lifetime of an OLED. One of the

solutions for the problem is to sense the luminance degradation

of OLED electrically and compensate it for luminance

uniformity [4].

A proposed AMOLED driving system in Fig. 1 realizes an

external TFT compensation in real-time through a power line

current sensing scheme. The proposed column driver senses

TFT variation while driving the large-size AMOLED display. In

addition, it senses the current of the OLED at a constant anode

voltage to measure the degradation before displaying, and the

external system compensates the OLED degradation.

2. Power Line Current Sensing

TFT current of each pixel is highly affected by VTH variation

rather than mobility variation. The main driving TFT in each

pixel has a different VTH, and constant current stress on the TFT

can also shift the VTH. This is why a real-time current sensing is

necessary. To sense the VTH-shift, a previous single bit

CS CS

Power Line

Data LineVoltage Driving

Current Sensing

ELVDD

External

Comp.

Column

Driver

IC

SCAN

SENSE

Figure 1. Concept of Proposed AMOLED Driving System

calibration applies a reference voltage to the gate of TFT and

compares the pixel current flowing through an adjacent sensing

line with the reference current [5]. The comparison result is used

to correct the VTH by only one bit, and this correction is saved in

memory. Because the reference voltage should be applied for

calibration, the calibration is performed at the end of the frame.

Instead of using additional calibration time, the proposed real-

time TFT compensation method in Fig. 2 senses the TFT current

through the power line while driving the data voltage through

the data line.

In the simultaneous emissive display, a column driver

sequentially programs the data voltages to the pixels during the

non-emission (programming) period. At this period, the column

driver senses the TFT current of pixels on the k-th row through

the power lines while programming the data voltage to the TFT

gates of pixels on the (k+1)-th row through the data lines. In this

way, the current sensing scheme is able to sense the TFT current

without any additional time. To do this, the power line should be

disconnected from the power supply (ELVDD) and be

connected to the column driver IC (EM=0).

Voltage

Buffer

VDATA

<9:0>

IDA

TA

<7:0

>

CMP

Vref

(=13V) EM

EMELVDD

(=13V)

SENSE[k]

SCAN[k]

SENSE[k+1]

SCAN[k+1]

3T1C

Pixel

CS

Current

Comparator

Data

Line

Power

Line

SCAN[1]

SCAN[2]

SCAN[3]

SCAN[N-1]

SENSE[1]

SENSE[2]

SENSE[3]

SENSE[N-1]

EM

Programming Period

1 Frame Time

Emission

SCAN[N]

SENSE[N]

1-H time = 7.7sDriver IC

T1T2

VDATA

<9:0>

IDATA

<7:0>

1

1

2

2

3

3

4

N

N

N-1

N-1

N-2

Current

Follower

T3

CS

T1T2

T3

Figure 2. Power Line Current Sensing Scheme

50.2 / J.-S. Bang

724 • SID 2014 DIGEST ISSN 0097-966X/14/4502-0724-$1.00 © 2014 SID

OLED deg.

Comp.

Gamma

LUT

VTH

Comp.

Memory

8 8

8

1010

Memory CMP

Pixel

ELVDD

EM

EM

Pixel

PixelRDL

RPL

CPL

CDL

Voltage

Buffer

Current

Comparator

Timing

Controller

Column

DriverPanel

Display

Data

IDATA

VDATA

ISENSE

CDAC

IDATA

VDAC

VDATA

Figure 3. Block Diagram of Real-time TFT Compensation

The pixel circuit in Fig. 2 consists of two switch TFT (T1, T3)

and a main driving TFT (T2) with a storage capacitor (CS). When

the scanning switch (T1) of the pixel on the k-th row is turned on

(SCAN[k]=0), the data voltage is programmed to the CS. This

means that the main driving TFT (T2) is ready to flow its drain

current according to the data voltage. Thus, if the sensing switch

(T3) is turned on while driving the next data voltage to the pixel

on the (k+1)-th row (SENSE[k]=0, SCAN[k+1]=0), the drain

current of T2 flows through the power line into the current

comparator in the column driver IC. This operation makes the

real-time TFT current sensing while voltage driving possible.

To sense the TFT current and compare it with the data

current, current settling time to the current comparator should be

shorter than a 1-H time of 7.5s. The current follower before the

current comparator, which has a low input impedance, makes

the current settling time as short as the voltage settling time.

Also, this source follower structure with a negative feedback

holds the voltage of the power line by Vref, the same voltage as

ELVDD. Therefore, a large charging current which makes the

current settling time longer does not flow into the power line.

After the column driver drives the data voltage and senses the

TFT current of all pixels on the column line, the power line is

disconnected from the column driver and connected to ELVDD.

At this emission period, all sensing switches (T3) are

simultaneously turned on and OLEDs begin emitting. The

timing diagram in Fig. 2 describes this operation.

3. Real-time TFT compensation

Fig. 3 shows the block diagram of the proposed real-time TFT

compensation system. Basically, display data from main system

IDATA1

VDATA1

ISENSE1

VDATA

IDS

Next Driving

IDATA2

VDATA2

+ V

ISENSE2

VTH

VD

AT

A2

Figure 4. Operation Principle of Real-time ∆VTH compensation

are 8-bit current data. These data are transformed to voltage data

by a gamma look-up table (LUT) and also directly sent to the

column driver IC. The current DAC (CDAC) in the driver

converts the current data to the data current (IDATA), which is

compared with the TFT current (ISENSE). The transformed

voltage data are corrected by a ∆VTH compensation block and

sent to the column driver IC. The voltage DAC (VDAC) with

the voltage buffer drives pixels according to these data.

The ISENSE sensed through the power line is compared with the

IDATA by the current comparator. Assuming that the mobility

among pixels is not significantly different, the difference

between the ISENSE and the IDATA mainly comes from the ∆VTH

among pixels. The gamma LUT contains a relationship between

VDATA and IDATA like the reference I-V curve in Fig. 4. This curve

is based on the VTH and mobility of the reference TFT. Thus, the

current comparator output (CMP) implies whether the VTH of the

TFT in each pixel is larger than that of the reference TFT or not.

If the ISENSE is larger than the IDATA (CMP=1), the VTH of the TFT

is smaller than the reference VTH. If smaller (CMP=0), the VTH of

the TFT is larger than the reference one. The CMP is sent to the

∆VTH compensation block and corrects the VTH of each pixel by

one bit. The corrected ∆VTH of each pixel is stored in memory.

The correction is continued until the CMP changes, which

means that the ∆VTH is finally corrected. However, since the

constant current stress on the TFT shifts the VTH while

displaying, the correction should be repeated every certain

period. This time period is determined by the stability of the

TFT.

Memory only stores the corrected ∆VTH information per

pixel. If the ∆VTH is a 5-bit, 4Mbyte memory is enough to

correct the TFT variation of the full-HD AMOLED display.

4. Circuit Implementation

Fig. 5(a) shows the detailed circuit implementation of the

column driver. Digital components receive a clock signal and

serial voltage and current data. Voltage driving is performed by

a 10-bit VDAC and a class-AB voltage buffer. The current

sensing scheme is comprised of a current follower, a CDAC, a

current S/H and a latched comparator.

Fig. 5(b) shows its operation. During the programming period

when the power line is connected to the current sensing scheme,

the ISENSE flows from the current follower to the pixel because

the follower has a low input impedance. To compare the ISENSE

with the IDATA, the difference between the two currents is

directly integrated to the capacitor CINT at the node VC after the

ISENSE is settled. After the integration, the node VC and the

reference voltage Vref2 are compared by the comparator. For

exact determination, the comparator is offset-compensated [6].

The integration time (tint) is the last 1s of 1-H time.

If the ISENSE is very small, the transconductance (gm1) of the

source follower (M1) can be lower with increased the input

impedance. A constant bias current (IBIAS) to the follower can

solve the problem by limiting the maximum input impedance.

However, since this IBIAS is also integrated at the VC, the current

S/H should sample this current during the first scan time of a

frame (CS=1) and hold it during the programming period

(CS=0) to cancel the IBIAS.

50.2 / J.-S. Bang

SID 2014 DIGEST • 725

VDD

Vref

( =ELVDD)

EM

Vb1

Vb2

IDATA

VDATA

CS

IBIAS

CST

CDATA

<7:0>

CS

T1T2

ELVDD

Shift Register

Latch Stacks

Level Shifters

VDATA

<9:0>

CK

DATA

VDATA

<9:0>

CDATA

<7:0>

VDAC

CDAC

w/ RCC

RDL

CDL

RPL

CPL

EM

Pixel

ISENSE

INT +

Vref2

-

CINT

Vref2

CMP

Column Driver Panel

VC

Vb3Iref INV

M1

Current Follower

Current S/H

T3SENSE

SCAN

(a) Circuit Implementation of Column Driver

CS

SCAN[3],

SENSE[2]

SCAN[2],

SENSE[1]

SCAN[1]

EM

INV

INT

IDATA,

ISENSE

VC

CMP = 0

CMP = 1

Vref2

tint tint1-H time

(b) Timing Diagram of Column Driver Operation

Figure 5. Detailed Circuit and Operation of the Proposed

Column Driver

The 8-bit bit-inversion cascaded-dividing current DAC (BI-

CCDAC) is employed to generate the data current [7]. The bit-

inversion algorithm of the BI-CCDAC makes its INL curve

continuous. The BI-CCDAC also generates two symmetric INL

profiles by toggling an INV signal which changes the whole

current paths. Therefore, a good linearity of the current DAC

can be achieved by averaging these two symmetric INL curves.

In the proposed scheme, averaging is realized by inverting the

INV signal at the middle of the current integration time

(INT=0). For the current uniformity among channels, the

reference current calibration scheme in [7] is also employed.

5. OLED Degradation Sensing

To compensate the OLED luminance degradation,

relationship between anode voltage and current for each OLED

is needed. Also, the sensing operation should be fast because it

is performed when the display device is turned on. In terms of

the sensing speed, applying a constant reference current to the

OLED and measuring the increment of an anode voltage

requires a long sensing time because it is based on the current

driving [3]. Meanwhile, applying the test voltage to the anode of

OLEDs and measuring the OLED current enables a fast sensing

because it is based on the voltage driving.

Memory

CMP

ELVDDEM

EM

RDL

RPL

CPL

CDL

Column Driver

ELVSS

IOLED

CDAC

VDAC

VTEST

SAR

Logic

VTEST

IOLED – IOLED,INIT

IOLED,INIT 8

IOLED<7:0>

α-LUT

IOLED,INIT

α

OLED Deg. Comp.

8

IDATA

=DATA/(1-α)8

Display

Data

8

IDATA

α

CS

T1T2

SCAN

Pixel

IOLED

Current

Comparator SENSE T3

Figure 6. OLED Degradation Sensing and Compensation

In the proposed power line current sensing scheme, the

current follower directly applies the test voltage (VTEST) to the

anode of OLED through the power line by using the main

driving TFT (T2) as a switch. Fig. 6 shows the OLED

degradation sensing and compensation through the power line.

At the reset phase, the ELVSS is connected to the gate of all T2

through T1 to use the T2 as a switch, and the current follower

applies the VTEST to the power line. And then, the sensing

switches (T3) are sequentially turned on from the first row so

that the current sensing scheme in the column driver senses the

OLED current (IOLED) when the anode voltage is the VTEST. A

successive approximation is employed for analog-to-digital

conversion of the IOLED. Since the current sensing scheme has a

fast sensing capability, 15s per a row is enough to settle the

IOLED and convert it to the digital code. Thus, this can be done

during a short time before displaying.

It is reported that the OLED luminance degradation

(α=∆L/L0) has a correlation with (IOLED - IOLED, INIT) / IOLED, INIT,

where the IOLED, INIT is the initial OLED current according to the

anode voltage of VTEST [8]. This is measured at the factory

setting. Thus, the OLED degradation compensation block

computes the for each pixel and stores it in memory. While

driving, the block modifies the input display data according to

the stored value.

6. Simulation Results

The analog block of the power line current sensing scheme

was designed and simulated in 0.18m 20V HVCMOS

technology. The target application is defined as a 55” full-HD

(1920x1080) AMOLED panel, which has a 1-H time of 7.5s.

The emulated panel loads are 10kΩ and 150pF for the data line

and 3kΩ and 450pF for the power line, respectively. These loads

are modeled by five equivalent resistors and capacitors.

Fig. 7 plots the transient response of the sensed pixel current

(ISENSE) at the current sensing block. It clearly shows that the

ISENSE is accurately settled in a 1-H time and is compared with

the IDATA. At the VC node, the difference of the two currents (∆I) is integrated and compared. At the first current sensing time

(IDATA=84.71nA), 11.31nA of the current difference, which is

one-fourth of an LSB of the 8-bit CDAC, is integrated to 14mV

of the integration voltage (∆VC) and compared well by the

offset-compensated comparator. The power line current sensing

scheme can quickly and accurately sense the pixel current.

The simulated TFT current of a pixel at a single gray scale

(001001101) according to the ∆VTH is plotted in Fig. 8. This

50.2 / J.-S. Bang

726 • SID 2014 DIGEST

gray scale is converted to 3A by the CDAC. The TFT is

emulated by a long-length MOSFET and the ∆VTH is realized by

changing the body voltage of the MOSFET. When the ∆VTH is

varying from -0.8V to 0.7V, the TFT current varies by at most

906nA from the reference current without the ∆VTH

compensation. However, after the ∆VTH compensation,

maximum current variation is reduced by 40nA. The error is due

to limited resolution of both the VDAC and current comparator.

VDATA

VC

INT

ISENSE

IDATA 84.71nA

96.04nA

415.1nA

458.6nA

2.036A

1.923A

84.7nA

10.4nA

6.131A

6.171A

Vref2

CMP = 0 CMP = 0

CMP = 1 CMP = 1

CMP = 0

1-H time = 7.5s

tint = 1s

Figure 7. Simulated Transient Response of Proposed

Column Driver

Figure 8. Compensated and uncompensated TFT current at

single gray scale (001001101) according to VTH variation

Table 1. Performance Summary

Process 0.18μm 20V HVCMOS

Target application 55” Full-HD (1920x1080)

1-H time 7.5s

Panel load Data line: 10kΩ, 150pF

Power line: 3kΩ, 450pF

Static current 20μA / channel

Data current range 40nA~10μA (256 levels)

OLED degradation sensing 15s / row

7. Conclusion

The proposed real-time TFT compensation scheme drives the

display data as fast as the voltage driving, and simultaneously

senses the pixel current to compensate the TFT variation.

Through the power line current sensing, the proposed driving

method does not require an additional sensing line and an

additional sensing time. Therefore, it is suitable to large-size

display which needs fast driving and pixel uniformity. The

simulation results verify that the proposed scheme drives the

data voltage and senses the pixel current in a 1-H time of 7.5s

for the full-HD 120Hz driving. In addition, by reusing the

column driver circuit, the proposed system is able to sense the

OLED degradation in 15s per a row and compensate the image

sticking problem. This helps the AMOLED display have a

higher luminance uniformity.

8. Acknowledgements

This work was supported by the National Research Foundation

of Korea (NRF) grant funded by the Korean government

(MEST) (No. 2013042126).

9. References

[1] J.-Y Jeon et al., “A Direct-Type Fast Feedback Current

Driver for Medium- to Large-Size AMOLED Displays,” ISSCC

Dig. Tech. Papers, pp.174-175, Feb. 2008.

[2] T. Charisoulis et al., “A New Feedaback Current

Programming Architecture for 2T1C AMOLED Displays,” SID

Dig., pp. 465-468, 2013.

[3] H.-J. In et al., “An Advanced External Compensation System

for Active Matrix Organic Light-Emitting Diodes Displays With

Poly-Si Thin-Film Transistor Backplane,” IEEE Trans. On

Electron Device, vol. 57, no. 11, pp. 3012-3019, Nov. 2010.

[4] J.-H Yang et al., “A Novel Current-Mode Driving Technique

for Real-Time Image Compensation in AMOLED Displays,”

SID Dig., pp. 647-650, 2012.

[5] G. R. Chaji and A. Nathan, “A Current-Mode Comparator for

Digital Calibration of Amorphous Silicon AMOLED Displays,”

IEEE Trans. on Circuits and Systems–II: Express Briefs, vol. 55,

no. 7, pp. 614-618, July 2008.

[6] B. Razavi and B.A. Wooley, "Design techniques for high-

speed, high-resolution comparators," Solid-State Circuits, IEEE

Journal of, vol.27, no.12, pp.1916-1926, Dec. 1992.

[7] K.-D Kim et al., “A 10-bit Compact Current DAC

Architecture for Large-Size AMOLED Displays,” SID Dig., pp.

334–337, 2011.

[8] G. R. Chaji et al., “Electrical Compensation of OLED

Luminance Degradation,” IEEE Electron Device Letters, Vol.

28, No. 12, pp. 1108-1110, Dec. 2007.

50.2 / J.-S. Bang

SID 2014 DIGEST • 727