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Silicon Carbide Epitaxy, 2012: 121-144 ISBN: 978-81-308-0500-9 Editor: Francesco La Via

6. 4H-SiC epitaxial growth and defect

characterization

T. Kimoto, G. Feng, K. Danno, T. Hiyoshi and J. Suda

Department of Electronic Science and Engineering, Kyoto University

A1-301Katsura, Nishikyo, Kyoto 615-8510, Japan

Abstract. In the last decade, remarkable improvement in the material quality and understanding of defect behaviors in SiC have

been made. In this paper, fast epitaxial growth and defect characterization of 4H-SiC are described. The growth rate was

increased to 85 m/h by reducing growth pressure in a

conventional SiH4-C3H8-H2 chemistry without morphology degradation. The net donor concentration of unintentionally doped

epilayers is 5 1013 cm-3 or less. After micropipe elimination of

SiC wafers, reduction of threading dislocations and basal-plane dislocations is essential to improve the performance and reliability of SiC power devices. These dislocations can be nondestructively detected by photoluminescence mapping at room temperature. In

fast epitaxial growth (> 50 m/h), three types of in-grown stacking

faults, (4,4), (5,3), and (6,2) structures, have been revealed in epilayers with a density of 0.5-5 cm-2. The Z1/2 center, which is

located at 0.65 eV below the conduction band edge, was identified as the dominant lifetime killer in 4H-SiC. Almost all the major deep levels present in as-grown epilayers have been eliminated

(< 1 1011 cm-3) by two-step annealing, thermal oxidation at 1150-

1300oC followed by Ar annealing at 1550oC. The carrier lifetime

was improved from 0.68 s (as-grown) to 9.5 s by the two-step

annealing, and further increased to 13 s after surface passivation. Correspondence/Reprint request: Dr. T. Kimoto, Department of Electronic Science and Engineering, Kyoto

University, A1-301Katsura, Nishikyo, Kyoto 615-8510, Japan. E-mail: [email protected]

T. Kimoto et al. 122

Introduction Power semiconductor devices have attracted increasing attention as key components in a variety of power conversion units. Realization of high-performance power devices will lead to enormous energy saving, conservation of fossil fuels and less environmental pollution. Because of the mature technology of Si power devices currently employed in most applications, it is now difficult to achieve innovative breakthroughs in this field. Newly emerging semiconductors such as silicon carbide (SiC) are attractive for advanced power devices, owing to their superior physical properties [1-4]. It should be noted that SiC is an exceptional wide bandgap semiconductor, doping concentration of which can be controlled in the wide range, more than five orders of magnitude, for both n-type (N or P doping) and p-type (Al doping). The figure-of-merit for power devices is given by εμEB

3 (Baliga’s figure of merit) [5], where ε is the dielectric constant, μ the mobility, and EB the breakdown field. The figure-of-merit of SiC exceeds 500 when the value is normalized by that of Si, indicating much potential of SiC for power device applications. Owing to remarkable improvement of SiC wafer quality and progress in device technology, high-voltage SiC Schottky barrier diodes (SBDs) and field-effect transistors (FETs), which significantly outperform Si counterparts, have been demonstrated [6-8]. SiC SBDs have been on the market since 2001, and production of 600-1700 V SiC FETs has started in recent years. SiC power devices will become key components to realize significant reduction of power dissipation in a variety of power converters/inverters in the future. Through recent progress in SiC growth technology, four-inch 4H-SiC wafers with a reduced density of extended defects and free of micropipes are now commercially available. Epitaxial growth of high-quality SiC with uniform thickness and doping concentration is an essential technology for developing any kinds of SiC devices [9-15]. Although fundamental technology of 4H-SiC homoepitaxy on off-axis SiC(0001) substrates has been almost established, there still exist several important challenges in 4H-SiC homoepitaxy. Such challenges include homoepitaxy on nearly on-axis substrates [16-18], epitaxial growth on the C face [19-20], fast and thick epitaxy [21-25], and so on. Fast and thick epitaxial growth of SiC is especially important for developing very high-voltage SiC bipolar devices such as PiN diodes, thyristors, and IGBTs (Insulated Gate Bipolar Transistors). These SiC bipolar devices are promising for ultrahigh-voltage (> 10 kV) power devices, which can be employed for electric power infrastructures such as HVDC (High-

4H-SiC epitaxial growth and defect characterization 123

Voltage DC) transmission and BTB (Back-to-Back) frequency converters. For these applications, however, very thick (> 100 μm) and high-purity crystals with low defect density and long carrier lifetimes are required even with SiC. Table 1 shows the thickness and doping concentration of SiC voltage-blocking layers required for several typical voltage ratings, which was calculated from doping-dependent critical electric field strength [26]. Note that a non-punchthrough structure was assumed in this table, while a thinner epilayer with lower doping concentration is employed in a punchthrough structure. For example, about 100 μm-thick epilayers with a background doping concentration of a low 1014 cm-3 and a long carrier lifetime over 5 μs are required for producing 10 kV SiC bipolar devices. In this paper, recent results on fast epitaxial growth of 4H-SiC and defect characterization obtained in the authors’ group are reviewed. Table 1. Thickness and doping concentration of SiC voltage-blocking layers required for several typical voltage ratings.

Voltage-Blocking Region (SiC) Rated Voltage

Thickness (μm) Doping (cm-3)

1.2 kV 9.6 1.4x1016

1.7 kV 14 9.6x1015

3.3 kV 29 4.3x1015

4.5 kV 41 2.9x1015

10 kV 95 1.2x1015

20 kV 210 4.9x1014

Fast epitaxial growth of 4H-SiC Homoepitaxial growth was carried out on commercially available 8o off-axis 4H-SiC(0001) Si-face substrates by using a custom-made horizontal hot-wall chemical vapor deposition (CVD) reactor in a SiH4 - C3H8 - H2 system [27]. In-situ H2 etching was carried out at 1650oC for 30 min, prior to epitaxial growth. The pressure during H2 etching was 4.6 kPa. The typical growth temperature and growth pressure were 1650oC and 4.6 kPa,


respectively. The SiH4 flow rate was changed in the range from 1 to 30 sccm. The flow rate of H2 carrier gas was fixed at 10 slm. The surface morphology of substrates and epilayers was observed using a Nomarski microscope and atomic force microscopy (AFM). The BPD density was investigated by etching epilayers in molten potassium hydroxide (KOH) at 500oC for 5 min. The doping concentration of epilayers was determined by capacitance-voltage (C-V) measurement on a Ni/Schottky structure with a probe frequency of 1 MHz. Typical diameter of the Schottky contacts was 1.0-1.5 mm. The photoluminescence (PL) spectra were acquired at 4 K and 300 K with a He-Cd laser (λ = 325 nm) as an excitation source. Fig. 1 shows the SiH4-flow-rate dependence of the growth rate at a moderate C/Si ratio (C/Si = 1.2) in source gases. The growth rate was independent of the C/Si ratio in the moderate range from 1.0 to 1.3. The growth rate increased almost in proportion to the SiH4 flow rate, and it reached 85μm/h at a SiH4 flow rate of 30 sccm. Fig. 2 depicts Nomarski micrographs for 100 μm-thick epilayers grown at 85μm/h at growth pressure of (a) 10.6 kPa and (b) 4.6 kPa. A very rough surface with island-like morphology is obtained when growth was performed at a pressure of 10.6 kPa, probably due to pronounced homogeneous nucleation(Si condensation). In contrast, at lower growth pressure of 4.6 kPa, the surface morphology was markedly improved, because the Si condensation is reduced at low pressure. The roughness defined by root mean square (rms) was as low as 0.18 nm in a

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Figure 1. SiH4-flow-rate dependence of the growth rate at amoderate C/Si ratio (C/Si = 1.2) in homoepitaxial growth of 4H-SiC(0001). The growth temperature and pressure were 1650oC and 4.6 kPa, respectively.


10 ×10 μm2 scan and 0.21 nm in a 20 × 20 μm2 scan in AFM measurements. On 4o off-axis 4H-SiC(0001), the surface morphology was worse than on 8o off-axis substrates, when the growth rate was higher than 25-30 μm/h. As the both SiH4 and C3H8 flow rates increased under moderate or high C/Si ratio conditions, the doping concentration significantly decreased at a given C/Si ratio. It has been reported that, under C-rich condition, the absolute amount of excess carbon increases as the total source gas flow rate (SiH4 and C3H8) increases while keeping a constant C/Si ratio of inlet source gases, which results in the increase of effective C/Si ratio on the growing surface [28,29]. This may lead to suppression of nitrogen incorporation at high SiH4 and C3H8 flow rates, due to the increase of effective C/Si ratio (site competition effect [30]). Fig. 3 shows the C/Si ratio dependence of the doping

Figure 2. Nomarski micrographs for 100 μm-thick 4H-SiC epilayers grown with a growth rate of 85μm/h at growth pressure of (a) 10.6 kPa and (b) 4.6 kPa.

0.6 0.8 1.0 1.2 1.4 1.6 1.81012

1013

1014

1015

1016

C/Si Ratio

Net

Don

or C

once

ntra

tion

(cm

-3)

4H-SiC(0001), undoped

Figure 3. C/Si ratio dependence of the doping concentration for unintentionally doped 4H-SiC(0001) epilayers grown at 50 μm/h.


concentration for unintentionally doped epilayers grown at 50 μm/h. As expected from the site competition effect [30], the net donor concentration decreased considerably with increasing the C/Si ratio. The typical background concentration was 5×1013 cm-3 at the C/Si ratio of 1.2, where very smooth surface can be obtained as shown in Fig.2 (b). Although an even lower net donor concentration below 1×1013 cm-3 can be attained at a C/Si ratio of 1.5, the surface exhibited macrostep bunching with a rms roughnes of 1.5-2.2 nm. Further increase in the C/Si ratio resulted in the increase of surface roughness and flip to the p-type conductivity. Fig. 4 represents the PL spectra at 4 K and 300 K for a 160 μm-thick epilayer grown at 80 μm/h without intentional doping. This epilayer is lightly doped n-type with a net donor concentration of 6× 1013 cm-3, as determined by C-V measurement. In the PL spectra, free exciton peaks labeled by the I series are exclusively dominant. Although the Q0 peak that originates from excitons bound to neutral nitrogen donors was also observed, it is very small compared with free-exciton peaks, which suggests high purity of the epilayer [31]. The PL intensity of impurity-related peaks such as B, Ti, Al was also very small, at least 200 times smaller than that of free exciton peaks. In general, the L1 peak (2.901 eV), attributed to the DI center [32,33], is often observed in fast epitaxial growth of 4H-SiC. The DI center is thought to be an intrinsic defect complex, which is observed in both as-grown and irradiated SiC. It should be noted that the L1 peak was hardly observed even at high growth rate of 80 μm/h (at least, 1000 times smaller than free exciton peaks) in this study.

Figure 4. Photoluminescence spectra at 4 K and 300 K for a 160 μm-thick 4H-SiC epilayer grown at 80 μm/h without intentional doping.


Characterization of defects in SiC epilayers

Dislocations

Since the micropipe density in SiC wafers has been reduced down to well below 0.1 cm-2(almost eliminated), normal dislocations and epi-induced defects such as carrot defects are one of main issues in SiC epilayers. Most dislocations in 4H-SiC homoepitaxial layers originate from dislocations in 4H-SiC substrates. Major dislocations in SiC substrates include threading screw dislocations (TSD), threading edge dislocations (TED), and basal-plane dislocations (BPD), though these dislocations form a complex network in the substrates [34]. The typical TSD, TED, and BPD densities in the commercial substrates are 500, 3000-5000, and 1000-5000 cm-2, respectively. Fig. 5 represents the schematic illustration of dislocations in 4H-SiC epilayers grown on off-axis {0001} by CVD [35-39]. Almost all the TSDs in the substrate are replicated in the epilayer, but some TSDs are converted to Frank partials [35]. A TSD in the substrate can work as the nucleation site of a carrot defect, which usually consists of basal-plane and prismatic-plane faults [35,40]. A BPD is another detrimental defect especially for SiC bipolar devices [41,42] and the reliability of thermal oxides [43]. Although most BPDs in the substrate are converted to TEDs within a few μm of the initial epilayers, some

Figure 5. Schematic illustration of dislocation propagation in 4H-SiC epilayers grown on off-axis {0001} by chemical vapor deposition.


BPDs of a screw character propagate in the basal planes of the epilayer. Conversion from BPDs to TEDs has been enhanced by several ways such as molten KOH etching [44] or H2 etching [45] prior to epitaxial growth, interruption during growth [46], and the utilization of a low off-angle [45]. Fig. 6 shows the conversion ratio from BPDs in the substrates to TEDs in 4H-SiC epilayers as a function of growth rate [25]. Here, the growth temperature, pressure, and C/Si ratio were fixed, while the gas flow rates and growth period were varied to obtain SiC epilayers with similar thickness at different growth rate. The increase in growth rate is effective for enhancement of the conversion ratio. By fast epitaxial growth (> 25 μm/h) on CMP (Chemical Mechanically Polished) substrates, a high conversion ratio over 99% is achieved. It has been suggested that the conversion of BPDs into TEDs is driven by the image force, which is enhanced when the distance between the dislocation and the crystal surface becomes small. Thus, the superior flatness of CMP substrates may be effective to promote the dislocation conversion. The authors also investigated the influence of C/Si ratio on the BPD-TED conversion and confirmed that the C/Si ratio dependence of the conversion ratio was very small in the C/Si ratio range from 1.0 to 2.0. It has been suggested that the BPD-TED conversion is enhanced when two partial dislocations, which are formed through dissociation of an initial BPD, meet

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Rat

io o

f BP

Ds

(%)

8o off-axis (0001)C/Si ratio = 1.2-1.5T = 1650oC

as-received substrate

CMP

Figure 6. Conversion ratio from basal-plane dislocations to threading edge dislocations during SiC epitaxial growth as a function of growth rate. The growth temperature was 1650oC, and the thickness of epitaxial layers are about 22-25 μm. Both as-received and chemical-mechanically-polished substrates were employed.


and are combined into one perfect BPD [47]. A similar phenomenon may be enhanced in fast epitaxial growth, though the exact mechanism is not clear at present. A minimum BPD density and maximum conversion ratio obtained in this study were 8 cm-2 and 99.8 %, respectively. PL mapping or imaging techniques enables easy and non-destructive detection of dislocations in SiC [48-51]. Fig.7(a) shows the image of micro PL intensity mapping at 390 nm (near band-edge emission) at room temperature obtained from a 72 μm-thick n-type 4H-SiC epilayer intentionally doped to 1×1015 cm-3. Three circular areas with reduced PL intensity in contrast to the matrix can be observed, indicating locations of non-radiative recombination centers. Among these three circular areas, two of them show a larger size than the other one. Fig. 7(b) represents the optical microscopy image of the sample surface (same location) after molten KOH etching at 480oC for 10 min. Three threading dislocations are revealed by characteristic etch pits. In these figures, there is a one-to-one correlation between the circular areas with reduced PL intensity and threading dislocations. It should also be noted that a TSD exhibits a larger and darker circular area in micro PL intensity mapping than a TED. The authors monitored more than 200 dislocations by micro PL mapping and etch pits, and obtained a similar result. This result suggests that TSDs have a more pronounced impact on the non-radiative recombination activity than TEDs [51]. Detection of BPDs is easy, because long dark lines along the off-direction can be observed in micro PL mapping, and in many cases, a BPD is dissociated into two partial dislocations and a Shockley-type stacking fault is formed between them during PL measurement, as reported in ref. 50. Anyway,

Figure 7. (a) Micro PL intensity mapping at 390 nm (near band-edge emission) at room temperature obtained from a 72 μm-thick n-type 4H-SiC epilayer intentionally doped to 1×1015 cm-3. (b) Optical microscopy image of the sample surface (same location) after molten KOH etching at 480oC for 10 min.


individual dislocation types (TSD, TED, and BPD) can be easily identified by a non-destructive micro PL mapping technique. In-grown stacking faults

The authors’group suggested that epi-induced stacking faults (in-grown SFs) and morphological defects which contain SFs (e.g. carrot defect) cause severe decrease in blocking voltage of SiC devices [52,53]. It should be noted that most of in-grown SFs are invisible in optical microscopy. For detection of the SFs, PLmapping/imaging is a powerful method [54,55]. In this study, thick 4H-SiC epilayers grown by hot-wall CVD at a high growth rate of 50-85μm/h have been characterized by PL mapping at room temperature. Fig. 8 shows the micro PL spectra acquired from several areas with and without in-grown SFsin a 4H-SiC epilayer at room temperature. From the 4H-SiC matrix without SFs, only one peak located at 390 nm is observed. From the SF regions, however, distinct PL peaks at 460 nm, 480 nm, and 500 nm were observed in addition to the weak band edge (free exciton) peak at 390 nm.

Figure 8. Micro PL spectra acquired from several areas with and without in-grown SFs (IGSF-1, IGSF-2, IGSF-3) in a 4H-SiC epilayer at room temperature. IGSF-1, IGSF-2, IGSF-3 are in-grown SFs which exhibit a PL peak at about 460 nm, 480 nm, and 500 nm, respectively.


Thus, the PL intensity mapping at a wavelength specific to each SF gives the profiling (location, shape, and density) of in-grown SFs. Fig. 9 shows the high-resolution TEM (Transmission Electron Microscopy) and micro PL images taken from the major in-grown SFs which exhibit PL peaks at (a) 460 nm, (b) 480 nm, and (c) 500 nm, respectively. The stacking sequence has been determined as the (4,4), (5,3), and (6,2) types in the Zhdanov’s notation. The one-to-one correlation has been established between the PL peak and the stacking sequence. The shape of SFs which show PL peaks at 460 nm and 480 nm is a right-angled triangle with a pointed apex at the upstream side of step flow. On the other hand, the shape of SF which shows 500 nm emission is isosceles triangular. Since the length of all these SFs agrees with the projected length of the basal plane in the epitaxial layers, it can be speculated that these SFs are generated at the initial stage of epitaxial growth. However, exact mechanism of SF generation is still not clear at present. Optimization of in-situ H2 etching condition and starting epitaxial growth at lower growth rate are effective to reduce the density of these SFs. The total density of

Figure 9. High-resolution TEM images taken from the major in-grown SFs in 4H-SiC epilayers grown at 72 μm/h and the corresponding PL intensity mapping images at room temperature. (a) (4,4), (b) (5,3), (c) (6,2) structures.


SFs is typically 0.5-5 cm-2 for epilayers grown at 50 μm/h, and it tends to increase when the growth rate is increased. Elimination of these in-grown SFs is an important remaining issue in fast epitaxy of SiC. Deep levels

Another type of important defects in epilayers is a point defect, which creates a deep level in a bandgap. The authors and other groups have investigated the major deep levels observed in as-grown n- and p-type epilayers and their thermal stability [56-59]. Deep level transient spectroscopy (DLTS) measurements were performed on SiC Schottky structure in the temperature range from 100 K to 760 K. The Schottky metal employed was Ni for n-type and Ti for p-type SiC. Fig.10 illustrates the energy levels of major deep levels observed in as-grown n-type and p-type 4H-SiC epilayers. Among them, the Z1/2 (EC – 0.65 eV) [56] and EH6/7 (EC – 1.55 eV) [57] centers are the dominant and thermally stable defects commonly observed with a highest concentration ((0.2-3)×1013 cm-3) in all the as-grown epilayers. In the lower half of the bandgap, the HK2 (EV + 0.84 eV), HK3 (EV + 1.24 eV), and HK4 (EV + 1.44 eV) [59] are dominant deep levels, though the HS2 center (EV + 0.4 eV) becomes dominant in irradiated

Conduction Band

Z1/2

Ec

EH6/7

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-ET

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Valence BandEv

Detected in n-type

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(eV

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HK4 (P1)

HK2

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UT1

Figure 10. Energy levels of major deep levels observed in as-grown n-type and p-type 4H-SiC epilayers.


and annealed SiC [60]. When the samples were annealed at high temperature in the range from 1300oC to 1700oC, both the Z1/2 and EH6/7 centers are very stable but hole traps (HK2, HK3, and HK4) are almost annealed out at 1450-1550oC [59]. It should be noted that the Z1/2 and EH6/7 centers are generated with a high concentration (1014 - 1015 cm-3) by ion implantation [61] and/or dry etching [62]. Thus, the Z1/2 and EH6/7 centers are very important deep levels in fabrication of SiC devices. Storasta et al. and the authors have reported that the concentrations of both the Z1/2 and EH6/7 centers increased by irradiation of low-energy (116-200 keV) electrons, by which only carbon atoms are displaced [58,63]. Although the microscopic structure of these defect centers are still unknown, the involvement of a carbon vacancy has been suggested. The following experimental facts have been found: 1) Both centers are generated via low-energy electron irradiation, by which

only carbon atoms are displaced, and no thermal treatment after the irradiation is required to form the defect centers [58,63].

2) The concentrations of the defect centers are almost in proportion to the electron fluence, and the defect concentration can exceed that of any impurities in SiC epilayers, indicating exclusion of impurity involvement [63].

3) The extremely high thermal stability suggests exclusion of carbon-interstitial-related defects.

4) In as-grown epilayers, the concentrations of both defects significantly increase when the epilayer is grown under Si-rich condition, and decrease under C-rich condition [64].

5) The elimination process of these defects described below is consistent with the hypothesis that both defects are carbon-vacancy-related.

6) In as-grown, electron-irradiated, and annealed n-type 4H-SiC, the EH6/7 concentration is close to the Z1/2 concentration for almost all the samples in a very wide range of defect concentration (1011~1015 cm-3). Therefore, the Z1/2 and EH6/7 centers may be attributed to different charge states of the same point defect, or at least, may contain a same intrinsic defect, most likely carbon vacancy [58].

In recent years, the Z1/2 center has been identified as a major carrier-lifetime killer in n-type 4H-SiC, as described in the next subsection [65,66]. Thus, it is very important to control the concentration of Z1/2 center for obtaining an optimal carrier lifetime in fabrication of SiC bipolar devices. One effective way to reduce the Z1/2 concentration is the increased C/Si ratio during CVD growth or by decreasing growth temperature [67]. However,


these growth parameters should be carefully optimized, because the good morphology and low density of extended defects must be maintained. Storasta et al. reported that the Z1/2 center can be eliminated by C+

implantation and subsequent annealing at 1600-1800oC [68,69]. They speculated that C interstitials generated by implantation may diffuse and recombine with C vacancies, which is most likely an origin of the Z1/2 center. The authors discovered that both the Z1/2 and EH6/7 centers can be completely eliminated (< 1×1011 cm-3) by thermal oxidation [70,71]. Fig.11(a) depicts the DLTS spectra taken from an n-type 4H-SiC epilayer before and after thermal oxidation at 1300oC for 5 h. The Z1/2 and EH6/7 centers are dominant with a trap concentration of 3×1012 cm-3 in the as-grown epilayer, but both the DLTS peaks disappeared after the oxidation. The depth profiles of the Z1/2 concentration before and after oxidation are shown in Fig.11(b). The Z1/2 center is eliminated in the 9 μm-, 21 μm-, and 47 μm-deep regions from the surface after oxidation for 10 min, 1 h, and 5 h, respectively. In thermal oxidation of SiC, Hijikata et al. reported that a Si-and-C emission model can well simulate the experimental oxidation rate of SiC [72]. Therefore, the authors suggest that the C interstitials emitted from the SiO2/SiC interface may diffuse into the bulk region of the epilayer during oxidation, and the C vacancies (likely related to the Z1/2 and EH6/7 centers) annihilate via recombination with the C interstitials diffused from the interface. In the DLTS spectrum from the p-type epilayer after oxidation, a large DLTS peak emerged at 355 K (not shown) [71]. From the energy level (EV + 0.78eV), this trap can be ascribed to the HK0 center [59]. The HK0 concentration is approximately 1×1013 cm-3 at a depth of 1.2-1.5 μm. The HK0

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(a) (b) Figure 11. (a) DLTS spectra of an n-type 4H-SiC epilayer before and after thermal oxidation at 1300oC for 5 h. (b) Depth profiles of the Z1/2 concentration before and after oxidation at 1300oC for 10 min, 1 h, and 5 h, respectively.


center can be completely reduced by the subsequent annealing at 1550oC for 30 min in Ar [59]. Thus, most of major deep levels in 4H-SiC can be reduced to below the detection limit (1×1011 cm-3) by the two-step thermal treatment, namely thermal oxidation followed by high-temperature (1550oC) annealing in Ar [71]. Note that the thermal oxides were removed before Ar annealing. Carrier lifetimes

A carrier lifetime is an important physical property, which determines the performance of bipolar devices, and fundamental study has been performed on carrier lifetimes in SiC [73]. In order to elucidate the quantitative correlation between the carrier lifetime and the concentrations of deep levels, lifetime mapping by μ-PCD (microwave-detected photoconductance decay) and the deep-level concentration mapping by DLTS measurements have been performed for a number of samples, and these properties on exactly the same locations were compared. For several samples, two-step thermal treatment, namely thermal oxidation at 1300oC for 5 h followed by Ar annealing at 1550oC for 30 min was performed in order to eliminate the Z1/2 (and EH6/7) center [70,71]. In μ-PCD measurements, an YLF-third harmonic generation laser (λ = 349 nm) was employed. The photon density during the excitation was (1-2)×1014 cm-2. Fig.12 depicts the inverse of the carrier lifetime vs. the concentration of the Z1/2 center measured for 50 μm-thick n-type 4H-SiC epilayers. The data denoted by closed circles are the same as those presented in a previous report [74]. The open triangles indicate the data obtained in latest experiments where the C/Si ratio was changed. By increasing the C/Si ratio from 0.8 to 1.5 during CVD, the Z1/2 concentration was reduced from 6.2×1013 cm-3 to 1.5×1012 cm-3. The open squares denote the data obtained for the samples in which the Z1/2 center was eliminated by the two-step thermal treatment. When the Z1/2 concentration is higher than (1-2)×1013 cm-3, the inverse of the carrier lifetime is proportional to the Z1/2 concentration, indicating the lifetime is governed by the Shockley-Read-Hall (SRH) recombination via the Z1/2 center. However, the correlation between the lifetime and the Z1/2 concentration is not clear when the Z1/2 concentration is in the 1011~1012 cm-3 range. Based on this result, there must exist, at least, two different recombination processes; the SRH recombination and the other recombination. Thus, the carrier lifetime (τ) is given by the following equation: 1/τ = 1/τSRH + 1/τother, (1)


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100

50 μm-thick epilayers

Figure 12. Inverse of the carrier lifetime vs. the concentration of the Z1/2 center measured for 50 μm-thick n-type 4H-SiC epilayers. The data denoted by closed circles are the same as those presented in a previous report [74]. The open triangles indicate the data obtained when the C/Si ratio was changed. The open squares denote the data obtained for the samples in which the Z1/2 center was eliminated by the two-step thermal treatment. where τSRH is the SRH lifetime governed by recombination centers, and τother is the carrier lifetime governed by other recombination processes. Here, the inverse of τSRH should be proportional to the concentration of recombination centers (1/τSRH = aNZ1/2, a: constant, NZ1/2: the concentration of the Z1/2 center), while τother can be assumed to be independent of the Z1/2 concentration. By using this model expressed by Eq. (1), the experimental data were fitted, where the τother and a are the fitting parameters. The fitted result is shown by two broken lines for 1/τSRH and 1/τother, respectively. Since the Z1/2 concentration can be increased by low-energy electron irradiation, it is rather easy to obtain the shortened carrier lifetimes with good uniformity (lifetime control) by utilizing the irradiation technique [74]. In order to clarify the influences of the surface recombination and recombination in the substrate on carrier lifetimes, numerical simulation based on a diffusion equation has been performed, detail of which is described elsewhere [75]. In the simulation, a two-layer model, namely an epilayer on a substrate, was considered, and the distribution (depth profile) of excess carrier concentration was calculated as a function of time, taking account of bulk recombination and surface recombination. By integrating the excess carrier concentration for each time step, the decay curve and the


corresponding effective lifetime were calculated. The effective lifetimes obtained from the simulated decay curves are plotted as a function of the bulk lifetime of the epilayers in Fig.13. In this simulation, the epilayer thickness was also varied as a parameter, while the surface recombination velocity was fixed to be 1000 cm/s. As shown in Fig.13, when the epilayer thickness is 50 μm and the bulk lifetime of an epilayer is shorter than 0.5 μs, the effective lifetime is nearly equal to the bulk lifetime of an epilayer (The effective lifetime is only 4-20% shorter). However, the effective lifetime shows saturation at a value of 1.8 μs for 50 μm-thick epilayers when the bulk lifetime exceeds 30 μs. At a 10 μs bulk lifetime, for example, the effective lifetime is only 1.5 μs, indicating almost detrimental underestimation. When the bulk lifetime is long, e.g. 10 μs, the effective lifetime increases with increasing the epilayer thickness, and reaches 8.5 μs for an epilayer thickness of 300 μm. If an extremely long bulk lifetime of 100 μs is achieved, an even thicker epilayer with a low surface recombination velocity is required for accurate evaluation of carrier lifetimes. On the other hand, it is very hard to obtain accurate bulk lifetimes for 10-30μm-thick epilayers, as shown in Fig.13. These results clearly indicate the impacts of carrier recombination in the substrates on the lifetime measurements.

10-1 100 101 10210-1

100

101

102

Bulk Lifetime of Epilayer (μs)

Effe

ctiv

e Li

fetim

e (μ

s)

SRV = 1000 cm/s

Wepi = 200 μm

Wepi = 100 μm

Wepi = 50 μm

Wepi = 30 μm

Wepi = 10 μm

Wepi = 300 μmτeff = τepi

τeff = 0.8τepi

Figure 13. Effective lifetimes obtained from the simulated decay curves as a function of the bulk lifetime of 4H-SiC epilayers. The experimental relationship between the measured lifetime and the bulk lifetime obtained from the data in Fig.12 (epilayer thickness Wepi = 50 μm) is also plotted. Regarding the experimental data, the same symbols as in Fig.12 are used.


If the bulk lifetimes of present n-type 4H-SiC epilayers are dominated by a Shockley-Read-Hall (SRH) recombination via the Z1/2 center, a simple relationship between the bulk lifetime (τepi =τSRH) and the Z1/2 concentration (NZ) can be established based on the results in Fig.12 (broken line) as follows: τepi [μs] = 2×1013 / NZ [cm-3]. (2) Note that this equation is valid when the Auger recombination and recombination at extended defects are less important, but it does depend neither on the epilayer thickness nor on the surface recombination velocity. The factor 2×1013 depends on the excitation intensity (injection level) and temperature. Using this equation, the bulk lifetimes in epilayers were estimated from the Z1/2 concentration. Thus, the experimental relationship between the measured lifetime and the bulk lifetime was obtained from the data shown in Fig.12. This relationship is plotted in Fig.13, considering that the measured lifetime corresponds to the effective lifetime in the simulation. Regarding the experimental data, the same symbols as in Fig.12 are used. It is natural that the effective lifetime is nearly equal to the bulk lifetime when the bulk lifetime is short, less than 1 μs, because the lifetime is indeed limited by the Z1/2 center in this region. The measured lifetimes tend to saturate at about 2 μs when the bulk lifetime is very long, being in good agreement with the result simulated for 50 μm-thick epilayers, as shown in Fig.13. Thus, the other recombination paths, which limit the measured lifetimes in 4H-SiC epilayers with low Z1/2 concentrations as indicated by a dotted line in Fig.12, may be mainly the surface recombination and fast recombination in the substrate. Since it is revealed that the recombination in a substrate greatly affects the lifetime measurements, epilayers with different thicknesses were prepared to experimentally investigate the influence of substrate recombination. N-type 4H-SiC epilayers with a thickness of 50, 98, 122 and 148 μm were grown on highly-doped substrates. The donor concentration of the epilayers was (0.9-1)×1015 cm-3. After the lifetime measurements on as-grown materials by a μ-PCD method, two-step thermal treatment, thermal oxidation at 1300oC for 5 h followed by Ar annealing at 1550oC for 30 min was performed in order to eliminate the Z1/2 (and EH6/7) center. After this defect reduction process, the lifetime measurements were repeated. Fig.14 shows the μ-PCD decay curves at room temperature obtained from a 148 μm-thick epilayer before (as-grown) and after the two-step thermal treatment [75]. For the as-grown epilayer, the measured lifetime is 0.69 μs, while the lifetime is remarkably improved to 9.5 μs after the thermal treatment owing to significant reduction of the Z1/2 center.


0 5 10 15 20101

102

103

Time (μs)

μ-P

CD

Sig

nal (

a.u.

)

4H-SiC epilayer

N0 = 1x1014 cm-2

after oxidation & Ar annealing

as-grown

Figure 14. μ-PCD decay curves at room temperature obtained from a 148 μm-thick SiC epilayer before (as-grown) and after the two-step thermal treatment. The dependence of measured lifetimes on the epilayer thickness is presented in Fig.15, where the lifetimes before and after the two-step thermal treatment are plotted by closed and open circles. In the figure, the simulated dependence of the lifetime on the epilayer thickness is also shown by dashed lines, for various bulk lifetimes of epilayers. In the simulation, the surface recombination velocity (SRV) was assumed to be 1000 cm/s. For as-grown epilayers, the measured lifetimes were almost independent of the epilayer thickness in the investigated range, and showed good agreement with the result simulated for a bulk lifetime of 0.8 μs. In the as-grown epilayers, SRH recombination via the Z1/2 center is dominant, and the impact of carrier recombination in substrates is less important. In contrast, the measured lifetimes exhibit significant increase with increasing the epilayer thickness for samples with greatly reduced Z1/2 concentration, suggesting that the dominant recombination path is changed from the SRH recombination to the recombination in the substrates for high-quality epilayers. Although it is difficult to estimate the real bulk lifetime in the epilayers after the two-step thermal treatment due to the lack of experimental SRV values, the bulk lifetime may be about 30 μs or even longer, as seen from Fig. 15. The carrier lifetime was further improved to 13.1μs by surface passivation with a nitrided oxide [76].


0 50 100 150 2000

2

4

6

8

10

Epilayer Thickness (μm)

Car

rier L

ifetim

e (μ

s)

n-type 4H-SiC epilayers

: as-grown: oxidation

+ Ar annealing

τepi = 0.8 μs

τepi = 5 μs

τepi = 10 μs

τepi = 30 μsτepi = 50 μs

0 50 100 150 2000

2

4

6

8

10

Epilayer Thickness (μm)

Car

rier L

ifetim

e (μ

s)

n-type 4H-SiC epilayers

: as-grown: oxidation

+ Ar annealing

τepi = 0.8 μs

τepi = 5 μs

τepi = 10 μs

τepi = 30 μsτepi = 50 μs

Figure 15. Dependence of measured lifetimes on the SiC epilayer thickness. The lifetimes before and after the two-step thermal treatment are plotted by closed and open circles, respectively. The simulated dependence of the lifetime on the epilayer thickness is also shown by dashed lines, for various bulk lifetimes of epilayers. Summary Through reduction of homogenous nucleation of Si clusters by low-pressure (4.6 kPa) chemical vapor deposition, the growth rate of 4H-SiC homoepitaxy was increased to 85 μm/h while keeping very good morphology. The net donor concentration of unintentionally doped epilayers is 5×1013 cm-3 or less. In photoluminescence measurements at 4 K, free exciton peaks were dominant from lightly-doped thick epilayers, and impurity- or defect-related luminescence peaks were hardly observed. The extended defects and deep levels generated in 4H-SiC epilayers were reviewed. Threading and basal plane dislocations can be nondestructively detected by photoluminescence mapping at room temperature. Conversion of basal plane dislocations to threading edge dislocations can be enhanced by several techniques such as appropriate surface etching prior to CVD growth and fast epitaxy. In fast epitaxial growth (> 50 μm/h), three types of in-grown SFs, (4,4), (5,3), and (6,2) structures, have been revealed in epilayers with a density of 0.5-5 cm-2. One-to-one correlation between three types of major in-grown SFs and PL spectra was established. All the major deep levels present in as-grown n- and p-type 4H-SiC epilayers were summarized. The Z1/2 center, origin of which may be a carbon vacancy, was identified as the


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