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Registers and Counters

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Page 1: 6 Registers

Registers and Counters

Page 2: 6 Registers

Last Lecture

Last time we looked at: latches flip flops We saw that these devices hold

a value depending on their inputs.

A data input value is loaded into the register on the rise of the clock edge.

Some circuits have additional ~clear or ~reset inputs.

DC

QQ

Positive edge-triggered flip-flop

C D Q0 01 1? Qn

Page 3: 6 Registers

Registers from Latches

Often want to read a group of data inputs into a set of latches at the same time (e.g. reading a 4 bit value off a computer bus)

A group of latches can be combined to form a register

A 4 bit register can be made from 4 latches

Page 4: 6 Registers

Four bit Register

D

C

Q

D

C

Q

D

C

Q

D

C

Q

D0

D1

D2

D3

Q0

Q1

Q2

Q3

clk

D0

D1

D2

D3

Q0

Q1

Q2

Q3clk

SymbolCircuit

Page 5: 6 Registers

Shift Registers Allow stored data to be moved from one bit position to

another

D

C

Q D

C

QD

C

Q D

C

QDa

Qa Qb Qc Qd

A B C D

Qa Qb Qc Qd

0 0 1 01 0 0 11 1 0 00 1 1 00 0 1 10 0 0 1

Da =1: Initial Valuesafter clock 1after clock 2

Da = 0: after clock 3after clock 4after clock 5

Page 6: 6 Registers

Shift Registers

Points to note: At every clock pulse, the first flip flop is loaded with the

value of the data in stream The data that was in this flip flop is then loaded into the

second and so on. The data can be taken out of the last flip flop in serial

form or it can be taken from all outputs at the same time – parallel form.

Page 7: 6 Registers

Shift RegistersFor each flip flop there is a delay between clock pulse and output. This delay provides time for the next flip flop in the chain to load the data from the previous stage.

DC

Q DC

QDC

Q DC

QDa

Qa Qb Qc Qd

A B C D

data

clock

Qa

Qb

etc

Page 8: 6 Registers

Shift Registers Shift registers can also be loaded using parallel input

lines Therefore inputs can be parallel or serial Outputs can be parallel or serial Functions that shift registers can carry out include:

Serial Loading Serial Output Parallel Output Parallel Loading

This makes them suitable for a wide variety of tasks

Page 9: 6 Registers

Shift Registers

A large variety of integrated circuit (IC) shift registers are available with various combinations of serial and/or parallel input serial and/or parallel output shift left and/or shift right

Applications include: Converting a parallel word into serial form or vise versa performing a number of logical and arithmetic operations (binary

multiplication/division involves shifting).

Page 10: 6 Registers

Registers Timing characteristics for edge-triggered registers

propagation delay (tpd) defined as the time between the clock edge and the output changing

Set-up (tsetup) and hold (thold) times are the times which the data must be held steady before and after the clock edge

D

tpd

tset-up thold

C

Qinvalid

Page 11: 6 Registers

Counters Counters may be clocked by:

regular clock pulses to determine a certain time duration random pulses to count the occurrences of a particular event

Most common counters count natural binary sequenceup down

counter counter000 111001 110010 101011 100100 011101 010110 001111 000000 111... ...

Page 12: 6 Registers

JK Flip flop - recallA JK flip flop toggles when both inputs are 1. In this case it effectively counts every second clock pulse:

Sometimes called a “scale of 2 counter”

1

J

K

clock

Q

~Q

clock

Q

You can also say it counts from 0 to 1 and back again.

Page 13: 6 Registers

Counters Connect two such flip flops together:

1

clock

Q1 Q21

clock

Q1

Q2

Outputs Q1 and Q2

cycle.

Q2Q1: 00 01 10 11 00

Complete the timing diagram for Q2

Page 14: 6 Registers

Counters Ripple (asynchronous) Counter

e.g. A 3 bit ripple counter using negative edge triggered JK flip-flops

Asynchronous means each flip flop is triggered by the preceding one.

J

K

Q

Q

J

K

Q

Q

J

K

Q

Q

1

1

1

1

1

1

clk

Qa Qb Qc

Page 15: 6 Registers

Counters

These propagation delays cause a number of sequence changes when going from one number to the next, which can be undesirable in a lot of situations.

The counter can get the wrong value at a particular instant in time

Operating speed is therefore limited.

100 200

C

Qa

Qb

Qc

011

010

000

100

Page 16: 6 Registers

Counters Synchronous counters

Outputs of all the flip-flops change at the same time

e.g. a 2-bit synchronous counter

J

K

Q

Q

1

1

J

K

Q

Q

clk

QaQb

C0

1

Qa 0

1

0

1

00 01 10 11 00 01

Qb

Page 17: 6 Registers

Counters Synchronous counters

Does this extend to a three bit counter?

Qc should not toggle until both Qa and Qb are 1

J

K

Q

Q

1

1

J

K

Q

Q

clk

QaQb

J

K

Q

Q

Qc?

Page 18: 6 Registers

Counters Synchronous counters

e.g. A three bit counter

e.g. A four bit counter

J

K

Q

Q

1

1

J

K

Q

Q

clk

QaQb

J

K

Q

Q

Qc

J

K

Q

Q

1

1

J

K

Q

Q

clk

QaQb

J

K

Q

Q

Qc

J

K

Q

Q

Qd

Page 19: 6 Registers

Counters An integrated circuit counter

Many forms of counters available as integrated circuits

e.g. 74163 - four bit synchronous binary up counter

Clock: count advanced by 1 on Clear: when = 0 count reset to 0 on next

clk Load: when = 0 count set to values on A-D

on next clk Enable T & P: Counting disabled when

either is equal 0 Qa, Qb,Qc,Qd: state of the counter Ripple Carry output : = 1 when count =

1111 otherwise 0

Clear

clk A B C DEnable

P

Load

Qa Qb Qc QdRippleCarryOutput

TEnable

1 2 3 4 5 6 7 8

910111213141516

clk A B C D EnableP

GNDClear

Qa Qb Qc Qd

RippleCarryOutput

TEnable LoadVcc

Page 20: 6 Registers

QaQbQcQd

clkTP

carry163-1

QaQbQcQd

clkTP

carry163-2

Counters An integrated circuit counter

In many cases more than 16 states required for counting

counters like 163 can be cascaded to form larger counters

QaQbQcQd

clkTP

carry163-3

Page 21: 6 Registers

Counters Modulo-n counters

A modulo-n counter generates n states before it repeats itself e.g. a 2 bit count is modulo 4 and a 4 bit counter is modulo 16 Often a counter which has a modulo that is not a power of 2 is

required e.g. modulo 12

Counts from 4 through to 15 before being set to 4 again

Counts from 0 through to 11 before being reset

QaQbQcQd

clkcarry

load

clear

ABCD

1

1 0 00

QaQbQcQd

clkload

clear

1

Page 22: 6 Registers

Counters Frequency division

Binary counters offer the possibility of frequency division

Often used where clocks of different frequencies are required in a circuit or to produce a compact accurate low frequency oscillator (e.g. an oscillator for a digital watch)

C0

1

Qa 0

1

0

1

Qb

f

1/2f

1/4f

Page 23: 6 Registers

Registers/Shift registers and Counters Summary

Registers consist of a group of D-type latches or flip-flops which are clocked simultaneously to store a binary word set-up and hold times must be observed

Shift registers allow data to be moved from one bit position to another used for parallelserial conversion and some types of arthmetic

operations Counting is a common requirement in sequential logic circuits

Counters can be asynchronous or synchronous Many IC packages exist which implement counters

Page 24: 6 Registers

What you should be able to do

Explain the operation of a register Explain the propagation delays associated with

registers Outline the use of registers for converting

serial/parallel inputs/outputs. Explain the operation of ripple (asynchronous

counters) Explain the operation of synchronous counters Outline the characteristics of modulo n counters.