6.002 circuits and electronics final exam december 15,...

MASSACHUSETTS INSTITUTE OF TECHNOLOGY

DEPARTMENT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE

6.002 Circuits and Electronics Final Exam December 15, 2004

YOUR NAME__________________________________________________________ Recitation Instructor / TA ________________________________________________ General Instructions:

1. Please verify that there are 22 pages in your exam booklet. 2. Please do all of your work in the spaces provided in this examination

booklet. In particular, try to do your work for each question within the boundaries of the question, or on the back side of the page preceding the question. Extra pages are also available at the end of the booklet. Place the answer to each question within the appropriate answer box.

3. You may use three double-sided pages of notes and a calculator while

taking this exam. For examiner’s use only: Part 1 2A 2B 3 4A 4B Score

Part 5A 5B 6 7A 7B 7C Score

TOTAL SCORE___________________

6.002 Circuits and Electronics Fall 2004 Final Exam Name:_______________________________

Problem 1 (10 Points) Figure 1 shows a simplified small-signal model of a transistor amplifier driven from a non-ideal source. Find a Thévenin equivalent model of the amplifier system viewed from the vD, iD port. (That is, find the Thévenin voltage and resistance VTH, RTH that characterize the system.)

Figure 1

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VTH = RTH =


Problem 2 (10 Points) Figure 2 shows a circuit implementing a logic function with the convention that a high voltage level denotes a Boolean 1 and a low voltage level denotes a Boolean 0.

Figure 2

(2A) Write a logic expression relating the output Z to the inputs A, B, C, D and E.

Z =

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(2B) The DeForest Logic Corp. finds a copy of Fig. 2, and – following a long tradition of copying others’ circuits – decides to use the circuit, with values RL = 9 kΩ and VS = 10 V. Figure 3 shows a model for the particular transistor they select to implement the logic function of Fig. 2, where the transistors have VT = 2.7 V and RON = 1 kΩ. The static discipline imposed by DeForest’s customers is VOL = 2 V, VOH = 5 V, VIL = 2.5 V, VIH = 4.5 V. Does the selected circuit implementation meet this static discipline? Justify your answer.

Figure 3

Is the static discipline satisfied? Justification?

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Problem 3 (10 Points) Assume that the network in Figure 4 is operating in the sinusoidal steady state. Determine the response vOUT (t) to the input voltage vIN (t) = VSI cos(ωs t). Note that vOUT (t) will take the form vOUT (t) = VSO (ωs) cos(ωs t + φ(ωs) ).

Figure 4

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vOUT (t) =

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Problem 4 (15 Points) In the circuit of Figure 5, switch S1 has been closed for a long time before t = 0, and switch S2 has been open for a long time before t = 0. At t = 0, switch S1 opens and switch S2 closes.

Figure 5

(4A) Find iL and diL/dt at t = 0+. Your written work should justify your answers, and you should provide appropriate units with your answers.

+

=

=

+)(

)0(

0dtdi

i

L

L

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(4B) Find iL(t) for t ≥ 0.

iL (t) =

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Problem 5 (15 Points) This problem concerns the MOSFET inverter circuit of Figure 6. When operating in the saturation region (vGS > VT and vDS ≥ vGS – VT) the MOSFET has the characteristic:

2)(2 TGSDS VvKi −=

The circuit parameters are Vs = 8 V, RD = 1 kΩ, K = 1 mA/V2, VT = 1 V.

Figure 6 (5A) Find the dc bias input voltage VI that yields a dc operating point output voltage VOUT = 4 V.

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VI =

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(5B) A small-signal model for the MOSFET in the amplifier circuit is shown in Fig. 7 below. Determine the value of the input bias voltage VI such that gm = 2 mA / V.

Figure 7

VI =

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Problem 6 (20 Points) The following circuits are driven by a sinusoidal source in the steady state. On the next pages in Figs. 8 and 9, there are six sketches (A-F) of magnitudes (on log-log graphs) and six sketches (G-L) of phase (on linear-log graphs) for possible transfer functions H(jω) = Vo(jω)/Vi(jω). For each circuit, circle the letters of the magnitude and phase plots which could represent the behavior of that circuit.

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Transfer Function Magnitudes: Note: The horizontal axes in these sketches indicate zero on a log scale. You are looking for the correct approximate shape of the plot; do not worry about the frequency scale along the horizontal axes. The vertical scales may differ among sketches.

Figure 8

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Transfer Function Phases: Note: The horizontal axes in these sketches indicate zero phase angles. You are looking for the correct approximate shape of the plot; do not worry about the frequency scale along the horizontal axes. The vertical scales may differ among sketches. Also, recall that one may shift phase angles by multiples of 360° without changing the result.

Figure 9

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(This page left blank for work – EXAM CONTINUES NEXT PAGE)

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Problem 7 (20 Points) (7A) Figure 10 shows a widely-used amplifier configuration incorporating an operational amplifier. Find an expression for the output voltage vo in terms of the input voltages vA and vB, assuming that the op amp is ideal.

-

+R1

R2

R2R1

vB

vA

vo

Figure 10

vo(t) =

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(7B) Figure 11 shows an operational amplifier circuit incorporating a nonlinear resistor “B”. For the operating range of interest we will model the i-v characteristic of the nonlinear resistor as:

( ) 3/1BB vki ⋅= .

Find the relationship between the output voltage vO and the input voltage vI for this circuit, assuming that the op amp is ideal and the nonlinear resistor acts as modeled above.

Figure 11

vo(t) =

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(7C) Assume the input voltage vI in Fig. 11 is composed of a large positive dc term VI plus a small ac term vi. Find the small-signal gain of the circuit as a function of VI, R, and k. (That is, vI = VI + vi and vO = VO + vo. Find the gain from the small variations vi in vI to the resulting small variations vo in vO.)

vo/vi =

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(Page for extra work)

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6.002 circuits and electronics final exam december 15,...

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