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R V COLLEGE OF ENGINEERING, BANGALORE – 560 059 (AUTONOMOUS INSTITUTION UNDER VTU, BELGAUM) VII SEMESTER ELECTRONICS & COMMUNICATION ENGINEERING SCHEME OF TEACHING AND EXAMINATION SI. N0 SUB- CODE TITLE BOS TEACHING SCHEME EXAM CREDITS THEORY TUTOR PRACTICAL 1 07EC71 COMPUTER COMMUNICATION NETWORKS EC 3 1 3 5 2 07EC72 OPTICAL FIBER COMMUNICATION EC 4 - - 4 3 07EC73 ANALOG AND MIXED MODE VLSI EC 3 - - 3 4 07 EC74X ELECTIVE-D * EC 4 - - 4 5 07EC75X ELECTIVE-E ** EC 4 - - 4 6 07EC76X ELECTIVE-F *** EC 3 - 3 7 07EC77L MINI PROJECT EC - - 6 3 TOTAL 21 1 9 26 * ELECTIVE-I(GROUP – D) * *ELECTIVE-II(GROUP – E) 07ECD741 BROAD BAND COMMUNICATION 07ECE751 LOW POWER VLSI DESIGN 07ECD742 CAD TOOLS FOR VLSI 07ECE752 REAL TIME EMBEDDED SYSTEMS 07ECD743 ARM PROCESSOR 07ECE753 MULTI MEDIA COMMUNICATIONS 07ECD744 ADAPTIVE SIGNAL PROCESSING 07ECE754 SATELLITE COMMUNICATION *** ELECTIVE-III(GROUP – F) 07ECF761 INDUSTRIAL INFORMATICS 07ECF762 MIMO SYSTEMS 07ECF763 RADAR AND NAVIGATIONAL AIDS 07ECF764 ATM NETWORKS VIII SEMESTER ELECTRONICS & COMMUNICATION ENGINEERING SCHEME OF TEACHING AND EXAMINATION 1

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Page 1: 7th+&+8th+Sem+Syllabus Copy

R V COLLEGE OF ENGINEERING, BANGALORE – 560 059(AUTONOMOUS INSTITUTION UNDER VTU, BELGAUM)

VII SEMESTER ELECTRONICS & COMMUNICATION ENGINEERING

SCHEME OF TEACHING AND EXAMINATION

SI.N0

SUB-CODE

TITLE BOS TEACHING SCHEMEEXAM

CREDITS

THEORY TUTOR PRACTICAL

1 07EC71COMPUTER COMMUNICATION NETWORKS

EC 3 1 3 5

2 07EC72OPTICAL FIBER COMMUNICATION

EC 4 - - 4

3 07EC73ANALOG AND MIXED MODE VLSI

EC 3 - - 3

4 07 EC74X ELECTIVE-D * EC 4 - - 4

5 07EC75X ELECTIVE-E ** EC 4 - - 4

6 07EC76X ELECTIVE-F *** EC 3 - 3

7 07EC77L MINI PROJECT EC - - 6 3

TOTAL 21 1 9 26

* ELECTIVE-I(GROUP – D) * *ELECTIVE-II(GROUP – E)

07ECD741BROAD BAND COMMUNICATION

07ECE751 LOW POWER VLSI DESIGN

07ECD742 CAD TOOLS FOR VLSI 07ECE752 REAL TIME EMBEDDED SYSTEMS

07ECD743 ARM PROCESSOR 07ECE753 MULTI MEDIA COMMUNICATIONS

07ECD744ADAPTIVE SIGNAL PROCESSING

07ECE754 SATELLITE COMMUNICATION

*** ELECTIVE-III(GROUP – F)07ECF761 INDUSTRIAL INFORMATICS07ECF762 MIMO SYSTEMS07ECF763 RADAR AND NAVIGATIONAL AIDS07ECF764 ATM NETWORKS

VIII SEMESTER ELECTRONICS & COMMUNICATION ENGINEERING

SCHEME OF TEACHING AND EXAMINATION

1

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R V COLLEGE OF ENGINEERING, BANGALORE – 560 059(AUTONOMOUS INSTITUTION UNDER VTU, BELGAUM)

***Each elective group should contain 4 subjects with equal credits*- Total Marks = 50% of IA+50% of Main ExamInternal Assessment –Best 2 out of 3 with maximum marks 100 each, duration 90 minutesMain Exam duration is 3 hours

HSS: Humanities & Social ScienceEC: Electronics and Communication

INTER DEPARTMENTAL ELECTIVES

2

SL. NO.

SUB-CODE

TITLE Boos TEACHING SCHEMEEXAM

CREDITS

THEORY TUTOR PRACTICAL

1 07HSS81INTELLECTUAL PROPERTY RIGHTS

HSS 2 - - 2

2 07HSS82HUMAN SKILLS & SOCIAL SERVICE

EC - 4 2

3 07EC83 SEMINAR EC - 3 2

4 07ECP84 PROJECT WORK EC - - 20 12

5 07G8XX ELECTIVE G* ALL 4 - - 4

TOTAL 6 - 27 22

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R V COLLEGE OF ENGINEERING, BANGALORE – 560 059(AUTONOMOUS INSTITUTION UNDER VTU, BELGAUM)

1. INDUSTRIAL ROBOTICS (Offered by Mechanical Engineering department ,not for Mechanical Engineering students)

2. BIOINFORMATICS (Offered by Bio Technology department ,not for Bio Technology students)

3. INFORMATION SECURITY (Offered by Computer Science and Engineering department ,not for CSE students)

4. RENEWABLE ENERGY SOURCES (Offered by Electrical and electronics Department ,not for EEE students)

5. EMBEDDED SYSTEMS (Offered by Electronics and Communication Engineering Students,not for ECE students)

6. NUCLEAR AND RADIATION TECHNIQUES FOR ENGINEERING APPLICATIONS (Offered by Physics department for all branch students)

7. GEOINFORMATICS (Offered by Civil Engineering Department ,not for Civil students)

8. MANAGEMENT PRACTICES FOR BUSINESS EXCELLENCE (Offered by IEM department ,not for IEM students)

9. SPACE TECHNOLOGY AND APPLICATIONS (Offered by Telecommunication Department ,not for TCE students)

10. VIRTUAL INSTRUMENTATION (Offered by Instrumentation Department ,not for IT students)

COMPUTER COMMUNICATION NETWORKS

Sub code : 07EC71 CIE marks : 100Hrs / week : 3+1+3 SEE marks : 100

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R V COLLEGE OF ENGINEERING, BANGALORE – 560 059(AUTONOMOUS INSTITUTION UNDER VTU, BELGAUM)

Credits : 5 Exam hrs : 3+3

OBJECTIVES: To understand the basic principles of data communications and computer networks. To appreciate the complex trade-offs that are inherent in the design of networks. To have an in-depth knowledge of network technologies from the lowest levels of data transmission up to network applications. To learn about current networking technologies, especially Internet protocols.

PART- A

1. INTRODUCTIONStudy of Data Communication: Data communication, components Networks: Distributed processing, Network criteria, Applications. Protocols and Standards: Protocols, Standards Standard Organization: Standard creation Committee, Forums, Regulatory Agencies. Line Configuration: Point-to-point, Multipoint Topologies: Mesh, Star, Tree, Bus, Ring, Hybrid Transmission mode: Simplex, Half duplex, full duplex. Categories of Networks: Local Area Networks, Metropolitan Area Networks, Wide Area Networks, Wireless Networks. Internet works.Ref 2: Chapter 1:1.1., 1.2, 1.3, 1.4, 1.5 Chapter 2: 2.1, 2.2, 2.3, 2.4, 2.5 05 Hrs

2. REFERENCE MODELSThe OSI Model: The Model, Functions of the Layers, The TCP/IP reference model, a comparison of the OSI & TCP/IP Reference models. Ref 1: Chapter 1: 1.4.2, 1.4.3, Ref 2: Chapter 3: 3.1, 3.2 04 Hrs

3. THE PHYSICAL LAYERTransmission Media Guided Media: Twisted pair cable, Co-axial Cable, Optical Fiber. Unguided Media: Radio Frequency Allocation, Propagation of Radio Waves, Terrestrial Microwave, Satellite Communication, Cellular Telephone. Transmission Impairments: Attenuation, Distortion, Noise. Performance & Comparison Shannon Capacity. Multiplexing: FDM, WDM, TDM Multiplexing Applications: The Telephone system, Digital Subscriber Line Switching Ref 1: Chapter 2:2.5.5Ref 2:Chapter 7 7.1,7.2,7.3,7.4,7.6,7.7 Chapter 8: 8.1, 8.2,8.3,8.4,8.5,8.6 04 Hrs

4. THE DATA LINK LAYERData Link Layer Design Issues: Services provided to Network layer, Framing, Error Control, Flow Control, and Error Detecting Codes. Elementary Data Link Protocols: An unrestricted Simplex Protocol, A simplex stop And wait protocol, A Protocol For Noisy channel Sliding Window Protocols: A 1 bit sliding window protocol, A Protocol using Go Back N,A protocol using selective repeat. HDLC, Data Link Layer in the Internet.Ref 1: Chapter 3:3.1, 3.2.2, 3.3, 3.4 05 Hrs

5. MEDIUM ACCESS CONTROL SUB LAYERMultiple Access Protocols: ALOHA, Carrier Sense Multiple Access Protocols, Wireless LAN Protocols. Ethernet: Ethernet Cabling, Manchester Encoding, The Ethernet MAC Sub layer Protocol, The Binary Exponential Back off Algorithm, Ethernet performance, Switched Ethernet, Fast Ethernet, Gigabit Ethernet, IEEE 802.2: Logical Link Control. Wireless LANs: The 802.11 MAC Sub layer Protocol, The 802.11 Physical layer, The 802.11 MAC Sub layer Protocol, The 802.11 Frame Structure, and Services. Bluetooth: Bluetooth architecture, Bluetooth applications. Data Link Layer Switching: Local Internet working, Repeaters, Hubs, Bridges, Switches, Routers, and Gateways, Virtual LANS. Ref 1: Chapter 4: 4.1 to 4.7.6 06 Hrs

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R V COLLEGE OF ENGINEERING, BANGALORE – 560 059(AUTONOMOUS INSTITUTION UNDER VTU, BELGAUM)

PART- B6. THE NETWORK LAYERNetwork Layer Design Issues: Store-and-Forward Packet Switching, Services provided to the Transport layer, Implementation of Connectionless Service, Implementation of Connection Oriented Service, Comparison of Virtual Circuit and Datagram Subnets. Routing Algorithms: The Optimality Principle, Routing and routing algorithms, Congestion control and related algorithms, internetworking, Network Layer in Internet: The IP Protocol, IP Address Formats, Ipv6 header Format.Ref 1: Chapter 5: 5.1, 5.2.1 to 5.2.7 (except 5.2.3), 5.3.1 to 5.3.4, 5.4.1 & 5.4.2, 5.5.1 & 5.5.2, 5.6.1 & 5.6.8 04Hrs

7. THE TRANSPORT LAYERThe Transport Service: Services Provided to the Upper Layers, Transport Service Primitives. Elements Of Transport Protocols: Addressing, connection Establishment, Connection Release, Flow Control and Buffering, Multiplexing, Crash Recovery. The Internet Transport Protocols: UDP: Header Format. The Internet Transport Protocols: TCP: Introduction to TCP, the TCP Service Model, The TCP Protocol, The TCP Segment Header, TCP Connection Establishment, TCP Connection Release. Ref 1: Chapter 6: 6.1.1 & 6.1.2, 6.2, 6.4.1, 6.5.1 to 6.5.6 04Hrs

8. THE APPLICATION LAYERDNS-The Domain Name System: The DNS Name Space, Name Serves. Electronic Mail: Architecture and Services, the User Agent, Message Transfer, SMPT. The World Wide Web: Architectural Overview, Client side, Server Side.Ref 1: Chapter 7: 7.1.1 & 7.1.3, 7.2.1, 7.2.2 & 7.2.4, 7.3.1 04 Hrs

9. NETWORK SECURITY: Cryptography Principles, Secret Key & Public Key Algorithms, Authentication Protocols, Digital Signatures, Communication Security, E-Mail Security, Web SecurityRef 1: Chapter 8: 8.1, 8.2, 8.3, 8.4, 8.6, 8.7, 8.8, 8.9 02 Hrs

REFERENCE BOOKS:1. Andrew Tanenbaum, “Computer Networks”, Pearson Education/PHI, 4 Ed., 20032. Behrouz A Fourzan, “Data Communications and Networking”, McGrawHill, 2Ed.,

20043. William Stallings, “Data and Computer Communication”- Pearson Education,

Asia, 5 Ed.19964. A Shanmugam & S.Rajeev. “ISTE learning material: Computer Communication

and Networks”. 2006

OUTCOME: After studying this course, the student will be able to design the protocols/algorithms of various network layers and analyze the performance. For example, he/she will be able to design and implement TCP/IP Protocols, MAC and PHY layer algorithms. Student will get a fair idea of network security aspects as well. The student will be capable of conducting research in both theoretical and practical aspects.

PRACTICALS

LIST OF EXPERIMENTS1. Bit Stuffing & character stuffing2. Cyclic Redundancy Check

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R V COLLEGE OF ENGINEERING, BANGALORE – 560 059(AUTONOMOUS INSTITUTION UNDER VTU, BELGAUM)

3. Encryption and Decryption using substitution and transposition ciphers4. Minimum Spanning Tree5. Study Asynchronous and synchronous communication using RS232/optical fiber

and twisted pair.FOLLOWING EXPERIMENTS CAN BE CARRIED OUT IN CONJUNCTION WITH NETSIM.

6. Study the performance of CSMA/CD protocol 7. Study the performance of network with CSMA/CA protocol and compare with

CSMA/CD protocols8. Implementation of Link State routing algorithm9. Socket Programming: Transfer of files from PC to PC using Windows socket

processing10. Implementation and study of Go back N and Selective repeat protocols11. Implementation and study of Stop and Wait Protocol12. Implementation of Distance Vector routing algorithm

SCHEME OF SEMESTER END EVALUATION:THEORY:THREE out of FIVE from PART A and TWO out of THREE from PART B

Practical: Students have to conduct experiments as per the questions from the question bank.

OPTICAL FIBER COMMUNICATION

Sub code : 07EC72 CIE marks : 100Hrs / week : 4+0+0 SEE marks : 100Credits : 4 Exam hrs : 3

OBJECTIVES: Competency with the mathematical tools necessary for the analysis of optical waveguides, including ray optics and modal analysis. The ability to calculate the power budget based on attenuation and dispersion in advanced optical systems. An understanding of the theory of optical sources including light-emitting diodes and laser diodes, and the methods for using these devices in optical fiber communication systems. An understanding of the theory of optical detectors including APDs and PINs, and the methods for using these devices in optical fiber communication systems. Understanding the principles and methods for selecting appropriate sources, detectors, optical fibers for various networking applications. Understanding the principles and methods for constructing optical fiber communication systems, including techniques to increase the data rate and decrease transmission impairments. PART- A

1. OVERVIEW OF OPTICAL FIBER COMMUNICATIONSMotivations for Light wave Communications, Optical Spectral Bands, Fundamental Data Communication Concepts, Network Information Rates, WDM Concepts, Key Elements of Optical Fiber, and Standards for Optical Fiber Communications

04 Hrs2. OPTICAL FIBERS: STRUCTURES, WAVEGUIDING, AND FABRICATIONThe Nature of Light , Basic Optical Laws and Definitions, Optical Fiber Modes and Configurations , Mode Theory for Circular Waveguides , Single-mode Fibers , Graded-index Fiber Structure , Fiber Materials, Photonic Crystal Fibers, Fiber Fabrication , Mechanical Properties of Fibers , Fiber Optic Cables

06 Hrs

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R V COLLEGE OF ENGINEERING, BANGALORE – 560 059(AUTONOMOUS INSTITUTION UNDER VTU, BELGAUM)

3. SIGNAL DEGRADATION IN OPTICAL FIBERS Attenuation, Signal Distortion in Fibers, Characteristics of Single-Mode Fibers, International Standards, Specialty Fibers

04 Hrs4. OPTICAL SOURCES Topics from Semiconductor Physics, Light-Emitting Diodes (LEDs), Laser Diodes, Line Coding, Light Source Linearity, Reliability Considerations

04 Hrs5 POWER LAUNCHING AND COUPLINGSource-to-Fiber Power Launching , Lensing Schemes for Coupling Improvement , Fiber-to-Fiber Joints , LED Coupling to Single-Mode Fibers , Fiber Splicing, Optical Fiber Connectors

04 Hrs

6. PHOTODETECTORS Physical Principles of Photodiodes , Photodetector Noise , Detector Response Time , Avalanche Multiplication Noise , Structures for InGaAs Apds , Temperature Effect on Avalanche Gain , Comparisons of Photodetectors

06 Hrs

7.OPTICAL RECEIVER OPERATION Fundamental Receiver Operation, Digital Receiver Performance , Eye Diagrams , Coherent Detection, Burst-Mode Receivers , Analog Receivers 02 Hrs PART- B

8.DIGITAL AND ANALOG LINKSPoint-to-Point Links, Power Penalties, Error Control, Overview of Analog Links Carrier-to-Noise Ratio, Multichannel Transmission Techniques, RF over Fiber Radio-over-Fiber Links, Microwave Photonics

04 Hrs

9.WDM CONCEPTS AND COMPONENTS Overview of WDM, , Passive Optical Couplers , Isolators and Circulators , Fiber Grating Filters Dielectric Thin-Film Filters, Phased-Array-Based Devices , Diffraction Gratings , Active Optical Components , Tunable Light Sources

04 Hrs

10. OPTICAL AMPLIFIERS Basic Applications and Types of Optical Amplifiers, Semiconductor Optical Amplifiers Erbium-Doped Fiber Amplifiers , Amplifier Noise , Optical SNR , System Applications Raman Amplifiers, Wideband Optical Amplifiers

04 Hrs

11. NONLINEAR EFFECTS General Overview of Nonlinearities , Effective Length and Area , Stimulated Raman Scattering Stimulated Brillouin Scattering , Self-Phase Modulation , Cross-Phase Modulation , Four-Wave mixing , FWM Mitigation , Wavelength Converters ,Solitons 04 Hrs

12. OPTICAL NETWORKS Network Concepts, Network Topologies , SONET/SDH , High-Speed Lightwave Links , Optical Add/Drop Multiplexing , Optical Switching , WDM Network Examples , Mitigation of Transmission Impairments

02 Hrs

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R V COLLEGE OF ENGINEERING, BANGALORE – 560 059(AUTONOMOUS INSTITUTION UNDER VTU, BELGAUM)

REFERENCE BOOKS:1. Gerd Keiser, "Optical Fiber Communication”, McGraw-Hill, 4th Ed., 2008.2. John M. Senior, "Optical Fiber Communications”, Pearson Education. 3rd Ed.,

2007.3. Joseph C Palais, “Fiber Optic Communication”, Pearson Education, 4th Ed. 1998

OUTCOME: The student will be in a position to learn any optical communication standard and implement the same. A thorough understanding of the principles and methods for constructing optical fiber communication systems.SCHEME OF SEMESTER END EVALUATION:THEORY:THREE out of FIVE from PART A and TWO out of THREE from PART B

DESIGN OF ANALOG & MIXED MODE VLSI CIRCUITS

Sub code : 07EC73 CIE marks : 100Hrs / week : 3+0+0 SEE marks : 100Credits : 3 Exam hrs : 3

OBJECTIVES:

Electronic systems require an analog interface with the external world and there is always a need for analog and mixed-signal circuits. Recently, it has become possible to integrate both analog and digital circuits on the same SOC. This subject deals with the analysis and design of analog CMOS integrated circuits, emphasizing fundamentals as well as new paradigms that students need to know for today's industry. The objective is to develop both a solid foundation and methods of analyzing circuits by inspection so that the student learns what approximations can be made in which circuits and how much error to expect in each approximation.

PART- A

1. INTRODUCTION TO MOS TRANSISTORS AND ANALOG FUNDAMENTALSMOS transistors, MOS I/V Characteristics, Second-Order Effects, MOS Device Models. Common source amplifier with resistive load, diode load and current source load, Source follower, Common gate amplifier, Cascode amplifier and Folded Cascode configuration, Frequency response of amplifiers. Basic Current Mirrors, Cascode Current Mirrors and Active Current Mirrors.Ref 1: Chapter 2, 3, 5 12 Hrs

2. OPERATIONAL AMPLIFIERSBasic differential amplifier ,Common-Mode Response ,Differential Pair with MOS Loads Op amp performance parameters, One-stage op amp, Two-stage op-amps, Gain Boosting, Input Range Limitations, Slew Rate, Power Supply Rejection and Noise.Ref 1: Chapter 4, 9 06 Hrs

3. CMOS PROCESSING AND ANALOG LAYOUT TECHNIQUESWafer Processing, Photolithography, Ion Implantation, Deposition, Etching, Layout Considerations, Multifinger Transistors, Reference Distribution, Passive Devices and InterconnectsRef 1: Chapter 17, 18 06 Hrs PART –B

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R V COLLEGE OF ENGINEERING, BANGALORE – 560 059(AUTONOMOUS INSTITUTION UNDER VTU, BELGAUM)

4. DATA CONVERTER FUNDAMENTALS Analog Versus Discrete Time Signals, Converting Analog Signals to Digital Signals, Sample-and-Hold Characteristics, Digital-to-Analog Converter Specifications, Analog-to-Digital Converter Specifications, Mixed-Signal Layout Issues.Ref 2: Chapter 28 04 Hrs

5. DAC ARCHITECTURES Digital Input Code, Resistor String, R-2R Ladder Networks, Current Steering, Charge Scaling DACs, Cyclic DAC, Pipeline DAC.Ref 2: Chapter 29 05 Hrs 6. ADC ARCHITECTURES Flash ADC, Two-Step Flash ADC, Pipeline ADC, Integrating ADCs, Successive Approximation ADC, Oversampling ADC. Ref 2: Chapter 29 06 Hrs

REFERENCE BOOKS:1. Behzad Razavi,“Design of Analog CMOS Integrated Circuits”, McGrawHill

Edition. 2002. 2. R. Jacob Baker, Harry W. Li and David E. Boyce, “CMOS Circuit Design, Layout,

and Simulation”, IEEE Press, 2002. 3. Phillip. E. Allen, Douglas R. Holberg, “CMOS Analog Circuit Design”, Oxford

University Press, 2nd Ed, 2002. 4. R. Jacob Baker,” CMOS Mixed Signal circuit Design”, Volume 2, IEEE Press, 2002

OUTCOME: After this course the students will be in position to design mixed signal devices like data converter and phase locked loop.

SCHEME OF SEMESTER END EVALUATION:THEORY:THREE out of FIVE from PART A and TWO out of THREE from PART B

BROAD BAND COMMUNICATIONS

Sub code : 07ECD741 CIE marks : 100Hrs / week : 4+0+0 SEE marks : 100Credits : 4 Exam hrs : 3

OBJECTIVES:

Expose undergraduate students in Electronics and Communications Engineering to the current state of the art technology in Broadband Communications. The course covers Broadband over both wireless and wireline media. The course would cover the WiFi, Wimax and DSL standards. Hardware and Software Techniques to meet the standards form a part of the course syllabus.

PART A

1. TWISTED PAIR ENVIRONMENT Full duplex systems, hybrids, cable bundles, Gauge & line characteristics, RLCG models, and propagation constant, characteristic impedance.

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R V COLLEGE OF ENGINEERING, BANGALORE – 560 059(AUTONOMOUS INSTITUTION UNDER VTU, BELGAUM)

Ref 1 : Chapter 3 , Ref 2 : Chapter 2 02 Hrs

2. LOOP IMPAIRMENTS AND ANALYSISUnbalance models, Cross talk types NEXT - FEXT, PSD of Disturbers (T1, ADSL, HDSL, ISDN) and their interference models, RFI, Impulse noise, Bridge taps, loading coils. Input impedance, transfer functions and insertion loss. ADSL and VDSL loop configurations Ref 1: Chapter 3 , Ref 2 : Chapter 3 03 Hrs

3. DSL PHYSICAL LAYER PROCESSING2B1Q, 4B3T, QAM, Multicarrier Modulation OFDM, DMT. Margin, Gap, Capacity, ADSL capacity, VDSL capacity. Capacity in the presence of crosstalk. Tone loading Algos, rate adaptation. RS codes, concatenated codes, CRC checks and scrambling in ADSL context.Equalization - Linear equalizers, Time domain eqlr, frequency domain eqlr in ADSL and VDSL context. Analog Front end, ADC, DAC, hybrids, PAR. Echo path and echo cancellation.Ref 1: Chapter 6,7Ref 2 : Chapter 4,7,11 08 Hrs

4. ADSL / ADSL2 / ADSL2+ SYSTEMADSL Reference model, ATU-C model, ATU-R model.Framing, Superframe, single latency and dual latency paths, bitswap, SRA and DRR. Initialization, Activation,gain estimation, synchronization. Channel discovery, Training, Channel analysis, exchange. Showtime processes and monitoring for bitswap and SRA.Ref 1: Chapter 8,11 Ref 2: Chapter 12 04 Hrs

5. VDSL2 SYSTEMVDSL Reference model, Framing, superframe, single latency and dual latency paths, Bitswap, SRA and DRR. Initialization, Activation, gain estimation, synchronization. Channel discovery, Training,Channel analysis, exchange. Showtime processes and monitoring for Bitswap and SRA. Power backoff, SOS. Standards G993.2

03 Hrs6. IEEE 802.11 ARCHITECTURE Basic service set, extended service set, Distribution service set. Interaction between services.Ref 4 : Chapter 2 03 Hrs

7. IEEE 802.11 MACFunctionality, frame exchange protocol, access mechanism, frame formats, frame subtypes – data, control, and managementRef 4: chapter 3 03 Hrs

8. IEEE 802.11 PHY Functionality, DSSS, FHSS, 802.11a OFDM, 802.11b, 802.11g, 802.11n.Ref 4: Chapter 11,12 04 Hrs

PART - B

9. IEEE 802.11 SECURITY MANAGEMENT AND QOS802.11X Authentication and Key management protocol AKMP, Temporary key Integrity protocol. 802.11e QOS specification. Operation, frame formats and options.

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R V COLLEGE OF ENGINEERING, BANGALORE – 560 059(AUTONOMOUS INSTITUTION UNDER VTU, BELGAUM)

Ref 4: Chapter 4,5 04 Hrs

10. OVERVIEW OF 802.16 WIMAX AND ARCHITECTURESalient features, Overview of Phy and Mac layers, Reference architecture model, Protocol layering, Network discovery, IP address assignment, Authentication Ref 3 : Chapter 1,2,10 03 Hrs

11. IEEE 802.16 MACConvergence, MacPDU, Bandwidth request and allocation, entry and initialization power saving operations, mobility management. Ref 3: Chapter 9 03 Hrs

12. IEEE 802.16 PHYChannel coding, hybrid ARQ, Interleaving, symbol mapping, OFDM symbol, Subchannels, slot and frame structure, ranging, power control, channel quality measurements, MIMO deployment.Ref 3: Chapter 4,8 04 Hrs

13. IEEE 802.16 SECURITY ISSUES AND QOSMechanisms multimedia session management, encryption and AES, mobility management, IP for wireless solutions.Ref 3: Chapter 7 04 Hrs

REFERENCE BOOKS1. Thomas Starr, John Cioffi, and Peter Silverman, “Understanding Digital subscriber

Line Technology”, Prentice Hall,1999.. 2. Philip Golden, Herve Dedieu and Krista Jacobsen, “Fundamentals of DSL

technology” ,Auerbach Publications,2004.3. Jeffrey Andrews, Arunabha Ghosh, and Rias Muhamed, “Fundamentals of

WiMax” , Prentice Hall 2007. 4. Bob O, Hara and Al Petrick, “IEEE 802.11 Handbook” , IEEE Press,1999

OUTCOME: After getting an overview of the cutting edge technologies like 802.11a/b/g/n and 802.16 series and also a few DSL/ADSL standards, the student will have the capacity to learn any other similar upcoming standards and design and implement a broadband communication system.

SCHEME OF SEMESTER END EVALUATION:THEORY:THREE out of FIVE from PART A and TWO out of THREE from PART B

CAD TOOLS FOR VLSI

Sub code : 07ECD742 CIE marks : 100Hrs / week : 4+0+0 SEE marks : 100

11

akshay
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R V COLLEGE OF ENGINEERING, BANGALORE – 560 059(AUTONOMOUS INSTITUTION UNDER VTU, BELGAUM)

Credits : 4 Exam hrs : 3

OBJECTIVES:

Computer Aided design of digital circuits has been of great importance in the VLSI design. Computer aided techniques have provided the enabling methodology to design efficiently and successfully large scale high performance circuits for a wide spectrum of applications. Synthesis techniques speed up the design cycle and reduce human efforts. Optimization techniques enhance the design quality. The subject deals with different techniques of Partitioning, Floor planning, Placement and routing levels of Physical design. At the end of the course, students will know different algorithms used for physical design cycle of complex VLSI circuits.

PART A

1. SCHEDULING ALGORITHMSIntroduction, A model for scheduling problems, Scheduling without and with resource constraints, Scheduling algorithms for extended sequencing models, Scheduling pipelined circuits Ref 1 : Chapter 2 06 Hrs

2. RESOURCE SHARING AND BINDINGIntroduction, Sharing and binding for resource-dominated circuits, Sharing and binding for general circuits, Concurrent binding and scheduling Ref 1 : Chapter 3 04 Hrs

3. DATA STRUCTURE AND BASIC ALGORITHMSBasic Terminology, Graph Search Algorithms, Computational Geometry Algorithms, Basic Data structures.Ref 2 : Chapter 4 04 Hrs

4. PARTITIONINGProblem Formulation, Classification of Partitioning Algorithms, Group migration Algorithms, Simulated Annealing and evolution algorithm, other partitioning algorithms Ref 2 : Chapter 5 06 Hrs

5.FLOOR PLANNING AND PIN ASSIGNMENTProblem formulation, classification, Constraint based, Integer programming based, rectangular Dualization, simulated evolution floorplanning algorithms, chip planning, Pin assignment algorithms.Ref 2 : Chapter 6 06 Hrs

6. PLACEMENTProblem formulation, Classification, Simulation based, Partitioning based Placement Algorithms. Ref 2 : Chapter 7 04 Hrs

PART - B

7. GLOBAL ROUTINGProblem formulation, Classification, Maze routing Algorithms, Line Probe Algorithms, shortest path based Algorithms, Steiner tree based Algorithms Ref 2 : Chapter 8 06 Hrs

8. DETAILED ROUTINGProblem formulation, Classification single Layer routing, General river routing, Single row routing, two layer channel routing AlgorithmsRef 2 : Chapter 9 06 Hrs

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R V COLLEGE OF ENGINEERING, BANGALORE – 560 059(AUTONOMOUS INSTITUTION UNDER VTU, BELGAUM)

9. CLOCK AND POWER ROUTINGDesign considerations for the clocking system, delay calculation for clock trees, Problem formulation, Clock routing Algorithms, H- tree based Algorithms, MMM Algorithms, Geometric matching based Algorithms Ref 2 : Chapter 11 06 Hrs REFERENCE BOOKS

1. Giovanni De Micheli ,”Synthesis And Optimization Of Digital Circuits”, McGraw- Hill, 1994

2. Naveed Sherwani ,”Algorithms For VLSI Physical Design Automation”, McGraw- Hill, III Ed, 2005

3. Sabih H. Gerez ,”Algorithms For VLSI Design Automation “, John Wiley, 1998.

OUTCOME: The student would have acquired the capacity and confidence to use the CAD tools effectively and this would help in coming up with good designs within the least possible timeframe.

SCHEME OF SEMESTER END EVALUATION:THEORY:THREE out of FIVE from PART A and TWO out of THREE from PART B

ARM PROCESSOR

Sub code : 07ECD743 CIE marks : 100Hrs / week : 4+0+0 SEE marks : 100Credits : 4 Exam hrs : 3

OBJECTIVES

The ARM is a 32-bit reduced instruction set computer (RISC) instruction set architecture (ISA) developed by ARM Limited. It was known as the Advanced RISC Machine, and before that as the Acorn RISC Machine. The ARM architecture is the most widely used 32-bit ISA. It is implemented in many microprocessors and microcontrollers for embedded systems. Because many ARM processors consume little power, they are dominant in the mobile electronics market, where low-power consumption is a critical design goal.

PART-A

1. ARM EMBEDDED SYSTEMSThe RISC design philosophy, the ARM design philosophy, embedded system hardware, embedded system software.Ref-1, Chapter 1:-1.1, 1.2,1.3,1.4, 1.5 04Hrs

2. ARM PROCESSOR FUNDAMENTALSRegisters, current program status register, pipeline, exceptions, interrupts and the vector table, core extensions, architecture revisions, ARM processor families.Ref-1 Chapter 2: 2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7. 08Hrs

3. INTRODUCTION TO THE ARM INSTRUCTION SETData processing instructions, Branch instructions, Load store instructions, software interrupt instructions, program status register instructions, loading constants, ARMv5E extension, and conditional execution.

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Ref-1, Chapter 3: 3.1,3.2, 3.3, 3.4, 3.5,3.6,3.7 3.8 10 Hrs

4. INTRODUCTION TO THE THUMB INSTRUCTION SETThumb register usage, ARM Thumb inter working, Other branch instructions, data processing instructions, single register load store instructions, multiple register load store instructions, stack instructions, software interrupt instruction.Ref-1, Chapter 4: 4.1, 4.2,4.3,4.4 to 4.8 08Hrs

PART-B

5. EFFICIENT C PROGRAMMINGOverview of C Compilers and optimization, basic C data types, C looping structures, register allocation, function calls, pointer aliasing, structure arrangement, bit fields, unaligned Data and Endianness, division, floating point, inline functions and inline assembly, portability issues.Ref-1, chapter 5: 5.1,5.2,5.3,5.4,5.5,5,5.6,5.7,5.8,5.9,5.10,5.11,5.12, 5.13. 04 Hrs

6. WRITING AND OPTIMIZING ARM ASSEMBLY CODEWriting assembly code, profiling and cycle counting, instruction scheduling, register allocation, conditional execution, looping constructs, Bit manipulation, efficient switches. Handling unaligned dataRef-1 Chapter 6: 6.1,6.2, 6.3, 6.4, 6.5, 6.6, 6.7, 6.8, 6.9. 06 Hrs 7. OPTIMIZED PRIMITIVESDouble precision integer multiplication, Integer normalization and count leading zeros, Division, square roots, transcendental functions: log, exp, sin, cos, Endian reversal and bit operations, saturated and rounded arithmetic, random number generationRef-1, Chapter7: 7.1, 7.2, 7.3, 7.4, 7.5, 7.6, 7.7, 7.8. 04 Hrs 8. DIGITAL SIGNAL PROCESSING Representing a digital signal, introduction to DSP on the ARM, FIR filters, HR filters, the discrete Fourier transformRef-1 Chapter 8: 8.1, 8.2, 8.3, 8.4, 8.5. 04Hrs REFERENCE BOOK

1. Andrew N. Sloss, Dominic Symes, Chris Wright, “ARM system developer's guide: designing and optimizing system software “, Morgan Kaufmann publications, 1st Ed., 2007.

2. Stephen Bo Furber,”ARM System on chip Architecture “ ,Addison Wesley publication, 2nd Ed.,2007.

OUTCOME: After undergoing this course student will be in position, to provide solutions for Open platforms running complex operating systems for wireless, consumer and imaging applications. Embedded real-time systems for mass storage, automotive, industrial and networking applications. Secure applications including smart cards andSCHEME OF SEMESTER END EVALUATION:THEORY:THREE out of FIVE from PART A and TWO out of THREE from PART B

ADAPTIVE SIGNAL PROCESSING

Sub code : 07ECD744 CIE marks : 100

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Hrs / week : 4+0+0 SEE marks : 100Credits : 4 Exam hrs : 3

OBJECTIVES:

To understand the concepts of Adaptation with stationary signals, Adaptive Algorithms & structures and engineering applications of Adaptive Signal Processing. & develop the skills to design adaptive systems for advanced communication systems; various adaptive algorithms and Interference cancellation; design a filter for real time applications.

PART- A

1. ADAPTIVE SYSTEMSDefinition and characteristics, Areas of application, General properties, Open-and closed-loop adaptation, Applications of closed-loop adaptation, Example of an adaptive system.Ref 1:Chapter 1 04 Hrs

2. THE ADAPTIVE LINEAR COMBINERGeneral description, Input signal and weight vectors, Desired response and error, the performance function, gradient and minimum mean-square error, Example of a performance surface, Alternative expression of the gradient, Decorrelation of error and input components.Ref 1:Chapter 2 08 Hrs

3. QUADRATIC PERFORMANCE SURFACENormal of the input correlation matrix, Eigen values and Eigen vectors of the input correlation matrix, an example with two weights, Significance of Eigenvectors, Geometrical significance of eigenvectors and Eigen values.Ref 1:Chapter 3 05 Hrs

4. SEARCHING THE PERFORMANCE SURFACEMethods of searching the performance surface, Basic ideas of gradient search methods, a simple gradient search algorithm and its solution, Stability and rate of convergence, the learning curve. Newton’s method in multidimensional space, Steepest descent method, Comparison of learning curves.Ref 1:Chapter 4 07Hrs

5. ADAPTIVE MODELING AND SYSTEM IDENTIFICATIONGeneral description, Adaptive modeling of multipath communication channel, adaptive modeling in geophysical exploration, Adaptive modeling in FIR digital filter synthesis.Ref 1:Chapter 9 06 Hrs

PART B

6. GRADIENT ESTIMATION AND ITS EFFECTS ON ADAPTATIONGradient component estimation by derivative measurement. The performance penalty, Derivative measurement and performance penalties with multiple weights, variance of the gradient estimate, effects on the weight-over solution, excess mean-square error and time constants, misadjustment, comparative performance of Newton’s and steepest-descent methods, Total misadjustment and other practical considerations.Ref 1:Chapter 5 08 Hrs

7. THE LMS ALGORITHMDerivation of the LMS algorithm, convergence of the weight vector, an example of convergence, learning curve, noise in the weight-vector solution, misadjustment, performance.

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Ref 1:Chapter 6 05 Hrs

8. ADAPTIVE INTERFERENCE CANCELINGThe concept of adaptive noise canceling, stationary noise-canceling solutions, effects of signal components in the reference input, The adaptive interference canceler as a notch filter, The adaptive interface canceler as a high-pass filter.Ref 1:Chapter 12 05 Hrs

REFERENCE BOOKS

1. Bernard Widrow and Samuel d. Stearns, “Adaptive Signal Processing”, pearson education asia, 2001.

2. Simon Haykin, “Adaptive Filter Theory”, Pearson Education Asia, 4Ed, 2002

3. John R. Treichler C. Richard Johnson, Jr. and Michael G. Larimore, “Theory and Design of Adaptive Filters”, Pearson Education /PHI 2002.

OUTCOME: After studying this course the students will be in a position to design adaptive systems for various real time applications.

SCHEME OF SEMESTER END EVALUATION:

THEORY:THREE out of FIVE from PART A and TWO out of THREE from PART B

LOW POWER VLSI DESIGN

Sub code : 07ECE751 CIE marks : 100Hrs / week : 4+0+0 SEE marks : 100Credits : 4 Exam hrs : 3

OBJECTIVES: With the growth in device density in scaled CMOS technologies, the power density has grown steadily. There are two sources of power dissipation in a CMOS circuit, namely, the dynamic power and the static power. Techniques at software design level, architectural level, logic design level, transistor level are all used to contain these two sources of power dissipation. PART A1. INTRODUCTION Need for Low Power VLSI Design, Dynamic Power: Charging and Discharging of Capacitor, Short Circuit Current in CMOS Circuits, Static Power: Leakage Currents, Static Currents, Basic Principle of Low Power Design Ref 1: Chapter 1.1-1.6.4 06 Hrs

2. SIMULATION POWER ANALYSIS: Spice Circuit Simulation, Discrete Transistor Modeling and Analysis, Gate Level Logic Simulation, Architecture Level Analysis, Data Correlation Analysis in DSP Systems, Monte Carlo Analysis Ref 1: Chapter 2.1-2.6.2 06 Hrs

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3. PROBABILISTIC POWER ANALYSIS: Random Logic Signal Probability and Frequency, Probabilistic Power Analysis Techniques, Signal Entropy Ref 1: Chapter 3.1-3.4.2 07 Hrs

4. CIRCUIT LEVEL POWER OPTIMIZATION: Transistor and Gate Sizing, Equivalent Pin Ordering, Network Restructuring and Reorganization, Special Latches and Flip Flops, Low Power Cell Library, Adjustable Device Threshold VoltageRef 1: Chapter 4.1-4.5.2 06 Hrs

5. LOGIC LEVEL POWER OPTIMIZATIONGate Reorganization, Signal Gating, Logic Encoding, State Machine Encoding, Pre-computational LogicRef 1: Chapter 5.1-5.5.4 05 Hrs

PART B

6. SPECIAL TECHNIQUES FOR POWER OPTIMIZATION Power Reduction in Clock Networks, CMOS Floating Nodes, Low Power Bus, Delay Balancing, Low Power Techniques for SRAMRef 1: Chapter 6.1-6.5.4 06 Hrs

7. ARCHITECTURE AND SYSTEM Power and Performance Management, Pass Transistor Logic Synthesis, Asynchronous SynthesisRef 1: Chapter 7.1-7.1.3 06 Hrs

8. ADVANCE TECHNIQUES Adiabatic Computing, Pass Transistor Logic Synthesis, Asynchronous Circuits Possible Industrial Lecture Power Management in modern-day, SoC ,Low Power Analog and Mixed-Signal Design ,Low-Power RFRef 1: Chapter 8.1-8.3.2 06 Hrs

REFERENCE BOOKS1. Gary K. Yeap: “Practical Low Power Digital VLSI Design”, KAP, 19972. Jan M. Rabaey and Massoud Pedram: “Low power design methodologies” Spinger,

19953. Kaushik Roy, Sharat Prasad: “Low-Power CMOS VLSI Circuit Design” John

Wiley, 2000 4. K. S. Yeo, S. S. Rofail & W. L. Goh: “CMOS/BICMOS VLSI low voltage, low

power”, PHI, 2002.5. P. Chandraksan & R. W. Broderson. “Low power digital CMOS design”, Kluwer

Academics, 1996; 6. Abdellatif Bellaouar “Low power digital VLSI circuits & system” Springer, 1995

OUTCOME: After this course students will know the impact of low power on any VLSI circuits and also know the different ways of optimization at different levels of abstraction. SCHEME OF SEMESTER END EVALUATION:THEORY:THREE out of FIVE from PART A and TWO out of THREE from PART B

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REAL-TIME EMBEDDED SYSTEMS

Sub code : 07ECE752 CIE marks : 100Hrs / week : 4+0+0 SEE marks : 100Credits : 4 Exam hrs : 3

OBJECTIVES

A real time system may be one where its application can be considered to be mission critical. The

anti-lock brakes on a car are a simple example of a real-time computing system — the real-time

constraint in this system is the short time in which the brakes must be released to prevent the wheel

from locking. Real-time computations can be said to have failed if they are not completed before

their deadline, where their deadline is relative to an event. A real-time deadline must be met,

regardless of system load

PART-A

1. INTRODUCTIONReal life examples of embedded systems, real time embedded systems, the future of embedded systemsRef 1: Chapter 1.1, 1.2, 1.3, 1.4. 04 Hrs

2. BASICS OF DEVELOPING FOR EMBEDDED SYSTEMSIntroduction, overview of linkers and linking process, executable and linking format, mapping executable images into target embedded systemsRef 1: Chapter 2.1, 2.2, 2.3, 2.4. 06 Hrs

3. EMBEDDED SYSTEM INITIALIZATIONIntroduction, target system tools and image transfer, target boot scenarios, target system software initialization sequence, on-chip debuggingRef 1: Chapter 3.1, 3.2 , 3.3, 3.4 3.5. 06 Hrs

4. INTRODUCTION TO REAL TIME OPERATING SYSTEMSIntroduction, a brief history of operating system, defining an RTOS, the scheduler, objects, services, key characteristics of an RTOSRef 1: Chapter 4.1, 4.2, 4.3, 4.4, 4.5, 4.6, 4.7. 06 Hrs

5. TASKSIntroduction, defining a task, task states and scheduling, types of task operations, typical task structure, synchronization, communication and concurrency .Ref 1: Chapter 5.1, 5.2, 5.3, 5.4, 5.5,5.6 06 Hrs

6. SEMAPHORESIntroduction, defining Semaphore, typical Semaphore operations, typical Semaphore use Ref 1: Chapter 6: 6.1, 6.2, 6.3, 6.4. 02 Hrs

PART-B

7. MESSAGE QUEUESIntroduction, defining message queues, message queues states, message queues content.Ref 1 Chapter 7.1 , 7.2, 7.3, 7.4, 7.5, 7.6, 7.7 08 Hrs

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8. OTHER KERNEL OBJECTSIntroduction, pipes, event registers, signals, condition variables.Ref 1: Chapter 8.1, 8.2, 8.3, 8.4, 8.5 05 Hrs

9. OTHER RTOS SERVICESIntroduction, other building blocks, component configuration. Ref 1,:Chapter 9.1, 9.2, 9.3. 05 Hrs

REFERENCE BOOKS:1. Qing Li “Real-Time Concepts for Embedded Systems”, CMP publishers,Edition,20032. Jack Gansole ,Michael.Barr “Embedded system dictionary”, Elsevier publications

2nd Edition 2003

OUTCOME: After undergoing this course student will be in position to design and understand the characteristics of real time embedded system, which widely used in most of the application like Telecommunications systems, Consumer electronics, Transportation systems, and Medical equipment.SCHEME OF SEMESTER END EVALUATION

THEORY:THREE out of FIVE from PART A and TWO out of THREE from PART B

MULTIMEDIA COMMUNICATIONS

Sub code : 07ECE753 CIE marks : 100Hrs / week : 4+0+0 SEE marks : 100Credits : 4 Exam hrs : 3

OBJECTIVES:Multimedia refers to amalgamation of different types of content such as text, still pictures, sound, moving pictures and animation, all in the same document. The traditional information systems or database systems have been text based. A gradual move towards multimedia information systems is currently underway. This course introduces the basics of multimedia communications such as information representation, transmission networks, compression techniques etc. PART A

1. MULTIMEDIA COMMUNICATIONSMultimedia information representation, Multimedia Networks, Multimedia applications, Network QoS and Application QoS. Ref 1: Chapter 1 08 Hrs

2. INFORMATION REPRESENTATION: Text, Images, Audio and Video, Text and Image, Compression, Compression principles, Text compression, Image compression, Audio and Video compression, Audio compression, Video compression, Video compression standards: H.261, H.263, P1.323, MPEG 1, MPEG2, Other coding formats for text, Speech, Image and video Ref 1: Chapter 2,3,4 10 Hrs

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3. DETAILED STUDY OF MPEG 4:Coding of audiovisual objects, MPEG 4 Systems, MPEG 4 audio and video, Profiles and levels MPEG 7 standardization process of multimedia content description, MPEG21, Multimedia framework, Significant features of JPEG 2000, MPEG 4 Transport across the Internet Ref 2: Chapter 5 12 Hrs

PART – B

4. SYNCHRONIZATION:Notion of synchronization, Presentation requirements, Reference model for synchronization, Introduction to SMIL, Multimedia operating systems, Resource management, Process management, Process management techniques.Ref 3: Chapter 15 08 Hrs

5. MULTIMEDIA COMMUNICATION ACROSS NETWORKS:Layered video coding, Error resilient video coding techniques, Multimedia transport across IP networks and relevant protocols such as RSVP, RTP, RTCP, DVMRP, Multi Media in mobile networks, and Multimedia in broadcast networks. Ref 2: Chapter 6 10 HrsREFERENCE BOOKS

1. Fred Halsall, “Multimedia Communications”, Pearson education, 20012. K.R.Rao, Zoran S Bojkovic, Dragorad A. Milovanovic “Multimedia

Communication Systems”, Pearson education, 2004.3. Raif Steinmetz, Klara Nahrstedt, “Multimedia Communication & Applications”

Pearson Education, 20044. John Billami, Louis Molina, “Multimedia: An Introduction” PHI, 2002

OUTCOME: After studying this course the students will be in a position to appreciate the multimedia data and the systems handling this. With this background the students can enter in to the advanced topics in the

SCHEME OF SEMESTER END EVALUATION

THEORY:THREE out of FIVE from PART A and TWO out of THREE from PART B

SATELLITE COMMUNICATION

Sub code : 07ECE754 CIE marks : 100Hrs / week : 4+0+0 SEE marks : 100Credits : 4 Exam hrs : 3

OBJECTIVESIn the modern world, Satellite Communication has lot of applications due its advantages. Satellite Communication proves to be a field of very high potential with valuable applications like Mobile, Navigational communication & DTH etc. Satellites form an essential part of telecommunication systems, worldwide carrying large amounts of data and telephone traffic in addition to television signals. Satellite offer number of features which are not available with other means of communications. The objective of this course is to make students to understand the Satellite orbits, losses in the atmosphere, and components of the satellite, link power budget calculations multiple access techniques and other satellite services.

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PART A1. INTRODUCTIONHistory, Frequency allocations for satellite services, Overview. Ref 1: Chapters 1.1, 1.2, 1.4, Ref 1: Chapters 1.2 02 Hrs

2. ORBITAL MECHANICS AND LAUNCHERS Introduction, Kepler laws, Orbital mechanics, apogee and perigee heights, sun synchronous orbits, Geostationary orbit, Look angle Determination, Orbital perturbations, Orbit determination, Launches and Launch Vehicles, Orbital effects in communications Systems performance, earth eclipse of satellite. Ref 1: Chapters: 2.1 to 2.6Ref 2: Chapters: 2.7, 2.10, 3.6 08 Hrs

3. SATELLITE SUBSYSTEMS Attitude and orbit control systems (AOCS), Telemetry, Tracking, Command and Monitoring, Power systems, Communications subsystems, Satellite antennas, Equipment Reliability and space Qualification.Ref 1: Chapters 3.1 to 3.7 06 Hrs

4. SATELLITE LINK DESIGN Introduction, Basic Transmission Theory, atmospheric loss, System Noise Temperature and G/T Ratio, Design of Downlinks, Uplink Design, Design for Specified C/N: Combining C/N and C/I values in Satellite Links.Ref 1: Chapters 4.1 ,4.2,4.3,4.4,4.6, 4.7 08 Hrs

5. EARTH SEGMENTIntroduction, receive only home TV system, out door unit, indoor unit, MATV, CATV, Tx – Rx earth station.Ref 2: Chapters 8.1 to 8.5 06 Hrs

PART-B

6. MULTIPLE ACCESSES Introduction, interference between satellite circuits, satellite access, single access, reassigned FDMA, SCPC (spade system), TDMA, pre-assigned TDMA, demand assigned TDMA, down link analysis, and comparison of uplink power requirements for TDMA & FDMA, on board signal processing satellite switched TDMA. Ref 2: Chapters 14.1 to 14.5, 14.7.8 to 14.7.12, 14.8, 14.9 08 Hrs

7. VSAT SYSTEM AND DBSIntroduction, Overview of VSAT systems, Network Architecture VSAT Earth Station Engineering. C-Band and Ku-Band Home Satellite TV, Digital DBS TV, Error control in digital DBS-TV, Satellite Radio Broadcasting. Ref 1: Chapters 9.1 to 9.3, 9.6, 11.1, 11.2, 11.5, 11.8 06 Hrs

8. SATELLITE NAVIGATION AND THE GLOBAL POSITIONING SYSTEM Introduction, Radio and Satellite Navigation, GPS position Location Principles, GPS receivers and Codes, GPS receiver operation. Ref 1: Chapters 12.1 to12.4, 12.9 04 Hrs

REFERENCE BOOKS1. Timothy Pratt, Charles Bostian, Jeremy Allnutt, “Satellite Communications” 2nd

Edition, John Wiley & Sons, 2003.

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2. Dennis Roody, “Satellite Communications” 4th Edition, McGraw-Hill International edition, 2006.

3. W L Pritchard, H G Suyderhoud, R A Nelson, “Satellite Communication Systems Engineering”, 2nd Ed., Pearson Education., 2007.

OUTCOME: After studying this subject, students can able to understand the motion of a secondary body around primary body, orbital mechanics, Satellite and earth station components, power transmission between satellite and earth station with atmospheric losses and satellite accessing techniques.

SCHEME OF SEMESTER END EVALUATION:THEORY

THREE out of FIVE from PART A and TWO out of THREE from PART B

INDUSTRIAL INFORMATICS

Sub code : 07ECF761 CIE marks : 100Hrs / week : 4+0+0 SEE marks : 100Credits : 3 Exam hrs : 3

OBJECTIVES: Industrial informatics refers to the techniques and tools found between informatics and manufacturing techniques, where manufacturing systems complexity demands informatics' tools and techniques for planning and controlling manufacturing systems. It gives the practical as well as conceptual knowledge of the latest tools and methodologies and provides the basis for a successful career as an engineer and IT professional who can meet the challenges in the design and control of sophisticated manufacturing systems.

PART- A

1. INTRODUCTION TO INDUSTRIAL INFORMATICSWhat is Industrial Informatics? Why is information technology application essential for operation of modern industrial systems? In what different ways and for what different tasks is information technology applied? Some motivating examples

04 Hrs

2. A BRIEF OVERVIEW OF MODERN, NETWORK-BASED, INDUSTRIAL AUTOMATION SYSTEMSObjectives of industrial automation systems architecture: parts and interconnection. Different parts and their tasks: sensor and actuator systems; Data acquisition and control systems; Reporting and analysis systems, supervisory systems; Human-system interface systems; Alarms and emergency control; Automation hierarchy and automation pyramid; information flow in and across various layers in the automation pyramid; Networks for data communication and implementation of control. Nature of signals: continuous, digital, pulse Control: Continuous loop control, Discrete sequential control and combined continuous and Discrete sequential control.

08 Hrs

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3.INTELLIGENT SENSOR SYSTEMSBroad specifications and essential features, Communication needs and features, Brief introduction to architecture,Brief introduction to standards, such as IEEE 1451 series``2/

04 Hrs

4. INDUSTRIAL COMMUNICATION 1Industrial serial communication, Wired and wireless communication, Hardware standards: RS 232C, RS 422, RS 485, Network topology, Media access methods: Deterministic Polling, token passing. Non-deterministic CSMA/CD, Communication description in terms of OSI model,Sensor, Device and Control networks

08 HrsPART- B

5. INDUSTRIAL COMMUNICATION 2Field buses Standards/protocols: proprietary and open study of some popular fieldbuses: Hart, Modbus, Data Highway, Canbus, LON, (proprietary buses) and Foundation Fieldbus (H1, HSE), Profibus (PA, DP) (open standards),developments in Industrial Ethernets

08 Hrs

6. SYSTEMS FOR DATA EXCHANGE BETWEEN APPLICATIONSApplication Programming Interface (API),Control Programming Interface (CPI) Dynamic Data Exchange (DDE),OLE for Process Control (OPC) and its various standards

06 Hrs REFERENCE BOOKS

1. Bela G. Liptak, “Instrumentation Engineer’s Handbook ”,(3 volumes), V 3 (Process Software and Networks), Publisher: Instrumentation, Systems and Automation Society (ISA)

2. SA Boyer, “SCADA/Supervisory control and data acquisition”, Publisher: Instrumentation, Systems and Automation Society (ISA)

3. Jonas Berge , “ Fieldbus for Process Control: Engineering, Operation, and Maintenance”, Publisher: Instrumentation, Systems and Automation Society (ISA)

4. LM Thompson , “Industrial Data Communication”, Publisher: Instrumentation, Systems and Automation Society (ISA)

5. PS Marshall and JS Rinaldi , “Industrial Ethernet”, Publisher: Instrumentation, Systems and Automation Society (ISA)

6. Dick Caro , “Automation Network Selection”, Publisher: Instrumentation, Systems and Automation Society (ISA) (edition and year Missing)

OUTCOME: After this course the students attain a conceptual knowledge of the latest tools and methodologies and they will be in a position to meet the challenges in the design and control of sophisticated machine parts and systems.SCHEME OF SEMESTER END EVALUATION:THEORY

THREE out of FIVE from PART A and TWO out of THREE from PART B

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MIMO SYSTEMS

Sub code : 07ECF762 CIE marks : 100Hrs / week : 4+0+0 SEE marks : 100Credits : 3 Exam hrs : 3

OBJECTIVESIn radio, multiple-input and multiple-output, or MIMO (commonly pronounced my-moh), is the use of multiple antennas at both the transmitter and receiver to improve communication performance. It is one of several forms of smart antenna technology. MIMO technology has attracted attention in wireless communications, since it offers significant increases in data throughput and link range without additional bandwidth or transmit power. It achieves this by higher spectral efficiency (more bits per second per hertz of bandwidth) and link reliability or diversity (reduced fading). Because of these properties, MIMO is a currenttheme of international wireless research

PART- A

1. OVERVIEW Need of MIMO systems, MIMO communication in wireless standards.Ref 1: Chapter 1.1, 1.2. 02 Hrs

2. FADING CHANNEL AND DIVERSITY TECHNIQUESWireless channels, path loss, shadowing and small scale fading, fading channel models, error/outage probabilities over fading channels. Outage probability for Rayleigh fading channels, average error probabilities over Rayleigh fading channels, extension to other fading channels, performance over frequency selective fading channels, diversity techniques – types of diversity, system model for Lth order diversity, maximal ratio combining, Suboptimal combining algorithm, selection combining. Channel coding as a means of time diversity, block coding over a fully interleaved channel. Convolution coding. Multiple antennas in wireless communications receive diversity, smart antennas and beam forming, space time coding basic ideas.Ref 1: Chapter 2.1, 2.2, 2.3, 2.4, 2.5 12Hrs

3. CAPACITY AND INFORMATION RATES OF MIMOCapacity and information rates of noisy channels, Capacity and information rates of AWGN and fading channels, AWGN channels, fading channels, Capacity of MIMO channels, deterministic MIMO channels, ergodic MIMO channels, Non-ergodic MIMO channels and outage capacity, transmit CSI for MIMO fading channels. Constrained signaling for MIMO communications.Ref 1: Chapter 3.1, 3.2, 3.3, 3.4. 10 Hrs

PART-B

4. SPACE TIME BLOCK CODESTransmit diversity with two antennas: the almouti scheme. Transmission scheme, optimal receiver for the Almouti Scheme. Performance analysis of the Almouti Scheme. Orthogonal space time block codes, Linear orthogonal design, decoding of linear orthogonal design, performance analysis of space time block codes, quasi orthogonal space time block codes, linear dispersion codes .Ref 1: Chapter 4.1, 4.2, 4.3, 4.4. 04 Hrs

5. SPACE TIME TRELLIS CODESA simple space time trellis code, general space time trellis code, basic space time code design principles, representation of space time trellis code for PSK constellations, Performance analysis for space time trellis code, comparison of space time block and trellis codes.Ref 1:Chapter 5: 5.1, 5.2, 5.3, 5.4, 5.5 5.6. 06 Hrs

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6. LAYERED SPACE TIME CODESBasic Bell laboratories layered Space time (BLAST) architecture. DBLAST, multilayered space time codes, Thread space time codes, other detection algorithms for spatial multiplexing systems. Diversity multiplexing gain trade off.Ref 1: Chapter 6: 6.1, 6.2, 6.3, 6.4, 6.5, 6.6. 04Hrs

REFERENCE BOOKS1. Tolga. M. Duman and Ali Ghrayeb, “Coding for MIMO Communication Systems”, Edition

1- 20072. Tsoulos,George “MIMO system technology for wireless communication”, CRC press

published in 2006

OUTCOME:After undergoing this course student will be in position to understand the importance and application of MIMO system in wireless technology, which provides significant increases in data throughput and link range without additional bandwidth or transmit power. It achieves this by higher spectral efficiency (more bits per second per hertz of bandwidth) and link reliability or diversity (reduced fading). Because of these properties, MIMO is a current theme of international wireless research.SCHEME OF SEMESTER END EVALUATION:THEORY

THREE out of FIVE from PART A and TWO out of THREE from PART B

RADAR AND NAVIGATIONAL AIDS

Sub code : 07ECF763 CIE marks : 100Hrs / week : 4+0+0 SEE marks : 100Credits : 3 Exam hrs : 3

OBJECTIVESThis course intends to make the students understand the principles of Radar and its use in military and civilian environment. The students become familiar with navigational aids available for navigation of aircrafts and ships. The derivation and analysis of the Range equation and detection techniques are included in this course. The application of Doppler principle to detect moving targets, cluster are covered to understand the tracking radars.The course emphasizes on understanding principles of navigation, in addition to approach and landing aids as related to navigation

PART- A 1. INTRODUCTION TO RADAR Basic Radar –The simple form of the Radar Equation- Radar Block Diagram- Radar Frequencies –Applications of Radar – The Origins of Radar Ref 1: Chapter 1 02 Hrs

2. THE RADAR EQUATIONIntroduction- Detection of Signals in Noise- Receiver Noise and the Signal-to-Noise Ratio-Probability Density Functions- Probabilities of Detection and False Alarm- Integration of Radar Pulses- Radar Cross Section of Targets- Radar cross Section Fluctuations- Transmitter Power-Pulse Repetition Frequency- Antenna Parameters-System losses – Other Radar Equation Considerations Ref 1: Chapter 2 06Hrs

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3. MTI AND PULSE DOPPLER RADARIntroduction to Doppler and MTI Radar- Delay –Line Cancelers- Staggered Pulse Repetition Frequencies –Doppler Filter Banks - Digital MTI Processing - Moving Target Detector - Limitations to MTI Performance - MTI from a Moving Platform (AMIT) - Pulse Doppler Radar – Other Doppler Radar Topics- Tracking with Radar –Monopulse Tracking –Conical Scan and Sequential Lobing - Limitations to Tracking Accuracy - Low-Angle Tracking - Tracking in Range - Other Tracking Radar Topics -Comparison of Trackers - Automatic Tracking with Surveillance Radars (ADT). Ref 1: Chapter 3 06 Hrs

4. DETECTION OF SIGNALS IN NOISE Introduction – Matched –Filter Receiver –Detection Criteria – Detectors –-Automatic Detector - Integrators - Constant-False-Alarm Rate Receivers - The Radar operator - Signal Management - Propagation Radar Waves - Atmospheric Refraction -Standard propagation - Nonstandard Propagation - The Radar Antenna - Reflector Antennas - Electronically Steered Phased Array Antennas - Phase Shifters - Frequency-Scan Arrays Radar Transmitters- Introduction –Linear Beam Power Tubes - Solid State RF Power Sources - Magnetron - Crossed Field Amplifiers - Other RF Power Sources - Other aspects of Radar Transmitter. Radar Receivers - The Radar Receiver - Receiver noise Figure - Super heterodyne Receiver - Duplexers and Receiver Protectors- Radar Displays. Ref 1: Chapter 5,6,7,8,9 ,10 10 Hrs

PART-B5. INTRODUCTIONRadio Direction Finding - The Loop Antenna - Loop Input Circuits - An Aural Null Direction Finder - The Goniometer - Errors in Direction Finding - Adcock Direction Finders - Direction Finding at Very High Frequencies - Automatic Direction Finders - The Commutated Aerial Direction Finder - Range and Accuracy of Direction Finders Radio Ranges - The LF/MF Four course Radio Range - VHF Omni Directional Range (VOR) - VOR Receiving Equipment - Range and Accuracy of VOR - Recent Developments. Hyperbolic Systems of Navigation (Loran and Decca) - Loran-A - Loran-A Equipment - Range and precision of Standard Loran - Loran-C - The Decca Navigation System - Decca Receivers - Range and Accuracy of Decca - The Omega SystemRef 3: Chapter 6, 8 08 Hrs

6. DME AND TACANDistance Measuring Equipment - Operation of DME - TACAN - TACAN Equipment Ref 3: Chapter 9, 10 02 Hrs

7. AIDS TO APPROACH AND LANDING Instrument Landing System - Ground Controlled Approach System - Microwave Landing System(MLS) Ref 3: Chapter 9, 10 02Hrs

8. DOPPLER NAVIGATION The Doppler Effect - Beam Configurations -Doppler Frequency Equations - Track Stabilization - Doppler Spectrum - Components of the Doppler Navigation System - Doppler range Equation - Accuracy of Doppler Navigation Systems. Ref 3: Chapter 9, 10 02 Hrs

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REFERENCE BOOKS1. Merrill I. Skolnik, “Introduction to Radar Systems", Tata McGraw-Hill (3rd Edition)

20032. B. Hofmann, Wellenhof, K. Legart and M. Wieser, Navigation “Principles of

Positioning and Guidance” Springer Verlag, Wien, New York, 2003, 3. Peyton Z. Peebles,"Radar Principles", John Wiley, 20044. J.C Toomay, “Principles of Radar", PHI, 2nd Edition , 2004

OUTCOME:After studying this course the students will be in a position to understand the principle and working of radar and its application in different domains like detection, search and surveillance. SCHEME OF SEMESTER END EVALUATION:THEORY:THREE out of FIVE from PART A and TWO out of THREE from PART B

ATM NETWORKS

Sub code : 07ECF764 CIE marks : 100Hrs / week : 4+0+0 SEE marks : 100Credits : 3 Exam hrs : 3

OBJECTIVESIn this course the technologies involved in ATM Networking and their performance are highlighted. Students are introduced to ATM architecture, adaptation layer and switching architecture. The techniques involved in supporting real-time traffic and congestion control are covered. Different types of networks and their applications are emphasized.

PART- A

1. INTRODUCTION & BASIC CONCEPTS FROM COMPUTER NETWORKSThe Asynchronous Transfer Mode , Communication network techniques, The open system interconnection(OSI) reference model, Data Linl Layer, The HDLC Protocol, Synchronous TDM, LLC Layer, Network Access Protocol, The Internet Protocol, ARP,RARP and ICMP,IPv6 and Frame relay Ref 1: Chapter 1, 2 and 3 08 Hrs

2. THE ATM ARCHITECTUREIntroduction, Main features of ATM networks, Structure of the ATM Cell Header, The ATM Protocol Stack, The ATM Interface, The Physical Layer Ref 1: Chapter 4 04 Hrs

3. THE ATM ADAPTATION LAYER:Introduction, ATM Adaptation Layer(AAL1), ATM Adaptation Layer 2 (AAL2) ATM Adaptation Layer 2 (AAL3/4), ATM Adaptation Layer 2 (AAL5) Ref 1: Chapter 5 04 Hrs

4. ATM SWITCH ARCHITECTURE:Introduction, Space Division Switch Architectures, Shared Memory ATM Switch Architectures, Shared Medium ATM Switch Architectures Nonblocking switches with output Buffering, Multicasting in an ATM Switch, Scheduling Algorithm. Performance Evaluation of an ATM Switch

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Ref 1: Chapter 6 08 Hrs

PART- B5. CONGESTION CONTROL IN ATM NETWORKSTraffic Characterization, Quality of Service Parameters, Congestion Control, Preventive Congestion Control, Call Admission Control, Bandwidth Enforcement, Reactive Congestion Control, Available Bit rate Service Ref 1: Chapter 7 06 Hrs

6. TRANSPORTING IP TRAFFIC OVER ATM:Introduction, LAN Emulation, Classical IP & ARP over ATM, Multi Protocol Label Switching Ref 1: Chapter 8 03 Hrs

7. ADSL BASED ACCESS NETWORKIntroduction ADSL Technology, Schemes for Accessing Network Service Provider, the PPP Terminated Aggregation Scheme Ref 1: Chapter 9 03 Hrs

8. THE PRIVATE NETWORK- NETWORK INTERFACE (PNNI)Introduction, the PNNI Routing Protocol, the PNNI Signaling Protocol Ref 1: Chapter 11 02 Hrs

REFERENCE BOOKS1. Harry G Perros , “An Introduction to ATM Networks”, John Wiley & Sons Limited,

20022. Internetworking over ATM –An Introduction International Business Machines

Corporation , (IBM), 1996

OUTCOME:After studying this course the students become familiar with the ATM architecture, adaptation layer and switching architecture. They will be able to analyze the real time traffic and congestion control etc..SCHEME OF SEMESTER END EVALUATION:THEORY:THREE out of FIVE from PART A and TWO out of THREE from PART B

MINI PROJECT

Sub code : 07EC77L CIE marks : 100Hrs / week : 6 SEE marks : 100Credits : 3 Exam Hrs : 3

OBJECTIVES:This practical course intends to provide an opportunity to the students to think creatively in a way different from a regular laboratory course. The students can chose a task from any field of their interest in the E& C Engg & pursue it for the semester.GUIDELINES:The project group can contain at the most 4 & minimum of 2 members. The project can’t be purely software oriented & should contain a bit of hardware also.

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CIE SPLIT UP:

Preliminary Seminar 20Final Seminar 20Project Report 20Guide’s Assessment 40

SCHEME OF SEMESTER END EVALUATION:There will be a demonstration & viva-voce as part of End Semester Exam

INTELLECTUAL PROPERTY RIGHTS

Subject code: 07HSS81 CIE Marks: 50Hrs/Week: 2+0+0 SEE Marks: 50Credits: 02 SEE: 3HrsOBJECTIVES The course aims at providing details of intellectual property rights to encourage invention, investment and innovation, and disclosure of new technology and to recognize and reward innovativeness. It also intended to promote innovation and technical development and to promote linkages to industries and stimulate research through developing and utilizing novel technologies.

1. INTRODUCTION Basic concepts of IPR, Nature and scope of IPR, Commercial exploitation of IPR, IPR and economic developments, types of intellectual property, advantages of IPR, intellectual property in specific fields-plant breeder’s rights, plant variety protection, A brief history national and international legal regime governing industrial and intellectual property. 03 Hrs

2. PATENTS Introduction, Basic concepts, object and value of patent law, advantages of patent to inventor, patentable inventions, inventions are not patentable, how to obtain patent, biotechnology patents and patents on computer program, government use of inventions, infringement of patents and remedy for infringement, case study for patent engineering. Patent acts 1970 as amended in 1999, 2002 & 2005. 07 Hrs

3. TRADE MARKS Basic concepts, definition, functions, different kinds of trade marks like service marks, collective trade marks, certification trademarks, textile trademarks, registrable and non registrable marks, establishing trade mark right, use and registration, Registrability and distinctive character, good will, infringement and action for trademarks, passing off, trade mark and domain names, comparison with patents, industrial design and copy right, case studies. 05 Hrs

4. COPY RIGHTIntroduction, nature of scope, subject matter, related or allied rights, the works in which copy right subsists, rights conferred by copy right, copy right protection in India, transfer of copy rights, right of broad casting organization and of performer, computer software and IPR and case studies. 06 Hrs

5. INDUSTRIAL DESIGN, INTEGRATED CIRCUITS, GEOGRAPHICAL INDICATIONS, AND CONFIDENTIAL INFORMATION Introduction, basic concepts and scope and nature of rights, process of registration rights, available

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after registration, transfer of interest or rights, made available under respective legislations such as assignment, transmission and licenses; relief’s and remedies and action for infringement of the rights; appeals, case studies. 05 Hrs

REFERENCE BOOKS1. P Narayanan; intellectual property law; eastern law house; New Delhi and Kolkata; 2005; EAN; 97881717718132. Prabuddha ganguly,; intellectual property rights, unleashing knowledge economy,

McGraw-Hill; New Delhi; 1st edition; 2001, ISBN:0074638602.3. Conrnesh W R intellectual property rights- patents, copy right, trade mark, allied rights,

universal law publishing company pvt. Ltd, Delhi; 2001.4. S R Myneni; law of intellectual property; Asia law house; Hyderabad; 2001.

Web1. Using the internet for non-patent prior art searches, Derwent IP matters, July 2000.

[www.ipmatters.net/features/000707_gibbs.html]2. Patents by N R Subbaram, pharma book syndicate.3. www.iptoday.com

OUTCOME:The students would be able to learn articulate the applicable source, scope and limitations of the core intellectual property discipline such as patent, copyright, Trademark and trade secret law and also gain exposure to various legal issues pertaining to “intellectual property rights”. SCHEME OF SEMESTER END EVALUATION:Question paper will be set to cover both descriptive and objective type questions with weightage of 60% for descriptive questions and 40% for objective.

EMBEDDED SYSTEM (GENERAL STREAM)

Sub code : 07EC82 CIE marks : 100Hrs / week : 4+0+0 SEE marks : 100Credits : 4 Exam hrs : 3

OBJECTIVESThe main objective of this course is to make general stream students to understand the concepts of embedded system and apply the same to the Engineering applications. It will help them to understand the digital and microcontroller concepts, which is nowadays used in almost all control applications.

PART - A

1. COMBINATIONAL AND SEQUENTIAL CIRCUITS Universal gates, adders, subtractors, comparators, multiplexers, decoders, flip-flops, synchronous and asynchronous counters, RTL logic, basics of Digital computer and microcomputer Ref 1: Chapter 1.1, 1.2, 1.3 08 Hrs 2. INTRODUCTION TO EMBEDDED SYSTEMSConcept of Embedded System Design: Design challenge, Processor technology, IC technology, Design technology, Trade-offs, Custom Single Purpose Processor Hardware, and General-Purpose Processor: Introduction, Basic Architecture, Operation, Super-Scalar and VLSIW Architecture, Application Specific Instruction Set Processors (Asips), Microcontrollers, Digital Signal Processors, Selecting A Microprocessor.Ref 2:Chapter 2.1,2,.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, Chapter 3.1, 3.2, 3.3, 3.6 , 3.7. 08 Hrs

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PART-B3. MEMORYIntroduction, Memory write ability, Storage performance, Tradeoff s, Common memory types Memory hierarchy and cache memories.Ref 2, chapter 5: 5.1, 5.2, 5.3, 5.4, 5.5 08 Hrs 4. 8051 microcontrollersArchitecture, instruction set and Programming in assembly or C. Ref 4: Chapter 1.1, 1.2, 1.3, 1.4, 1.5, 1.6 12 Hrs5. PERIPHERALS AND INTERFACING TECHNIQUESAnalog and digital blocks: Analog-to-Digital Converters (ADCs), Digital-to-Analog, Converters (DACs), Communication basics and basic protocol concepts, Microprocessor interfacing: I/O addressing, Port and Bus based, I/O, Memory mapped I/O, Standard I/O interrupts, Direct memory access, Advanced communication principles parallel, serial and wireless, Serial protocols I2C, Parallel protocols PCI bus, Wireless protocol IrDA, blue tooth. Different peripheral devices: Buffers and latches, Crystal, Reset circuit, Chip select logic circuit, timers and counters and watch dog timers, Universal asynchronous receiver, transmitter (UART),Pulse width modulators, LCD controllers, Keypad controllers. Ref 2:Chapter 4.8, Chapter 6.1, 6.2, 6.3, 6.4, 6.5, 6.6, 6.7, 6.8, 6/9, 6.10, 6.11. 12 Hrs

Text /Reference1. Malvino, “Digital principles applications”, Edition 5- 19942. Frankvahid, “Tony Givargis, “Embedded System Design- A unified

Hardware/software Introduction”. 3rd edition and copy right 20023. David E Simon, “An embedded software primer ", Pearson education Asia, 2001.4. Mohammad Ali Mazidi , “The 8051 Microcontroller and embedded systems: using

Assembly and C” 2nd Edn, 20065. J.W. Valvano, "Embedded Microcomputer System: Real Time Interfacing", 2nd

Edn,2006OUTCOME: After undergoing this course student will be in position to understand the characteristics of general time embedded system, which are widely used in most of the applications today like Telecommunications systems, Consumer electronics, Transportation systems, and Medical equipment. Etc.,

SCHEME OF SEMESTER END EVALUATION:THREE out of FIVE from PART A and TWO out of THREE from PART B

SEMINARSub code : 07EC83 CIE marks : 50Hrs / week : 3 SEE marks : 00Credits : 2 Exam hrs : 00

OBJECTIVES:The students are required to give a seminar on any topic of their interest from E&C Engg.,field.They are supposed to do sufficient literature survey & collect enough reference papers in the field before deciding a topic. The students are advised to refer latest IEEE transactions in the pertinent field.

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Guidelines:

1. Batches of students consisting of not more than ‘2’ are formed for presenting seminars.

2. The seminar batches will submit a report on the proposed seminar topic along with the reference papers.

3. An evaluation committee consisting of senior faculty of the department will sit for the seminar & awards marks based on different criteria like the relevance of the topic, presentation & questionnaire .

PROJECT WORK

Sub code : 07ECP84 CIE marks : 250Hrs / week : 20 SEE marks : 250Credits : 12 Exam hrs : 3

OBJECTIVES:

• To provide an opportunity and atmosphere in which students may test theory learnt in the classroom in an actual working situation and discover the value of work and the rewards of accomplishment.

• To insure a natural transition to the higher level of professional preparation as a complement to the liberal education goals of the Institution.

GUIDELINES:

o Batch Formation:Students have to form batches through a formal letter to the HOD, indicating batch members, leader, batch name (A minimum of two and a maximum of four members per batch are allowed).

o Calendar of EventsThe detailed schedule will be notified during the interlude period of 7th and 8th Semesters.

o Project SelectionProject can be undertaken in Industry / Research / Service organization or in-house

o AttendanceAttendance for Project Work will be treated on par with any other practical / laboratory course. Each batch must maintain a separate notebook, which serves as a project diary. The guide’s signature against the dates is the basis for attendance.

o Project ApprovalA proposal of the project work (Duly approved by the Guide) including the Project Title, Profile of the Organisation, Problem Genesis, Problem Definition, Objectives, Literature Review, Research Methodology, Project Plan, Expected outcome, Utility and Calendar of events to be submitted before the deadline given by the Department.

o Evaluation – Modus OperandiInternal Assessment:

Sl. No. Component Marks1 Preliminary Seminar 202 Final Seminar 20

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3 Project Report 204 Guide’s Assessment 40

SCHEME OF SEMESTER END EVALUATION:Assessment is for 100 marks based on Writing Synopsis, Presentation & Viva-Voce

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