8 7 6 5 4 3 2 1 051-7173 mlb , m42c · 2011-04-17 · 051-7173 mlb , m42c dk dk rx es dk rx rx mk...

TABLE_TABLEOFCONTENTS_ITEM





















ANGLES

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

DATE

APPDENG

DATE

APPDCK

ECNZONEREV

DO NOT SCALE DRAWING

X.XXX

X.XX

XX

DIMENSIONS ARE IN MILLIMETERS

THIRD ANGLE PROJECTIOND

SIZE

APPLICABLENOTED AS

MATERIAL/FINISH

NONE

SCALE

DESIGNER

MFG APPD

DESIGN CK

RELEASE

QA APPD

ENG APPD

DRAFTER

METRIC

OFSHT

DRAWING NUMBER

TITLE

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PARTII NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

Apple Computer Inc.

12345678

12345678

B

C

D

A

B

C

D

A

REV.

DESCRIPTION OF CHANGE









TABLE_5_ITEM

TABLE_5_ITEM

REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD

QTY DESCRIPTIONPART#

DRAWING


































TABLE_TABLEOFCONTENTS_HEAD

















TABLE_TABLEOFCONTENTS_HEAD

DRI

051-7173 MLB , M42C

DK

DKRX

ES

DKRX

RXMK

RX

MK

RX

RX ES

DK

MK

DK

MK

DK

RX

MK

RX

MK

RX

RX

DK

RX

RXRX

ESRX

LTLTLTDKDKES

ES

ESESESESESESESMK

LDMKES

RX

DKMK

MK

MKMK

ES

DK

DK

ES-ERIC SMITH

LD-LINDA DUNN

MK

LT-LAWRENCE TAN

LT

DK

MKMK

LT

MK

MK-MARC KLINGELHOFER

RC-RAY CHANG

DK-DINESH KUMAR

MK

Schematic / PCB #’s

DK

RX

ES

RX-RAYMOND XU

EE DRIS:

DRI

3/21/2007 POST RAMP

SCHEM,MLB,MACBOOK

G051-7173

494020 03/21/07G PRODUCTION RELEASED

1 108

?

Cross Reference Page10778

40 11/16/2005ENET

49CONNECTOR MISC

2 5/23/05MASTER

2SYSTEM BLOCK DIAGRAM

16 07/25/2005NB

16NB Power 1

22 11/16/2005ENET

22

NB Misc Interfaces14 NB14 08/15/2005

ENET80 08/30/200563 S3/S0 FETS, G3H SUPPLY

CPU 1 OF 2-FSB7 05/03/20057MASTER

PCBF,MACBOOK,MLB1 PCB820-1889

SCHEM,MACBOOK,MLB1 SCH051-7173

ABBREV=DRAWING

TITLE=U230

LAST_MODIFIED=Wed Mar 21 11:33:29 2007

SPI BOOTROM MASTER6350 5/23/05

SMS SMC6652 08/23/2005

21 SB21 08/05/2005

43 08/19/2005ENET

53

44 08/29/2005ENET

54BLUETOOTH INTERFACE

45 08/18/2005SMC

58SMC

46 08/23/2005SMC

59SMC SUPPORT

47 06/30/2005NB

60LPC+ Debug Connector

08/30/200548 ENET61

CPU Current & Voltage Sense

Cross Reference Page10576

19 06/22/2005NB

19NB (GM) Decoupling

NB DDR2 Interfaces15 15NB

07/25/2005

NB PEG / Video Interfaces13 NB13 07/25/2005

CPU ITP700FLEX DEBUG11 5/23/05MASTER

11

CONFIGURATION OPTIONS4 07/18/2005SMC

4

53 TPM SMC67 07/18/2005

54 AUDIO: CODEC M42AUDIO68 08/05/2006

AUDI0: SPEAKER AMP M42AUDIO7255 08/05/2006

Fan ENET6551 11/10/2005

07/25/2005NB

18NB Grounds18

20 06/28/2005NB

20NB Config Straps

AUDIO: JACK M42AUDIO7356 08/05/2006

ENET8164 11/16/2005

Power Conn / Alias

37 11/14/2005ENET

42ETHERNET CONNECTOR

MINI-DVI CONNECTOR EUGENE9869 05/21/05

70 99Cross Reference Page

10071 Cross Reference Page10172 Cross Reference Page

10475 Cross Reference Page

36 12/06/2005ENET

41ETHERNET CONTROLLER

10677 Cross Reference Page

GRAPHIC9568 06/06/2005

EXTERNAL TMDS

POWER7659 07/13/2005

5V / 3.3V Power Supply

(.csa)

ContentsPage SyncDate

CPU DECAPS & VID<>9 08/19/2005SMC

9

12 07/25/2005NB

12NB CPU Interface

1.5V / 1.05V Power Supply POWER79 07/13/200562

1.8V Supply POWER78 07/13/200561

ENET60 12/06/2005772.5V/1.2V Regulator

M42AUDIO7457 08/05/2006

AUDIO: JACK TRANSLATORSPOWER

7558 07/13/2005IMVP6 CPU VCore Regulator

DC-In & Battery Connectors POWER8265 07/13/2005

GRAPHIC9467 06/06/2005

INVERTER,LVDS,TMDS

10273 Cross Reference Page10374 Cross Reference Page

SMC66 08/19/200583PBUS Supply/Battery Charger

1 N/AN/A

1Table of Contents

POWER33 06/30/2005

Power Block Diagram

6 08/19/2005ENET

6SIGNAL ALIAS /RESET

5 07/25/2005TP

5FUNC TEST 1 OF 2

Sync(.csa) Date

Page Contents

33 06/06/2005CLOCK

34CLOCK TERMINATION

TEMPERATURE SENSE ENET6249 11/09/2005

42 11/01/2005ENET

52

39 11/16/2005ENET

45FIREWIRE PORT

41 11/09/2005ENET

51IR CONTROLLER

38 08/30/2005ENET

44FIREWIRE CONTROLLER

23 11/28/2005ENET

23

24 08/05/2005SB

24

25 06/28/2005SB

25

26 07/26/2005NB

26SB Misc

27 08/30/2005ENET

27M42 SMBUS CONNECTIONS

28 06/20/2005MEMORY

28DDR2 SO-DIMM Connector A

29 06/20/2005MEMORY

29DDR2 SO-DIMM Connector B

30 06/20/2005MEMORY

30Memory Active Termination

31 (MASTER)(MASTER)

31Memory Vtt Supply

32 06/03/2005CLOCK

33CLOCKS

34 11/01/2005ENET

38PATA CONNECTOR

35 11/14/2005ENET

39SATA CONNECTOR

17 NB17

NB Power 207/25/2005

CPU 2 OF 2-PWR/GND8 05/03/2005MASTER

8

10 08/19/2005ENET

10CPU MISC1-TEMP SENSOR

DSIZE

OFSHT

DRAWING NUMBER



III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT


12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

IR_RX_OUT

SATA

IR

HDDConnector

P.35

USB

USB

P.41CONTROLLER

66MHZ

P.34Connector PATA

AZALIA

TP CONNECTOR

INTERNAL KB

ODD16BITS

P.54-57

P.40

AUDIO

P.64

SMBUS

SPI

SPI FLASH

P.51

P.50

P.45

P.52

P.53P.47

P.58~P.66

P.44

P.43

P.68

P.42

P.69

P.67

P.67

LCD Panel

INVERTERCONNECTOR

MINI DVI & CRT CONNECTOR

ETHERNETCONNECTORP.37

FW CONNECTOR

DMIX4PCIEX1

SDVO

P.12-20

609 BGA

CHIPSET-SB

FSB

479 BGA

PROCESSORCLOCKING

THERMAL

LVDS

ENET CONTROLLER

P.36

FAN CONNECTOR

P.27

1466UFCBGA

CHIPSET-NB

P.39

LPC 33MHZ

P.26

TO WIRELESS

CONNECTOR TO

CH.B

BATTERIES& Charger

CONNECTOR

CARD

SMBUS

REGULATOR

P.31

Config

USB 2.0

SMS

DDR2 VTT

P.29

SO-DIMM Connector

J2900

J2800

DDR2 SDRAM DIMM B

SO-DIMM ConnectorDDR2 SDRAM DIMM A

P.28

CONNECTOR

P.7-9

SENSOR

CPU

P.32-33

AND SPECTRUM

POWER SUPPLY

USB

FW

PCI

DEBUGCONNECTOR

CH.ATV+CRT

TMDS TMDS

P.10

5V USB

ENET

PCIEX1

P.38FW CONTROLLER

BLUETOOTH

LPCTPM

SB MISC.

P.21-26

SMCBOOTROM

SYNC_DATE=5/23/05SYNC_MASTER=MASTER

SYSTEM BLOCK DIAGRAM

051-7173 G

1082

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

VOUT

(PAGE 68)

PP2V5_S0

(0.3A MAX CURRENT)

PP2V5_S0_NB_DISP_PLL

CURRENT)

17

(0.3A MAX CURRENT)

VOUT

(PAGE 59)

U7701MAX8887

VIN

(PAGE 59)

VOUT

Q8005

R=100k

c=0.1uf

R=10k

Q8030 Q8030

DELAY

(S0)

1V5S0_RUNSS

DELAY

P1V2S0_EN

c=0.01uf

(S3)

R=10k

c=2.2nf

DELAY

DELAY

PP3V3_S0

(S0)ENA

S0PWRGD_OKVR_PWRGOOD_DELAY

POWER ON SEQUENCE LIST

VADJ1(1.2V)

V1(1.8V)

V1(2.5V)

(S3)1.8V

LTC2908

SLP_S4_L(S3)

(S0)

START

SOFT

(S5)

02

02

1V5S0_RUNSS

PBUSB_VSENSE

01

ENA11.5VVIN

VOUT1

1.05V

LTC3728U7900

(PAGE 61)

02

ENA2

SMC_BATT_ISENSE

(PAGE 19)

(PAGE 65)

DELAY

Q8061

Q8061

ISL6269

ENA

U1900

P5VS0_EN_RC

U7800(PAGE 60)

(S0)

PPBUS_S5_FWPWRSW

(6A MAX CURRENT)

ENA

U7700

ALL_SYS_PWRGD

RESET*

RSMRST_IN(P13)

(PAGE 62)

CY28445-5

(PAGE 33)

CLKEN#

CHGR_EN

PP1V2_S3_ENET

(PAGE 44)

U2603VR_PWRGD_CK410

U3301

CLOCK

RSMRST*

Q8025Q8031

SLP_S3_L

ICH

(S0)

Q8062

SMCRSMRST_OUT(P15)

99ms DLY

IMVP_VR_ON(P16)

PWRGD(P12)

P25

P60

SLP_S3_L(P93)

SLP_S4_L(P94)

(PAGE 44)U5800

NO AC/BATTERY

STEP01-04

H(S5 ON)H(S5 ON)

01,05-09

L(S5 OFF)L(S5 OFF)

U2601

PWROK HCPURST*

PM_SLP_S4_L

3S2P / 3S3P

VR_ON

U8070

V1(5V)

RST*

04

DCIN

ENABLES

(S5)

U5900MC33465N_30ATR

PBUS CONVERTER/

AC

INADAPTER

ENABLE

PP3V42_G3H_REG

VOUT

VIN

VOUT

PGOOD

SMC

U1901

PP1V5_S0

SMC PWRGDSMC_RST_L

PWRGD

MCH

CK410_PD_VTT_PRGD_L

PWRGOOD

(PAGE 62)

3.425V G3HOTLT3470

PM_PWRBTN_L

PLTRST*

PWRBTN*ICH

VOUT

06

6A FUSE

6-1

200ms7ms

VIN

ENA

CPU

PLT_RST*

P17(BTN_OUT)

99ms

VIN

(8A MAX CURRENT)

VIN

(S5)

A ISL6255

U8300

A

03(PAGE 45)

U8090

VPPBUSA_G3HA

SMC_DCIN_ISENSE

01

BATTERY

BATTERY CHARGER

7A FUSE

VRMPWRGD

CPUPWRGD(GPIO49)

(S0)SOFT

U5800

Q8031

LOGIC

ENA1

START

U7600

SLP_S5_L

(S0)

PP1V2_S0

2.5V

BATT_POS_F

U8370

U8375

U8310 Q6150

U6100

ENA

PPVBAT_S5_CHGR_REG

A

VOUT1

ENA

(S3)

8

VOUT2

(4A MAX

VIN

Q8010PP3V3_S3

SLP_S3_L

VADJ2(0.9V)

09

BATTERY ONLY:

SLP_S5_L

SLP_S4_L

10-1314-1817,19-2425-27

2

SLP_S3_L

15

16

1V05S0_RUNSS

PGOOD

16

P3V3S0_EN_RC(S0)c=0.1uf 16

P1V8S0_EN_L_RCc=0.01uf

16

R=100k 16

11

SLP_S4_L

R=100k 12

12PP5VS3_EN_L_RC

SMC_PM_G2_ENABLE

CHGR_EN

Q805907

VIN

3.3V

LTC3728

PGOOD

3V3S5_RUNSS

5V3V3S5_PGOOD

9

12RSMRST_PWRGD

PP3V3S3_EN_L_RCVIN

2.5VMAX8887

(S0)

P3V3S0_EN_RC

Q8015

16

17

08

P5VS0_EN_RC(S0)8

5VENA2

2

Q80595VS5_RUNSS(S5)

Q8060

16PP5V_S5_REG(5A MAX CURRENT)PP3V3_S5_REG

VOUT1

12

PPBUSB_G3H

07

13(PAGE 58)

(S3)

VIN

(PAGE 19)

PP3V3_S5

18

PP1V5_S0_DPLL 18_1

PP1V8_S0

1.2V

(PAGE 59) 17

PP0V9_S0VOUTENA

VOUT

BATTERY ONLY,PRESS PWR BUTTONACIN WITH/WITHOUT BATTERY

BATTERY ONLY

STEP 06 (S5 POWER STATUS)TRUTH TABLE

PLATFORM,CPU RESET

SMC_RST_LRST*

08-1ADAPTER IN :

19

S0PWRGD_OK

PWR/RST STATUSG3H POWER ONS5 POWER ONS3 POWER ONS0 SYSTEM POWER ONS0 CPU POWER ON

IMVP_VR_ON

SIGNAL DELAY TIME

17-1

MM157

TV 3.3V

AUDIO 4.5V

08

14

PP2V5_S3

PP3V3_S0_AUDIO

17

PGOOD

PP5V_S3

16 (S0)

16 (S0)

1V05S0_RUNSS

PP5V_S0

CPUVCOREPGD_IN

17

PP1V05_S0VOUT2 17

Q8000

18

VIN

SMC_CPU_VSENSE

1V51V05S0_PGOOD

13

ISL6262

VR_PWRGD_CK410_L

SMC_CPU_ISENSE

VVOUT

IMVP_VR_ON(S0)P5VS3_EN_L_RC

22PPVCORE_CPU_S0

(36A MAX CURRENT)

PP5V_S5

23

(PAGE 57)U7500

21(S3)

24

TPS79501VR6800

PP3V3_S0_NB_TVDAC

25

PM_SB_PWROK

26PWROK

17-1

27

PLT_RST_L

CPU_PWRGD

PP4V5_AUDIO_ANALOG

28

FSB_CPURST_L

19U808010

PWR_BUTTON(P90)

V1(3.3V)

21IMVP_VR_ON

PM_RSMRST_L

VR_PWRGOOD_DELAY

RSMRST_PWRGD

SMC_ONOFF_L

05

SLP_S5_L(P95)

16

P3V3S3_EN_L_RC

17

MCH DPLL 1.5V

TPS73115

(PAGE 31)

12PP1V8_S3_REG

13

16 P1V2_S0_EN

PP5V_S0_MEMVTT

U3100BD3535FVM

VIN

0.9V

16P1V8S0_EN_L_RC

17(8A MAX CURRENT)

18

Q8063U7720

MAX8516

ENA

M42C POWER SYSTEM ARCHITECTURE

051-7173

1083

G

SYNC_DATE=06/30/2005

Power Block DiagramSYNC_MASTER=POWER

TABLE_5_ITEM

TABLE_5_ITEM

CRITICAL BOM OPTIONTABLE_5_HEAD

PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM



TABLE_5_ITEM

TABLE_5_ITEM



TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM



DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

SIGNAL(High Speed)

L4 SIGNAL

L2 GROUND

0.018

L1-L2

L1 SIGNAL(TOP)

CONFORMAL_COAT

TRACE WIDTH

L10 SIGNAL 0.014

0.031

L8 GROUND

L9 SIGNAL

1.276TOTAL

SIGNAL(High Speed) GROUND

32

6

10

BOTTOM

0.047

BOARD STACK-UP AND CONSTRUCTIONMLB STACKUP

LAYER THICKNESS

0.014

L2-L3

0.076

0.079

---

0.014

0.156

0.076

0.014

0.014

(MM)

0.07

0.1

L5 GND

0.0760.1

0.1

0.1

0.014

L6 POWER

L7 POWER

0.079

---

0.07---

L10-L11

L7-L8

L6-L7

L9-L10

L11-L12

L8-L9

L4-L5

CONFORMAL_COAT

L11 GROUND

L12 SIGNAL(BOTTOM)

0.014

0.156

0.018

0.076

0.031

0.014

0.07

0.07

0.047 0.1

---

---

---

987

54

Top SIGNAL

GROUND POWER POWER GROUND

0.076

L5-L611

L3 SIGNAL

L3-L4

SIGNAL GROUND SIGNAL(High Speed) SIGNAL(High Speed)

(MM)

IC,SMC,176P BGA,HS8/21161 U5800 M42A_PGM341S1946

341S1890 IC,PSOC+W/USB,56P,MLF,CY8C247941 M42A_PGMU5100

IC,SLG8LP436,CLOCK GEN,68PIN QFN LEMENU359S0109 1 U3301

LEMENUIC,FW32306,1394A LINK,BGA,129P338S0268 1 U4400

LEMENUIC,88E8053,GIGABIT ENET XCVR,64P QFN, NO338S0270 1 U4101

EEE:WEW826-4393 LBL,P/N LABEL,PCB,28MMX6MM1 BEST-KIONIXCRITICAL

EEE:WET826-4393 LBL,P/N LABEL,PCB,28MMX6MM1 CRITICAL BETTER-ST

EEE:WEV1 LBL,P/N LABEL,PCB,28MMX6MM CRITICAL GOOD-KIONIX826-4393

EEE:WEULBL,P/N LABEL,PCB,28MMX6MM826-4393 CRITICAL BEST-ST1

EEE:W6VLBL,P/N LABEL,PCB,28MMX6MM1826-4393 CRITICAL BETTER-KIONIX

EEE:WES826-4393 LBL,P/N LABEL,PCB,28MMX6MM1 GOOD-STCRITICAL

1 IC,EEPROM,SERIAL IIC,8KBIT,SO8 U4102341S1797 M42A_PGM

341S2104 IC, 16MBIT 8-PIN SPI SERIAL FLASH,SOIC81 U6301 M42A_PGM

337S3389 1 IC,MEROM,CPU B2 DC 2.0GHZ,479 PGA U0700 BEST

337S3389 1 U0700IC,MEROM,CPU B2 DC 2.0GHZ,479 PGA BETTER

IC,MEROM,CPU L2 DC 1.83GHZ,479 PGA GOOD1 U0700337S3450

CONFIGURATION OPTIONSSYNC_MASTER=SMC

4

G051-7173

108


PAGE_BORDER=TRUE

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

CLOCK NO_TESTS

Power Supply NO_TESTsNO_TEST

INVERTER CONNECTOR FUNC_TEST

Battery charger FUNC_TEST

DC-JACK FUNC_TEST

USB FUNC_TEST

Battery Digital ConnectorFUNC_TEST

LPC+ Debug Connector

Battery FUNC_TEST

SMC FUNC_TEST

FUNC_TEST

Functional Test Points

Audio FUNC_TEST

NO_TEST

NO_TEST

Power Supply FUNC_TEST

FUNC_TEST

FIREWARE NO_TESTS

NO_TEST

SLEEP LED FUNC_TEST

FIREWIRE FUNC_TEST

SMBus FUNC_TEST

Other Func Test Points

Fan ConnectorsFUNC_TEST

LVDS NO_TESTS

NO_TEST

ETHERNET NO_TESTS

NO_TEST

I1

I10

I101

I102

I103

I104

I105

I106

I107 I11

I111

I112

I113

I114

I115

I116

I117

I118

I119

I12

I120

I121

I122

I123

I124

I125

I15

I151

I152

I153

I154

I155

I156

I157

I158

I159

I16

I160

I161

I162

I163

I164

I165

I166

I167

I168

I169

I17

I170

I171

I172

I173

I174

I175

I176

I177

I178

I179

I18

I180

I181

I182

I183

I184

I185

I186

I187

I188

I189

I19

I190

I191

I192

I193

I194

I195

I196

I197

I198

I199

I2

I20

I200

I201

I202

I203

I204

I205

I206

I207

I208

I209

I21

I210

I211

I212

I213

I214

I215

I216

I217

I218

I219

I22

I220

I23

I24

I25

I29

I3

I31

I32

I33

I36

I38

I4

I44

I45

I46

I47

I48

I57

I58

I59

I60

I61

I63

I71

I72

I73

I74

I75

I76

I77

I78

I79

I80

I81

I82

I83

I84

I85

I86

I87

I88

I89

I9

I90

I91

I92

I93

I94

I95

I96

G

5 108

051-7173

FUNC TEST 1 OF 2TRUE ENET_MDI_TRAN_P<3>

TRUE ALS_LEFTTRUE SMC_FAN_3_TACH

TRUE ENET_MDI_TRAN_N<2>TRUE ENET_MDI_TRAN_P<2>

TRUE LVDS_B_DATA_P2_SPN

SMC_CPU_VSENSETRUETRUE SMC_MANUAL_RST_L

SMC_LIDTRUE

LVDS_B_DATA_N0_SPNTRUE

FW_C_TPB_P_SPNTRUE

LVDS_B_DATA_P1_SPNTRUE

TRUE =PP5V_S0_FAN_RTTRUE FAN_RT_PWMTRUE FAN_RT_TACHTRUE =PP3V3_S0_FAN_RT

SMC_FAN_1_CTLTRUESMC_FAN_1_TACHTRUE

SMBUS_BATT_SDA_FTRUE

TRUE =PP3V42_G3H_LPCPLUS

LPC_AD<0>TRUE

TRUE LPC_FRAME_L

TRUE BOOT_LPC_SPI_LTRUE SMC_TMS

TRUE SMC_TDO

TRUE LPC_AD<2>TRUE LPC_AD<3>TRUE INT_SERIRQ

TRUE SMC_TDI

TRUE SV_SET_UPTRUE SMC_RX_L

TRUE SMBUS_SMC_MLB_SCL

TRUE SMBUS_SMC_MLB_SDA

PPFW_SWITCHTRUE

SYS_LED_ANODETRUE

FW_C_TPB_N_SPNTRUE

LVDS_B_CLK_N_SPNTRUE

TRUE LVDS_B_DATA_N1_SPN

FW_C_TPA_N_SPNTRUEFW_B_TPB_P_SPNTRUE

TRUE SMC_TX_LTRUE FWH_INIT_LTRUE PCI_CLK_PORT80_LPC

TRUE PM_SUS_STAT_L

FW_C_TPA_P_SPNTRUEFW_C_TPBIAS_SPNTRUE

TRUE SMC_TCK

LVDS_B_CLK_P_SPNTRUE

FW_B_TPB_N_SPNTRUE

CK410_SRC5_NTRUETRUE CK410_SRC4_PTRUE CK410_SRC4_NTRUE CK410_SRC3_P_SPNTRUE CK410_SRC3_N_SPNTRUE CK410_SRC2_PTRUE CK410_SRC2_N

CK410_PCIF1_CLKTRUETRUE CK410_SRC1_N_SPN

PP3V3_S3TRUEPP5V_S3TRUEPP3V3_S5TRUEPP5V_S5TRUEPP3V42_G3HTRUEPPBUSA_G3HTRUEPPBUSB_G3HTRUEPP18V5_G3HTRUEPP0V9_S0TRUE

PP1V8_S0TRUEPP2V5_S0TRUEPP3V3_S0TRUEPP5V_S0TRUE

TRUE =PP1V05_S0_REG

PP1V5_S0TRUE

PP1V2_S3TRUEPP1V8_S3TRUEPP2V5_S3TRUE

CK410_PCI4_CLK_SPNTRUE

CK410_SRC8_PTRUE

CK410_SRC7_P_SPNTRUE

FW_B_TPBIAS_SPNTRUEFW_B_TPA_P_SPNTRUEFW_B_TPA_N_SPNTRUE

CK410_SRC7_N_SPNTRUE

CK410_SRC1_P_SPNTRUE

CK410_LVDS_NTRUE

CK410_CPU2_ITP_SRC10_NTRUECK410_CPU1_PTRUE

CK410_CPU0_PTRUECK410_CPU0_NTRUE

BATT_INTRUEBATT_POSTRUEBATT_NEGTRUE

TRUE PP5V_S0_AUDIOGND_AUDIO_PWRTRUEGND_AUDIO_CODECTRUE

TRUE LPC_AD<1>

SMC_BATT_TRICKLE_EN_LTRUE

=PP5V_S0_LPCPLUSTRUE

TRUE P3V42G3H_FB

TRUE DEBUG_RST_LTRUE SMC_TRST_L

SMBUS_BATT_SCL_FTRUE

ACZ_SDATAIN<0>TRUE

ACZ_SYNCTRUE

SYS_ONEWIRETRUE

TRUE PM_CLKRUN_L

TRUE SMC_MD1

TRUE SMC_RST_LTRUE SMC_NMI

SMC_PS_ONTRUESMC_BC_ACOKTRUE

SMC_BATT_ISETTRUE

ACZ_RST_LTRUEACZ_BITCLKTRUEACZ_SDATAOUTTRUE

TRUE PP5V_S0_AUDIO_PWR

SMC_BS_ALRT_LTRUE

TP_USBP_ETRUE

TP_USBP_FTRUETP_USBN_ETRUE

TP_USBN_FTRUE

ACIN_ENABLE_GATETRUE

PPVBAT_G3H_CHGR_OUTTRUE

PP5V_INV_FTRUEINV_GNDTRUEPPBUS_ALL_INV_CONNTRUE

INV_BKLIGHT_PWM_LTRUE

1V5S0_RUNSS1V8S3_COMP

5VS5_RUNSS

ALL_SYS_PWRGDTRUEPPVCORE_CPU_S0TRUEPP1V05_S0TRUE

TRUE 3V3S5_COMP1V8S3_FSET

IMVP6_COMPIMVP6_RBIAS

SMC_BATT_CHG_ENTRUE

CK410_SRC6_PTRUE

CK410_SRC_CLKREQ1_L_SPNTRUECK410_SRC_CLKREQ3_L_SPNTRUECK410_SRC_CLKREQ8_LTRUE

CK410_SRC6_NTRUE

TRUE 3V3S5_FSET1V05S0_COMPTRUE1V05S0_FSETTRUE

CK410_CPU1_NTRUE

CK410_CPU2_ITP_SRC10_PTRUECK410_DOT96_27M_NTRUECK410_DOT96_27M_PTRUE

CK410_LVDS_PTRUE

CK410_SRC5_PTRUE

CK410_SRC8_NTRUE

LVDS_B_DATA_N2_SPNTRUE

53

53

65

53

53

53

53

53

47

53

47

65

66

46

47

47

47

47

47

47

47

47

47

47

47

47

46

47

47

66

65

45

47

46

65

57

65

63

66

46

46

48

45

64

64

51

51

64

45

45

45

46

46

45

45

45

46

47

46

46

46

21

47

45

46

33

33

33

33

33

33

64

33

33

33

33

33

33

45

46

64

47

47

54

54

46

38

47

46

47

45

46

66

54

54

54

46

63

63

45

46

33

33

33

33

33

33

33

33

33

33

37

45

45

37

37

6

45

46

40

6

6

6

51

51

51

51

45

45

65

47

21

21

22

45

45

21

21

23

45

23

45

27

27

39

35

6

6

6

6

6

45

6

33

23

6

6

45

6

6

32

32

32

6

6

32

32

32

6

64

64

64

64

64

64

64

64

64

64

64

64

62

64

64

64

64

32

6

6

6

6

6

6

32

32

32

32

32

65

65

64

64

21

45

47

63

26

45

65

21

21

45

23

45

45

45

39

45

45

21

21

21

45

6

6

65

66

67

67

67

67

62

61

59

26

64

64

61

58

58

45

32

6

6

32

32

32

32

32

32

32

32

32

6



DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

DIGITAL GND SCREW HOLE

Ethernet ALIASES

NO-CONNECT UNUSED CLOCK INTERFACE PORTS

(EMI PAD FOR INVERTER GONNECTOR)

I/O CONNECTOR CHASSIS GND

BATTERY,AUDIO,DIP DIMM CONNECTOR CHASSIS GND

NC

NC NC

CHASSIS GND

NO-CONNECT UNUSED SDVO INTERFACE PORTS

PCI_EXPRESS GRAPHICS ALIASES

LVDS ALIASESNO-CONNECT UNUSED LVDS INTERFACE PORTS

USB PORT "H" = PCI-E Mini Card

USB PORT "F" = IR CONTROLLER

USB PORT D = CAMERA

USB PORT "E" = Unused

USB PORT C = External USB2.0 Port B

ANALOG SWITCH GPIO

USB PORT B = Trackpad(Geyser)

USB PORT A = External USB2.0 Port

USB PORT "G" = BLUETOOTH

FIREWIRE ALIASESNO-CONNECT UNUSED FIREWIRE INTERFACE PORTS

NB CFG ALIASESNO-CONNECT UNUSED CFG INTERFACE PORTS

SO-DIMM ALIASESNO-CONNECT UNUSED ADDRESS INTERFACE PORTS

CLOCK ALIASES

SB ALIASESNO-CONNECT UNUSED CLOCK INTERFACE PORTS

NO-CONNECT UNUSED PCI_EXP INTERFACE PORTS

NO-CONNECT UNUSED SATA INTERFACE PORTS

PCI_EXP ALIASES

SATA ALIASES

DIP DIMM CONNECTOR CHASSIS GND

DIP DIMM CONNECTOR CHASSIS GND

SATA,LVDS CONNECTOR CHASSIS GND

DCIN CONNECTOR CHASSIS GND

1

OMIT

5R2P3-7SQBZ0606

1

OMIT

5R2P3-7SQBZ0602

4022

1

0.01uFC060810%16VCERM

4022

10%0.1UFC06071

X5R16V

OMIT

15R2P3-7SQBZ0601

C06110.01uF

2

1

16V10%

CERM402

2

1

402

C06100.1UF10%16VX5R

1

Z06095R2P3-7SQB

OMIT

2

1 C06130.01uF

402CERM16V10%

1

Z0611OMIT

5R2P3-7B

C0619

2

1

10%0.01uF

402CERM16V2

1 C061210%16VX5R402

0.1UF 0.1UF10%16V

4022

1 C0618

X5R

R0610

2

1

MF-LF402

1/16W5%0

0.01uF

CERM402

2

1 C0615

16V10%

1

OMIT

5R2P3-7SQBZ0610

C06140.1UF

402X5R2

1

16V10%

2

1

CERM402

16V10%0.01uFC0617

05%

402MF-LF1/16W

R06111

2

2

1 C0616

402

16V10%

X5R

0.1UF

2

1R0612

1/16WMF-LF402

5%0

OMIT

STDOFF-4.2OD2.15H-1.2-THZ0613

1

OMITZ0612

STDOFF-4.2OD2.15H-1.2-TH1

4022

1R062105%

MF-LF1/16W

1

Z06085P0R2P3-7BLB

OMIT

1

2402X5R16V

C06300.1UF10%

1CLIP-SM-M42

ZS0620EMI-SPRING

SPKR-MIC-CLIP-M42

SMZS06211

OMIT

STDOFF-4.5OD3.95H-1.1-3.7-TH1Z0604

1

OMIT

STDOFF-4.5OD3.95H-1.1-3.7-TH1Z0621

1

OMIT

STDOFF-4.5OD3.95H-1.1-3.7-TH1Z0603

1

OMIT

STDOFF-4.5OD3.95H-1.1-3.7-TH1Z0605

1

I393

OMIT

1

Z06076P5R2P6-5P5B

SIGNAL ALIAS /RESET

051-7173 G

1086

SYNC_DATE=08/19/2005SYNC_MASTER=ENET

THERMAL STANDOFF4860-0722 Z0603,Z0604,Z0605,Z0621 STANDOFF

1 STANDOFF WIRELESS860-0723 Z0612 STANDOFF

Z0613STANDOFF W/THRU HOLES,WIRELESS1860-0749 STANDOFF

VOLTAGE=0V

GND_CHASSIS_SATA

MAKE_BASE=TRUE

MAKE_BASE=TRUEVOLTAGE=0V

GND_CHASSIS_DCIN

PEG_R2D_C_N4_SPNMAKE_BASE=TRUE

CK410_SRC3_P

=GND_CHASSIS_TMDS_UPPER

PEG_D2R_P<7>

GND_CHASSIS_RIGHTVOLTAGE=0VMAKE_BASE=TRUE

VOLTAGE=0VMAKE_BASE=TRUE

GND_CHASSIS_IO

GND_CHASSIS_CENTERMAKE_BASE=TRUEVOLTAGE=0V

=GND_CHASSIS_USB=GND_CHASSIS_FW_DOWN

=GND_CHASSIS_TMDS_DOWN

GND_CHASSIS_IO1VOLTAGE=0VMAKE_BASE=TRUE

ENET_CTRL12

MEM_B_A<14>MAKE_BASE=TRUE

MEM_B_A14_SPN

MEM_B_A<15>

MEM_A_A<14>MAKE_BASE=TRUE

MEM_A_A14_SPN

MEM_A_A<15>

SUS_CLK_SB

CK410_SRC_CLKREQ3_L CK410_SRC_CLKREQ3_L_SPNMAKE_BASE=TRUE

CK410_SRC_CLKREQ1_L CK410_SRC_CLKREQ1_L_SPNMAKE_BASE=TRUE

CK410_SRC7_NMAKE_BASE=TRUE

CK410_SRC7_N_SPN

CK410_SRC7_P CK410_SRC7_P_SPNMAKE_BASE=TRUE

CK410_SRC1_PMAKE_BASE=TRUE

CK410_SRC1_P_SPN

CK410_SRC3_NMAKE_BASE=TRUE

CK410_SRC3_N_SPN

MAKE_BASE=TRUE

CK410_SRC3_P_SPN

CK410_SRC1_N

PCIE_F_R2D_C_P PCIE_F_R2D_C_P_SPNMAKE_BASE=TRUE

PCIE_F_R2D_C_N PCIE_F_R2D_C_N_SPNMAKE_BASE=TRUE

PCIE_E_R2D_C_P PCIE_E_R2D_C_P_SPNMAKE_BASE=TRUE

PCIE_F_D2R_NMAKE_BASE=TRUE

PCIE_F_D2R_N_SPN

PCIE_F_D2R_PMAKE_BASE=TRUE

PCIE_F_D2R_P_SPN

PCIE_E_R2D_C_N PCIE_E_R2D_C_N_SPNMAKE_BASE=TRUE

PCIE_E_D2R_P PCIE_E_D2R_P_SPNMAKE_BASE=TRUE

PCIE_D_R2D_C_PMAKE_BASE=TRUE

PCIE_D_R2D_C_P_SPN

PCIE_D_R2D_C_NMAKE_BASE=TRUE

PCIE_D_R2D_C_N_SPN

PCIE_E_D2R_NMAKE_BASE=TRUE

PCIE_E_D2R_N_SPN

PCIE_D_D2R_N PCIE_D_D2R_N_SPNMAKE_BASE=TRUE

PCIE_D_D2R_P PCIE_D_D2R_P_SPNMAKE_BASE=TRUE

PCIE_C_R2D_C_PMAKE_BASE=TRUE

PCIE_C_R2D_C_P_SPN

PCIE_C_R2D_C_N PCIE_C_R2D_C_N_SPNMAKE_BASE=TRUE

PCIE_C_D2R_PMAKE_BASE=TRUE

PCIE_C_D2R_P_SPN

PCIE_C_D2R_N PCIE_C_D2R_N_SPNMAKE_BASE=TRUE

SATA_A_R2D_C_P SATA_A_R2D_C_P_SPNMAKE_BASE=TRUE

SATA_A_D2R_PMAKE_BASE=TRUE

SATA_A_D2R_P_SPN

SATA_A_R2D_C_NMAKE_BASE=TRUE

SATA_A_R2D_C_N_SPN

SATA_A_D2R_N SATA_A_D2R_N_SPNMAKE_BASE=TRUE

NB_CFG<17>MAKE_BASE=TRUE

TP_NB_CFG17


TP_NB_CFG15


TP_NB_CFG13

NB_CFG<14>


TP_NB_CFG11


TP_NB_CFG12


TP_NB_CFG10


TP_NB_CFG6

NB_CFG<8> TP_NB_CFG8MAKE_BASE=TRUE


TP_NB_CFG3


TP_NB_CFG4

FW_C_TPB_NMAKE_BASE=TRUE

FW_C_TPB_N_SPN

=FWPWR_PWRON

MAKE_BASE=TRUE

NC_FWPWR_PWRONNO_TEST=TRUE

FW_C_TPB_PMAKE_BASE=TRUE

FW_C_TPB_P_SPN

FW_C_TPA_NMAKE_BASE=TRUE

FW_C_TPA_N_SPN

FW_C_TPA_P FW_C_TPA_P_SPNMAKE_BASE=TRUE

FW_B_TPB_NMAKE_BASE=TRUE

FW_B_TPB_N_SPN

FW_C_TPBIASMAKE_BASE=TRUE

FW_C_TPBIAS_SPN

FW_B_TPB_PMAKE_BASE=TRUE

FW_B_TPB_P_SPN

FW_B_TPA_NMAKE_BASE=TRUE

FW_B_TPA_N_SPN

FW_B_TPA_PMAKE_BASE=TRUE

FW_B_TPA_P_SPN

FW_B_TPBIASMAKE_BASE=TRUE

FW_B_TPBIAS_SPN

MAKE_BASE=TRUEUSB2_EXTA_P USB_A_P

MAKE_BASE=TRUEEXTAUSB_OC_L USB_A_OC_L

USB2_EXTA_NMAKE_BASE=TRUE

USB_A_N

USB2_GEYSER_PMAKE_BASE=TRUE

USB_B_P

USB2_EXTB_PMAKE_BASE=TRUE

USB_C_P

USB2_GEYSER_NMAKE_BASE=TRUE

USB_B_N

MAKE_BASE=TRUEEXTBUSB_OC_L USB_C_OC_L

USB2_EXTB_NMAKE_BASE=TRUE

USB_C_N

MAKE_BASE=TRUE

USB2_CAMERA_P USB_D_P

MAKE_BASE=TRUE

USB2_CAMERA_N USB_D_N

MAKE_BASE=TRUE

TP_USBP_E USB_E_P

MAKE_BASE=TRUE

TP_USBN_E USB_E_N

MAKE_BASE=TRUE

USB_IR_P USB_F_P

MAKE_BASE=TRUE

USB_IR_N USB_F_N

MAKE_BASE=TRUE

USB_BT_P USB_G_P

USB_BT_NMAKE_BASE=TRUE

USB_G_N

MAKE_BASE=TRUE

USB2_AIRPORT_P USB_H_P

USB2_AIRPORT_NMAKE_BASE=TRUE

USB_H_N

MAKE_BASE=TRUE

SB_GPIO22 TP_SB_GPIO22

PM_EXTTS_L<0>MAKE_BASE=TRUE

DIMM_OVERTEMP_L

MAKE_BASE=TRUE

FWH_INIT_L SMC_CPU_INIT_3_3_L

=USB2_EXTA_P

=USB2_EXTA_N

=EXTAUSB_OC_L

=USB2_GEYSER_P

=USB2_EXTB_P

=USB2_GEYSER_N

=EXTBUSB_OC_L

=USB2_EXTB_N

=USB2_CAMERA_P

=USB2_CAMERA_N

=USB2_IR_P

=USB2_IR_N

=USB2_BT_P

=USB2_BT_N

=USB2_AIRPORT_P

=USB2_AIRPORT_N

=SB_GPIO22

=GND_CHASSIS_RJ45

=GND_CHASSIS_LVDS

=GND_DCIN_CHGND

PEG_D2R_P<8>

PEG_D2R_P<9>

PEG_D2R_P<10>

PEG_D2R_P<11>

CPU_THERMAL_SCREW_DOWN

NB_RIGHT_DOWN_SCREW

CPU_THERMAL_SCREW_RIGHT

LVDS_B_DATA_N<2>

LVDS_B_DATA_P<2>

LVDS_B_DATA_P<0>

LVDS_B_CLK_N

PEG_R2D_C_P<6>

PEG_R2D_C_P<8>

PEG_R2D_C_P13_SPNMAKE_BASE=TRUE





MAKE_BASE=TRUE

PEG_R2D_C_N12_SPN

MAKE_BASE=TRUE

PEG_R2D_C_N10_SPN


MAKE_BASE=TRUE

PEG_D2R_P13_SPN

MAKE_BASE=TRUE

PEG_D2R_P3_SPN

MAKE_BASE=TRUE

PEG_D2R_P0_SPN

PEG_D2R_N15_SPNMAKE_BASE=TRUE

MAKE_BASE=TRUE

PEG_D2R_N14_SPN

MAKE_BASE=TRUE

PEG_D2R_N12_SPN

LVDS_B_CLK_P

LVDS_B_DATA_N<0>

LVDS_B_DATA_N<1>

LVDS_B_DATA_P<1>

PEG_D2R_N<2>

PEG_R2D_C_P<9>

PEG_R2D_C_P<7>

PEG_R2D_C_P<5>

PEG_R2D_C_N<13>

PEG_R2D_C_N<12>

PEG_R2D_C_N<14>

PEG_R2D_C_P<4>

PEG_R2D_C_N<15> PEG_R2D_C_N15_SPNMAKE_BASE=TRUE

MAKE_BASE=TRUE

PEG_R2D_C_N14_SPN




PEG_D2R_P15_SPNMAKE_BASE=TRUE


MAKE_BASE=TRUE

PEG_D2R_P9_SPN

MAKE_BASE=TRUE

PEG_D2R_N9_SPN

=GND_CHASSIS_AUDIO_JACK

=GND_BATT_CHGND

PEG_D2R_N<0>

PEG_D2R_P<12>

PEG_R2D_C_N<4>

PEG_D2R_N<13>


PEG_D2R_P<2>


MAKE_BASE=TRUE

LVDS_B_CLK_N_SPN

PEG_D2R_N<5>

PEG_D2R_N<4>

MAKE_BASE=TRUE

PEG_D2R_N2_SPN

MAKE_BASE=TRUE

PEG_D2R_N3_SPN

MAKE_BASE=TRUE

PEG_D2R_N7_SPN

MAKE_BASE=TRUE

PEG_D2R_N8_SPN

PEG_D2R_N<9>

MAKE_BASE=TRUE

PEG_D2R_N6_SPN

MAKE_BASE=TRUE

PEG_D2R_P5_SPN


PEG_D2R_N0_SPNMAKE_BASE=TRUE

MAKE_BASE=TRUE

PEG_D2R_N10_SPN

MAKE_BASE=TRUE

PEG_D2R_N13_SPN


MAKE_BASE=TRUE

PEG_D2R_P7_SPN

MAKE_BASE=TRUE

PEG_D2R_P8_SPN



MAKE_BASE=TRUE

PEG_R2D_C_P15_SPN

PEG_R2D_C_P<13>

PEG_R2D_C_P<10>

MAKE_BASE=TRUE

LVDS_B_DATA_P1_SPN

PEG_D2R_N<3>

PEG_R2D_C_P<12>

MAKE_BASE=TRUE

PEG_D2R_N11_SPN

PEG_D2R_P<0>

PEG_D2R_P<6>

PEG_D2R_N<12>

PEG_D2R_N<15>

PEG_R2D_C_N<8>

PEG_D2R_N<14>



PEG_D2R_N<10>

PEG_D2R_N<11>

PEG_D2R_P<4>

PEG_D2R_P<13>

PEG_R2D_C_N<6>

PEG_R2D_C_N<11>

PEG_R2D_C_N<9>

PEG_R2D_C_N<7>

PEG_D2R_P<15>

PEG_R2D_C_N<5>

PEG_D2R_P<5>

PEG_D2R_P<3>


GND_CHASSIS_CPU

MAKE_BASE=TRUE

LVDS_B_DATA_P2_SPN

MAKE_BASE=TRUE

LVDS_B_DATA_P0_SPNMAKE_BASE=TRUE

LVDS_B_DATA_N2_SPNMAKE_BASE=TRUE



LVDS_B_CLK_P_SPN

PEG_R2D_C_P<14>


MAKE_BASE=TRUE

PEG_R2D_C_P6_SPN

=GND_CHASSIS_AUDIO_SHIELD1

=GND_CHASSIS_DIPDIMM_RIGHT

=GND_CHASSIS_AUDIO_MIC


MAKE_BASE=TRUE

PEG_D2R_P2_SPN

MAKE_BASE=TRUE

PEG_D2R_P6_SPN


MAKE_BASE=TRUE

PEG_R2D_C_P9_SPN

MAKE_BASE=TRUE

PEG_D2R_N4_SPN

MAKE_BASE=TRUE

PEG_D2R_N5_SPN

PEG_D2R_N<8>

PEG_D2R_N<7>

PEG_D2R_N<6>

INVT_CHGND

=GND_CHASSIS_AUDIO_SPKRCONN

CPU_THERMAL_SCREW_UP

GND_CHASSIS_FANSCREW

=GND_CHASSIS_DIPDIMM_CENTER

GND_CHASSIS_IO


=GND_CHASSIS_DIPDIMM_LEFT

PEG_D2R_P<14>

PEG_R2D_C_N<10>

PEG_R2D_C_P<11>

PEG_R2D_C_P<15>

MAKE_BASE=TRUE

TP_NB_CFG14

=GND_CHASSIS_FW_UPPER

ENET_CTRL25MAKE_BASE=TRUE

ENET_CTRL25_SPN

MAKE_BASE=TRUE

CK410_SRC1_N_SPN

MAKE_BASE=TRUE

SUS_CLK_SB_SPN

MAKE_BASE=TRUE

MEM_A_A15_SPN

MAKE_BASE=TRUE

MEM_B_A15_SPN

ENET_CTRL12_SPNMAKE_BASE=TRUE

47

45 29

21

29

35

32

69

13

6

42

39

69

36

29

29

28

28

23

32 5

32 5

32 5

32 5

32 5

32 5

5

32

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

21

21

21

21

14

14

14

14

14

14

14

14

14

14

14

38 5

39

38 5

38 5

38 5

38 5

38 5

38 5

38 5

38 5

38 5

22

22

22

22

22

22

22

22

22

22

5 22

5 22

22

22

22

22

22

22

22

14 28

5 45

42

42

42

40

42

40

42

42

67

67

41

41

44

44

43

43

69

37

67

65

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

56

65

13

13

13

13

13

5

13

13

13

13

13

5

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

5

5

5

5

5

13

29

57

13

13

13

67

28

6

28

13

13

13

13

39

36

5

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IN

IN

IN

IN

IN

IN

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

OUT

OUT

OUT

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

IN

IN

IN

IN

IN

IN

IN

OUT

A7*

RSVD14

RSVD15

BCLK1

BCLK0

RSVD20

RSVD17

RSVD18

RSVD19

RSVD16

RSVD13

RSVD12

THERMTRIP*

THERMDC

THERMDA

PROCHOT*

DBR*

TRST*

TMS

TDO

TDI

TCK

PREQ*

PRDY*

BPM3*

BPM1*

BPM2*

BPM0*

HITM*

HIT*

TRDY*

RS2*

RS1*

RS0*

RESET*

LOCK*

INIT*

IERR*

BR0*

DBSY*

DRDY*

DEFER*

BPRI*

BNR*

ADS*

RSVD11

RSVD6

RSVD7

RSVD8

RSVD1

RSVD2

RSVD3

RSVD4

RSVD5

RSVD9

RSVD10

SMI*

LINT0

LINT1

STPCLK*

IGNNE*

FERR*

A20M*

ADSTB1*

A30*

A31*

A27*

A28*

A29*

A26*

A25*

A24*

A22*

A23*

A21*

A20*

A19*

A18*

A17*

REQ4*

REQ3*

REQ1*

REQ0*

REQ2*

ADSTB0*

A14*

A15*

A16*

A13*

A12*

A11*

A10*

A9*

A8*

A6*

A5*

A4*

A3*

(1 OF 4)

THERM

HCLK

RESERVED

ADDR GROUP1

ADDR GROUP0

CONTROL

XDP/ITP SIGNALS

PSI*

SLP*

PWRGOOD

DPRSTP*

DPSLP*

DPWR*

COMP2

COMP3

COMP1

COMP0

DSTBP3*

DSTBN3*

DINV3*

D63*

D62*

D61*

D60*

D59*

D58*

D57*

D56*

D55*

D54*

D52*

D53*

D51*

D50*

D49*

D48*

DINV2*

DSTBN2*

D47*

DSTBP2*

D45*

D46*

D44*

D43*

D42*

D41*

D40*

D39*

D38*

D37*

D36*

D35*

D34*

D33*

D32*

BSEL2

DSTBN1*

BSEL0

BSEL1

TEST2

TEST1

DINV1*

DSTBP1*

D31*

D30*

D29*

D26*

D27*

D28*

D24*

D25*

D23*

D21*

D22*

D20*

D19*

D18*

D16*

D17*

DINV0*

DSTBP0*

DSTBN0*

D15*

D14*

D13*

D12*

D11*

D10*

D9*

D8*

D7*

D6*

D5*

D4*

D3*

D2*

D1*

D0*

GTLREF

NC

(2 OF 4)

MISC

DATA GRP0

DATA GRP2

DATA GRP1

DATA GRP3

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

CPU IS HOT

AND CPU VR TO INFORM

WITHOUT T-ING (NO

CHANGE THE PULLS RESISTOR VALUE PER NAPA PLATFORM DG REV 0.9

WE THROUGH THE ITP700FLEX CONNECTOR CONNECT TO PDB XDP BUFFER BOARD--ECM*50 SO THE TDI PULL UP THROUGH 54.9 OHM,TMS PULL UP THROUGH 54.9 OHM TCK PULL DOWN THROUGH 54.9 OHM(FOLLOW UP XDP DESIGN REFERENCE)

PLACE GND VIA W/IN 1000 MILS

FSB_IERR_L WITH A GND

PLACE TESTPOINT ON

LAYOUT NOTE: 0.5" MAX LENGTH

ICH7-M AND GMCH

TRACE LENGTH SHORTER THAN 0.5".

TRACE LENGTH SHORTER THAN 0.5".

COMP0,2 CONNECT WITH ZO=27.4OHM, MAKE

LAYOUT NOTE:

COMP1,3 CONNECT WITH ZO=55OHM, MAKE

CPU_PROCHOT_L TO SMC

SHOULD CONNECT TO

PM_THRMTRIP#

STUB)

SPARE[7-0],HFPLL:

ROUTE TO TP VIA AND

0.1" AWAY

1/16W

402MF-LF

54.91%

R07021

2

MF-LF402

5%1/16W

68R07041

2

1/16W1%

402MF-LF

1KR07051

2

1/16W1%

402MF-LF

2.0KR07061

2

54.9

4021%

R07191 2

27.4R07181 2

54.9

4021%

R07171 2

402

27.4R07161 2

0

402

NOSTUFF

R07301 2

NOSTUFF

1K

MF-LF402

5%1/16W

R07071

2MF-LF402

5%1/16W

51R07121

2

54.91%1/16WMF-LF402

R07031

2

54.9

4021%

R07201 2

1%402

54.9R07211 2

54.9

4021%

R07221 2

BGA

YONAHCPU

OMIT

U0700

N3

P5

P2

L1

P4

P1

R1

Y2

U5

R3

W6

A6

U4

Y5

U2

R4

T5

T3

W3

W5

Y4

J4

W2

Y1

L4

M3

K5

M1

N2

J1

H1

L2

V4

A22

A21

E2

AD4

AD3

AD1

AC4

G5

F1

C20

E1

H5

F21

A5

G6

E4

D20

C4

B3

C6

B4

H4

AC2

AC1

D21

K3

H2

K2

J3

L5

B1

F3

F4

G3

AA1

C3

B25

T22

D2

F6

D3

C1

AF1

D22

C23

AA4

C24

AB2

AA3

M4

N5

T2

V3

B2

A3

D5

AC5

AA6

AB3

A24

A25

C7

AB5

G2

AB6

CPUYONAH

BGA

OMIT

U0700

B22

B23

C21

R26

U26

U1

V1

E22

F24

J24

J23

H26

F26

K22

H25

N22

K25

P26

R23

E26

L25

L22

L23

M23

P25

P22

P23

T24

R24

L26

H22

T25

N24

AA23

AB24

V24

V26

W25

U23

U25

U22

F23

AB25

W22

Y23

AA26

Y26

Y22

AC26

AA24

AC22

AC23

G25

AB22

AA21

AB21

AC25

AD20

AE22

AF23

AD24

AE21

AD21

E25

AE25

AF25

AF22

AF26

E23

K24

G24

J26

M26

V23

AC20

E5

B5

D24

H23

M24

W24

AD23

G22

N25

Y25

AE24

AD26

A2

AE6

D6

D7

C26

D25


108

051-7173 G

7

SYNC_MASTER=MASTER

CPU 1 OF 2-FSB

FSB_BPRI_LFSB_BNR_LFSB_ADS_L

CPU_PSI_LFSB_SLPCPU_LCPU_PWRGD

CPU_DPRSTP_LCPU_DPSLP_LFSB_DPWR_L

CPU_COMP<2>CPU_COMP<3>

CPU_COMP<1>CPU_COMP<0>

FSB_DSTBP_L<3>FSB_DSTBN_L<3>

FSB_DINV_L<3>

FSB_D_L<63>FSB_D_L<62>FSB_D_L<61>FSB_D_L<60>FSB_D_L<59>FSB_D_L<58>FSB_D_L<57>FSB_D_L<56>FSB_D_L<55>FSB_D_L<54>

FSB_D_L<52>FSB_D_L<53>

FSB_D_L<51>FSB_D_L<50>FSB_D_L<49>FSB_D_L<48>

FSB_DINV_L<2>

FSB_DSTBN_L<2>FSB_D_L<47>

FSB_DSTBP_L<2>


FSB_D_L<44>FSB_D_L<43>FSB_D_L<42>FSB_D_L<41>FSB_D_L<40>FSB_D_L<39>FSB_D_L<38>FSB_D_L<37>FSB_D_L<36>FSB_D_L<35>FSB_D_L<34>FSB_D_L<33>FSB_D_L<32>

CPU_BSEL<2>

FSB_DSTBN_L<1>

CPU_BSEL<0>CPU_BSEL<1>

CPU_TEST2

CPU_TEST1

FSB_DINV_L<1>FSB_DSTBP_L<1>

FSB_D_L<31>FSB_D_L<30>FSB_D_L<29>



FSB_D_L<23>




FSB_DINV_L<0>FSB_DSTBP_L<0>FSB_DSTBN_L<0>FSB_D_L<15>FSB_D_L<14>FSB_D_L<13>FSB_D_L<12>FSB_D_L<11>FSB_D_L<10>FSB_D_L<9>FSB_D_L<8>FSB_D_L<7>FSB_D_L<6>FSB_D_L<5>FSB_D_L<4>FSB_D_L<3>FSB_D_L<2>FSB_D_L<1>FSB_D_L<0>

CPU_GTLREF

FSB_A_L<7>

TP_CPU_SPARE1TP_CPU_SPARE2

FSB_CLK_CPU_NFSB_CLK_CPU_P

TP_CPU_SPARE7

TP_CPU_SPARE4TP_CPU_SPARE5TP_CPU_SPARE6

TP_CPU_SPARE3

TP_CPU_SPARE0

TP_CPU_EXTBREF

PM_THRMTRIP_L

CPU_THERMD_NCPU_THERMD_PCPU_PROCHOT_L

XDP_DBRESET_LXDP_TRST_LXDP_TMSXDP_TDOXDP_TDIXDP_TCK

XDP_BPM_L<4>XDP_BPM_L<3>XDP_BPM_L<2>

XDP_BPM_L<0>

FSB_CPURST_L

FSB_LOCK_L

CPU_INIT_LFSB_IERR_L

FSB_BREQ0_L

FSB_DRDY_LFSB_DEFER_L

TP_CPU_HFPLL

TP_CPU_A37_LTP_CPU_A38_LTP_CPU_A39_L

TP_CPU_A32_LTP_CPU_A33_LTP_CPU_A34_LTP_CPU_A35_LTP_CPU_A36_L

TP_CPU_APM0_LTP_CPU_APM1_L

CPU_SMI_L

CPU_INTRCPU_NMI

CPU_STPCLK_L

CPU_IGNNE_LCPU_FERR_LCPU_A20M_L

FSB_ADSTB_L<1>

FSB_A_L<30>FSB_A_L<31>

FSB_A_L<27>FSB_A_L<28>FSB_A_L<29>


FSB_A_L<22>FSB_A_L<23>

FSB_A_L<21>FSB_A_L<20>FSB_A_L<19>FSB_A_L<18>FSB_A_L<17>

FSB_REQ_L<4>FSB_REQ_L<3>

FSB_REQ_L<1>FSB_REQ_L<0>

FSB_REQ_L<2>

FSB_ADSTB_L<0>


FSB_A_L<13>FSB_A_L<12>FSB_A_L<11>FSB_A_L<10>FSB_A_L<9>FSB_A_L<8>

FSB_A_L<6>FSB_A_L<5>FSB_A_L<4>FSB_A_L<3>

XDP_TCK

XDP_TDI

XDP_TMS

=PP1V05_S0_CPU

=PP1V05_S0_CPU

=PP1V05_S0_CPU

FSB_DBSY_L

XDP_BPM_L<1>

=PP1V05_S0_CPUFSB_TRDY_LFSB_RS_L<2>

FSB_HIT_LFSB_HITM_L

XDP_BPM_L<5>

FSB_RS_L<1>FSB_RS_L<0>

64

64

64

64

11

11

11

11

46

9

9

9

9

58

21

58

26

11

11

11

12

11

11

11

8

8

8

8

12

12

12

58

12

21

21

21

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

33

12

33

33

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

33

33

14

10

10

46

11

11

7

11

7

7

11

11

11

11

11

12

21

12

12

12

21

21

21

21

21

21

21

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

7

7

7

7

7

7

12

11

7 12

12

12

12

11

12

12

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

VSS_82

VSS_83

VSS_84

VSS_85

VSS_87

VSS_86

VSS_88

VSS_89

VSS_90

VSS_92

VSS_91

VSS_93

VSS_94

VSS_95

VSS_97

VSS_96

VSS_100

VSS_98

VSS_99

VSS_102

VSS_101

VSS_105

VSS_103

VSS_104

VSS_106

VSS_107

VSS_110

VSS_109

VSS_108

VSS_111

VSS_112

VSS_115

VSS_114

VSS_113

VSS_116

VSS_117

VSS_118

VSS_120

VSS_119

VSS_123

VSS_121

VSS_122

VSS_124

VSS_125

VSS_128

VSS_126

VSS_127

VSS_129

VSS_130

VSS_133

VSS_131

VSS_132

VSS_134

VSS_135

VSS_138

VSS_136

VSS_137

VSS_139

VSS_140

VSS_141

VSS_143

VSS_142

VSS_146

VSS_144

VSS_145

VSS_147

VSS_148

VSS_151

VSS_150

VSS_149

VSS_152

VSS_153

VSS_156

VSS_155

VSS_154

VSS_157

VSS_158

VSS_159

VSS_161

VSS_160

VSS_162

VSS_1

VSS_2

VSS_3

VSS_5

VSS_4

VSS_6

VSS_7

VSS_8

VSS_10

VSS_9

VSS_11

VSS_12

VSS_15

VSS_13

VSS_14

VSS_16

VSS_17

VSS_18

VSS_19

VSS_20

VSS_23

VSS_22

VSS_21

VSS_24

VSS_25

VSS_28

VSS_27

VSS_26

VSS_29

VSS_30

VSS_33

VSS_32

VSS_31

VSS_34

VSS_35

VSS_38

VSS_37

VSS_36

VSS_39

VSS_40

VSS_41

VSS_42

VSS_43

VSS_46

VSS_44

VSS_45

VSS_47

VSS_48

VSS_51

VSS_49

VSS_50

VSS_52

VSS_53

VSS_56

VSS_54

VSS_55

VSS_57

VSS_58

VSS_59

VSS_60

VSS_61

VSS_63

VSS_62

VSS_64

VSS_65

VSS_66

VSS_69

VSS_68

VSS_67

VSS_70

VSS_71

VSS_74

VSS_73

VSS_72

VSS_75

VSS_76

VSS_79

VSS_78

VSS_77

VSS_80

VSS_81

(4 OF 4)

VCC_67

VCC_64

VCC_66

VCC_65

VCC_63

VCC_62

VCC_61

VCC_59

VCC_60

VCC_58

VCC_57

VCC_56

VCC_54

VCC_55

VCC_53

VCC_51

VCC_52

VCC_49

VCC_50

VCC_48

VCC_47

VCC_46

VCC_44

VCC_45

VCC_43

VCC_41

VCC_42

VCC_40

VCC_39

VCC_38

VCC_36

VCC_37

VCC_33

VCC_35

VCC_34

VCC_31

VCC_32

VCC_29

VCC_30

VCC_28

VCC_26

VCC_27

VCC_23

VCC_25

VCC_24

VCC_22

VCC_21

VCC_20

VCC_18

VCC_19

VCC_17

VCC_16

VCC_15

VCC_13

VCC_14

VCC_12

VCC_10

VCC_11

VCC_8

VCC_9

VCC_7

VCC_6

VCC_5

VCC_3

VCC_4

VCC_2

VCC_1 VCC_68

VCC_69

VCC_71

VCC_70

VCC_72

VCC_74

VCC_76

VCC_75

VCC_78

VCC_77

VCC_79

VCC_81

VCC_80

VCC_84

VCC_82

VCC_83

VCC_86

VCC_85

VCC_87

VCC_89

VCC_88

VCC_90

VCC_91

VCC_92

VCC_94

VCC_93

VCC_95

VCC_96

VCC_97

VCC_99

VCC_98

VCC_100

VCCP_1

VCCP_2

VCCP_3

VCCP_4

VCCP_5

VCCP_6

VCCP_7

VCCP_9

VCCP_8

VCCP_11

VCCP_10

VCCP_12

VCCP_13

VCCP_14

VCCP_16

VCCP_15

VCCA

VID0

VID1

VID2

VID3

VID4

VID5

VID6

VSSSENSE

VCCSENSE

VCC_73(3 OF 4)

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

VCCA=1.5 ONLY

LAYOUT NOTE: CONNECT R0803

PULL-DOWN

IF NO USE, NEED PULL-UP OR

VID FOR CPU POWER SUPPLY

TRANSMISSION LINE

RESISTORS TERMINATE THE 55 OHM

LAYOUT NOTE:

(CPU CORE POWER)

(CPU IO POWER 1.05V)

STUB.

LAYOUT NOTE:

VCCSENSE AND VSSSENSE LINES

SHOULD BE OF EQUAL LENGTH

LOCATION WHERE THE TWO 54.9 OHM

BETWEEN VCCSENSE AND VSSSENSE AT THE

TO CONNECT A DIFFERENCTIAL PROBE

PROVIDE A TEST POINT (WITH NO STUB)

LAYOUT NOTE:

TO TP_VSSSENSE WITH NO

(CPU INTERNAL PLL POWER 1.5V)

ZO=27.4 OHM DIFFERNTIAL TRACE ROUTING.

CPU_VCCSENSE_P/CPU_VCCSENSE_N USE

9

9

9

9

9

9

100

MF-LF402

1%1/16W

R08031

2

9

58

58

1/16W1%

402MF-LF

100R08021

2

CPUYONAH

BGA

OMIT

U0700A4

B8

V25

W1

W4

W23

W26

Y3

Y6

Y21

Y24

AA2

B11

AA5

AA8

AA11

AA14

AA16

AA19

AA22

AA25

AB1

AB4

B13

AB8

AB11

AB13

AB16

AB19

AB23

AB26

AC3

AC6

AC8

B16

AC11

AC14

AC16

AC19

AC21

AC24

AD2

AD5

AD8

AD11

B19

AD13

AD16

AD19

AD22

AD25

AE1

AE4

AE8

AE11

AE14

B21

AE16

AE19

AE23

AE26

AF3

AF6

AF8

AF11

AF13

AF16

B24

AF19

AF21

AF24

C5

C8

C11

A8

C14

C16

C19

C2

C22

C25

D1

D4

D8

D11

A11

D13

D16

D19

D23

D26

E3

E6

E8

E11

E14

A14

E16

E19

E21

E24

F5

F8

F11

F13

F16

F19

A16

F2

F22

F25

G4

G1

G23

G26

H3

H6

H21

A19

H24

J2

J5

J22

J25

K1

K4

K23

K26

L3

A23

L6

L21

L24

M2

M5

M22

M25

N1

N4

N23

A26

N26

P3

P6

P21

P24

R2

R5

R22

R25

T1

B6 T4

T23

T26

U3

U6

U21

U24

V2

V5

V22

CPUYONAH

BGA

OMIT

U0700A7

B7

AF20

B9

B10

B12

B14

B15

B17

B18

B20

C9

A9

C10

C12

C13

C15

C17

C18

D9

D10

D12

D14

A10

D15

D17

D18

E7

E9

E10

E12

E13

E15

E17

A12

E18

E20

F7

F9

F10

F12

F14

F15

F17

F18

A13

F20

AA7

AA9

AA10

AA12

AA13

AA15

AA17

AA18

AA20

A15

AB9

AC10

AB10

AB12

AB14

AB15

AB17

AB18

AB20

AB7

A17

AC7

AC9

AC12

AC13

AC15

AC17

AC18

AD7

AD9

AD10

A18

AD12

AD14

AD15

AD17

AD18

AE9

AE10

AE12

AE13

AE15

A20

AE17

AE18

AE20

AF9

AF10

AF12

AF14

AF15

AF17

AF18

B26

V6

N6

R21

R6

T21

T6

V21

W21

G21

J6

K6

M6

J21

K21

M21

N21

AF7

AD6

AF5

AE5

AF4

AE3

AF2

AE2

AE7


1088

G051-7173

SYNC_MASTER=MASTER

CPU 2 OF 2-PWR/GND

=PPVCORE_S0_CPU

CPU_VCCSENSE_P

CPU_VCCSENSE_N

CPU_VID<6>CPU_VID<5>CPU_VID<4>CPU_VID<3>CPU_VID<2>CPU_VID<1>CPU_VID<0>

=PP1V5_S0_CPU

=PP1V05_S0_CPU

=PPVCORE_S0_CPU

64

64

64

48

11

48

9

64

9

9

8

9

7

8

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

TABLE_ALT_ITEM

TABLE_ALT_ITEM

PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:

TABLE_ALT_HEAD

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

THIS 470UF FOR CPU,GMCH FSB BUS 1.05V

VCCA DECOUPLING

# VCCLFM: VCORE AT LOWEST FREQUENCY MODE

(CPU INTERNAL PLL POWER 1.5V)

PLACE NEAR THE NORTH BRIDGE

SV CPU

R0921~R0927 FOR CPU VOLTAGE MANUAL SETTING

DUAL CORE 1.0

# TWO PROCESSORS AT THE SAME FREQUENCY MAY HAVE DIFFERENT SETTING

1.30

1.301.1625

TBD

# REFER TO YONAH PROCESSOR EMTS REV 1.0WITH THE VID RANGE(VCORE VOLTAGE)!

1.1625

# ALL PROCESSOR DEFAULT VCORE FOR INITIAL POWER UP IS 1.2V

# VCCHFM: VCORE AT HIGHEST FREQUENCY MODE

VCCHFMSV CPU

TYP

TBD

TBD

TBD

SINGLE CORE

ULV CPU

VCCHFM

UNIT: V

LV CPU

DUAL CORE

MAXMIN

VCCLFM

TBD

1.1625

VCCHFM

VCCLFM TBD

VCCHFM

VCCLFM

TBD

VCCLFM

ON BOTTOM SIDE

CPU CORE VID<> SETTINGS

ON BOTTOM SIDE

PLACE NEAR THE CPU

(10 PCS ON NORTH SIDE

10 PCS ON SOUTH SIDE)

(2 PCS ON NORTH SIDE

2 PCS ON SOUTH SIDE)

(CPU CORE POWER)VCC CORE DECOUPLING

IF WE USE LOW ESL CAP,THEN WE CAN USE 20 PCS 22UF CAP

(CPU IO POWER 1.05V)VCCP CORE DECOUPLING

21R0922MF-LF

04021/16W5%

21R09231/16W5% MF-LF0402

21R09241/16W MF-LF04025%

21R09251/16W MF-LF

04025%

21R0926 0MF-LF4021/16W5%21R0927

1/16W MF-LF5%0402

2

1 C0951

603X5R6.3V

10UF20%

2

1C0950

16VCERM

0.01uF10%

402

470UF

CRITICAL

20%2.5VTANTD2T

C09401

23

470UF-8MOHM

POLY

CRITICAL

20%2.5V

D2T

C09411

23

NOSTUFF

470UF-8MOHM

POLY

20%2.5V

CRITICAL

D2T

C09421

23

470UF-8MOHM

POLY2.5V20%

CRITICAL

D2T

C09431

23

470UF-8MOHM

POLY

CRITICAL

2.5V20%

D2T

C09441

23

470UF-8MOHM

POLY

20%2.5V

CRITICAL

D2T

C09461

23

C091122UF20%6.3V805

2

1

CERM-X5R

CRITICAL

22UF20%6.3V805

2

1

CERM-X5R

CRITICAL

C0910CRITICAL

CERM-X5R

1

28056.3V20%22UFC0908 C0901

CRITICAL

CERM-X5R

1

28056.3V20%22UF

CRITICAL

CERM-X5R

1

28056.3V20%22UFC0928

22UF20%6.3V805

2

1

CERM-X5R

CRITICAL

C0900CRITICAL

CERM-X5R

1

28056.3V20%22UFC0909

22UF20%6.3V805

2

1

CERM-X5R

CRITICAL

C090722UF20%6.3V805

2

1

CERM-X5R

CRITICAL

C0929

C092422UF20%6.3V805

2

1

CERM-X5R

CRITICAL

C0918CRITICAL

CERM-X5R

1

28056.3V20%22UF

C091322UF20%6.3V805

2

1

CERM-X5R

CRITICAL

C0912CRITICAL

CERM-X5R

1

28056.3V20%22UF

C090422UF20%6.3V805

2

1

CERM-X5R

CRITICAL

C0930CRITICAL

CERM-X5R

1

28056.3V20%22UF

C090222UF20%6.3V805

2

1

CERM-X5R

CRITICAL

C0931CRITICAL

CERM-X5R

1

28056.3V20%22UF

C093922UF20%6.3V805

2

1

CERM-X5R

CRITICAL

C092022UF20%6.3V805

2

1

CERM-X5R

CRITICAL

CRITICAL

CERM-X5R

1

28056.3V20%22UFC0923

2

1C0926

40210VCERM

0.1UF20%

2

1C09340.1UF

402

20%10VCERM 2

1C0935

40210V20%0.1UFCERM 2 CERM

20%10V402

0.1UFC093610.1UFC0937

2

1

CERM20%

40210V

0.1UF20%10VCERM402

C09381

2

21R0921 0MF-LF1/16W 4025%

USE TAIYO138S0606 ? ALL138S0602

USE SAMSUNG AND MURATA ONLYALL138S0602138S0603 ?

CPU DECAPS & VID<>

9

051-7173 G

108

=PPVCORE_S0_CPU

CPU_VID_R<6>

CPU_VID_R<5>

CPU_VID_R<4>

CPU_VID_R<3>

CPU_VID_R<2>

CPU_VID_R<1>

CPU_VID_R<0>

CPU_VID<6>

CPU_VID<5>

CPU_VID<3>

CPU_VID<4>

CPU_VID<2>

CPU_VID<1>

CPU_VID<0>

=PP1V5_S0_CPU

=PP1V05_S0_CPU64

64

11

48

64

8

8

58

58

58

58

58

58

58

8

8

8

8

8

8

8

8

7

D+

D-

ALERT*/

THM*

SCLK

SDATA

VDD

GND

THM2*

IO

IO

IN

OUT

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

LAYOUT NOTE:

PLACEHOLDER ADT7461A

(TO CPU INTERNAL THERMAL DIODE)

CPU_THERMD_N

LAYOUT NOTE:

CPU ZONE THERMAL SENSOR

ROUTE CPU_THERMD_P AND

10 MIL TRACE

LAYER.

10 MIL SPACING

FOR CPU_THERMD_P AND CPU_THERMD_N ON SAME

ADD GND GUARD TRACE

PLACE U1001 NEAR THE U1200

1

4

7

8

5

3

2

6

U1001

ADT7461

MSOP

CRITICAL

21

R1001

1%

402

1/16W

499

MF-LFC1001

10%0.001uF

50VCERM2

1

402

2

1 C1002

402

10%16V

0.1UF

X5R

21

R1002

1/16W

402MF-LF

1%

499

2

1R1005

MF-LF

10K

402

5%1/16W

2

1R1006

5%

MF-LF402

1/16W

10K

CPU MISC1-TEMP SENSORSYNC_DATE=08/19/2005SYNC_MASTER=ENET

10810

G051-7173

THRM_CPU_DX_P

THRM_CPU_DX_N

CPU_THERMD_P

CPU_THERMD_N

=PP3V3_S0_THRM_SNR

THRM_ALERT_L

THRM_ALERT

SMB_THRM_CLK

SMB_THRM_DATA

64

7

7

49

27

27

OUT

IN

OUT

IN

OUT

OUT

OUT

IN

IN

OUT

IO

IO

IO

IO

IO

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

ITP TCK SIGNAL LAYOUT NOTE:

CONNECTOR’S FBO PIN.

(AND WITH RESET BUTTON)

NC

NC

516S0416

INDICATE THAT ITP IS USING TAP I/F, NC IN 945GM CHIPSET SYSTEM.(DBA#)

(DEBUG PORT ACTIVE)

TO ICH7M SYS_RST*, AND WITH SYSTEM RESET LOGIC(DBR#)

(DEBUG PORT RESET)

(TCK)

TCK PIN AND THEN FORK BACK FROM CPU TCK PIN AND ROUTE BACK TO ITP700FLEXROUTE THE TCK SIGNAL FROM ITP700FLEX CONNECTOR’S TCK PIN TO CPU’S

(FBO)

(FROM CK410M HOST 133/167MHZ)

CPU ITP700FLEX DEBUG SUPPORT

21

R1100ITP

402

1/16W1%

MF-LF

22.6

ITP

402

1%1/16WMF-LF

1 222.6R1102

2

1R1103

MF-LF402

1%1/16W

54.9

402X5R16V10%0.1UF

1

2

ITP

C11001/16W

240

402MF-LF

5%

1

2

R1104

2

1R1101

MF-LF

1%

402

1/16W

54.9

2

1R1106

MF-LF1/16W5%

402

680

SM1

CRITICAL

F-ST-5047

1 2

3 4

5 6

7 8

9 10

11 12

13 14

15 16

17 18

19 20

21 22

23 24

25 26

27 28

29 30

J1102

ITP

SYNC_MASTER=MASTER

10811

G051-7173

SYNC_DATE=5/23/05

CPU ITP700FLEX DEBUG

XDP_DBRESET_L

CPU_XDP_CLK_NCPU_XDP_CLK_P

XDP_BPM_L<3>

=PP1V05_S0_CPU

XDP_TDI

XDP_TCK

XDP_BPM_L<1>

XDP_BPM_L<4>

XDP_BPM_L<5>XDP_TCK

XDP_TMS

XDP_BPM_L<0>

XDP_BPM_L<2>

=PP3V3_S5_SB_PM

=PP1V05_S0_CPU

FSB_CPURST_L

XDP_TDO ITP_TDO

XDP_TRST_L

ITPRESET_L

64

64

11

11

9 64

9

26

8

11

26

8

12

7

33

33

7

7

7

7

7

7

7

7

7

7

23

7

7

7

7

IO

IO

IO

OUT

OUT

OUT

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

OUT

IO

OUT

OUT

OUT

OUT

IO

IO

IO

IO

IO

IN

IO

IN

IO

IO

HD4*

HD6*

HD16*

HTRDY*

HSLPCPU*

HRS1*

HRS0*

HHITM*

HLOCK*

HHIT*

HDSTBP2*

HDTSBP3*

HDSTBP1*

HDSTBP0*

HDSTBN3*

HDSTBN1*

HDSTBN2*

HDSTBN0*

HDINV2*

HDINV3*

HDINV1*

HDINV0*

HDVREF

HDRDY*

HDPWR*

HDEFER*

HDBSY*

HCPURST*

HBREQ0*

HBPRI*

HBNR*

HAVREF

HCLKIN*

HCLKIN

HYSWING

HYRCOMP

HYSCOMP

HXSWING

HXSCOMP

HXRCOMP

HA13*

HADS*

HADSTB0*

HD3*

HD2*

HD1*

HD0*

HD63*

HD62*

HD61*

HD60*

HD59*

HD58*

HD57*

HD56*

HD55*

HD54*

HD53*

HD52*

HD51*

HD50*

HD49*

HD48*

HD47*

HD46*

HD45*

HD44*

HD43*

HD42*

HD41*

HD40*

HD39*

HD38*

HD37*

HD36*

HD35*

HD34*

HD33*

HD32*

HD31*

HD29*

HD28*

HD27*

HD26*

HD25*

HD24*

HD23*

HD22*

HD21*

HD20*

HD19*

HD18*

HD17*

HD15*

HD10*

HD11*

HD12*

HD13*

HD14*

HD5*

HD7*

HD8*

HD9*

HA30*

HA29*

HA28*

HA27*

HA26*

HA25*

HA24*

HA23*

HA31*

HA20*

HA19*

HA18*

HA16*

HA15*

HA14*

HA21*

HA22*

HA17*

HA9*

HA8*

HA7*

HA6*

HA5*

HA4*

HA3*

HA10*

HA11*

HA12*

HADSTB1*

HREQ0*

HREQ1*

HREQ2*

HREQ3*

HD30*

HREQ4*

HRS2*

(1 OF 10)

HOST

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

0.1uF10%16VX5R402

C1211 1

2402MF-LF1/16W1%200R12111

2

402MF-LF1/16W1%100R12101

2

402MF-LF1/16W

1%54.9

R12201

2

24.91%

1/16WMF-LF402

R12211

2

402MF-LF1/16W1%221R12251

2

100

402MF-LF1/16W1%

R12261

2

10%16VX5R402

0.1uFC12261

2

0.1uF10%16VX5R402

C12361

2

402MF-LF1/16W1%221R12351

2402

MF-LF1/16W

1%54.9

R12301

2

100

402MF-LF1/16W1%

R12361

2

24.91%

1/16WMF-LF402

R12311

2

945GM

NB

LEMENU

BGA

U1200

H11

J12

G14

D9

J14

H13

J15

F14

D12

A11

C11

A12

A13

E13

G13

F12

B12

B14

C12

A14

H9

C14

D14

C9

E11

G11

F11

G12

F9

E8

B9

C13

J13

C6

F6

C7

AG2

AG1

B7

F1

J1

K7

J8

H4

J3

K11

G4

T10

W11

T3

U7

H1

U9

U11

T11

W9

T1

T8

T4

W7

U5

T9

J6

W6

T5

AB7

AA9

W4

W3

Y3

Y7

W5

Y10

H3

AB8

W2

AA4

AA7

AA2

AA6

AA10

Y8

AA1

AB4

K2

AC9

AB11

AC11

AB3

AC2

AD1

AD9

AC1

AD7

AC6

G1

AB5

AD10

AD4

AC8

G2

K9

K1

A7

C3

J7

W8

U3

AB10

J9

H8

K4

T7

Y5

AC4

K3

T6

AA5

AC5

K13

D3

D4

B3

D8

G8

B8

F8

A8

B4

E6

D6

E3

E7

E1

E2

E4

Y1

U1

W1

051-7173

10812

G

NB CPU InterfaceSYNC_DATE=07/25/2005SYNC_MASTER=NB

NB_FSB_XRCOMP

=PP1V05_S0_FSB_NB

=PP1V05_S0_FSB_NB

=PP1V05_S0_FSB_NB

FSB_RS_L<2>

FSB_REQ_L<4>

FSB_D_L<30>

FSB_REQ_L<3>

FSB_REQ_L<2>

FSB_REQ_L<1>

FSB_REQ_L<0>

FSB_ADSTB_L<1>

FSB_A_L<12>

FSB_A_L<11>

FSB_A_L<10>

FSB_A_L<3>

FSB_A_L<4>

FSB_A_L<5>

FSB_A_L<6>

FSB_A_L<7>

FSB_A_L<8>

FSB_A_L<9>

FSB_A_L<17>

FSB_A_L<22>

FSB_A_L<21>

FSB_A_L<14>

FSB_A_L<15>

FSB_A_L<16>

FSB_A_L<18>

FSB_A_L<19>

FSB_A_L<20>

FSB_A_L<31>

FSB_A_L<23>

FSB_A_L<24>

FSB_A_L<25>

FSB_A_L<26>

FSB_A_L<27>

FSB_A_L<28>

FSB_A_L<29>

FSB_A_L<30>

FSB_D_L<14>

FSB_D_L<13>

FSB_D_L<12>

FSB_D_L<11>

FSB_D_L<15>

FSB_D_L<18>

FSB_D_L<19>

FSB_D_L<20>

FSB_D_L<21>

FSB_D_L<22>

FSB_D_L<23>

FSB_D_L<24>

FSB_D_L<25>

FSB_D_L<26>

FSB_D_L<27>

FSB_D_L<28>

FSB_D_L<29>

FSB_D_L<31>

FSB_D_L<32>

FSB_D_L<33>

FSB_D_L<34>

FSB_D_L<35>

FSB_D_L<36>

FSB_D_L<37>

FSB_D_L<38>

FSB_D_L<39>

FSB_D_L<40>

FSB_D_L<41>

FSB_D_L<42>

FSB_D_L<43>

FSB_D_L<44>

FSB_D_L<45>

FSB_D_L<46>

FSB_D_L<47>

FSB_D_L<48>

FSB_D_L<49>

FSB_D_L<50>

FSB_D_L<51>

FSB_D_L<52>

FSB_D_L<53>

FSB_D_L<54>

FSB_D_L<55>

FSB_D_L<56>

FSB_D_L<57>

FSB_D_L<58>

FSB_D_L<59>

FSB_D_L<60>

FSB_D_L<61>

FSB_D_L<62>

FSB_D_L<63>

FSB_ADSTB_L<0>

FSB_ADS_L

FSB_A_L<13>

NB_FSB_XSCOMP

NB_FSB_XSWING

NB_FSB_YSCOMP

NB_FSB_YRCOMP

NB_FSB_YSWING

FSB_CLK_NB_P

FSB_CLK_NB_N

FSB_BNR_L

FSB_BPRI_L

FSB_BREQ0_L

FSB_CPURST_L

FSB_DBSY_L

FSB_DEFER_L

FSB_DPWR_L

FSB_DRDY_L

FSB_DINV_L<3>

FSB_DSTBN_L<1>

FSB_DSTBP_L<0>

FSB_HIT_L

FSB_LOCK_L

FSB_HITM_L

FSB_RS_L<0>

FSB_RS_L<1>

FSB_SLPCPU_L

FSB_TRDY_L

FSB_D_L<16>

FSB_D_L<0>

FSB_D_L<3>

FSB_D_L<7>

FSB_D_L<8>

FSB_D_L<9>

FSB_D_L<10>

FSB_D_L<6>

FSB_D_L<5>

FSB_D_L<4>

FSB_D_L<2>

FSB_D_L<1>

NB_FSB_VREF

FSB_DINV_L<2>

FSB_DINV_L<1>

FSB_DSTBN_L<0>

FSB_DINV_L<0>

FSB_DSTBP_L<3>

FSB_DSTBP_L<2>

FSB_DSTBP_L<1>

FSB_DSTBN_L<3>

FSB_DSTBN_L<2>

FSB_D_L<17>

64

64

64

33

33

33

19

19

19

12

12

12

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

33

33

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

CRT_BLUE*

CRT_BLUE

CRT_GREEN*

CRT_GREEN

CRT_RED

CRT_DDC_CLK

CRT_RED*

HSYNC

CRT_DDC_DATA

CRT_VSYNC

CRT_IREF

TV_IRTNC

TV_IRTNB

TV_IREF

TV_IRTNA

TV_DACB_OUT

TV_DACC_OUT

TV_DACA_OUT

LB_DATA2

LB_DATA1

LB_DATA0

LB_DATA2*

LB_DATA1*

LB_DATA0*

LA_DATA2

LA_DATA1

LA_DATA0

LA_DATA2*

LA_DATA1*

LA_DATA0*

LB_CLK

LB_CLK*

LA_CLK

LA_CLK*

L_VDDEN

L_VREFL

L_VREFH

L_VBG

L_IBG

L_DDC_CLK

L_DDC_DATA

EXP_A_COMPI

EXP_A_COMPO

EXP_A_RXN0

EXP_A_RXN1

EXP_A_RXN2

EXP_A_RXN3

EXP_A_RXN4

EXP_A_RXN5

EXP_A_RXN6

EXP_A_RXN7

EXP_A_RXN8

EXP_A_RXN9

EXP_A_RXN10

EXP_A_RXN11

EXP_A_RXN12

EXP_A_RXN13

EXP_A_RXN15

EXP_A_RXN14

EXP_A_RXP0

EXP_A_RXP1

EXP_A_RXP2

EXP_A_RXP4

EXP_A_RXP3

EXP_A_RXP5

EXP_A_RXP6

EXP_A_RXP7

EXP_A_RXP10

EXP_A_RXP9

EXP_A_RXP8

EXP_A_RXP11

EXP_A_RXP12

EXP_A_RXP14

EXP_A_RXP13

EXP_A_RXP15

EXP_A_TXN1

EXP_A_TXN0

EXP_A_TXN3

EXP_A_TXN2

EXP_A_TXN6

EXP_A_TXN5

EXP_A_TXN4

EXP_A_TXN7

EXP_A_TXN8

EXP_A_TXN9

EXP_A_TXN10

EXP_A_TXN11

EXP_A_TXN12

EXP_A_TXN14

EXP_A_TXN13

EXP_A_TXN15

EXP_A_TXP0

EXP_A_TXP2

EXP_A_TXP1

EXP_A_TXP3

EXP_A_TXP4

EXP_A_TXP5

EXP_A_TXP7

EXP_A_TXP6

EXP_A_TXP8

EXP_A_TXP9

EXP_A_TXP10

EXP_A_TXP12

EXP_A_TXP11

EXP_A_TXP13

EXP_A_TXP14

EXP_A_TXP15

L_CLKCTLB

L_BKLTEN

L_CLKCTLA

L_BKLTCTL

(3 OF 10)

LVDS

TV

VGA

PCI-EXPRESS GRAPHICS

IN

IN

OUT

IN

OUT

OUT

OUT

OUT

IN

IN

OUT

OUT

OUT

OUT

IN

OUT

OUT

IO

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IO

IO

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

IO

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

SDVO_FLDSTALL#

SDVO Alternate Function

SDVO_TVCLKIN#

SDVO_INT#

SDVO_TVCLKIN

SDVO_INT

SDVO_FLDSTALL

SDVOB_GREEN

SDVOB_RED

SDVOC_CLKN

SDVOC_BLUE#

SDVOC_GREEN#

SDVOC_RED#

SDVOB_CLKN

SDVOB_BLUE#

SDVOB_GREEN#

SDVOB_RED#

SDVOB_CLKP

SDVOB_BLUE

SDVOC_RED

SDVOC_GREEN

SDVOC_BLUE

SDVOC_CLKP

Otherwise, tie VCCD_LVDS to GND also.

LVDS Disable

VCCD_LVDS must remain powered with proper decoupling.

Tie R/R#/G/G#/B/B# and IREF to VCC Core rail, tie

Tie DACx_OUT, IRTNx, and IREF to 1.5V power rail.

VCCA_TVBG to 1.5V power rail. Tie VSSA_TVBG to GND.

rail, and tie VSSA_CRTDAC and VCC_SYNC to GND.

Component: DACA, DACB & DACC

Tie VCCD_TVDAC, VCCD_QTVDAC, VCCA_TVDACx, and

connect to GND through 75-ohm resistors.

S-Video: DACB & DACC only

Unused DAC outputs must remain powered, but can omit

HSYNC and VSYNC to GND. Tie VCCA_CRTDAC to VCC Core

TV-Out Signal Usage:

Composite: DACA only

TV-Out Disable

CRT Disable

Can leave all signals NC if LVDS is not implemented

Tie VCC_TXLVDS and VCCA_LVDS to GND. If SDVO is used

filtering components. Unused DAC outputs should

LEMENU

E23

D23

C26

C25

C22

B22

J22

A21

B21

H23

D40

D38

F34

G38

V34

W38

Y34

AA38

AB34

AC38

H34

J38

L34

M38

N34

P38

R34

T38

D34

F38

T34

V38

W34

Y38

AA34

AB38

G34

H38

J34

L38

M34

N38

P34

R38

F36

G40

V36

W40

Y36

AA40

AB36

AC40

H36

J40

L36

M40

N36

P40

R36

T40

D36

F40

T36

V40

W36

Y40

AA36

AB40

G36

H40

J36

L40

M36

N40

P36

R40

G23

D32

J30

H30

H29

G26

G25

B38

C35

F32

C33

C32

A32

A33

B37

C37

B34

B35

A36

A37

E26

E27

F30

G30

D29

D30

F28

F29

A16

C18

A19

J20

B16

B18

B19

BGA

NB945GMU1200

24.91%1/16WMF-LF402

R13101

2

NB PEG / Video InterfacesSYNC_DATE=07/25/2005SYNC_MASTER=NB

13 108

G051-7173

PEG_R2D_C_N<6>

PEG_COMP

CRT_HSYNC_R

CRT_VSYNC_R

TV_DACA_OUT

TV_DACB_OUT

TV_DACC_OUT

TV_IREF

TV_IRTNA

TV_IRTNB

TV_IRTNC

PEG_D2R_N<7>

PEG_D2R_N<9>

PEG_D2R_N<15>

CRT_BLUE_L

CRT_BLUE

CRT_GREEN_L

CRT_GREEN

CRT_RED

CRT_DDC_CLK

CRT_RED_L

CRT_DDC_DATA

CRT_IREF

LVDS_B_DATA_P<2>

LVDS_B_DATA_P<1>

LVDS_B_DATA_P<0>

LVDS_B_DATA_N<2>

LVDS_B_DATA_N<1>

LVDS_B_DATA_N<0>

LVDS_A_DATA_P<2>

LVDS_A_DATA_P<1>

LVDS_A_DATA_P<0>

LVDS_A_DATA_N<2>

LVDS_A_DATA_N<1>

LVDS_A_DATA_N<0>

LVDS_B_CLK_P

LVDS_B_CLK_N

LVDS_A_CLK_P

LVDS_A_CLK_N

LVDS_VDDEN

LVDS_VREFL

LVDS_VREFH

TP_LVDS_VBG

LVDS_IBG

LVDS_DDC_CLK

LVDS_DDC_DATA

PEG_D2R_N<0>

PEG_D2R_N<1>

PEG_D2R_N<2>

PEG_D2R_N<3>

PEG_D2R_N<4>

PEG_D2R_N<5>

PEG_D2R_N<6>

PEG_D2R_N<8>

PEG_D2R_N<10>

PEG_D2R_N<11>

PEG_D2R_N<12>

PEG_D2R_N<13>

PEG_D2R_N<14>

PEG_D2R_P<0>

PEG_D2R_P<1>

PEG_D2R_P<2>

PEG_D2R_P<4>

PEG_D2R_P<3>

PEG_D2R_P<5>

PEG_D2R_P<6>

PEG_D2R_P<7>

PEG_D2R_P<10>

PEG_D2R_P<9>

PEG_D2R_P<8>

PEG_D2R_P<11>

PEG_D2R_P<12>

PEG_D2R_P<14>

PEG_D2R_P<13>

PEG_D2R_P<15>

PEG_R2D_C_N<1>

PEG_R2D_C_N<0>

PEG_R2D_C_N<3>

PEG_R2D_C_N<2>

PEG_R2D_C_N<5>

PEG_R2D_C_N<4>

PEG_R2D_C_N<7>

PEG_R2D_C_N<8>

PEG_R2D_C_N<9>

PEG_R2D_C_N<10>

PEG_R2D_C_N<11>

PEG_R2D_C_N<12>

PEG_R2D_C_N<14>

PEG_R2D_C_N<13>

PEG_R2D_C_N<15>

PEG_R2D_C_P<0>

PEG_R2D_C_P<2>

PEG_R2D_C_P<1>

PEG_R2D_C_P<3>

PEG_R2D_C_P<4>

PEG_R2D_C_P<5>

PEG_R2D_C_P<7>

PEG_R2D_C_P<6>

PEG_R2D_C_P<8>

PEG_R2D_C_P<9>

PEG_R2D_C_P<10>

PEG_R2D_C_P<12>

PEG_R2D_C_P<11>

PEG_R2D_C_P<13>

PEG_R2D_C_P<14>

PEG_R2D_C_P<15>

LVDS_CLKCTLB

LVDS_BKLTEN

LVDS_CLKCTLA

LVDS_BKLTCTL

=PP1V5_S0_NB_PCIE 64

6

69

69

69

69

69

69

69

69

69

6

6

6

69

69

69

69

69

69

69

69

69

6

6

6

6

6

6

67

67

67

67

67

67

6

6

67

67

67

67

67

67

67

67

6

68

6

6

6

6

6

6

6

6

6

6

6

6

68

6

6

6

6

6

6

6

6

6

6

6

6

6

6

68

68

68

68

6

6

6

6

6

6

6

6

6

6

6

68

68

68

68

6

6

6

6

6

6

6

6

6

6

6

6

67

67

67

67

19

SM_CS0*RSVD15

RSVD14

SM_CKE2

RSVD2

RSVD3

RSVD6

RSVD4

RSVD5

RSVD8

RSVD7

RSVD9

RSVD1

RSVD10

RSVD11

RSVD12

RSVD13

CFG1

CFG0

CFG2

CFG3

CFG4

CFG6

CFG5

CFG7

CFG8

CFG9

CFG10

CFG11

CFG12

CFG13

CFG14

CFG17

CFG16

CFG15

CFG18

CFG19

CFG20

PM_BM_BUSY*

PM_EXTTS0*

PM_EXTTS1*

PW_THRMTRIP*

PWROK

RSTIN*

SDVO_CTRLCLK

SDVO_CTRLDATA

ICH_SYNC*

CLK_REQ*

NC2

NC3

NC4

NC5

NC6

NC7

NC8

NC9

NC0

NC1

NC13

NC12

NC11

NC10

NC18

NC17

NC16

NC15

NC14

SM_CK0

SM_CK1

SM_CK2

SM_CK0*

SM_CK3

SM_CK1*

SM_CK2*

SM_CK3*

SM_CKE0

SM_CKE1

SM_CKE3

SM_CS1*

SM_CS2*

SM_CS3*

SMOCDCOMP0

SMOCDCOMP1

SM_ODT1

SM_ODT0

SM_ODT2

SMRCOMP*

SM_ODT3

SMRCOMP

SMVREF0

SMVREF1

G_CLKIN*

G_CLKIN

D_REFCLKIN*

D_REFCLKIN

D_REFSSCLKIN*

D_REFSSCLKIN

DMI_RXN0

DMI_RXN1

DMI_RXN2

DMI_RXN3

DMI_RXP0

DMI_RXP1

DMI_RXP2

DMI_RXP3

DMI_TXN0

DMI_TXN1

DMI_TXN2

DMI_TXN3

DMI_TXP0

DMI_TXP2

DMI_TXP1

DMI_TXP3

DDR MUXING

CFG

NC

PM

CLK

DMI

MISC

(2 OF 10)

RSVD

IN

IN

IN

IN

IN

OUT

OUT

IN

IN

IN

IO

IO

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

(LA_DATAP3)

(LB_DATAN3)

(LB_DATAP3)

(LA_DATAN3)

(H_EDRDY#)

(D_PLLMON1)

(H_PROCHOT#)

(TESTIN#)

(TV_DCONSEL0)

(TV_DCONSEL1)

(H_PLLMON1)

(H_PLLMON1#)

(H_PCREQ#)

(VSS_MCHDETECT)

(D_PLLMON1#) NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

IPU

IPD

IPD

IPD

IPU

IPU

IPU

IPU

IPU

IPU

IPU

IPU

IPU

IPU

IPU

IPUNC

NC

IPU

IPU

NC

LEMENU

945GMNBBGA

U1200

K16

K18

E16

D15

G15

K15

C15

H16

G18

H15

J25

K27

J18

J26

F18

E15

F15

E18

D19

D16

G16

H32

A26

A27

D41

C40

AE35

AF39

AG35

AH39

AC35

AE39

AF35

AG39

AE37

AF41

AG37

AH41

AC37

AE41

AF37

AG41

AG33

AF33

K28

D1

C41

B2

AY41

AY1

AW41

AW1

A40

A4

A39

A3

C1

BA41

BA40

BA39

BA3

BA2

BA1

B41

G28

F25

H26

G6

AH33

AH34

T32

J29

A41

A35

A34

D28

D27

R32

F3

F7

AG11

AF11

H7

J19

K30

H28

H27

AY35

AW35

AR1

AT1

AW7

AY7

AW40

AY40

AU20

AT20

BA29

AY29

AW13

AW12

AY21

AW21

BA13

BA12

AY20

AU21

AL20

AF10

AT9

AV9

AK1

AK41

100

402MF-LF1/16W5%

R14301 2

1/16WMF-LF

5%

402

10KR14411

2

MF-LF1/16W

5%

402

10KR14401

2

20%10VCERM402

0.1uFC14161

2

20%10VCERM402

0.1uFC1415 1

2

402

0

5%1/16WMF-LF

R14221 2

402

NOSTUFF

10K

MF-LF

5%1/16W

R14211

2

80.6

MF-LF402

1%1/16W

R14101

2

80.6

MF-LF402

1%1/16W

R14111

2

10K

MF-LF402

5%1/16W

R14201

2

14 108

G051-7173

SYNC_MASTER=NB SYNC_DATE=08/15/2005

NB Misc Interfaces

TP_NB_XOR_FSB2_H7

TP_NB_XOR_LVDS_D27

TP_NB_XOR_LVDS_D28

TP_NB_XOR_LVDS_A34

MEM_VREF_NB_1

MEM_VREF_NB_0

MEM_RCOMP

MEM_RCOMP_L

=PP1V8_S3_MEM_NB

MEM_CKE<2>

MEM_CS_L<1>

MEM_CS_L<2>

MEM_CS_L<3>

MEM_ODT<1>

MEM_ODT<2>

MEM_CS_L<0>

NB_BSEL<1>

NB_BSEL<0>

NB_BSEL<2>

NB_CFG<3>

NB_CFG<4>

NB_CFG<6>

NB_CFG<5>

NB_CFG<7>

NB_CFG<9>

NB_CFG<10>

NB_CFG<14>

NB_CFG<17>

NB_CFG<16>

NB_CFG<15>

NB_CFG<19>

NB_CFG<20>

PM_BMBUSY_L

PM_THRMTRIP_L

VR_PWRGOOD_DELAY

SDVO_CTRLCLK

SDVO_CTRLDATA

NB_SB_SYNC_L

MEM_CLK_P<0>

MEM_CLK_P<1>

MEM_CLK_P<2>

MEM_CLK_N<0>

MEM_CLK_P<3>

MEM_CLK_N<1>

MEM_CLK_N<2>

MEM_CLK_N<3>

MEM_CKE<0>

MEM_CKE<1>

MEM_CKE<3>

MEM_ODT<0>

MEM_ODT<3>

NB_CLK100M_GCLKIN_N

NB_CLK100M_GCLKIN_P

DMI_S2N_N<0>

DMI_S2N_N<1>

DMI_S2N_N<2>

DMI_S2N_N<3>

DMI_S2N_P<0>

DMI_S2N_P<1>

DMI_S2N_P<2>

DMI_S2N_P<3>

DMI_N2S_N<0>

DMI_N2S_N<1>

DMI_N2S_N<2>

DMI_N2S_N<3>

DMI_N2S_P<0>

DMI_N2S_P<2>

DMI_N2S_P<1>

DMI_N2S_P<3>

NB_CFG<8>

NB_CFG<11>

NB_CFG<18>

NB_CLK_DREFSSCLKIN_P

NB_CLK_DREFSSCLKIN_N

NB_CLK_DREFCLKIN_P

NB_CLK_DREFCLKIN_N

CLK_NB_OE_L

TP_NB_TESTIN_L

TP_NB_XOR_LVDS_A35

NB_TV_DCONSEL0

=PP3V3_S0_NB

NB_RST_IN_L

PM_DPRSLPVR_R

PM_EXTTS_L<0>

PM_DPRSLPVR

NB_RST_IN_L_R

=PP3V3_S0_NB

NB_TV_DCONSEL1

NB_CFG<13>

NB_CFG<12>

64 61 29

64

64

28

20

20

19

30

30

30

30

30

30

30

58

30

30

30

30

30

19

45

58

19

19

19

16

29

28

29

29

28

29

28

33

33

33

6

6

6

20

20

20

6

6

6

20

6

20

20

23

26

68

68

22

28

28

29

28

29

28

29

29

28

28

29

28

29

33

33

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

6

6

20

33

33

33

33

32

14

26

6

23

14

6

6

SA_DQ1

SA_DQ0

SA_DQ2

SA_DQ3

SA_DQ4

SA_DQ5

SA_DQ6

SA_DQ7

SA_DQ8

SA_DQ9

SA_DQ10

SA_DQ12

SA_DQ11

SA_DQ13

SA_DQ14

SA_DQ15

SA_DQ16

SA_DQ17

SA_DQ18

SA_DQ19

SA_DQ20

SA_DQ21

SA_DQ22

SA_DQ23

SA_DQ24

SA_DQ25

SA_DQ26

SA_DQ27

SA_DQ29

SA_DQ28

SA_DQ30

SA_DQ31

SA_DQ32

SA_DQ33

SA_DQ35

SA_DQ34

SA_DQ36

SA_DQ37

SA_DQ38

SA_DQ39

SA_DQ40

SA_DQ41

SA_DQ42

SA_DQ43

SA_DQ44

SA_DQ46

SA_DQ45

SA_DQ47

SA_DQ48

SA_DQ49

SA_DQ50

SA_DQ51

SA_DQ52

SA_DQ53

SA_DQ54

SA_DQ55

SA_DQ56

SA_DQ57

SA_DQ58

SA_DQ59

SA_DQ60

SA_DQ61

SA_DQ62

SA_DQ63

SA_BS1

SA_BS0

SA_BS2

SA_CAS*

SA_DM0

SA_DM1

SA_DM2

SA_DM3

SA_DM5

SA_DM4

SA_DM7

SA_DM6

SA_DQS0

SA_DQS2

SA_DQS1

SA_DQS3

SA_DQS5

SA_DQS4

SA_DQS6

SA_DQS7

SA_DQS3*

SA_DQS2*

SA_DQS4*

SA_DQS5*

SA_DQS6*

SA_DQS7*

SA_MA1

SA_MA0

SA_MA2

SA_MA3

SA_MA5

SA_MA4

SA_MA6

SA_MA7

SA_MA9

SA_MA8

SA_MA10

SA_MA11

SA_MA12

SA_MA13

SA_RAS*

SA_RCVENIN*

SA_RCVENOUT*

SA_WE*

SA_DQS1*

SA_DQS0*

(4 OF 10)

DDR SYSTEM MEMORY A

IO

IO

IO

IO

IO

IO

OUT

OUT

OUT

OUT

OUT

IO

OUT

OUT

IO

IO

IO

IO

IO

IO

IO

IO

IO IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

SB_DQ1

SB_DQ0

SB_DQ2

SB_DQ3

SB_DQ4

SB_DQ5

SB_DQ6

SB_DQ7

SB_DQ8

SB_DQ9

SB_DQ10

SB_DQ12

SB_DQ11

SB_DQ13

SB_DQ14

SB_DQ15

SB_DQ16

SB_DQ17

SB_DQ18

SB_DQ19

SB_DQ20

SB_DQ21

SB_DQ22

SB_DQ23

SB_DQ24

SB_DQ25

SB_DQ26

SB_DQ27

SB_DQ29

SB_DQ28

SB_DQ30

SB_DQ31

SB_DQ32

SB_DQ33

SB_DQ35

SB_DQ34

SB_DQ36

SB_DQ37

SB_DQ38

SB_DQ39

SB_DQ40

SB_DQ41

SB_DQ42

SB_DQ43

SB_DQ44

SB_DQ46

SB_DQ45

SB_DQ47

SB_DQ48

SB_DQ49

SB_DQ50

SB_DQ51

SB_DQ52

SB_DQ53

SB_DQ54

SB_DQ55

SB_DQ56

SB_DQ57

SB_DQ58

SB_DQ59

SB_DQ60

SB_DQ61

SB_DQ62

SB_DQ63

SB_BS1

SB_BS0

SB_BS2

SB_CAS*

SB_DM0

SB_DM1

SB_DM2

SB_DM3

SB_DM5

SB_DM4

SB_DM7

SB_DM6

SB_DQS0

SB_DQS2

SB_DQS1

SB_DQS3

SB_DQS5

SB_DQS4

SB_DQS6

SB_DQS7

SB_DQS3*

SB_DQS2*

SB_DQS4*

SB_DQS5*

SB_DQS6*

SB_DQS7*

SB_MA1

SB_MA0

SB_MA2

SB_MA3

SB_MA5

SB_MA4

SB_MA6

SB_MA7

SB_MA9

SB_MA8

SB_MA10

SB_MA11

SB_MA12

SB_MA13

SB_RAS*

SB_RCVENIN*

SB_RCVENOUT*

SB_WE*

SB_DQS1*

SB_DQS0*

(5 OF 10)

DDR SYSTEM MEMORY B

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

OUT

OUT

OUT

IO

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IO

OUT

OUT

OUT

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

OUT

IO

IO

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IO

OUT

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

OUT

OUT

OUT

IO

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IO

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NC

NC

NC

AY14

AK24

AK23

AW14

AT16

AW17

AU17

AV17

AU16

BA17

BA16

AW16

AV12

AV20

AT17

AU13

AU14

AY16

AH5

AG5

AN3

AP3

AL8

AN8

AM12

AN12

AM21

AM22

AN27

AN28

AU33

AT33

AK32

AK33

AP33

AN35

AH31

AF8

AF4

AH6

AG9

AJ32

AF6

AG4

AF9

AG7

AL2

AN1

AT3

AV2

AN2

AP1

AK35

AW2

AY2

AL5

AT5

AN9

AP9

AK7

AK8

AN7

AK9

AJ36

AL12

AL14

AT12

AT13

AP12

AP13

AR14

AR12

AT21

AP20

AM33

AP24

AL23

AN20

AP21

AL22

AP23

AP26

AM24

AL28

AK28

AM31

AN24

AM26

AL27

AK26

AN33

AM34

AM36

AN38

AP31

AR31

AJ34

AJ35

AH4

AR3

AL9

AM14

AN22

AL26

AM35

AJ33

AY13

BA20

AV14

AU12

U1200

BGA

LEMENU

945GMNB NB

945GM

LEMENU

BGA

U1200AT24

AV23

AY28

AR24

AK36

AR38

AT36

BA31

AL17

AH8

BA5

AN4

AK39

AJ37

AU38

AV38

AP38

AR40

AW38

AY38

BA38

AV36

AR36

AP36

AP39

BA36

AU36

AP35

AP34

AY33

BA33

AT31

AU29

AU31

AW31

AR41

AV29

AW29

AM19

AL19

AP14

AN14

AN17

AM16

AP15

AL15

AJ38

AJ11

AH10

AJ9

AN10

AK13

AH11

AK10

AJ8

BA10

AW10

AK38

BA4

AW4

AY10

AY9

AW5

AY5

AV4

AR5

AK4

AK3

AN41

AT4

AK5

AJ5

AJ3

AP41

AT40

AV41

AM39

AM40

AT39

AU39

AU35

AT35

AR29

AP29

AR16

AP16

AR10

AT10

AR7

AT7

AN5

AP5

AY23

AW24

AV24

BA27

AY27

AR23

AY24

AR28

AT27

AT28

AU27

AV28

AV27

AW27

AU23

AK16

AR27

AK18

SYNC_DATE=07/25/2005SYNC_MASTER=NB

NB DDR2 Interfaces

051-7173 G

10815

MEM_B_A<3>

MEM_B_DQS_N<5>

MEM_B_DQS_N<2>

MEM_B_DM<7>

MEM_B_DM<5>

MEM_B_DM<3>

MEM_A_DQS_N<0>

MEM_A_DQS_N<1>

MEM_A_WE_L

MEM_A_RAS_L

MEM_A_A<13>

MEM_A_A<12>

MEM_A_A<11>

MEM_A_A<10>

MEM_A_A<8>

MEM_A_A<9>

MEM_A_A<7>

MEM_A_A<6>

MEM_A_A<4>

MEM_A_A<5>

MEM_A_A<3>

MEM_A_A<2>

MEM_A_A<0>

MEM_A_A<1>

MEM_A_DQS_N<7>

MEM_A_DQS_N<6>

MEM_A_DQS_N<5>

MEM_A_DQS_N<4>

MEM_A_DQS_N<2>

MEM_A_DQS_N<3>

MEM_A_DQS_P<7>

MEM_A_DQS_P<6>

MEM_A_DQS_P<4>

MEM_A_DQS_P<5>

MEM_A_DQS_P<3>

MEM_A_DQS_P<1>

MEM_A_DQS_P<2>

MEM_A_DQS_P<0>

MEM_A_DM<6>

MEM_A_DM<7>

MEM_A_DM<4>

MEM_A_DM<5>

MEM_A_DM<3>

MEM_A_DM<2>

MEM_A_DM<1>

MEM_A_DM<0>

MEM_A_CAS_L

MEM_A_BS<2>

MEM_A_BS<0>

MEM_A_BS<1>

MEM_A_DQ<63>

MEM_A_DQ<62>

MEM_A_DQ<61>

MEM_A_DQ<60>

MEM_A_DQ<59>

MEM_A_DQ<58>

MEM_A_DQ<57>

MEM_A_DQ<56>

MEM_A_DQ<55>

MEM_A_DQ<54>

MEM_A_DQ<53>

MEM_A_DQ<52>

MEM_A_DQ<51>

MEM_A_DQ<50>

MEM_A_DQ<49>

MEM_A_DQ<48>

MEM_A_DQ<47>

MEM_A_DQ<45>

MEM_A_DQ<46>

MEM_A_DQ<44>

MEM_A_DQ<43>

MEM_A_DQ<42>

MEM_A_DQ<41>

MEM_A_DQ<40>

MEM_A_DQ<39>

MEM_A_DQ<38>

MEM_A_DQ<37>

MEM_A_DQ<36>

MEM_A_DQ<34>

MEM_A_DQ<35>

MEM_A_DQ<33>

MEM_A_DQ<32>

MEM_A_DQ<31>

MEM_A_DQ<30>

MEM_A_DQ<28>

MEM_A_DQ<29>

MEM_A_DQ<27>

MEM_A_DQ<26>

MEM_A_DQ<25>

MEM_A_DQ<24>

MEM_A_DQ<23>

MEM_A_DQ<22>

MEM_A_DQ<21>

MEM_A_DQ<20>

MEM_A_DQ<19>

MEM_A_DQ<18>

MEM_A_DQ<17>

MEM_A_DQ<16>

MEM_A_DQ<15>

MEM_A_DQ<14>

MEM_A_DQ<13>

MEM_A_DQ<11>

MEM_A_DQ<12>

MEM_A_DQ<10>

MEM_A_DQ<9>

MEM_A_DQ<8>

MEM_A_DQ<7>

MEM_A_DQ<6>

MEM_A_DQ<5>

MEM_A_DQ<4>

MEM_A_DQ<3>

MEM_A_DQ<2>

MEM_A_DQ<0>

MEM_A_DQ<1>

TP_SB_RCVENIN_L

MEM_B_DQS_N<0>

MEM_B_DQS_N<1>

MEM_B_WE_L

MEM_B_RAS_L

MEM_B_A<13>

MEM_B_A<12>

MEM_B_A<11>

MEM_B_A<10>

MEM_B_A<8>

MEM_B_A<9>

MEM_B_A<7>

MEM_B_A<6>

MEM_B_A<4>

MEM_B_A<5>

MEM_B_A<2>

MEM_B_A<0>

MEM_B_A<1>

MEM_B_DQS_N<7>

MEM_B_DQS_N<6>

MEM_B_DQS_N<4>

MEM_B_DQS_N<3>

MEM_B_DQS_P<7>

MEM_B_DQS_P<6>

MEM_B_DQS_P<4>

MEM_B_DQS_P<5>

MEM_B_DQS_P<3>

MEM_B_DQS_P<1>

MEM_B_DQS_P<2>

MEM_B_DQS_P<0>

MEM_B_DM<6>

MEM_B_DM<4>

MEM_B_DM<2>

MEM_B_DM<1>

MEM_B_DM<0>

MEM_B_CAS_L

MEM_B_BS<2>

MEM_B_BS<0>

MEM_B_BS<1>

MEM_B_DQ<63>

MEM_B_DQ<62>

MEM_B_DQ<61>

MEM_B_DQ<60>

MEM_B_DQ<59>

MEM_B_DQ<58>

MEM_B_DQ<57>

MEM_B_DQ<56>

MEM_B_DQ<55>

MEM_B_DQ<54>

MEM_B_DQ<53>

MEM_B_DQ<52>

MEM_B_DQ<51>

MEM_B_DQ<50>

MEM_B_DQ<49>

MEM_B_DQ<48>

MEM_B_DQ<47>

MEM_B_DQ<45>

MEM_B_DQ<46>

MEM_B_DQ<44>

MEM_B_DQ<43>

MEM_B_DQ<42>

MEM_B_DQ<41>

MEM_B_DQ<40>

MEM_B_DQ<39>

MEM_B_DQ<38>

MEM_B_DQ<37>

MEM_B_DQ<36>

MEM_B_DQ<34>

MEM_B_DQ<35>

MEM_B_DQ<33>

MEM_B_DQ<32>

MEM_B_DQ<31>

MEM_B_DQ<30>

MEM_B_DQ<28>

MEM_B_DQ<29>

MEM_B_DQ<27>

MEM_B_DQ<26>

MEM_B_DQ<25>

MEM_B_DQ<24>

MEM_B_DQ<23>

MEM_B_DQ<22>

MEM_B_DQ<21>

MEM_B_DQ<20>

MEM_B_DQ<19>

MEM_B_DQ<18>

MEM_B_DQ<17>

MEM_B_DQ<16>

MEM_B_DQ<15>

MEM_B_DQ<14>

MEM_B_DQ<13>

MEM_B_DQ<11>

MEM_B_DQ<12>

MEM_B_DQ<10>

MEM_B_DQ<9>

MEM_B_DQ<8>

MEM_B_DQ<7>

MEM_B_DQ<6>

MEM_B_DQ<5>

MEM_B_DQ<4>

MEM_B_DQ<3>

MEM_B_DQ<2>

MEM_B_DQ<0>

MEM_B_DQ<1>

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

29

29

29

29

29

29

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

VCC_SM19

VCC_SM107

VCC_SM105

VCC_SM106

VCC_SM102

VCC_SM104

VCC_SM103

VCC_SM100

VCC_SM101

VCC_SM98

VCC_SM99

VCC_SM97

VCC_SM95

VCC_SM96

VCC_SM93

VCC_SM94

VCC_SM92

VCC_SM91

VCC_SM90

VCC_SM89

VCC_SM88

VCC_SM86

VCC_SM87

VCC_SM85

VCC_SM84

VCC_SM83

VCC_SM81

VCC_SM80

VCC_SM82

VCC_SM79

VCC_SM78

VCC_SM77

VCC_SM74

VCC_SM75

VCC_SM76

VCC_SM73

VCC_SM72

VCC_SM70

VCC_SM71

VCC_SM68

VCC_SM67

VCC_SM69

VCC_SM65

VCC_SM66

VCC_SM64

VCC_SM63

VCC_SM62

VCC_SM61

VCC_SM60

VCC_SM59

VCC_SM58

VCC_SM56

VCC_SM57

VCC_SM55

VCC_SM53

VCC_SM54

VCC_SM52

VCC_SM50

VCC_SM51

VCC_SM49

VCC_SM48

VCC_SM46

VCC_SM47

VCC_SM44

VCC_SM45

VCC_SM43

VCC_SM41

VCC_SM42

VCC_SM40

VCC_SM39

VCC_SM37

VCC_SM38

VCC_SM36

VCC_SM34

VCC_SM35

VCC_SM32

VCC_SM33

VCC_SM30

VCC_SM31

VCC_SM28

VCC_SM29

VCC_SM27

VCC_SM26

VCC_SM25

VCC_SM23

VCC_SM24

VCC_SM22

VCC_SM21

VCC_SM20

VCC_SM18

VCC_SM16

VCC_SM17

VCC_SM15

VCC_SM13

VCC_SM14

VCC_SM11

VCC_SM12

VCC_SM10

VCC_SM9

VCC_SM8

VCC_SM7

VCC_SM6

VCC_SM5

VCC_SM4

VCC_SM3

VCC_SM0

VCC_SM1

VCC_SM2

VCC_110

VCC_109

VCC_108

VCC_105

VCC_106

VCC_107

VCC_104

VCC_103

VCC_101

VCC_100

VCC_102

VCC_98

VCC_99

VCC_96

VCC_97

VCC_95

VCC_94

VCC_93

VCC_92

VCC_91

VCC_90

VCC_88

VCC_89

VCC_87

VCC_86

VCC_85

VCC_83

VCC_84

VCC_82

VCC_80

VCC_81

VCC_79

VCC_78

VCC_76

VCC_77

VCC_74

VCC_73

VCC_75

VCC_72

VCC_71

VCC_70

VCC_69

VCC_68

VCC_67

VCC_66

VCC_65

VCC_64

VCC_62

VCC_63

VCC_61

VCC_60

VCC_59

VCC_57

VCC_58

VCC_55

VCC_56

VCC_53

VCC_54

VCC_52

VCC_50

VCC_51

VCC_49

VCC_46

VCC_47

VCC_48

VCC_44

VCC_45

VCC_43

VCC_42

VCC_41

VCC_40

VCC_39

VCC_38

VCC_37

VCC_36

VCC_34

VCC_35

VCC_33

VCC_32

VCC_31

VCC_30

VCC_28

VCC_29

VCC_25

VCC_26

VCC_27

VCC_24

VCC_23

VCC_21

VCC_20

VCC_22

VCC_13

VCC_14

VCC_12

VCC_16

VCC_15

VCC_17

VCC_18

VCC_19

VCC_11

VCC_10

VCC_9

VCC_8

VCC_7

VCC_4

VCC_5

VCC_6

VCC_2

VCC_3

VCC_0

VCC_1

(6 OF 10)

VCC

VCCAUX_NCTF57

VCCAUX_NCTF56

VCCAUX_NCTF55

VCCAUX_NCTF54

VCCAUX_NCTF53

VCCAUX_NCTF52

VCCAUX_NCTF51

VCCAUX_NCTF50

VCCAUX_NCTF49

VCCAUX_NCTF47

VCCAUX_NCTF48

VCCAUX_NCTF45

VCCAUX_NCTF44

VCCAUX_NCTF46

VCCAUX_NCTF40

VCCAUX_NCTF39

VCCAUX_NCTF37

VCCAUX_NCTF38

VCCAUX_NCTF36

VCCAUX_NCTF34

VCCAUX_NCTF35

VCCAUX_NCTF32

VCCAUX_NCTF33

VCCAUX_NCTF31

VCCAUX_NCTF30

VCCAUX_NCTF29

VCCAUX_NCTF27

VCCAUX_NCTF28

VCCAUX_NCTF26

VCCAUX_NCTF24

VCCAUX_NCTF25

VCCAUX_NCTF22

VCCAUX_NCTF21

VCCAUX_NCTF23

VCCAUX_NCTF42

VCCAUX_NCTF43

VCCAUX_NCTF41

VCCAUX_NCTF19

VCCAUX_NCTF20

VCCAUX_NCTF18

VCCAUX_NCTF17

VCCAUX_NCTF16

VCCAUX_NCTF14

VCCAUX_NCTF15

VCCAUX_NCTF13

VCCAUX_NCTF12

VCCAUX_NCTF11

VCCAUX_NCTF9

VCCAUX_NCTF10

VCCAUX_NCTF8

VCCAUX_NCTF7

VCCAUX_NCTF6

VCCAUX_NCTF5

VCCAUX_NCTF4

VCCAUX_NCTF3

VCCAUX_NCTF1

VCCAUX_NCTF0

VCCAUX_NCTF2

VSS_NCTF12

VSS_NCTF11

VSS_NCTF10

VSS_NCTF9

VSS_NCTF7

VSS_NCTF8

VSS_NCTF5

VSS_NCTF6

VSS_NCTF4

VSS_NCTF2

VSS_NCTF3

VSS_NCTF0

VSS_NCTF1

VCC_NCTF72

VCC_NCTF71

VCC_NCTF70

VCC_NCTF69

VCC_NCTF68

VCC_NCTF67

VCC_NCTF66

VCC_NCTF65

VCC_NCTF64

VCC_NCTF61

VCC_NCTF62

VCC_NCTF63

VCC_NCTF60

VCC_NCTF57

VCC_NCTF58

VCC_NCTF59

VCC_NCTF56

VCC_NCTF55

VCC_NCTF53

VCC_NCTF54

VCC_NCTF52

VCC_NCTF50

VCC_NCTF51

VCC_NCTF49

VCC_NCTF48

VCC_NCTF46

VCC_NCTF47

VCC_NCTF45

VCC_NCTF44

VCC_NCTF43

VCC_NCTF41

VCC_NCTF40

VCC_NCTF42

VCC_NCTF38

VCC_NCTF39

VCC_NCTF36

VCC_NCTF37

VCC_NCTF34

VCC_NCTF35

VCC_NCTF33

VCC_NCTF31

VCC_NCTF32

VCC_NCTF30

VCC_NCTF29

VCC_NCTF28

VCC_NCTF27

VCC_NCTF26

VCC_NCTF25

VCC_NCTF24

VCC_NCTF23

VCC_NCTF22

VCC_NCTF21

VCC_NCTF20

VCC_NCTF18

VCC_NCTF19

VCC_NCTF17

VCC_NCTF16

VCC_NCTF15

VCC_NCTF13

VCC_NCTF14

VCC_NCTF11

VCC_NCTF12

VCC_NCTF10

VCC_NCTF8

VCC_NCTF9

VCC_NCTF7

VCC_NCTF6

VCC_NCTF5

VCC_NCTF4

VCC_NCTF3

VCC_NCTF2

VCC_NCTF0

VCC_NCTF1

(7 OF 10)

NCTF

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NCTF balls are Not Critical To Function

These connections can break without

impacting part performance.

Layout Note:

Place near pin BA23

Place near pin BA15

Layout Note:

1.05V or 1.5V

(Need to better define cavity)

Layout Note:

Place in cavity

AT6

AV6

AW6

AY6

BA6

AP8

AR8

AT8

AV8

AW8

AT34

AY8

BA8

AK11

AG12

AH12

AJ12

AK12

AH13

AJ13

AJ14

AU34

AJ15

AR15

AT15

AU15

AV15

AW15

AY15

BA15

AH16

AJ16

AV34

AH17

AJ17

AJ18

AJ19

AK19

AP19

AR19

AT19

AU19

AV19

AW34

AW19

AY19

BA19

AK20

AK21

AJ22

AK22

AP22

AR22

AT22

AY34

AU22

AV22

AW22

AY22

BA22

AJ23

BA23

AH24

AJ24

AH25

BA34

AJ25

AH26

AJ26

AR26

AT26

AU26

AV26

AW26

AY26

BA26

AU40

AH27

AJ27

AH28

AJ28

AH29

AJ29

AK29

AL29

AM29

AM30

AM41

AN30

AP30

AR30

AT30

AU30

AV30

AW30

AY30

BA30

AJ1

AV1

AJ6

AK6

AL6

AN6

AP6

AR6

AR34

AT41

AU41

N19

Y19

AA19

AB19

L20

M20

N20

P20

W20

Y20

V32

AB20

AC20

L21

M21

N21

W21

AA21

AC21

L22

M22

W32

N22

P22

W22

Y22

AB22

AC22

L23

M23

N23

P23

Y32

Y23

AA23

AB23

M24

N24

P24

L25

M25

N25

L26

AA32

N26

P26

L27

M27

N27

P27

L28

M28

N28

P28

J33

R28

T28

U28

V28

Y28

AA28

AB28

L29

M29

P29

L33

R29

U29

V29

W29

Y29

AA29

L30

M30

N30

P30

N33

R30

T30

U30

V30

W30

Y30

AA30

M31

N31

P31

P33

R31

T31

V31

W31

AA31

J32

L32

M32

L16

N32

M16

N16

M17

N17

P17

L18

M18

N18

L19

M19

P32

W33

AA33

U1200

BGA

NB

945GM

LEMENU

402

6.3VCERM-X5R

C16101

2

0.47UF10%

603

20%

X5R6.3V

10uFC16211

22

1C1620

603

20%

X5R6.3V

10uF

AE18

AE19

AE20

AE21

AE22

AE23

AE24

AE25

U17

Y17

AC17

AE26

AE27

AF23

AG23

AF24

AG24

R15

T15

U15

V15

W15

Y15

AA15

AB15

AF25

AC15

AD15

AE15

AF15

AG15

R16

T16

U16

V16

W16

AG25

Y16

AA16

AB16

AC16

AD16

AE16

AF16

AG16

R17

T17

AF26

V17

W17

AA17

AB17

AD17

AE17

AF17

AG17

R18

AF18

AG26

AG18

R19

AF19

AG19

AF20

AG20

AF21

AG21

AF22

AG22

AF27

AG27

R27

T27

T18

U18

V18

U27

W18

Y18

AA18

AB18

AC18

AD18

T19

U19

V19

AD19

V27

R20

T20

U20

V20

AD20

R21

T21

U21

V21

AD21

W27

R22

T22

U22

V22

AD22

R23

T23

U23

V23

AD23

Y27

R24

T24

U24

V24

W24

Y24

AA24

AB24

AC24

AD24

AA27

R25

T25

U25

V25

W25

Y25

AA25

AB25

AC25

AD25

AB27

R26

T26

U26

V26

W26

Y26

AA26

AB26

AC26

AD26

AC27

AD27

U1200

BGA

NB945GM

LEMENU

402

6.3VCERM-X5R

C16111

2

0.47UF10%

402

6.3VCERM-X5R

C1612 1

2

0.47UF10%

402

6.3VCERM-X5R

C16131

2

0.47UF10%

402

6.3VCERM-X5R

C1614 1

2

0.47UF10%

402

6.3VCERM-X5R

C16151

2

0.47UF10%

16 108

G051-7173

SYNC_MASTER=NB SYNC_DATE=07/25/2005

NB Power 1

=PPVCORE_S0_NB

NB_VCCSM_LF4

NB_VCCSM_LF5

NB_VCCSM_LF2

NB_VCCSM_LF1

=PP1V8_S3_MEM_NB

=PPVCORE_S0_NB

=PP1V5_S0_NB_VCCAUX

64 61 29

64

28

64

64

19

19

19

19

16

14

16

17

VTT0

VTT1

VTT2

VTT3

VTT4

VTT5

VTT6

VTT7

VTT8

VTT9

VTT10

VTT11

VTT12

VTT13

VTT15

VTT14

VTT16

VTT18

VTT17

VTT19

VTT20

VTT21

VTT22

VTT23

VTT24

VTT25

VTT27

VTT26

VTT28

VTT29

VTT31

VTT30

VTT32

VTT34

VTT33

VTT35

VTT36

VTT37

VTT39

VTT38

VTT40

VTT41

VTT42

VTT43

VTT44

VTT45

VTT48

VTT46

VTT47

VTT49

VTT50

VTT52

VTT51

VTT53

VTT55

VTT54

VTT57

VTT56

VTT58

VTT59

VTT60

VTT61

VTT62

VTT64

VTT63

VTT65

VTT66

VTT67

VTT69

VTT68

VTT70

VTT71

VTT73

VTT72

VTT74

VTT76

VTT75

VCCSYNC

VCC_TXLVDS0

VCC_TXLVDS1

VCC_TXLVDS2

VCC3G0

VCC3G1

VCC3G3

VCC3G2

VCC3G4

VCC3G6

VCC3G5

VCCA_3GPLL

VCCA_3GBG

VSSA_3GBG

VCCA_CRTDAC0

VCCA_CRTDAC1

VSSA_CRTDAC

VCCA_DPLLB

VCCA_DPLLA

VCCA_HPLL

VSSA_LVDS

VCCA_LVDS

VCCA_MPLL

VCCA_TVBG

VSSA_TVBG

VCCA_TVDACC0

VCCA_TVDACC1

VCCA_TVDACB0

VCCA_TVDACB1

VCCA_TVDACA0

VCCA_TVDACA1

VCCD_HMPLL0

VCCD_HMPLL1

VCCD_LVDS2

VCCD_LVDS0

VCCD_LVDS1

VCCD_TVDAC

VCC_HV1

VCC_HV2

VCC_HV0

VCCD_QTVDAC

VCCAUX19

VCCAUX18

VCCAUX17

VCCAUX16

VCCAUX14

VCCAUX15

VCCAUX13

VCCAUX12

VCCAUX11

VCCAUX10

VCCAUX0

VCCAUX1

VCCAUX2

VCCAUX3

VCCAUX4

VCCAUX6

VCCAUX5

VCCAUX9

VCCAUX8

VCCAUX7

VCCAUX21

VCCAUX20

VCCAUX23

VCCAUX24

VCCAUX22

VCCAUX25

VCCAUX26

VCCAUX29

VCCAUX28

VCCAUX27

VCCAUX30

VCCAUX31

VCCAUX33

VCCAUX32

VCCAUX34

VCCAUX35

VCCAUX36

VCCAUX38

VCCAUX37

VCCAUX39

VCCAUX40

POWER

(8 OF 10)

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

R5

BGA

NB945GM

LEMENU

U1200

AJ41

AB41

Y41

V41

R41

N41

L41

A23

B23

B25

C30

B30

A30

G41

AC33

F21

E21

B26

C39

AF1

A38

AF2

H20

E19

F19

C20

D20

E20

F20

AK31

AF31

AE30

AD30

AC30

AG29

AF29

AE29

AD29

AC29

AG28

AF28

AE31

AE28

AH22

AJ21

AH21

AJ20

AH20

AH19

P19

P16

AH15

AC31

P15

AH14

AG14

AF14

AE14

Y14

AF13

AE13

AF12

AE12

AL30

AD12

AK30

AJ30

AH30

AG30

AF30

AH1

AH2

A28

B28

C28

H19

D21

H22

H41

G21

B39

G20

AC14

AB14

AD13

AC13

AB13

AA13

Y13

W13

V13

U13

T13

R13

W14

N13

M13

L13

AB12

AA12

Y12

W12

V12

U12

T12

V14

R12

P12

N12

M12

L12

R11

P11

N11

M11

R10

T14

P10

N10

M10

P9

N9

M9

R8

P8

N8

M8

R14

P7

N7

M7

R6

P6

M6

A6

P5

N5

P14

M5

P4

N4

M4

R3

P3

N3

M3

R2

P2

N14

M2

D2

AB1

R1

P1

N1

M1

M14

L14

10%0.47UF

2

1C1711

6.3VCERM-X5R

402

6.3V20%

X5R

0.22UF

402

C17121

2

10%0.47UF

2

1C1713

CERM-X5R6.3V

402


NB Power 2

051-7173 G

10817

NB_VTTLF_CAP1

=PP2V5_S0_NB_VCCSYNC

=PP2V5_S0_NB_VCC_TXLVDS

PP1V5_S0_NB_VCC3G

PP1V5_S0_NB_VCCA_3GPLL

=PP2V5_S0_NB_VCCA_3GBG

GND_NB_VSSA_3GBG

GND_NB_VSSA_CRTDAC

PP1V5_S0_NB_VCCA_DPLLB

PP1V5_S0_NB_VCCA_DPLLA

PP1V5_S0_NB_VCCA_HPLL

GND_NB_VSSA_LVDS

=PP2V5_S0_NB_VCCA_LVDS

PP3V3_S0_NB_VCCA_TVBG

GND_NB_VSSA_TVBG

PP3V3_S0_NB_VCCA_TVDACC

PP3V3_S0_NB_VCCA_TVDACB

PP3V3_S0_NB_VCCA_TVDACA

=PP1V5_S0_NB_VCCD_HMPLL

=PP1V5_S0_NB_VCCD_LVDS

PP1V5_S0_NB_VCCD_TVDAC

=PP3V3_S0_NB_VCC_HV

PP1V5_S0_NB_VCCD_QTVDAC

=PP1V5_S0_NB_VCCAUX

PP2V5_S0_NB_VCCA_CRTDAC

PP1V5_S0_NB_VCCA_MPLL

NB_VTTLF_CAP3

NB_VTTLF_CAP2

=PP1V05_S0_NB_VTT

64

64

64

64

64

64

64

64

19

64

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

16

19

19

19

VSS_1

VSS_0

VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_9

VSS_8

VSS_10

VSS_11

VSS_12

VSS_13

VSS_14

VSS_15

VSS_16

VSS_17

VSS_19

VSS_18

VSS_20

VSS_21

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

VSS_28

VSS_27

VSS_29

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_37

VSS_36

VSS_39

VSS_38

VSS_40

VSS_41

VSS_42

VSS_43

VSS_44

VSS_45

VSS_46

VSS_47

VSS_49

VSS_48

VSS_50

VSS_51

VSS_52

VSS_53

VSS_54

VSS_55

VSS_57

VSS_56

VSS_59

VSS_58

VSS_61

VSS_60

VSS_64

VSS_63

VSS_62

VSS_65

VSS_66

VSS_67

VSS_68

VSS_69

VSS_70

VSS_71

VSS_73

VSS_72

VSS_74

VSS_75

VSS_76

VSS_77

VSS_78

VSS_79

VSS_82

VSS_80

VSS_81

VSS_84

VSS_83

VSS_85

VSS_87

VSS_86

VSS_89

VSS_88

VSS_91

VSS_90

VSS_92

VSS_93

VSS_94

VSS_96

VSS_95

VSS_97

VSS_98

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106

VSS_107

VSS_108

VSS_109

VSS_110

VSS_111

VSS_112

VSS_114

VSS_113

VSS_115

VSS_117

VSS_116

VSS_118

VSS_119

VSS_120

VSS_121

VSS_122

VSS_123

VSS_124

VSS_125

VSS_127

VSS_126

VSS_128

VSS_129

VSS_130

VSS_131

VSS_132

VSS_133

VSS_134

VSS_135

VSS_137

VSS_136

VSS_138

VSS_139

VSS_140

VSS_141

VSS_143

VSS_142

VSS_144

VSS_145

VSS_146

VSS_147

VSS_148

VSS_149

VSS_150

VSS_151

VSS_152

VSS_153

VSS_154

VSS_155

VSS_156

VSS_158

VSS_157

VSS_159

VSS_160

VSS_161

VSS_162

VSS_164

VSS_163

VSS_165

VSS_166

VSS_167

VSS_168

VSS_169

VSS_170

VSS_172

VSS_171

VSS_173

VSS_174

VSS_175

VSS_176

VSS_177

VSS_178

VSS_179

VSS

(9 OF 10)

VSS_272

VSS_271

VSS_269

VSS_270

VSS_268

VSS_266

VSS_267

VSS_265

VSS_264

VSS_263

VSS_261

VSS_262

VSS_260

VSS_259

VSS_258

VSS_256

VSS_257

VSS_255

VSS_254

VSS_253

VSS_251

VSS_252

VSS_250

VSS_248

VSS_249

VSS_247

VSS_246

VSS_245

VSS_243

VSS_244

VSS_242

VSS_241

VSS_240

VSS_238

VSS_239

VSS_237

VSS_236

VSS_235

VSS_233

VSS_234

VSS_232

VSS_231

VSS_230

VSS_228

VSS_229

VSS_227

VSS_225

VSS_226

VSS_224

VSS_223

VSS_222

VSS_220

VSS_221

VSS_219

VSS_218

VSS_217

VSS_215

VSS_216

VSS_214

VSS_213

VSS_212

VSS_210

VSS_211

VSS_209

VSS_207

VSS_208

VSS_205

VSS_206

VSS_204

VSS_202

VSS_203

VSS_201

VSS_200

VSS_199

VSS_197

VSS_198

VSS_196

VSS_195

VSS_194

VSS_192

VSS_193

VSS_191

VSS_190

VSS_189

VSS_187

VSS_188

VSS_186

VSS_184

VSS_185

VSS_183

VSS_182

VSS_180

VSS_181

VSS_273

VSS_274

VSS_276

VSS_275

VSS_277

VSS_279

VSS_278

VSS_281

VSS_280

VSS_282

VSS_283

VSS_284

VSS_286

VSS_285

VSS_287

VSS_288

VSS_289

VSS_291

VSS_290

VSS_293

VSS_292

VSS_294

VSS_296

VSS_295

VSS_297

VSS_299

VSS_298

VSS_301

VSS_302

VSS_300

VSS_304

VSS_303

VSS_305

VSS_306

VSS_307

VSS_309

VSS_308

VSS_311

VSS_310

VSS_312

VSS_313

VSS_314

VSS_315

VSS_317

VSS_316

VSS_318

VSS_319

VSS_320

VSS_322

VSS_321

VSS_323

VSS_324

VSS_325

VSS_327

VSS_326

VSS_328

VSS_329

VSS_330

VSS_332

VSS_331

VSS_334

VSS_333

VSS_335

VSS_337

VSS_336

VSS_338

VSS_339

VSS_340

VSS_342

VSS_343

VSS_341

VSS_345

VSS_344

VSS_346

VSS_347

VSS_348

VSS_350

VSS_349

VSS_352

VSS_351

VSS_353

VSS_354

VSS_355

VSS_356

VSS_357

VSS_358

VSS_359

VSS_360

VSS

(10 OF 10)

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NB

945GM

LEMENU

BGA

U1200AC41

AA41

AN40

AE34

AC34

C34

AW33

AV33

AR33

AE33

AB33

Y33

V33

AK40

T33

R33

M33

H33

G33

F33

D33

B33

AH32

AG32

AJ40

AF32

AE32

AC32

AB32

G32

B32

AY31

AV31

AN31

AJ31

AH40

AG31

AB31

Y31

AB30

E30

AT29

AN29

AB29

T29

N29

AG40

K29

G29

E29

C29

B29

A29

BA28

AW28

AU28

AP28

AF40

AM28

AD28

AC28

W28

J28

E28

AP27

AM27

AK27

J27

AE40

G27

F27

C27

B27

AN26

M26

K26

F26

D26

AK25

B40

P25

K25

H25

E25

D25

A25

BA24

AU24

AL24

AW23

AY39

AW39

W41

AV39

AR39

AN39

AJ39

AC39

AB39

AA39

Y39

W39

V39

T41

T39

R39

P39

N39

M39

L39

J39

H39

G39

F39

P41

D39

AT38

AM38

AH38

AG38

AF38

AE38

C38

AK37

AH37

M41

AB37

AA37

Y37

W37

V37

T37

R37

P37

N37

M37

J41

L37

J37

H37

G37

F37

D37

AY36

AW36

AN36

AH36

F41

AG36

AF36

AE36

AC36

C36

B36

BA35

AV35

AR35

AH35

AV40

AB35

AA35

Y35

W35

V35

T35

R35

P35

N35

M35

AP40

L35

J35

H35

G35

F35

D35

AN34

AK34

AG34

AF34

NB945GM

LEMENU

BGA

U1200AT23

AN23

AM23

AH23

AC23

W23

K23

J23

F23

C23

AA22

K22

G22

F22

E22

D22

A22

BA21

AV21

AR21

AN21

AL21

AB21

Y21

P21

K21

J21

H21

C21

AW20

AR20

AM20

AA20

K20

B20

A20

AN19

AC19

W19

K19

G19

C19

AH18

P18

H18

D18

A18

AY17

AR17

AP17

AM17

AK17

AV16

AN16

AL16

J16

F16

C16

AN15

AM15

AK15

N15

M15

L15

B15

A15

BA14

AT14

AK14

AD14

AA14

U14

K14

H14

E14

AV13

AR13

AN13

AM13

AL13

AG13

P13

F13

D13

B13

AY12

AC12

K12

H12

E12

AD11

AA11

Y11

J11

D11

B11

AV10

AP10

AL10

AJ10

AG10

AC10

W10

U10

BA9

AW9

AR9

AH9

AB9

Y9

R9

G9

E9

A9

AG8

AD8

AA8

U8

K8

C8

BA7

AV7

AP7

AL7

AJ7

AH7

AF7

AC7

R7

G7

D7

AG6

AD6

AB6

Y6

U6

N6

K6

H6

B6

AV5

AF5

AD5

AY4

AR4

AP4

AL4

AJ4

Y4

U4

R4

J4

F4

C4

AY3

AW3

AV3

AL3

AH3

AG3

AF3

AD3

AC3

AA3

G3

AT2

AR2

AP2

AK2

AJ2

AD2

AB2

Y2

U2

T2

N2

J2

H2

F2

C2

AL1


NB Grounds

051-7173 G

10818

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

NR/FBINEN

OUT

GNDNC

NC

NOISE

GND

VOUT

CONT

VIN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

MCH DISPLAY PLL POWER LDO

MCH VCCA_TVDACC FILTER

MCH VCCA_TVDACC FILTER

within 6.35 mm of NB edge

(MCH CRTDAC ANALOG 2.5V PWR)

MCH VCCA_CRTDAC BYPASS

THESE 4 0.1UF CAPS SHOULD

GMCH VCCD_LVDS BYPASS(MCH LVDS DIGITAL 1.5V PWR)

GMCH CORE PWR 1.05V BYPASSTHIS 470UF FOR GMCH CORE 1.05V

close to MCH

Layout Note:

Layout Note:

(3GIO PLL 1.5V PWR)

GMCH VCC3G FILTER

(MCH DDR DLL&IO, FSB HSIO&IO PWR 1.5V)

These 4 caps should be


MCH VCCSYNC BYPASS

Layout Note: Route to caps, then GND

GMCH VCCA_3GPLL FILTER

These are the power signals that leave the NB "block"

(MCH FSB 1.05V PWR)

MCH VTT BYPASS

PLACE THOSE COMPONENTCLOSE TO GMCH

GMCH VCCA_MPLL FILTER

Place on the edge

(SHARE C0940 470UF)

(MCH TV OUT CHANNEL C 3.3V PWR)MCH VCCA_TVDACC FILTER



Power Interface

Layout Note:


(MCH DISPLAY A PLL 1.5V PWR)

Layout Note:

(MCH HV BUFFER 3.3V PWR)

(MCH DISPLAY B PLL 1.5V PWR)

3GPLL 10uF cap should

be placed in cavity

GMCH VCCD_TVDAC FILTER

Layout Note:

Layout Note:

(MCH TV OUT CHANNEL A 3.3V PWR)

(MCH TV OUT CHANNEL B 3.3V PWR)

GMCH VCCAUX FILTER

(MCH TVDAC DIGITAL QUIET 1.5V PWR)

(MCH LVDS DATA/CLK TX 2.5V PWR)GMCH VCCTX_LVDS BYPASS

945 EDS: 5 mOhm, 1nH (1210?)

(MCH TV DAC BAND GAP 3.3V PWR)MCH VCCA_TVBG FILTER

(MCH LVDS ANALOG 2.5V PWR)

MCH VCCA_LVDS FILTER

1uH, 20%

945 EDS: 1210?

on opposite side.

be close to MCH

10uF caps should

Layout Note:

GMCH VCCD_QTVDAC FILTER

MCH VCC_HV BYPASS

Layout Note:

(PCI-E/DMI ANALOG 1.5V PWR)

be within 5 mm of NB edge

This 0.1uF cap should




Layout Note:

(MCH PCIE/DMI BAND GAP 2.5V PWR)

MCH VCCA_3GBG BYPASS

(MCH H/V SYNC 2.5V PWR)

Layout Note:

MCH VCCA_DPLLA FILTER

GMCH VCCA_DPLL_B FILTER

Place L and C

Place in cavity

GMCH VCCA_HPLL FILTER(HOST PLL 1.5V PWR)

(MCH MEMORY PLL 1.5V PWR)

be within 5 mm of NB edge

(MCH TVDAC DEDICATED PWR 1.5V)

91NH, 20%, 20MOHM, 1.5A (1210 TYP)

0.22uF

X5R2

1

402

6.3V20%

C1907

2

1 C1911

20%10VCERM402

0.1uF

C197210uF20%6.3V

2

1

X5R603

CRITICALC1970

POLY2

1

SMB2

220UF20%2.5V

2

1

402

20%0.22uFC1967

6.3VX5R

C19662.2uF

603

2

1

6.3VCERM1

20%

603

4.7uFC1965

2

1

20%

CERM6.3V

2

1 C191010uF20%6.3VX5R603

2

1 C1913

10VCERM402

20%0.1uF

402

210

R1950

1/16W5%

MF-LF

402

210

R1951

MF-LF

5%1/16W

2

1 C195210uF

X5R

20%6.3V

603

CRITICAL

D2T

3 2

1 C1900

TANT2.5V20%470UF

5

4

1

2

3

U1900SOT23-5

TPS73115

CRITICAL

2

1 C1912

6.3V

4.7uF

CERM

20%

603

2

1

CERM16V10%0.01uF

402

C1951

2

1 C1953

CERM

20%

402

10V

0.1uF

2

1 C1954

10V20%0.1uF

CERM402

2

402CERM16V10%

1

0.01uFC1941

5

6 1

D1986SOT-363

BAT54DW

2

1 C1916

402

10V20%0.1uF

CERM

2

3 4

D1986SOT-363

BAT54DW

1/16W

2

1R19861K

MF-LF402

1%

2

1R1987

1/16W1%

402MF-LF

1K

2

1R1988

1/16W1%

402MF-LF

1K

2

R1989

MF-LF1/16W1%1K

402

1

2

1 C19421UF10%6.3VCERM402

2

1 C19501UF10%6.3VCERM402

2

1 C19041UF10%6.3VCERM402

2

1 C1940

CERM402

10%6.3V

1UF

51

4

2

3

SOT23-5-LFMM157U1901CRITICAL

L197091nH

21

1210

CRITICAL

C1936CRITICAL

CERM-X5R6.3V20%

805

2

1

22UF

2

1C1920

20%

402CERM10V

0.1uF

21

L1922180-OHM-1.5A

0603

C1906

2

1

20%6.3VX5R402

0.22uF

31

2

C192322000pF-1000mA

16VNFM18

31

2

C1921

NFM1816V

22000pF-1000mA

2

1C19220.1uF

10V

402

20%

CERM

2

1 C19150.1uF20%

402

10VCERM2

1 C1914

20%

X5R

10uF

6.3V

603

402

2

1

6.3VX5R

20%0.22uFC1905

2

1 C1935

20%10VCERM402

0.1uF

21

L1934FERR-120-OHM-0.2A

0603

C1937

402CERM10V

2

1

20%0.1uF

FERR-120-OHM-0.2AL1936

21

0603

CRITICAL

CERM-X5R

C1934

6.3V20%

805

2

1

22UF

2

1 C1903

X5R6.3V20%10uF

603

31

2

C199222000pF-1000mA

16VNFM18

2

1C19910.1uF

10VCERM402

20%

21

L1990180-OHM-1.5A

0603

2

1 C1990

603X5R

20%6.3V

10uF

31

2

C1994

NFM1816V

22000pF-1000mA

2

1C1993

20%

CERM10V

0.1uF

402

31

2

C1996

NFM1816V

22000pF-1000mA

2

1 C1902

X5R603

6.3V20%10uF

2

1C1995

20%

402CERM10V

0.1uF

31

2

16V22000pF-1000mA

NFM18

C1998

2

1C19970.1uF

10V20%

402CERM

0.1uF

CERM2

1 C1918

20%

402

10V

31

2

C1986

NFM1816V

22000pF-1000mA

2

1C19850.1uF

10V20%

402CERM

21

L1985

0603

180-OHM-1.5A

21

R1985

1%

10

1/16W

402MF-LF

21

R1990

402

1/16W1%

10

MF-LF

2

1 C19170.1uF

CERM

20%10V

402

2

1

10%16V

402CERM

C19810.01uF

2

1 C1980

10VCERM402

20%0.1uF

0.1uF20%

C1976

2

1

10V

402CERM

21

L19751.0UH-220MA-0.12-OHM

0805

2

1C1975

6.3V

603X5R

20%10uF

1/16WMF-LF

21

R19750.51

1%

402

C1971

2

1

10uF

X5R6.3V20%

603


051-7173 G

10819

SYNC_MASTER=NB

NB (GM) Decoupling

=PP1V5_S0_NB_3G

MM1573DN_NR

=PP5V_S0_NB_TVDAC

PP1V5_S0_NB_VCC3GVOLTAGE=1.5V

MIN_NECK_WIDTH=1.0 mmMIN_LINE_WIDTH=1.0 mm

MIN_NECK_WIDTH=1.0 mmMIN_LINE_WIDTH=1.0 mmVOLTAGE=1.5V

PP1V5_S0_NB_VCCA_DPLLA

=PP5V_S0_NB_TVDAC

PP1V5_S0_NB_VCCA_3GPLLVOLTAGE=1.5V

MIN_NECK_WIDTH=1.0 mmMIN_LINE_WIDTH=1.0 mmPP1V5_S0_NB_3GPLL_F

MIN_LINE_WIDTH=1.0 mmVOLTAGE=1.5V

MIN_NECK_WIDTH=1.0 mm

PP1V5_S0_NB_QTVDAC

VOLTAGE=1.5V


PP1V5_S0_NB_VCCA_HPLL

PP3V3_S0_NB_TVDAC

GND_NB_VSSA_TVBG

GND_NB_VSSA_CRTDAC

=PP1V05_S0_NB

GND_NB_VSSA_LVDS



PP2V5_S0_NB_CRTDAC_FOLLOW

PP3V3_S0_NB_TVDAC_FOLLOWVOLTAGE=3.3V


VOLTAGE=3.3VMIN_LINE_WIDTH=1.0 mmMIN_NECK_WIDTH=1.0 mm

PP3V3_S0_NB_VCCA_TVBG

=PP1V5_S0_NB_VCCAUX

VOLTAGE=3.3VPP3V3_S0_NB_VCCA_TVDACB

MIN_LINE_WIDTH=1.0 mmMIN_NECK_WIDTH=1.0 mm


PP1V5_S0_NB_VCCD_QTVDAC


GND_NB_VSSA_3GBG

TPS73115_NR

MIN_LINE_WIDTH=1.0 mm

PP1V5_S0_NB_VCCA_DPLLBVOLTAGE=1.5V


PP1V5_S0_DPLL

=PP1V5_S0_NB_3GPLL


VOLTAGE=2.5VPP2V5_S0_NB_VCCA_CRTDAC

PP2V5_S0_NB_CRTDAC_F

=PP1V5_S0_NB

=PP2V5_S0_NB_DISP_PLL

=PP1V05_S0_FSB_NB

=PPVCORE_S0_NB

=PP1V05_S0_NB

=PP1V05_S0_NB_VTT

=PP1V5_S0_NB_PCIE

=PP1V5_S0_NB

=PP1V5_S0_NB_PLL

=PP1V5_S0_NB_TVDAC

=PP1V5_S0_NB_VCCD_HMPLL

=PP1V5_S0_NB_VCCAUX


=PP1V8_S3_MEM_NB

=PP1V8_S3_MEM

VOLTAGE=3.3V


PP3V3_S0_NB_VCCA_TVDACC







=PP2V5_S0_NB_CRTDAC

=PP2V5_S0_NB_CRTDAC


=PP3V3_S0_NB_VCC_HV

PP3V3_S0_NB_TVDAC_F




MEM_VREF_NB_0

=PP3V3_S0_NB_VCC_HV

=PP3V3_S0_NB

=PP1V05_S0_NB_VTT

PP1V5_S0_NB_VCCD_TVDACVOLTAGE=1.5V


=PP1V5_S0_NB_TVDAC

=PP1V8_S3_MEM

MEM_VREF_NB_1


VOLTAGE=0.9V

=PPVCORE_S0_NB

VOLTAGE=3.3VPP3V3_S0_NB_VCCA_TVDACA


=PP1V5_S0_NB_PLL


PP1V5_S0_NB_VCCA_MPLLVOLTAGE=1.5V


64 61

64

64

29

64 64

19

64

64

64

64

19

64

28

29

64

64

64

64

64

64

64

64

64

64

64

64

29

64

64

64

64

17

19

64

33

19

64

19

64

64

64

64

64

17

19

16

28

19

19

19

19

19

19

64

64

19

19

19

19

20

19

64

28

19

64

64

19

17

17

19

17

17

17

17

19

17

17

16

17

17

17

17

17

64

17

19

64

12

16

19

17

13

19

19

19

17

16

17

14

19

17

17

17

17

17

17

17

19

19

17

17

17

14

17

14

17

17 19

19

14

16

17

19

17

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PCIe Backward

Interop. Mode

VCC Select

Reversal

DMI Lane

High = Reversed

Low = Normal

High = 1.5V

Low = 1.05V

Internal pull-down

Internal pull-down

Internal pull-down

945 External Design Spec says reserved

High = Both active

Low = Only SDVO

or PCIe x1

ODT

FSB Dynamic

RESERVED

Low = Disabled

High = Enabled

RESERVED

Internal pull-up

RESERVED

00 = Partial Clock Gating Disable

01 = XOR Mode Enabled

10 = All-Z Mode Enabled

11 = Normal Operation

Internal pull-up

Low = Reversed

RESERVED

CPU Strap

RESERVED

PCIE Graphics

High = Normal

Low = RESERVED

High = DMIx4

Low = DMIx2

NB_CFG<20>

NB_CFG<19>NB_CFG<9>

NB_CFG<8>NB_CFG<18>

NB_CFG<17>

NB_CFG<6>NB_CFG<16>

NB_CFG<15>NB_CFG<5>

NB_CFG<14>

NB_CFG<13:12>

RESERVED

NB_CFG<3>

NB_CFG<4>

Lane Reversal

PROBABLY NOT NEEDED

PROBABLY NOT NEEDED

DMI x2 Select

Internal pull-up

RESERVED

NB_CFG<7> High = Mobile CPU

NB_CFG<10>

NB_CFG<11>

RESERVED

RESERVED

Internal pull-up

Internal pull-ups

2

1R2075

402

5%2.2K

1/16WMF-LF

NBCFG_DMI_X2

2

1R20852.2K5%1/16WMF-LF402

NBCFG_DYN_ODT_DISABLE

2

1R2058

402

1/16W5%2.2K

NBCFG_VCC_1V5

MF-LF

2

1R2059

402MF-LF1/16W5%2.2K

NBCFG_DMI_REVERSE

2

1R2060NBCFG_SDVO_AND_PCIE

402MF-LF1/16W5%2.2K

2

1R2077

402MF-LF1/16W5%2.2K

NO STUFF

2

1R2079

402MF-LF1/16W5%2.2K

NBCFG_PEG_REVERSE

20 108

G051-7173

NB Config StrapsSYNC_MASTER=NB SYNC_DATE=06/28/2005

NB_CFG<9>

NB_CFG<7>

NB_CFG<5>

NB_CFG<16>

NB_CFG<20>

NB_CFG<19>

NB_CFG<18>

=PP3V3_S0_NB

=PP3V3_S0_NB

=PP3V3_S0_NB

64

64

64

20

20

20

19

19

19

14

14

14

14

14

14

14

14

14

14

IO

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IO

IO

IO

IO

IN

IO

DDACK*

SATARBIASN

SATARBIASP

SATA_CLKN

SATA_CLKP

SATA_2TXP

SATA_2TXN

SATA_2RXN

SATA_2RXP

SATA_0TXP

SATA_0TXN

SATA_0RXP

SATA_0RXN

SATALED*

ACZ_SDOUT

ACZ_SDIN1

ACZ_SDIN2

ACZ_SDIN0

ACZ_SYNC

ACZ_BIT_CLK

LAN_TXD2

LAN_TXD0

LAN_TXD1

LAN_RXD1

LAN_RXD2

LAN_RSTSYNC

LAN_RXD0

LAN_CLK

EE_SHCLK

EE_CS

INTVRMEN

INTRUDER*

RTCRST*

RTCX2

RTCX1

THRMTRIP*

STPCLK*

NMI

SMI*

RCIN*

INTR

INIT*

INIT3_3V*

IGNNE*

GPIO49/CPUPWRGD

FERR*

TP1/DPRSTP*

TP2/DPSLP*

A20M*

CPUSPL*

A20GATE

LFRAME*

LDRQ1*/GPIO23

LDRQ0*

LAD3

LAD2

LAD0

LAD1

EE_DOUT

EE_DIN

ACZ_RST*

DIOR*

IDEIRQ

DIOW*

IORDY

DDREQ

DD0

DD1

DD3

DD2

DD5

DD4

DD6

DD7

DD8

DD11

DD9

DD10

DD12

DD13

DD14

DD15

DA0

DA1

DA2

DCS3*

DCS1*

AC-97/

AZALIA

RTC

LPC

LAN

CPU

IDE

SATA

(1 OF 6)

OUT

OUT

OUT

IN

OUT

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

OUT

OUT

OUT

IN

IN

IN OUT

OUT

OUT

OUT

OUT

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

ACZ_SDIN[0-2]

ACZ_RST#

ACZ_BIT_CLK

INTEL HIGH DEFINITION AUDIO

INTERNAL 20K PD ONLY ENABLED IN S3COLD

INTERNAL 20K PD ENABLED WHEN

- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR

- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED

INTERNAL 20K PD

NOTE: ENABLE INTERNAL 1.05V SUSPEND REG

NOTE:

POR IS SMC WILL PUT LAN INT’F

INTO RESET STATE TO SAVE PWR.

INTEL CONFIRMS OK TO LEAVE PINS AS NC

NOTE: EE_CS HAS INTERNAL PD, ONLY ENABLED WHEN LAN_RST#=L

LAYOUT NOTE: PLACE R2101 & R2194 WHERE ACCESSIBLE

NOTE: DDREQ HAS INTERNAL 11.5K PD

NOTE: LAD<0-3> HAVE INTERNAL 20K PU

ACZ_SDOUT

ACZ_SYNC

INTERNAL 20K PD ENABLED WHEN

INTERNAL 20K PD

AC ’07





INTERNAL 20K PD ENABLED DURING RESET AND WHEN

NONE

INTERNAL 20K PD

SB: 1 OF 4

(INT PU)

NOTE: DD<7> HAS INTERNAL 11.5K PD

(HSTROBE)

(STOP)

20K PD

20K PD

20K PD

(WEAK INT PU)

(INT PU)

(DSTROBE)

NOTE: ALL IDE PINS HAVE INTERNAL 33-OHM SERIES R’S

< 2 IN OF R2107 W/O STUB

LAYOUT NOTE: R2108 TO BE

CHANGED TO 54.9 FOR

LAYOUT NOTE: R2107 TO BE

< 2 IN OF SB

NOTE: R2108=56 IN CV.

BOM CONSOLIDATION

NOTE: R2110=56 IN CV.

CHANGED TO 54.9 FOR

BOM CONSOLIDATION

NOTE: RISING-EDGE TRIGGERED AT CPU

NOTE: KEYBOARD CONTROLLER RESET CPU

SPEC SAYS WEAK PU IS REQUIRED

NOTE:

BUT CAPELL VALLEY USES 56-OHM PU

CHECK WITH INTEL

(WEAK INT PD)

NOTE: LDRQ<0-1># HAVE INTERNAL 20K PU

NOTE: PULLED UP PER INTEL

21

R2100

4025%

0

MF-LF1/16W

NOSTUFF

21

R2101

MF-LF1/16W5%

2.2K

402

NOSTUFF

21R2195MF-LF

5%

39402

1/16W

21R2198 39

21R2197 39

21R2196 39

2

1R2199

MF-LF1/16W5%10K

402AH25

AF24

AF26

AH22

AF23

AG10

AH10

AF18

AE1

AF1

AH6

AG6

AE7

AF7

AH2

AG2

AE3

AF3

AB2

AB1

AA3

AG23

AH24

AB3

AA5

AC3

V7

V6

U7

T5

V4

U5

U3

V3

Y6

AC4

AB5

AA6

AG16

W4

Y5

AF25

AG21

AF22

AG22

AH16

AG24

AG26

Y1

Y2

W3

W1

AH15

AF15

AE15

AF16

AF12

AE12

AC12

AD12

AC13

AD14

AF13

AG13

AC15

AH14

AH13

AF14

AC14

AB13

AE14

AB15

AD16

AE16

AF17

AE17

AH17

AG27

R6

T4

T1

T3

T2

R5

U1

AH28

AE22

U2100

BGA

LEMENU

SBICH7-M

2

1R2194

MF-LF1/16W5%10K

402

2

1

R2105MF-LF

1/16W 1%402332K

21

R2107

4021%1/16W

MF-LF

24.9

2

1

R210854.9

1%1/16WMF-LF 402

21

R211054.9

1%402

1/16WMF-LF

051-7173

10821

G

ACZ_SYNC SMC_RCIN_L

=PP1V05_S0_SB_CPU_IO

PM_THRMTRIP_L


ACZ_SDATAOUT

PP3V3_S5_SB_RTC

=PP3V3_S0_SB_GPIO

=PP3V3_S0_SB_GPIO

ACZ_RST_L

IDE_PDCS1_L

IDE_PDCS3_L

IDE_PDA<2>

IDE_PDA<1>

IDE_PDA<0>

IDE_PDD<15>

IDE_PDD<14>

IDE_PDD<13>

IDE_PDD<12>

IDE_PDD<10>

IDE_PDD<9>

IDE_PDD<11>

IDE_PDD<8>

IDE_PDD<7>

IDE_PDD<6>

IDE_PDD<4>

IDE_PDD<5>

IDE_PDD<2>

IDE_PDD<3>

IDE_PDD<1>

IDE_PDD<0>

IDE_PDDREQ

IDE_PDIORDY

IDE_PDIOW_L

IDE_IRQ14

IDE_PDIOR_L

SB_ACZ_RST_L

LPC_AD<1>

LPC_AD<0>

LPC_AD<2>

LPC_AD<3>

TP_SB_DRQ0_L

TP_SB_GPIO23

LPC_FRAME_L

SB_A20GATE

TP_CPU_CPUSLP_L

CPU_A20M_L

CPU_DPSLP_L

CPU_DPRSTP_L

CPU_FERR_L

CPU_PWRGD

CPU_IGNNE_L

FWH_INIT_L

CPU_INIT_L

CPU_INTR

CPU_RCIN_L

CPU_SMI_L

CPU_NMI

CPU_STPCLK_L

CPU_THERMTRIP_R

SB_RTC_X1

SB_RTC_X2

SB_RTC_RST_L

SB_SM_INTRUDER_L

SB_INTVRMEN

TP_SB_XOR_W1

TP_SB_XOR-Y1

SB_ACZ_SYNC

ACZ_SDATAIN<0>

TP_SB_ACZ_SDIN2

TP_SB_ACZ_SDIN1

SB_ACZ_SDATAOUT

TP_SB_SATALED_L

SATA_A_D2R_N

SATA_A_D2R_P

SATA_A_R2D_C_N

SATA_A_R2D_C_P

SATA_C_D2R_P

SATA_C_D2R_N

SATA_C_R2D_C_N

SATA_C_R2D_C_P

SB_CLK100M_SATA_P

SB_CLK100M_SATA_N

SATA_RBIAS_P

SATA_RBIAS_N

IDE_PDDACK_L

TP_SB_XOR-Y2

TP_SB_XOR-U3

TP_SB_XOR-U7

TP_SB_XOR-V6

TP_SB_XOR-V7

SB_ACZ_BITCLKACZ_BITCLK

64

64

53

53

53

53

53 25

46

25

26

64

64

57

47

47

47

47

47

47

54

24

14

24

54

25

23

23

54

45

45

45

45

45

58

6

54

54

5 45

21

7

21

5

24

21

21

5

34

34

34

34

34

34

34

34

34

34

34

34

34

34

34

34

34

34

34

34

34

34

34

34

34

34

5

5

5

5

5

7

7

7

7

7

7

5

7

7

7

7

7

26

26

26

26

5

6

6

6

6

35

35

35

35

33

33

35

35

34

5

IN

IO

IO

IO

IO

IO

IO

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IO

IO

IO

IO

IN

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IN

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IO

DMI_ZCOMP

DMI_CLKP

DMI_IRCOMP

USBRBIAS*

USBRBIAS

DMI0RXN

DMI0RXP

DMI0TXN

DMI0TXP

DMI2TXN

DMI2TXP

DMI3RXN

DMI3TXP

DMI3TXN

DMI3RXP

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP4N

OC0*

OC1*

OC2*

OC3*

OC4*

OC6*/GPIO30

OC5*/GPIO29

SPI_CLK

SPI_CS*

SPI_MOSI

SPI_MISO

SPI_ARB

DMI_CLKN

DMI2RXP

DMI2RXN

DMI1TXP

DMI1TXN

DMI1RXN

DMI1RXP

PERN1

PERP1

PETN1

PETP1

PERN2

PERP2

PETN2

PETP2

PERN3

PERP3

PETN3

PETP3

PERN4

PERP4

PETN4

PETP4

PERN5

PERP5

PETN5

PETP5

PERN6

PERP6

PETN6

PETP6

OC7*/GPIO31

PCI-EXP

(3 OF 6)

DMI

SPI

USB

REQ4*/GPIO22

REQ0*

MCH_SYNC*

RSVD8

RSVD7

RSVD6

RSVD5

RSVD4

GPIO5/PIRQH*

GPIO4/PIRQG*

GPIO3/PIRQF*

GPIO2/PIRQE*

GPIO17/GNT5*

GPIO1/REQ5*

GNT4*/GPIO48

C/BE0*

C/BE1*

DEVSEL*

PERR*

STOP*

PCIRST*

PME*

PLTRST*

TRDY*

FRAME*

IRDY*

PCICLK

PAR

PLOCK*

SERR*

AD0

AD1

AD2

AD3

AD4

AD5

AD6

AD7

AD8

AD9

AD10

AD11

AD12

AD13

AD14

AD15

AD16

AD17

AD18

AD19

AD20

AD21

AD22

AD23

AD24

AD25

AD26

AD27

AD28

AD29

AD30

AD31

C/BE2*

C/BE3*

GNT0*

REQ1*

GNT1*

REQ2*

GNT2*

REQ3*

GNT3*

PIRQA*

PIRQB*

PIRQC*

PIRQD*

RSVD0

RSVD1

RSVD2

RSVD3

MISC

INT I/F

PCI

(2 OF 6)

IO

IN

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IN

IO

IO

IO

IO

OUT

IO

IO

IO

IO

IO

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TRACKPAD (Geyser)

NOTE: USBP[0-7]P/N HAVE INTERNAL 15K PD

AIRPORT

IR

CAMERA

EXTERNAL 1

LAYOUT NOTE:

EXTERNAL 0

NO STUFF - DEFAULT

NOTE: FWH_WP_L NOT USED

GNT5# HAS INT PU (NOMINAL=20K, SIMULATION=15K-35K)

NOT PLANNED TO GO TO LPC+ CONNNOTE:

(INT PD)

(INT PD)

(AKA TP3, INTERNAL 20K PU)

GNT4# HAS INT PU; ENABLED ONLY WHEN PCIRST#=0 AND PWROK=H

PLACE R2204 < 1/2 IN FROM SB

LAYOUT NOTE:

PLACE R2203 < 1/2 IN FROM SB

NOTE:

LPC (DEFAULT)

PCI

SPI UNSTUFF

STUFF

UNSTUFFUNSTUFF

UNSTUFF

STUFF01

10

11

R2210R2211

SB: 2 OF 4(INT 20K PU)

NOTE: CHANGE SYMBOL

TO RSVD[1-9]

GNT5# GNT4#

TARGETING FWH BIOS SPACE)IE SB INVERTS A16 FOR ALL CYCLES(STRAPPED TO TOP-BLOCK SWAP MODE

BOM NOTE:

STUFF - A16 SWAP OVERRIDE

NOTE:

AND PWROK=H

EXTERNAL 2

BT

NOTE: TBL_L NET REMOVED

ENABLED ONLY WHEN PCIRST#=0GNT[0-3]# HAVE INT 20K PU

SB BOOT BIOS SELECT

STRAP

21

R2203

1%MF-LF

24.9

4021/16W

21

R2204

MF-LF1/16W1%

22.6

402

1

2402

1/16W5%10K

MF-LF

R2223

2

1R2225

MF-LF1/16W5%10K

402

1R22265%10K1/16WMF-LF4022

2

1R2299

402MF-LF1/16W5%10K

D2

D1

N3

N4

M2

M1

L5

L4

K2

K1

J3

J4

H2

H1

G3

G4

F2

F1

P5

P2

P6

R2

P1

R27

N27

L27

J27

G27

E27

R28

N28

L28

J28

G28

E28

T24

P25

M25

K25

H25

F25

T25

P26

M26

K26

H26

F26

B3

A2

C3

E5

D4

D5

C4

D3

C25

D25

AE27

AE28

AC27

AC28

AD24

AD25

AA27

AA28

AB25

AB26

W27

W28

Y25

Y26

U27

U28

V25

V26

U2100

BGA

ICH7-MSB

LEMENU

F14

F15

B10

F21

AH8

AG8

AE9

AD9

AH4

AG4

AD5

AE5

A13

E13

C17

C16

D7

B19

C26

E11

B5

C5

B4

A3

C9

B18

A9

E10

AH20

A7

G7

F8

F7

G8

D8

C8

A14

F13

D17

D16

E7

F16

A12

C15

D12

C12

B15

C14

A15

A17

E17

A18

E16

D6

E6

F18

B6

C7

A6

A8

B9

D9

E9

F10

F11

A10

A16

A11

D11

C11

E12

G13

G15

C13

B12

D14

E14

C18

E18

U2100

BGASB

ICH7-M

LEMENU

2

1R2200

402

10K5%1/16WMF-LF

2

1

10K5%1/16WMF-LF

R2250USB_C_OC_PU

402 2

1

402MF-LF

5%10K1/16W

R2251USB_E_OC_PU

1USB_D_OC_PU

402

5%

2MF-LF1/16W

10KR2255

MF-LF

10K5%1/16W

R2208

4022

1

2

1

R220510K

5%4021/16WMF-LF

2

1

R2206NOSTUFF

1/16W5%

MF-LF10K

402

2

1

R2207

5%402

10K

1/16WMF-LF

VOLTAGE=0

2

1 R2211

402

1K5%

MF-LF1/16W

051-7173

10822

G

=PP3V3_S5_SB_USB

USB_C_OC_L

SB_GPIO31

SB_GPIO30

=PP3V3_S5_SB_IO

SPI_ARB

USB_E_OC_L

SB_GPIO29

=PP3V3_S0_SB

PCI_GNT3_L

PCI_REQ3_L

TP_SB_GPIO22

PCI_REQ1_L

TP_PCI_GNT0_L

TP_PCI_GNT1_L

PCI_REQ2_L

TP_PCI_GNT2_L

PCI_REQ0_L

PCI_PME_FW_L

BOOT_LPC_SPI_L

TP_SB_XOR_AH8

TP_SB_XOR_AG8

TP_SB_XOR_AE9

TP_SB_RSVD9

TP_SB_XOR-AD9

TP_SB_XOR-AH4

TP_SB_XOR-AG4

TP_SB_XOR-AD5

TP_SB_XOR-AE5

INT_PIRQD_L

USB_D_OC_L

USB_B_OC_L

USB_E_OC_L

USB_A_OC_L

SPI_SCLK

NB_SB_SYNC_L

SB_GPIO5

SB_GPIO4

SB_GPIO3

SB_GPIO2

PCI_C_BE_L<0>

PCI_C_BE_L<1>

PCI_DEVSEL_L

PCI_PERR_L

PCI_STOP_L

PCI_RST_L

TP_PCI_PME_L

PLT_RST_L

PCI_TRDY_L

PCI_FRAME_L

PCI_IRDY_L

PCI_CLK_SB

PCI_PAR

PCI_LOCK_L

PCI_SERR_L

PCI_AD<0>

PCI_AD<1>

PCI_AD<2>

PCI_AD<3>

PCI_AD<4>

PCI_AD<5>

PCI_AD<6>

PCI_AD<7>

PCI_AD<8>

PCI_AD<9>

PCI_AD<10>

PCI_AD<11>

PCI_AD<12>

PCI_AD<13>

PCI_AD<14>

PCI_AD<15>

PCI_AD<16>

PCI_AD<17>

PCI_AD<18>

PCI_AD<19>

PCI_AD<20>

PCI_AD<21>

PCI_AD<22>

PCI_AD<23>

PCI_AD<24>

PCI_AD<25>

PCI_AD<26>

PCI_AD<27>

PCI_AD<28>

PCI_AD<29>

PCI_AD<30>

PCI_AD<31>

PCI_C_BE_L<2>

PCI_C_BE_L<3>

INT_PIRQA_L

INT_PIRQB_L

INT_PIRQC_L

USB_RBIAS_PN

DMI_N2S_N<0>

DMI_N2S_P<0>

DMI_S2N_N<0>

DMI_S2N_P<0>

DMI_S2N_N<2>

DMI_S2N_P<2>

DMI_N2S_N<3>

DMI_N2S_P<3>

USB_A_N

USB_A_P

USB_B_P

USB_D_N

USB_E_P

USB_F_N

USB_G_N

USB_G_P

USB_H_N

USB_H_P

USB_E_N

SB_GPIO30

SB_GPIO29

DMI_N2S_P<2>

DMI_N2S_N<2>

DMI_S2N_P<1>

DMI_S2N_N<1>

DMI_N2S_N<1>

DMI_N2S_P<1>

PCIE_A_D2R_N

PCIE_A_D2R_P

PCIE_A_R2D_C_N

PCIE_A_R2D_C_P

PCIE_B_D2R_N

PCIE_B_D2R_P

PCIE_B_R2D_C_N

PCIE_B_R2D_C_P

PCIE_C_D2R_N

PCIE_C_D2R_P

PCIE_C_R2D_C_N

PCIE_C_R2D_C_P

PCIE_D_D2R_N

PCIE_D_D2R_P

PCIE_D_R2D_C_N

PCIE_D_R2D_C_P

PCIE_E_D2R_N

PCIE_E_D2R_P

PCIE_E_R2D_C_N

PCIE_E_R2D_C_P

PCIE_F_D2R_N

PCIE_F_D2R_P

PCIE_F_R2D_C_N

PCIE_F_R2D_C_P

SB_GPIO31

PP1V5_S0_SB_VCC1_5_B

USB_C_OC_L

USB_A_OC_L

USB_B_OC_L

USB_D_OC_L

SPI_CE_L

SPI_SI

SPI_SO

SB_CLK100M_DMI_N

DMI_S2N_P<3>

DMI_S2N_N<3>

DMI_IRCOMP_R

USB_B_N

SB_CLK100M_DMI_P

USB_D_P

USB_C_N

USB_C_P

USB_F_P

64

47

22

36

34

38

45

38

22

50

34

26

38

38

38

38

38

38

38

36

25

22

22

50

50

50

64

6

22

22

64

45

22

22

25

38

26

6

26

26

26

38

5

26

22

22

22

6

45

14

26

26

23

26

38

38

26

26

26

38

26

26

26

26

33

38

26

26

38

38

38

38

38

38

38

38

38

38

38

38

38

38

38

38

38

38

38

38

38

38

38

38

38

38

38

38

38

38

38

38

38

38

26

26

26

14

14

14

14

14

14

14

14

6

6

6

6

6

6

6

6

6

6

6

22

22

14

14

14

14

14

14

36

36

36

36

43

43

43

43

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

22

24

6

6

22

22

45

45

45

33

14

14

6

33

6

6

6

6

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

IN

IN

IO

IO

OUT

OUT

OUT

IN

IN

IO

IN

IN

IO

IN

IN

IN

IN

OUT

IO

IO

IN

OUT

IN

OUT

IN

IN

OUT

GPIO19/SATA1GP

GPIO21/SATA0GP

GPIO36/SATA2GP

CLK48

GPIO37/SATA3GP

CLK14

SUSCLK

SLP_S3*

SLP_S4*

SLP_S5*

PWROK

TP0/BATLOW*

GPIO16/DPRSLPVR

PWRBTN*

LAN_RST*

RSMRST*

GPIO10

GPIO9

GPIO12

GPIO14

GPIO13

GPIO24

GPIO15

GPIO25

GPIO35

GPIO38

GPIO39

SMBCLK

SMBDATA

LINKALERT*

SMLINK1

SMLINK0

RI*

SYS_RST*

SPKR

SUS_STAT*

GPIO0/BM_BUSY*

GPIO18/STPPCI*

GPIO11/SMBALERT*

GPIO20/STPCPU*

GPIO26

GPIO28

GPIO27

GPIO32/CLKRUN*

GPIO33/AZ_DOCK_EN*

WAKE*

GPIO34/AZ_DOCK_RST*

SERIRQ

THRM*

GPIO7

GPIO6

VRMPWRGD

GPIO8

(4 OF 6)

SMB

GPIO

PWR MNGT

SYS GPIO

CLKS

SATA GPIO

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

R2312,R2315 and R2389 close to SB

- CAN NOT BE LOW FOR 35US AFTER RSMRST# ON BOOT (DMI AC COUPLING MODE STRAP)- HAS INTERNAL 20K PU, ENABLED DURING RSMRST# AND DISABLED WITHIN 100MS AFTER RSMRST# DEASSERTS

STRAPPING @ PWROK RISING:

NOTE: DPRSLPVR HAS INT 20K PD, ENABLED AT BOOT/RESET FOR STRAPPING FCN

IN RESET STATE TO SAVE PWR

NOTE: PATA_DET IS ACTUALLY CABLE TYPE DETECT

DEF=GPI

DEF=GPI

NOTE FOR R2323 (DEF=NOSTUFF)

SB WILL DISABLE TCO TIMERSYSTEM REBOOT FEATURE

NOTE FOR GPIO25:

HI = PRESENT

LO = NOT PRESENT

NOTE:SMC WILL DRIVE 0-1-0 TO KEEP LAN INT’F

DEF=GPI

OD

(INT 20K PU)

PLACE R2306-14 WHERE PHYSICALLY ACCESSIBLE

LAYOUT NOTE:

(INT WEAK PD)

NOTE: RESERVED FOR FUTURE

AZALIA DOCKING INT’FRESERVED FOR MOBILE

NOTE:

SV_SET_UP IS LINDACARD DETECT

SB: 3 OF 4

NOT USED

0R23001 2

100 R23021 2

100 R23031 2

100 R23051 2

NOSTUFF

1/16W10K

5%MF-LF402

R23061

2

R2307

21/16W10K

402

5%MF-LF

1

4021/16W

MF-LF5%

10KR23081

2

R2309NOSTUFF

402

01/16W

MF-LF5%

2

1

402

5%MF-LF

1/16W10KR23101

2

1/16W

MF-LF5%

NOSTUFF

402

10KR23111

2

10K1/16W

MF-LF5%

402

R23131

2

402

NOSTUFF

01/16W

MF-LF5%

R23141

2

1

5%2 402MF-LF

10K1/16W

R2316R231710K

402

1

1/16W

MF-LF5%

2

10K

4021/16W

MF-LF5%

R2318

1

2

10K1/16W

MF-LF5%

402

R23191

2

402

5%MF-LF

1/16W10KR2320

1

2

RP2300

1/16W5%10K

SM-LF

1 2 3 4

8 7 6 5

5%402 MF-LF

1/16W

100KR23991 2

2

1

R23981K

402

5%MF-LF

1/16W

5%MF-LF

1/16W8.2K

402

R2397

1

25%MF-LF

1/16W10K

402

R2396

1

2

8.2K1/16W

MF-LF402

5%

R2395

1

2

LEMENU

U2100ICH7-M

AF20

SBBGA

AC1

B2

AB18

A20

B23

F19

E19

R4

E22

AC22

AC20

AH18

AF21

AF19

R3

D20

A21

B21

E23

AG18

AC19

U2

AD21

AH19

AE19

AD20

AE20

AC21

AC18

E21

E20

C19

A26

C23

AA4

A28

Y4

AH21

B24

D23

F22

C22

B22

B25

A25

A19

A27C20

A22

C21

AD22

F20

R2390

2MF-LF402

1/16W5%10K

1

402

10K5%

MF-LF1/16W

R23881

2

402

21

R2312

5%

MF-LF1/16W

0

NOSTUFF

2

R2315

MF-LF402

1

5%1/16W

0

15K

402 2

1

MF-LF1/16W

5%

R2389

NO_REBOOT_MODE

MF-LF402

5%

1K1/16W

R2323

1

2

1

R232610K

2

NOSTUFF

1/16WMF-LF4025%

NOSTUFF

5%MF-LF

1/16W402

10KR2327

1

2

5%

402

8.2K1/16WMF-LF

R23431

2

051-7173

10823

G

SB_GPIO3

PM_RI_L

SATA_C_PWR_EN_L

FWH_MFG_MODE

TP_AZ_DOCK_EN_L

SMC_RUNTIME_SCI_L

CRB_SV_DET

SV_SET_UP

=PP3V3_S5_SB

=PP3V3_S5_SB

FWH_MFG_MODE

BIOS_REC

TP_SB_GPIO6

TP_SB_GPIO38

PATA_PWR_EN_L

=PP3V3_S5_SB

=PP3V3_S5_SB_PM

VR_PWRGD_CK410

TP_AZ_DOCK_RST_L

BIOS_REC

PM_BMBUSY_L

PM_SUS_STAT_L

PM_SYSRST_L

SMLINK<0>

SV_SET_UP

CRB_SV_DET

PM_DPRSLPVR

SB_GPIO37

SB_CLK48M_USBCTLR

SB_GPIO21

SB_GPIO19

SATA_C_DET_L

SMS_INT_L

=PP3V3_S0_SB_GPIO

SMB_DATA

SMLINK<1>

PATA_PWR_EN_L

PCIE_WAKE_L

SB_GPIO26

SMC_EXTSMI_L

SMB_ALERT_L

SB_SPKR

SB_CLK14P3M_TIMER

SMC_SB_NMI

SB_CLK100M_SATA_OE_L

TP_SB_GPIO25_DO_NOT_USE

PM_RSMRST_L

SUS_CLK_SB

PM_SLP_S3_L

PM_SLP_S4_L

PM_SLP_S5_L

PM_SB_PWROK

PM_LAN_ENABLE

PM_PWRBTN_L

PM_BATLOW_L

INT_SERIRQ

PM_THRM_L

PM_CLKRUN_L

PM_STPCPU_L

SB_RUNTIME_SCI_L

=PP3V3_S5_SB

SMB_CLK

PM_STPPCI_L

SATA_C_PWR_EN_L

SMB_LINK_ALERT_L

SMC_WAKE_SCI_L

=PP3V3_S0_SB_GPIO

SB_GPIO14

SB_GPIO14

IDE_RESET_L

53

53

47

63

53

47

47

64

64

64

64

46

47

64

61

47

45

64

64

26

23

25

25

25

26

45

45

23

58

46

23

43

63

60

46

45

38

25

23

22

23

23

45

23

5

23

23

23

23

23

23

11

26

23

14

5

26

5

23

14

33

35

45

21

27

23

36

45

33

45

32

45

6

45

45

45

26

45

45

45

5

45

5

32

23

27

32

23

45

21

23

23

34

(6 OF 6)

VSS

V5REF_SUS

VCC3_3

VCCDMIPLL

VCCSATAPLL

VCC3_3

VCCRTC

VCCUSBPLL

VCCSAUS1_5

VCC PAUX

USB COREVCC1_5_A

ARX

USB

PCI

IDE

VCCA3GP

CORE

ATX

VCC1_5_A

VCC3_3

VCC3_3

VCCSUS3_3

VCC1_5_A

VCCSUS3_3

VCCSUS3_3

VCC1_5_A

VCC1_5_A

VCC1_5_A

VCCLAN1_5

V_CPU_IO

VCC3_3/VCCHDA

VCCSUS3_3/VCCSUSHDA

VCCLAN_3_3

VCC1_05

V5REF

VCC1_5_B

(5 OF 6)

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NOTE FOR VCCLAN_3_3:

S3 IF INTERNAL LAN IS USED

S0 OR S3 IF NOT

CHANGE SYMBOL TO 1.05

CHANGE SYMBOL TO 1.05

SO NO CONNECT HERE

VOLTAGE GENERATED INTERNALLY

SO NO CONNECT HERE

VOLTAGE GENERATED INTERNALLY

SB: 4 OF 4

NOTE:

VCCHDA AND VCCSUSHDA CAN BE 1.5V OR 3.3V

DEPENDING ON VIO OF AZALIA INTERFACE

CODEC IC’S CONSIDERED SO FAR ARE 3.3V

0 0

SBICH7-M

LEMENU

BGA

U2100A4

A23

B1

B8

B11

B14

B17

B20

B26

B28

C2

C6

C27

D10

D13

D18

D21

D24

E1

E2

E4

E8

E15

F3

F4

F5

F12

F27

F28

G1

G2

G5

G6

G9

G14

G18

G21

G24

G25

G26

H3

H4

H5

H24

H27

H28

J1

J2

J5

J24

J25

J26

K24

K27

K28

L13

L15

L24

L25

L26

M3

M4

M5

M12

M13

M14

M15

M16

M17

M24

M27

M28

N1

N2

N5

N6

N11

N12

N13

N14

N15

N16

AE24

AE25

AF2

AF4

AF8

AF11

AF27

AF28

N17

AG1

AG3

AG7

AG11

AG14

AG17

AG20

AG25

AH1

AH3

N18

AH7

AH12

AH23

AH27

N24

N25

N26

P3

P4

P12

P13

P14

P15

P16

P17

P24

P27

P28

R1

R11

R12

R13

R14

R15

R16

R17

R18

T6

T12

T13

T14

T15

T16

T17

U4

U12

U13

U14

U15

U16

U17

U24

U25

U26

V2

V13

V15

V24

V27

V28

W6

W24

W25

W26

Y3

Y24

Y27

Y28

AA1

AA24

AA25

AA26

AB4

AB6

AB11

AB14

AB16

AB19

AB21

AB24

AB27

AB28

AC2

AC5

AC9

AC11

AD1

AD3

AD4

AD7

AD8

AD11

AD15

AD19

AD23

AE2

AE4

AE8

AE11

AE13

AE18

AE21

ICH7-MSB

LEMENU

BGA

U2100

G10

AD17

F6

AE23

AE26

AH26

L11

P18

T11

T18

U11

U18

V11

V12

V14

V16

V17

L12

V18

L14

L16

L17

L18

M11

M18

P11

AB7

AC6

AB9

AC10

AD10

AE10

AF10

AF9

AG9

AH9

AB17

AC17

AC7

T7

F17

G17

AB8

AC8

A1

H6

H7

J6

J7

AD6

AE6

AF5

AF6

AG5

AH5

AB10

AA22

AA23

AD28

D26

D27

D28

E24

E25

E26

F23

F24

G22

AB22

G23

H22

H23

J22

J23

K22

K23

L22

L23

M22

AB23

M23

N22

N23

P22

P23

R22

R23

R24

R25

R26

AC23

T22

T23

T26

T27

T28

U22

U23

V22

V23

W22

AC24

W23

Y22

Y23

AC25

AC26

AD26

AD27

U6

B27

AH11

AG19

A5

B13

B16

B7

C10

D15

F9

G11

G12

AA7

G16

AB12

AB20

AC16

AD13

AD18

AG12

AG15

AG28

AA2

Y7

V5

V1

W2

W7

W5

AD2

K7

C28

G20

R7

P7

A24

L1

L2

L3

L6

L7

M6

M7

N7

E3

C24

D19

D22

G19

K3

K4

K5

K6

C1

051-7173

10824

G

PP1V5_S0_SB_VCC1_5_B

PP5V_S0_SB_V5REF

PP5V_S5_SB_V5REF_SUS

=PPVCORE_S0_SB

=PP3V3_S0_SB_VCCLAN3_3

=PP3V3_S0_SB_3V3_1V5_VCCHDA

=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA


=PP3V3_S0_SB_VCC3_3

PP1V5_S0_SB_VCCDMIPLL

=PP1V5_S0_SB_VCC1_5_A_ARX

=PP1V5_S0_SB_VCCSATAPLL

=PP3V3_S0_SB_VCC3_3

=PP1V5_S0_SB_VCC1_5_A_ATX

=PP3V3_S5_SB_VCCSUS3_3

=PP3V3_S0_SB_VCC3_3_IDE

=PP3V3_S0_SB_VCC3_3_PCI

PP3V3_S5_SB_RTC


=PP3V3_S5_SB_VCCSUS3_3_USB

=PP1V5_S0_SB_VCC1_5_A

=PP1V5_S0_SB_VCC1_5_A_USB_CORE

=PP1V5_S0_SB_VCCUSBPLL

64

64

64

64

26

64

25

64

64

64

25

25

64

64

25

64

25

64

64

25

25

64

64

64

64

22

25

25

25

25

25

64

21

24

25

25

25

24

25

24

25

25

21

24

25

25

25

25

NC

NC

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PLACEMENT NOTE:

(ICH CPU I/O 1.05V PWR)

ICH VCC3_3 BYPASS

(ICH REFERENCE FOR 5V TOLERANCE ON CORE WELL INPUT)

ICH VCCA3GP(VCC1_5_B BYPASS

(ICH IO,LOGIC 1.5V PWR)

PLACE C2520 NEAR PIN E3 OF SB

PLACE < 2.54MM OF SB ON SECONDARY OR

ICH VCC3_3 BYPASS

3.56MM ON PRIMARY NEAR PIN U6


3.56MM ON PRIMARY NEAR PIN AG5

PLACE NEAR PINS AE23, AE26 & AH26 OF SB

PLACEMENT NOTE:

A24 ... G19 AND P7 OF SB

NEAR PINS A5 ... G16

PLACE C2509 NEAR PIN B27 OF SB

ICH VCCDMIPLL BYPASS

(ICH USB PLL 1.5V PWR)

ICH VCC1_5_A/ATX BYPASS

(ICH IDE I/O 3.3V PWR)


PLACEMENT NOTE:

(ICH USB CORE 1.5V PWR)

ICH USB CORE/VCC1_5_A BYPASS

AB8 AND AC8 OF SB

PLACE CAPS NEAR PINS

(ICH LOGIC&IO 1.5V PWR)

K3 ... N7 OF SB


PLACEMENT NOTE:

(ICH SATA PLL 1.5V PWR)

ICH V5REF_SUS BYPASS

(ICH REFERENCE FOR 5V TOLERANCE ON RESUME WELL LOGIC)

ON SECONDARY SIDE OR 3.56MM ON PRIMARY

(ICH DMI PLL 1.5V PWR)


(ICH INTEL HDA CORE 3.3V PWR)

PLACEMENT NOTE:

PLACE C2500 & C2505-07 < 2.54MM OF SB


(ICH IO BUFFER 3.3V PWR)

(ICH SUSPEND 3.3V PWR)

ICH VCCSUS3_3 BYPASS

PLACE < 2.54MM OF SB ON

PLACEMENT NOTE:

ICH VCC3_3/VCCHDA BYPASS

ICH VCCUSBPLL BYPASS

ICH PCI/VCC3_3 BYPASS

PLACEMENT NOTE:

PLACEMENT NOTE:


3.56MM ON PRIMARY NEAR PIN AH11

PLACEMENT NOTE:

PLACEMENT NOTE:

3.56MM ON PRIMARY NEAR PINS A1 ... J7

ICH VCC1_5A BYPASS

ICH VCCSUS3_3 BYPASS


PLACEMENT NOTE:

PLACEMENT NOTE:

PLACEMENT NOTE:

PLACEMENT NOTE:

ICH V5REF BYPASS

SB: 4 OF 4

PLACEMENT NOTE:

PLACEMENT NOTE:

PLACE CAPS NEAR PIN W5 OF SB


3.56MM ON PRIMARY NEAR PIN AG9

DISTRIBUTE IN PCI SECTION OF SB

(ICH PCI I/O 3.3V PWR)

ICH IDE/VCC3_3 BYPASS

ICH V_CPU_IO BYPASS


ICH VCCSATAPLL BYPASS


PLACEMENT NOTE:

NEAR PINS D28, T28, AD28

PLACE C2520 NEAR PIN C1 OF SB

(ICH SUSPEND USB 3.3V PWR)

ICH USB/VCCSUS3_3 BYPASS

PLACEMENT NOTE:

3.56MM ON PRIMARY NEAR PIN AD2

3.56MM ON PRIMARY NEAR PINS AA7 ... AG19

V5, W2, OR W7

ICH VCCRTC BYPASS

(ICH RTC 3.3V PWR)

PLACEMENT NOTE:

ICH VCC1_5_A/ARX BYPASS

(ICH LOGIC&IO[ARX] 1.5V PWR)

(ICH LOGIC&IO[ATX] 1.5V PWR)

PLACEMENT NOTE:

PLACE C2504 < 2.54MM OF PIN F6 OF SB


PLACE C2503 < 2.54MM OF PIN AD17 OF SB

PLACEMENT NOTE:

SECONDARY SIDE OR 3.56MM ON PRIMARY

ICH CORE/VCC1_05 BYPASS

(ICH CORE 1.05V PWR)

PLACE CAPS AT EDGE OF SB

FOR 270UF

ICH VCC_PAUX/VCCLAN3_3 BYPASS

PLACEHOLDER

PLACE CAP UNDER SB NEAR PINS V1,

(ICH LAN I/F BUFFER 3.3V PWR)

PLACEMENT NOTE:


1

2 2.5V

220UF

SMB2POLY

20%

C2500CRITICAL

2

1 C2510

X5R16V10%0.1UF

402

0

2

1 C2512

402

0.1UF10%16VX5R

0

21

R25001

5%1/10WMF-LF 603

C25244.7UF

2

1

20%6.3VCERM603

C2522

2

1

0.1UF10%16VX5R402

5

6

1

D2502BAT54DWSOT-363

2

3

4

D2502BAT54DWSOT-363

21

L2507

1206

0.28-OHM

2

1 C25030.1UF

402

10%16VX5R

0

2

1 C2504

X5R16V10%0.1UF

402

0

1/16W

21

R2501

5%

MF-LF402

10

100-OHM-EMIL2500

21

SM-3

0

C250510%16V2

1

0.1UF

X5R402

0.1UF

X5R2

1 C2506

16V10%

402 4022

1 C25070.1UF16V10%

X5R

2

1 C25010.01UF10%16VCERM402

2

1 C2508

603

10UF20%6.3VX5R

0

2

1 C250910%16VX5R402

0.1UF

0

C2511

2

1

X5R402

16V10%0.1UF

0

2

1 C25170.1UF

402X5R16V10%

0

0.1UF

2

1 C251310%16VX5R402

0

0

2

1 C2514

402

6.3VCERM

10%1UF

0

2

1 C25200.1UF10%16VX5R402

2

1 C2515

402X5R16V10%0.1UF

0

0

CRITICAL

2

1 C2516

CASE-C2POLY

20%2.5V

330UF

2

1

R2502

5%

1/16W

402MF-LF

100C2502

2

1

1UF10%6.3VCERM402

0.1UF

2

1 C2518

402

10%16VX5R

0

2

1 C2519

X5R16V10%0.1UF

402

0

0.1UF

2

1 C252110%16V

402X5R

0

0.1UF

402

C25231

2 X5R16V10%

0

2

1 C25250.1UF

X5R16V10%

402

0

4022

1 C2526

X5R16V10%0.1UF

2

1 C2527

X5R16V10%0.1UF

402

C25280.1UF

2

1

X5R16V10%

402

2

1 C2529

402

0.1UF10%16VX5R

0

2

1 C2530

402

0.1UF10%16VX5R

2

1 C2534

402

0.1UF10%16VX5R

0

2

1 C2531

402

0.1UF10%16VX5R

2

1 C2532

402

0.1UF10%16VX5R

0

2

1 C2533

402

0.1UF10%16VX5R

051-7173

10825

G


=PPVCORE_S0_SB

PP5V_S0_SB_V5REFVOLTAGE=5V

MIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.25MM

PP5V_S5_SB_V5REF_SUS

MIN_NECK_WIDTH=0.25MM

VOLTAGE=5VMIN_LINE_WIDTH=0.3MM

=PP5V_S0_SB

=PP3V3_S5_SB

=PP3V3_S0_SB

=PP5V_S5_SB

PP3V3_S5_SB_RTC

=PP3V3_S5_SB_VCCSUS3_3_USB

=PP3V3_S0_SB_VCC3_3

=PP3V3_S0_SB_VCC3_3_PCI

=PP1V5_S0_SB_VCC1_5_A_ARX

=PP3V3_S0_SB_VCC3_3


=PP1V5_S0_SB


=PP3V3_S0_SB_VCC3_3_IDE

PP1V5_S0_SB_VCCDMIPLL_FVOLTAGE=1.5V


PP1V5_S0_SB_VCCDMIPLL

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM

VOLTAGE=1.5V

=PP1V5_S0_SB_VCCUSBPLL


=PP1V5_S0_SB_VCCSATAPLL

=PP1V5_S0_SB_VCC1_5_A

=PP1V5_S0_SB_VCC1_5_A_USB_CORE

=PP1V5_S0_SB_VCC1_5_A_ATX

PP1V5_S0_SB_VCC1_5_BVOLTAGE=1.5V


=PP1V5_S0_SB


64

26

64

64

64

64

64

64

64

64

34

24

64

25

64

64

25

25

64

25

64

64

64

64

64

64

64

24

64

24

24

24

24

24

64

23

22

64

21

24

24

24

24

24

24

25

24

24

24

24

24

24

24

24

24

22

25

21

IO

IO

IN

IN

IN

IN

IO

IO

IO

IO

IO

IO

IO

IO

OUT

OUT

IN

IN

OUT

OUT

G

S D

IN

IN

NC

NC

IN

SYM_1

IN

OUT

OUT

IO

IO

IO

IO

IO

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

Initial resistor values are based on CRB,but may change after characterization.

to solder a reset button.on the board to short orit provides a set of padsThis part is never stuffed, Silk: "SYS RST"

518S0188

Is this the best part to use?

Buffered

SB RTC Crystal Circuit

197S0098100-ohm on NB page

Unbuffered

NC

Gated

NC

RTC Battery Connector

Platform Reset Connections

Linda Card represents 3 loads

1/16WMF-LF402

5%

20KR26001 2

402

10V

0.1UF

CERM

20%

C26111

2

402

10%6.3V

1UF

CERM

C26051

2

100K1/16WMF-LF

402

5%

OMITR26981

2

R2606

MF-LF

1M

402

5%1/16W

1

2

10K5%

MF-LF402

1/16W

R26971

2

SC70MC74VHC1G08

U2601

3

2

1

4

5

1/16W

402MF-LF

5%1KR26071

2

15pF

402CERM50V5%

C26081 2

50V5%

CERM402

15pFC26091 2

1/16WMF-LF402

0

5%

R26101 2

5%1/16WMF-LF

402

10MR26091

2

SC70MC74VHC1G08

U2680

3

2

1

4

5

0.1UF20%10VCERM402

C26801

2

5%

402MF-LF1/16W

100KR26801

2

MF-LF402

R26810

1/16W5%

1 2

2100

R2683

1/16W

402

5%

MF-LF

1TPM

1/16W

02

R2684

402

5%

MF-LF

1

BSS138SOT23

NOSTUFF

Q2680

3

1

2 0

402MF-LF1/16W5%

R26821 2

402MF-LF1/16W5%0R26891

2

NOSTUFF

100K5%1/16W

402MF-LF

R26881

2

CRITICAL

32.768KSM-LF

Y2600 1

4

8.2K5%

1/16WSM-LF

RP2600

1234

8765

1/16W

5%8.2K

SM-LF

RP2601

1234

8765

SM-LF

5%8.2K

1/16W

RP2602

1234

8765

BAT54DWSOT-363

D2600

1 6

5

BAT54DWSOT-363

D2600

4 3

2

0

1/16W5%

MF-LF402

R26871 2

SC70-5MC74VHC1G00

U2603

3

2

1

4

5

0R2685

402MF-LF

5%1/16W

1 2

1K

402MF-LF

5%1/16W

R269612

CRITICALJ2600

88460-0201F-RT-SM

3

4

1

2

1/16W

1.8K

402MF-LF

5%

R26111

2

0.1UF

CERM

20%10V

402

C2607 1

2

10K5%

1/16WMF-LF

402

R26121

2 MF-LF1/16W5%10K

402

R26221

2

8.2K1 2R26368.2K1 2R2637

8.2K1 2R26388.2K1 2R26398.2K1 2R2640

8.2K1 2R26418.2K1 2R2642

8.2K1 2R2643

1UF10%6.3VCERM402

C26101

2

SB MiscSYNC_DATE=07/26/2005

108

G051-7173

26

SYNC_MASTER=NB

SMC_LRESET_L

TPM_LRESET_L

DEBUG_RST_LPLT_RST_BUF_L

SB_GPIO4SB_GPIO5

PLT_RST_LMAKE_BASE=TRUE

PPVBATT_G3C_RTC

NB_RST_IN_L

=PP3V3_S0_SB_PCI

SB_RTC_RST_L

SB_SM_INTRUDER_L

INT_PIRQB_LINT_PIRQA_L

=PP3V3_S3_RSTGATE

AIRPORT_RST_L

VR_PWRGD_CK410

=PP3V3_S0_SB_PM

MAKE_BASE=TRUEPP3V3_G3C_SB_RTC_D

PCI_STOP_L

PCI_FRAME_LPCI_IRDY_L

PPVBATT_G3C_RTC_R

=PP3V42_G3H_SB_RTC

PCI_REQ3_L

PCI_LOCK_L

PCI_TRDY_L

PCI_PERR_LPCI_DEVSEL_LPCI_SERR_L

ENET_RST_L

SB_RTC_X1

PP3V3_S5_SB_RTC

CK410_PD_VTT_PWRGD_L

PM_SB_PWROKALL_SYS_PWRGD

VR_PWRGOOD_DELAY

=PP3V3_S0_SB_PM

TMDS_RST_L

=PP3V3_S5_SB_PM

MAKE_BASE=TRUEPM_SYSRST_L

SMC_RSTGATE_L

XDP_DBRESET_L_RXDP_DBRESET_L

SB_RTC_X2

MAKE_BASE=TRUEVR_PWRGD_CK410_L

=PP3V3_S0_RSTBUF

SB_RTC_X1_R

PCI_REQ1_LPCI_REQ2_L

PLT_RST_GATED_L

PCI_REQ0_L

INT_PIRQC_L

SB_GPIO2INT_PIRQD_L

SB_GPIO3

25

63

64

47

34

64

38

38

38

38

38

38

38

38

24

32

45

58

64

23

45 11

38

23

45

53

5

22

22

22 14

64

21

21

22

22

64

43

23

26

22

22

22

64

22

22

22

22

22

22

36

21

21

23

5

14

26

68

11

23

45

7

21

58

64

22

22

22

22

22

22

22

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

ICH7-M SMBus Connections

SMC "Battery B" SMBus Connections

U5800

SMC "Battery A" SMBus Connections

(MASTER)

SMC

SMC "0" SMBus Connections

SO-DIMM "A"

CY28445-5: U3301Clock Chip

(Write: 0xD2 Read: 0xD3)

Top-Case SMBus Connections:

U5800

U5800SMC

J2800

SMC "RMT" SMBus ConnectionsNOTE: SMC RMT bus remains powered and may be active in S3 state

(MASTER)U5800SMC

(MASTER)

(MASTER)

(MASTER)

ICH7-MU2100

J2900

SMC

ATS/ALS

AMBIENT THERMAL

U6200

J8250

SMC

MAX6695: U6250SKIN TEMP

CPU TempADT7461: U1001

(Write: 0x98 Read: 0x99)

Top-Case(SEE TABLE)

(MASTER)U5800

Battery

J4900

(Write: 0xA0 Read: 0xA1)

AIRPORTJ5300

(Write: 0xA4 Read: 0xA5)

SO-DIMM "B"

SMC "MLB" SMBus Connections

GEYSER

2

1R27512.0K1/16W5%

402MF-LF

2

1R27502.0K

5%1/16W

402MF-LF

2

1R2781

1/16WMF-LF402

5%8.2K

2

1R2780

MF-LF402

5%1/16W

8.2K

2

1R27602.0K

MF-LF402

5%1/16W

2

1R27612.0K

402

5%1/16WMF-LF

2

1R2701

MF-LF402

2.0K1/16W5%

2

1R27005%

2.0K1/16W

402MF-LF

2

1R2771

1/16W5%

402MF-LF

2.0K

2

1R2782100K1/16WMF-LF402

5%

2

1R2783100K

MF-LF1/16W5%

402

2

1R2770

1/16W

402MF-LF

5%2.0K

M42 SMBUS CONNECTIONS

051-7173


10827

G

SYNC_MASTER=ENET

=I2C_SODIMMA_SDA

=I2C_SODIMMA_SCL

=SMB_AIRPORT_CLK

=I2C_SODIMMB_SDA

=I2C_SODIMMB_SCL

MAKE_BASE=TRUESMBUS_SB_SDA

MAKE_BASE=TRUESMBUS_SB_SCL

=SMB_AIRPORT_DATA

=SMB_GEYSER_CLK

=SMB_GEYSER_DATA

SMB_BSB_CLK

SMB_BSB_DATA

MAKE_BASE=TRUESMBUS_SMC_RMT_SDA

SMBUS_SMC_RMT_SCLMAKE_BASE=TRUE

=SMBUS_ATS_SCL

=SMBUS_ATS_SDA

MAKE_BASE=TRUESMBUS_SMC_BSA_SCL

MAKE_BASE=TRUESMBUS_SMC_BSA_SDA

SMB_THRM_DATA

SMB_THRM_CLK

THRM_DIMM1_SMB_DATA

THRM_DIMM1_SMB_CLK

=PP3V3_S0_SMBUS_SMC_BSB

THRM_DIMM0_SMB_DATA

=SMBUS_BATT_SDA

=SMBUS_BATT_SCL

SMBUS_SMC_MLB_SDAMAKE_BASE=TRUE

MAKE_BASE=TRUESMBUS_SMC_MLB_SCL

SMB_DATA

SMB_MLB_CLK

SMB_RMT_CLK

SMB_MLB_DATA

SMB_CK410_CLK

SMB_0_DATA

SMB_0_CLKSMB_CLK

=PP3V3_S0_SMBUS_SMC_MLB

=PP3V3_S3_SMBUS_SMC_RMT

SMBUS_SMC_0_SCLMAKE_BASE=TRUE

MAKE_BASE=TRUESMBUS_SMC_0_SDA

THRM_DIMM0_SMB_CLK

SMB_RMT_DATA

=PP3V3_S0_SMBUS_SB

SMB_CK410_DATA

=PP3V3_S0_SMBUS_SMC_0

SMB_BSA_DATA

SMB_BSA_CLK

=PP3V42_G3H_SMBUS_SMC_BSA

28

28

43

29

29

43

40

40

45

45

67

67

10

10

49

49

64

49

65

65

5

5

23

45

45

45

32

45

45 23

64

64

49

45

64

32

64

45

45

64

VSS10

VSS2

DQ5

SA1

SA0

VSS58

DQ63

DQ62

VSS56

DQS7

DQS7*

VSS54

DQ60

VSS52

DQ54

VSS50

VSS48

CK1*

CK1

VSS46

DQ53

DQ52

VSS44

VSS42

DQS5

DQS5*

VSS39

DQ45

DQ44

VSS37

DQ39

DQ38

VSS35

DM4

VSS34

DQ37

DQ36

VSS32

NC3

VDD11

NC/A13

ODT0

VDD9

S0*

RAS*

BA1

VDD7

A0

A2

A4

VDD5

A6

A7

A11

VDD3

NC/A14

NC/A15

VDD1

NC/CKE1

VSS30

DQ31

DQ30

VSS28

DQS3

DQS3*

VSS26

DQ29

DQ28

VSS24

DQ23

DQ22

VSS22

DM2

NC0

VSS19

DQ21

DQ20

VSS17

VSS15

DQ15

DQ14

VSS13

CK0*

CK0

VSS11

DQ13

VSS7

DQ7

VSS5

DM0

DQ4

VSS0

DM1

DQ12

DQ6

DQ47

DQ46

DQ61

DQ55

DM6

VDDSPD

SCL

SDA

VSS57

DQ59

DQ58

VSS55

DM7

VSS53

DQ56

VSS51

DQ50

VSS49

DQS6*

VSS47

NC_TEST

VSS45

DQ49

DQ48

VSS43

VSS41

DM5

VSS40

DQ41

VSS38

DQ35

VSS36

DQS4

DQS4*

VSS33

DQ33

DQ32

VSS31

NC/ODT1

VDD10

NC/S1*

CAS*

VDD8

WE*

BA0

A10/AP

VDD6

A1

A3

A5

VDD4

A8

A9

A12

VDD2

BA2

NC2

VDD0

CKE0

VSS29

DQ27

DQ26

VSS27

NC1

DM3

VSS25

DQ25

DQ24

VSS23

DQ19

DQ18

VSS21

DQS2

DQS2*

VSS18

DQ17

DQ16

VSS16

VSS14

DQ11

DQ10

VSS12

DQS1

DQS1*

DQ9

DQ8

VSS8

DQ3

DQ2

VSS6

DQS0

DQS0*

VSS4

VSS1

VREF

DQ0

DQ1

DQ34

DQ40

DQ42

DQ43

DQS6

DQ51

DQ57

KEY

VSS9

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE



TABLE_5_ITEM

TABLE_5_ITEM

Yellow uses 10K divider and TLV2463

to drive MCH and DIMM connectors.

DIP DIMM CONN

Signal aliases required by this page:

(For return current)

DDR2 VRefOne 0.1uF per connector

Power aliases required by this page:

BOM options provided by this page:

(NONE)

- =PPSPD_S0_MEM (2.5V - 3.3V)

- =I2C_MEM_SCL

- =I2C_MEM_SDA

- =PP1V8_S3_MEM

DDR2 Bypass Caps

when they get cheaper.

The 4.7uF and 1.0uF caps can be changed to 5x 2.2uF caps,

ADDR=0xA0(WR)/0xA1(RD)

NC

NC

NC

NC

NC

516-0135

NC

Page Notes

(See Capell Valley pg 47)

2

1 C2813

20%

402CERM

0.1uF

10V2

1 C2812

10V

402

20%0.1uF

CERM2

1 C2811

402CERM

0.1uF20%10V

2

1 C2809

6.3V20%4.7uF

CERM603

2

1 C28100.1uF

10VCERM402

20%

2

1 C2815

402CERM

20%10V

0.1uF

2

1 C2814

10VCERM

20%

402

0.1uF

2

1 C2800

10V

402

0.1uF20%

CERM

2

1 C28210.1uF

CERM10V20%

402

2

1 C28202.2UF20%4VX5R402

2

1 C28222.2UF

X5R4V20%

402

2

1 C2816

CERM6.3V10%1uF

402

2

1 C2817

CERM6.3V10%1uF

402

2

1 C28301uF10%6.3VCERM402

2

1 C2832

402CERM6.3V10%1uF

2

1 C2831

6.3V10%1uF

CERM402

DDR2-SODIMM-STD

J2801CRITICAL

13

48

24

202

201

1

181

175

169

151

141

135

5

7

3

9

11

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

69

71

73

75

77

79

81

83

85

87

89

91

93

95

97

99

101

103

105

107

109

111

113

115

117

119

121

123

125

127

129

131

133

137

139

143

145

147

149

155

157

159

161

163

165

167

171

173

177

179

183

185

187

189

191

193

195

197

199

153

26

20

14

2

4

6

8

10

12

16

18

22

32

34

36

38

40

42

44

46

50

52

54

56

58

60

62

64

66

68

70

72

74

78

80

182

176

170

154

152

82

84

86

88

90

92

94

96

98

100

102

104

106

108

110

112

114

116

118

120

122

124

126

128

130

132

134

136

138

140

142

144

146

148

150

156

160

164

166

168

172

174

178

180

184

186

188

190

192

194

196

198

200

76

158

30

28

F-RT-TH2

OMIT

162

2

1R2800

1%1K

MF-LF402

1/16W

2

1R2801

1/16W1%

402MF-LF

1K

051-7173

DDR2 SO-DIMM Connector A

28

G

108

SYNC_MASTER=MEMORY SYNC_DATE=06/20/2005

CRITICAL1 J2801CONN,200P STD SODIMM OLD REV PVT-DIMM516-0149

CRITICAL1516-0154 J2801CONN,200P STD SODIMM NEW REV 3.5 POST-RAMP-DIMM35

=PP1V8_S3_MEM

MEM_VREF_A


VOLTAGE=0.9VMEM_CLK_P<0>

MEM_A_DQ<60>

MEM_A_DQ<21>

MEM_A_DQ<54>

MEM_A_DQ<50>

MEM_A_DQS_P<6>

MEM_A_DQS_N<6>

MEM_A_DQ<51>

MEM_CLK_N<1>

MEM_A_DQ<61>

MEM_A_DQS_P<5>

MEM_A_DQS_N<5>

MEM_A_DQ<45>

MEM_A_DQ<40>

MEM_A_DQ<33>

MEM_A_DQ<35>

MEM_A_DM<4>

MEM_A_DQ<34>

MEM_A_DQ<36>

MEM_A_A<13>

MEM_ODT<0>

MEM_CS_L<0>

MEM_A_RAS_L

MEM_A_BS<1>

MEM_A_A<0>

MEM_A_A<2>

MEM_A_A<6>

MEM_A_A<7>

MEM_A_A<11>

MEM_A_A<14>

MEM_A_A<15>

MEM_A_DQ<42>

MEM_A_DQ<46>

MEM_A_DM<7>

MEM_A_DQ<59>

MEM_A_DQ<53>

MEM_CKE<1>

MEM_A_DQ<16>

MEM_A_DQS_P<2>

MEM_A_DQS_N<2>

MEM_A_DQ<18>

MEM_A_DQ<30>

MEM_A_DQ<26>

DIMM_OVERTEMP_L

MEM_A_DQ<28>

MEM_CLK_N<0>

MEM_A_DQ<14>

MEM_A_DM<0>

MEM_A_DQ<1>

MEM_A_DQ<5>

MEM_A_DQ<0>

MEM_A_DM<1>

MEM_A_DQ<43>

=PPSPD_S0_MEM

=I2C_SODIMMA_SCL

=I2C_SODIMMA_SDA

MEM_A_DQ<55>

MEM_A_DQ<52>

MEM_A_DM<6>

MEM_A_DQ<48>

MEM_A_DQ<58>

MEM_A_DQS_N<7>

MEM_A_DQ<56>

MEM_A_DQ<63>

MEM_A_DM<5>

MEM_A_DQ<41>

MEM_A_DQ<39>

MEM_A_DQS_P<4>

MEM_A_DQS_N<4>

MEM_A_DQ<32>

MEM_A_DQ<37>

MEM_ODT<1>

MEM_CS_L<1>

MEM_A_CAS_L

MEM_A_WE_L

MEM_A_BS<0>

MEM_A_A<10>

MEM_A_A<1>

MEM_A_A<3>

MEM_A_A<5>

MEM_A_A<8>

MEM_A_A<9>

MEM_A_A<12>

MEM_A_BS<2>

=PP1V8_S3_MEM

MEM_CKE<0>

MEM_A_DQ<17>

MEM_A_DQ<20>

MEM_A_DM<2>

MEM_A_DQ<19>

MEM_A_DQ<22>

MEM_A_DQ<27>

MEM_A_DQ<31>

MEM_A_DQS_P<3>

MEM_A_DQS_N<3>

MEM_A_DQ<25>

MEM_A_DQ<24>

MEM_A_DQ<9>

MEM_A_DQ<10>

MEM_A_DQS_P<1>

MEM_A_DQS_N<1>

MEM_A_DQ<8>

MEM_A_DQ<13>

MEM_A_DQ<2>

MEM_A_DQ<3>

MEM_A_DQS_N<0>

MEM_A_DQ<7>

MEM_A_DQ<6>

MEM_A_DQ<38>

MEM_A_DQ<44>

MEM_A_DQ<47>

MEM_A_DQS_P<7>

MEM_A_DQ<57>

MEM_A_DQ<49>


=GND_CHASSIS_DIPDIMM_LEFT

MEM_A_DQS_P<0>

MEM_A_DQ<62>

MEM_A_DQ<23>

MEM_A_DQ<11>

MEM_A_DQ<12>

MEM_A_DQ<4>

=PP1V8_S3_MEM

MEM_A_A<4>

MEM_A_DM<3>

MEM_A_DQ<15>

MEM_VREF_A

=PP1V8_S3_MEM_NB

MEM_A_DQ<29>

MEM_CLK_P<1>

64 61

64

64 64

29

29

29 29

19

28

30

30

30

30

30

30

30

30

30

30

30

29

64

30

30

30

30

30

30

30

30

30

30

30

30

30

28

30

29 28

30

16

19

28 14

15

15

15

15

15

15

15

14

15

15

15

15

15

15

15

15

15

15

15

14

14

15

15

15

15

15

15

15

6

6

15

15

15

15

15

14

15

15

15

15

15

15

6

15

14

15

15

15

15

15

15

15

29

27

27

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

14

14

15

15

15

15

15

15

15

15

15

15

15

19

14

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

6

6

15

15

15

15

15

15

19

15

15

15

28

14

15

14

VSS10

VSS2

DQ5

SA1

SA0

VSS58

DQ63

DQ62

VSS56

DQS7

DQS7*

VSS54

DQ60

VSS52

DQ54

VSS50

VSS48

CK1*

CK1

VSS46

DQ53

DQ52

VSS44

VSS42

DQS5

DQS5*

VSS39

DQ45

DQ44

VSS37

DQ39

DQ38

VSS35

DM4

VSS34

DQ37

DQ36

VSS32

NC3

VDD11

NC/A13

ODT0

VDD9

S0*

RAS*

BA1

VDD7

A0

A2

A4

VDD5

A6

A7

A11

VDD3

NC/A14

NC/A15

VDD1

NC/CKE1

VSS30

DQ31

DQ30

VSS28

DQS3

DQS3*

VSS26

DQ29

DQ28

VSS24

DQ23

DQ22

VSS22

DM2

NC0

VSS19

DQ21

DQ20

VSS17

VSS15

DQ15

DQ14

VSS13

CK0*

CK0

VSS11

DQ13

VSS7

DQ7

VSS5

DM0

DQ4

VSS0

DM1

DQ12

DQ6

DQ47

DQ46

DQ61

DQ55

DM6

VDDSPD

SCL

SDA

VSS57

DQ59

DQ58

VSS55

DM7

VSS53

DQ56

VSS51

DQ50

VSS49

DQS6*

VSS47

NC_TEST

VSS45

DQ49

DQ48

VSS43

VSS41

DM5

VSS40

DQ41

VSS38

DQ35

VSS36

DQS4

DQS4*

VSS33

DQ33

DQ32

VSS31

NC/ODT1

VDD10

NC/S1*

CAS*

VDD8

WE*

BA0

A10/AP

VDD6

A1

A3

A5

VDD4

A8

A9

A12

VDD2

BA2

NC2

VDD0

CKE0

VSS29

DQ27

DQ26

VSS27

NC1

DM3

VSS25

DQ25

DQ24

VSS23

DQ19

DQ18

VSS21

DQS2

DQS2*

VSS18

DQ17

DQ16

VSS16

VSS14

DQ11

DQ10

VSS12

DQS1

DQS1*

DQ9

DQ8

VSS8

DQ3

DQ2

VSS6

DQS0

DQS0*

VSS4

VSS1

VREF

DQ0

DQ1

DQ34

DQ40

DQ42

DQ43

DQS6

DQ51

DQ57

KEY

VSS9

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_5_ITEM

TABLE_5_ITEM



Resistor prevents pwr-gnd short

ADDR=0xA4(WR)/0xA5(RD)

NC

516-0135

NC

NC

NC

NC

NC

The 4.7uF and 1.0uF caps can be changed to 5x 2.2uF caps,


- =I2C_MEM_SDA


- =PP1V8_S3_MEM

(See Capell Valley pg 47)

to drive MCH and DIMM connectors.

when they get cheaper.

DDR2 Bypass Caps(For return current)

- =I2C_MEM_SCL

by another page.

The reference voltage must be provided

NOTE: This page does not supply VREF.

(NONE)

Power aliases required by this page:

- =PPSPD_S0_MEM (2.5V - 3.3V)

Page Notes

Yellow uses 10K divider and TLV2463

One 0.1uF per connector

DDR2 VREF (FOR CONNECTOR B)DIP DIMM CONN

603

20%6.3VCERM

4.7uFC29091

2

0.1uF20%10VCERM402

C29001

2

1K

MF-LF

1%1/16W

402

R29011

2

1/16W1%

MF-LF

1K

402

R29021

2

402

20%

CERM

0.1uF

10V

C29131

2

402

20%

CERM

0.1uF

10V

C29121

2

402

20%

CERM

0.1uF

10V

C29111

2

402

20%

CERM

0.1uF

10V

C29101

2

402

10V

0.1uF

CERM

20%

C29151

2

402

10V

0.1uF

CERM

20%

C29141

2

402X5R4V20%2.2UFC29201

2

CERM402

6.3V10%1uFC29161

2

1uF10%6.3V

402CERM

C29171

2

1uF10%6.3V

402CERM

C29311

2CERM402

6.3V10%1uFC29301

2

1uF10%6.3V

402CERM

C29321

2

20%10VCERM

0.1uF

402

C29211

2X5R4V20%2.2UF

402

C29221

2

10K5%1/16WMF-LF402

R29001

2

CRITICAL

J2901

DDR2-SODIMM-STD

13

48

24

202

201

1

181

175

169

151

141

135

5

7

3

9

11

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

69

71

73

75

77

79

81

83

85

87

89

91

93

95

97

99

101

103

105

107

109

111

113

115

117

119

121

123

125

127

129

131

133

137

139

143

145

147

149

155

157

159

161

163

165

167

171

173

177

179

183

185

187

189

191

193

195

197

199

153

26

20

14

2

4

6

8

10

12

16

18

22

32

34

36

38

40

42

44

46

50

52

54

56

58

60

62

64

66

68

70

72

74

78

80

182

176

170

154

152

82

84

86

88

90

92

94

96

98

100

102

104

106

108

110

112

114

116

118

120

122

124

126

128

130

132

134

136

138

140

142

144

146

148

150

156

160

162

164

166

168

172

174

178

180

184

186

188

190

192

194

196

198

200

76

158

30

28

F-RT-TH2

OMIT

051-7173

SYNC_MASTER=MEMORY

10829

G


DDR2 SO-DIMM Connector B

CRITICAL PVT-DIMMJ2901CONN,200P STD SODIMM OLD REV516-0149 1

POST-RAMP-DIMM35J2901CONN,200P STD SODIMM NEW REV 3.5516-0154 CRITICAL1

MEM_B_DM<1>

MEM_B_BS<1>

MEM_B_RAS_L

MEM_B_DQ<48>

MEM_B_DQ<63>

=PP1V8_S3_MEM

MEM_B_A<13>

MEM_B_DQS_P<0>


=GND_CHASSIS_DIPDIMM_RIGHT

MEM_VREF_B

MEM_B_DQ<44>

MEM_B_DQ<34>

MEM_B_DQS_P<4>

MEM_B_DQ<52>

MEM_B_DQ<55>

MEM_B_DQ<57>

MEM_B_DQ<1>

MEM_B_DQ<5>

MEM_B_DQS_N<0>

MEM_B_DQ<2>

MEM_B_DQ<3>

MEM_B_DQ<12>

MEM_B_DQ<13>

MEM_B_DQS_N<1>

MEM_B_DQS_P<1>

MEM_B_DQ<8>

MEM_B_DQ<10>

MEM_B_DQ<17>

MEM_B_DQ<20>

MEM_B_DQS_N<2>

MEM_B_DQS_P<2>

MEM_B_DQ<22>

MEM_B_DQ<18>

MEM_B_DQ<29>

MEM_B_DQ<27>

MEM_B_DM<3>

MEM_B_DQ<30>

MEM_B_DQ<31>

MEM_CKE<2>

=PP1V8_S3_MEM

MEM_B_BS<2>

MEM_B_A<12>

MEM_B_A<9>

MEM_B_A<8>

MEM_B_A<5>

MEM_B_A<3>

MEM_B_A<1>

MEM_B_A<10>

MEM_B_BS<0>

MEM_B_WE_L

MEM_B_CAS_L

MEM_CS_L<3>

MEM_ODT<3>

MEM_B_DQ<58>

MEM_B_DQ<62>

MEM_B_DQS_N<7>

MEM_B_DQS_P<7>

MEM_B_DQ<60>

MEM_B_DQ<50>

MEM_B_DM<6>

MEM_B_DQ<32>

MEM_B_DQ<37>

MEM_B_DQS_N<4>

MEM_B_DQ<38>

MEM_B_DQ<45>

MEM_B_DM<5>

MEM_B_DQ<41>

MEM_B_DQ<43>

=I2C_SODIMMB_SDA

=I2C_SODIMMB_SCL

=PPSPD_S0_MEM

MEM_B_DQ<49>

MEM_B_DQ<15>

MEM_B_DQ<6>

MEM_B_DQ<0>

MEM_B_DQ<4>

MEM_B_DM<0>

MEM_B_DQ<7>

MEM_B_DQ<14>

MEM_CLK_N<3>

MEM_B_DQ<11>

MEM_B_DQ<9>

MEM_B_DQ<21>

MEM_B_DQ<16>

DIMM_OVERTEMP_L

MEM_B_DM<2>

MEM_B_DQ<23>

MEM_B_DQ<19>

MEM_B_DQ<25>

MEM_B_DQ<24>

MEM_B_DQS_N<3>

MEM_B_DQS_P<3>

MEM_B_DQ<28>

MEM_CKE<3>

MEM_B_DQ<42>

MEM_B_DQ<39>

MEM_B_DM<4>

MEM_B_DQ<51>

MEM_B_DQ<54>

MEM_B_A<15>

MEM_B_A<14>

MEM_B_A<11>

MEM_B_A<7>

MEM_B_A<6>

MEM_B_A<4>

MEM_B_A<2>

MEM_B_A<0>

MEM_CS_L<2>

MEM_ODT<2>

MEM_B_DQ<59>

MEM_B_DM<7>

MEM_B_DQ<61>

MEM_B_DQ<56>

MEM_B_DQ<53>

MEM_B_DQS_N<6>

MEM_B_DQS_P<6>

MEM_B_DQ<36>

MEM_CLK_P<2>

MEM_CLK_N<2>

MEM_B_DQ<35>

MEM_B_DQ<40>

MEM_B_DQS_N<5>

MEM_B_DQS_P<5>

MEM_B_DQ<46>

MEM_B_DQ<47>

J2900_SA1

MEM_B_DQ<26>

MEM_B_DQ<33>

MEM_CLK_P<3>


VOLTAGE=0.9VMEM_VREF_B

=PP1V8_S3_MEM_NB

=PP1V8_S3_MEM

=PPSPD_S0_MEM

64 61

64 64

28

64

29 29

64

19

29

64

30

30

28

30

28

30

28

30

30

30

30

30

30

30

30

30

30

30

30

30

29

28

30

30

30

30

30

30

30

30

30

16

28

29

15

15

15

15

15

19

15

15

6

6

29

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

14

19

15

15

15

15

15

15

15

15

15

15

15

14

14

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

27

27

28

15

15

15

15

15

15

15

15

14

15

15

15

15

6

15

15

15

15

15

15

15

15

14

15

15

15

15

15

6

6

15

15

15

15

15

15

14

14

15

15

15

15

15

15

15

15

14

14

15

15

15

15

15

15

15

15

14

29

14

19

28

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

LAYOUT NOTE:PLACE ONE CAP CLOSE TO EVERY TWO PULLUP RESISTORS TERMINATED

BOMOPTION shown at the top of each group applies to every part below it

One cap for each side of every RPAK, one cap for every two discrete resistors

TO PP0V9_S0_MEM_TERM

565% 1/16W MF-LF 402

R3001 1 2

5% 1/16W MF-LF 40256R3009 1 2

1/16W MF-LF 4025%56R3011 1 2

402MF-LF1/16W5%56R3025 1 2

5% 1/16W MF-LF 40256R3035 1 2

0

2

1

15 29

15 29

15 29

15 29

402

0.1uF

CERM10V20%

C30181

2402

20%10VCERM

0.1uFC30191

2

402

0.1uF

CERM10V20%

C30211

2402

0.1uF

CERM10V20%

C30201

2

20%10VCERM

0.1uF

402

C30221

2

0.1uF

CERM10V20%

402

C30241

2

0.1uF

CERM10V20%

402

C30251

2

5% 1/16W SM-LF56RP3000 3 6

5% 1/16W SM-LF56RP3000 4 5

5% 1/16W SM-LF56RP3000 1 8

5% 1/16W SM-LF56RP3000 2 7

5% SM-LF56

1/16W

RP3001 2 7

5% 1/16W SM-LF56RP3001 1 8

5% 1/16W SM-LF56RP3001 4 5

5% 1/16W SM-LF56RP3001 3 6

5%56

1/16W SM-LF

RP3002 1 8

5% 1/16W56

SM-LF

RP3002 4 5

5% 1/16W56

SM-LF

RP3002 3 6 5% 1/16W56

SM-LF

RP3002 2 7

SM-LF1/16W5%56RP3003 1 8

SM-LF56

1/16W5%

RP3003 2 7

SM-LF5% 1/16W56RP3003 3 6

SM-LF5% 1/16W56RP3003 4 5

SM-LF5% 1/16W56RP3004 1 8

SM-LF56

1/16W5%

RP3004 3 6

SM-LF56

1/16W5%

RP3004 4 5

SM-LF56

1/16W5%

RP3005 1 8

SM-LF56

1/16W5%

RP3005 2 7

SM-LF5% 1/16W56RP3005 3 6

SM-LF5% 1/16W56RP3005 4 5

SM-LF56

1/16W5%

RP3006 1 8

SM-LF56

1/16W5%

RP3006 2 7

SM-LF5% 1/16W56RP3006 3 6

561/16W5% SM-LF

RP3007 4 5

SM-LF5% 1/16W56RP3007 3 6

SM-LF56

1/16W5%

RP3007 2 7

SM-LF56

1/16W5%

RP3007 1 8

SM-LF5% 1/16W56RP3008 4 5

SM-LF56

1/16W5%

RP3008 3 6

SM-LF5% 1/16W56RP3008 2 7

SM-LF5% 1/16W56RP3008 1 8

SM-LF5% 1/16W56RP3009 1 8

SM-LF56

1/16W5%

RP3009 2 7

SM-LF5% 1/16W56RP3009 3 6 SM-LF5% 1/16W56RP3009 4 5

SM-LF56

1/16W5%

RP3010 3 6

561/16W5% SM-LF

RP3010 1 8

561/16W5% SM-LF

RP3010 2 7

SM-LF5% 1/16W56RP3010 4 5

SM-LF56

1/16W5%

RP3011 1 8

SM-LF5% 1/16W56RP3011 2 7

SM-LF56

1/16W5%

RP3011 4 5

SM-LF5% 1/16W56RP3006 4 5

SM-LF5% 1/16W56RP3011 3 6

15 29

15 29

15 29

15 29

15 29

15 29

15 29

15 29

15 29

15 29

15 29

15 29

15 29

15 29

402

20%10VCERM

0.1uFC30001

2

402

20%10VCERM

0.1uFC30011

2

402

20%10VCERM

0.1uFC30071

2

20%10VCERM

0.1uF

402

C30081

2

0.1uF

CERM10V20%

402

C30101

2

0.1uF

CERM10V20%

402

C30231

2

402

0.1uF

CERM10V20%

C30121

2

402

20%10VCERM

0.1uFC30131

2

402

20%10VCERM

0.1uFC30141

2

402

0.1uF

CERM10V20%

C30151

2

0.1uF

CERM10V20%

402

C30161

2

402

0.1uF

CERM10V20%

C30171

2

0

1

0

1

1

0

2

0

1

2

3

4

5

6

7

10

11

9

8

13

12

14 28 29

14 28 29

15 28

15 28

15 28

15 28

15 28

2

3

2

3

0.1uF

CERM10V20%

402

C30091

2

0.1uF

CERM10V20%

402

C30061

2

402CERM

20%10V

0.1uFC30051

2

20%10VCERM

0.1uF

402

C30041

2

402

20%10VCERM

0.1uFC30031

2

20%10VCERM

0.1uF

402

C30021

2

0.1uF

CERM10V20%

402

C30111

2

0

1

2

3

14 28 29

Memory Active Termination

051-7173 G

10830

MEM_B_BS<2..0>

MEM_ODT<3..0>

MEM_CKE<3..0>

MEM_CS_L<3..0>

MEM_A_A<13..0>

MEM_A_BS<2..0>

MEM_B_A<6>

MEM_B_A<12>

MEM_B_A<11>

MEM_B_A<9>

MEM_B_A<5>

MEM_B_A<10>

MEM_B_A<3>

MEM_A_RAS_L

MEM_A_WE_L

=PP0V9_S0_MEM_TERM

MEM_A_CAS_L

MEM_B_A<4>

MEM_B_A<8>

MEM_B_A<7>

MEM_B_A<1>

MEM_B_CAS_L

MEM_B_WE_L

MEM_B_RAS_L

MEM_B_A<13>

MEM_B_A<0>

MEM_B_A<2>

64

VREF

VTT

GND

VTT_IN

ENVTTS

VDDQ VCC

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

disable MEMVTT in sleep.

If power inputs are not S0,

DDR2 Vtt Regulator

MEMVTT_EN can be used to

Page NotesPower aliases required by this page:

(NONE)

(NONE)



- =PP5V_S0_MEMVTT

- =PP0V9_S0_MEMVTT_LDO

- =PP1V8_S0_MEMVTT

2

1C3101

6.3VX5R

20%10uF

603

CRITICAL3

7

8

4

5 6

1

2

U3100BD3533FVM

MSOP-82

1R3100

5%1/16WMF-LF

1K

MEMVTT_EN_PU

402

CRITICAL

POLY

150UF

SMC-LF

2

1 C3105

20%6.3V

2

1 C3102

6.3V

10uF20%

X5R603

2

1C31042.2uF

6.3V20%

CERM1603

21

R3104220

5%

MF-LF402

1/16W

2

1 C31030.1uF

X5R

10%16V

402

2

1 C3100

CERM

10%6.3V

1uF

402

31 108

G051-7173

Memory Vtt SupplySYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

MEMVTT_VREF

PP1V8_S3_MEMVTT_VDDQMIN_LINE_WIDTH=0.2 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=1.8V

=PP5V_S0_MEMVTT

MEMVTT_EN

=PP1V8_S3_MEMVTT

=PP0V9_S0_MEM_REG 64

64

64

63

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

IN

IO

OUT

IN

IO

IO

OUT

OUT

IN

IN

IN

IN

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

IN

VSS_SRC

THRML_PAD

VSS_REF

VSS_PCI

VSS_CPU

VSS_48

NC

SDA

PCIF_1

PCIF_0/ITP_EN

PCI_5/FCT_SEL_1

PCI_4

PCI_3

PCI_2

PCI_1

FS_B_TEST_MODE

REF_1/FCT_SEL_0

REF_0/FS_C/TEST_SEL

48M/FS_A

VTT_PWRGD*/PD

VDD_AVSS_A

XTAL_IN

XTAL_OUT

CLKREQ_8*

CLKREQ_6*

CLKREQ_5*

CLKREQ_4*

CLKREQ_3*

CLKREQ_1*

CPU_STOP*

PCI_STOP*

VDD_CPU

VDD_48

SCL

CPU_0*

CPU_0

CPU_1

CPU_1*

CPU_ITP/SRC_11*

CPU_ITP/SRC_11

SRC_0/LCD_CLK

SRC_0/LCD_CLK*

SRC_1

SRC_1*

SRC_2*

SRC_2

SRC_3

SRC_3*

SRC_4

SRC_4*

SRC_5*

SRC_5

SRC_7*

SRC_7

SRC_8*

SRC_6*

SRC_6

SRC_8

DOT_96*/27M_SS*

DOT_96/27M

VDD_SRC

VDD_REF

VDD_PCI

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

(TPM LPC 33MHZ)

(GMCH HOST 133/167MHZ)

(ITP HOST 133/167MHZ)

(CPU HOST 133/167MHZ)

(FROM ICH7 GPIO20 STPCPU* )(FROM ICH7 GPIO18 STPPCI* )

(INT PU)(INT PD)

(FW PCI 33MHZ)

(SMC LPC 33MHZ)(NO USED)

(PORT80 LPC 33MHZ)

(PULL UP PIN 68 TO ENABLE ITP HOST CLK)

(ICH SM BUS)

(ICH7M PCI 33MHZ)

0

PIN 6

* FOR EXT. GRAPHIC SYSTEM

* FOR INT. GRAPHIC SYSTEM

SRCT0

SRCT0

DOT96CDOT96T

DOT96T

PIN 7 PIN 10 PIN 11

100MC_SST

FCTSEL1

00

0 1

1

1 1 OFF LOW

27M NONSPREAD

27MSPREAD

TBD

DOT96C 100MT_SST

SRCT0

SRCC0

SRCC0

SRCC0

FCTSEL0

(INT PU)

(INT PU)

(ICH7M DMI 100 MHZ )

(WIRELESS PCI-E 100 MHZ )

(GIGA LAN PCI-E 100 MHZ )

(GMCH D_REFCLKIN DISPLAY PLL A 96MHZ)

NEED TO CHECK CAP VALUE

(GPU PCI-E 100 MHZ )

(GMCH G_CLKIN 100 MHZ )

(SIGNAL NAME WILL BE CHANGED POST(FROM ICH7 GPIO35)(ICH SATA 100 MHZ)

NEED TO DECIDE THE CLKREQ CONNECTION,TO GPIO?

(FOR PCI-E CARD)

(GMCH D_REFSSCLKIN DISPLAY PLL B 100MHZ)

(ICH7M USB 48MHZ)(ICH7M,SIO,LPC REF. 14.318MHZ)

(NOT USED )

(FROM GMCH CLK_REQ*)

(FROM CPU VCORE PWR GOOD)

PROTO TO REMOVE 100M FROM SIGNAL NAME)

(EACH POWER PIN PLACED ONE 0.1UF)(PLACED 0.1UF NEAR THE RELATIVE POWER PIN)

(INT PU)

(INT PU)

(INT PU)

(INT PD)

(INT PD)

(INT PU)

(INT PU)

10UF

603X5R

20%6.3V

1

2

C3309

120-OHM-0.3A-EMI21

0402-LF

L3302

0.1UF10%

X5R16V

402

C33051

2

C3306

16VX5R402

10%0.1UF

1

2

402

16VX5R

0.1UF10%

C33071

2

0.1UF10%

402

16VX5R

C33081

2

15PF

402

50V

1

2 CERM

C33905%

15PF5%

C33891

2 50VCERM402

MF-LF

1%475

402

1/16W

R33001

2

2

C331220%6.3VX5R603

1

10UF 0.1UF16V

402X5R

10%

1

2

C3311

402

10%16VX5R

0.1UFC33041

2X5R16V

402

0.1UF10%

C33031

2

0.1UF10%16VX5R402

C33021

216V

402X5R

0.1UF10%

C33011

2

1UF6.3VCERM

10%

402

1

2

C3310

10UF

603

6.3V20%

X5R

C33161

210%

X5R16V

402

0.1UFC33151

2

21

0402-LF

120-OHM-0.3A-EMIL3301

1UF10%

CERM6.3V

402

C33141

2

402MF-LF

R33021 22.2

5%1/16W

402

1/16W5%

MF-LF

1R33031 2

6.3V20%

603X5R

1 C331710UF

2

R3304

MF-LF402

2.2

5%1/16W

1 2

10K5%MF-LF4021/16W

R33011

2

14.31818Y3301CRITICAL

1

5X3.2-SM

2

OMIT

44

45

5

47

68

65

64

63

58

38QFN

31

69

52

66

62

46

48

1

57

8

53

54

4

2

51

50

34

25

60

20

59

9

55

56

43

3

42

41

36

37

10

11

13

14

16

15

18

19

21

22

24

23

30

29

32

27

26

33

7

6

49

67

61

39

40

35

28

17

12

U3301

CRITICAL

SLG8LP436

G

33 108

SYNC_DATE=06/03/2005SYNC_MASTER=CLOCK

CLOCKS

051-7173

PP3V3_S0_CK410_VDD48

MIN_NECK_WIDTH=0.2mmMIN_LINE_WIDTH=0.5mm

VOLTAGE=3.3V

CK410_CPU0_P

CK410_CPU1_N

SMB_CK410_DATA

CK410_SRC8_N

CK410_SRC7_PCK410_SRC7_N

CK410_SRC_CLKREQ6_L

CK410_XTAL_OUT

CK410_PCIF0_CLK

CK410_IREF

CK410_PCIF1_CLK

CK410_PCI5_FCTSEL1CK410_PCI4_CLKCK410_PCI3_CLKCK410_PCI2_CLKCK410_PCI1_CLK

CK410_FSB_TEST_MODE

CK410_REF1_FCTSEL0CK410_CLK14P3M_TIMERCK410_USB48_FSA

CK410_PD_VTT_PWRGD_L

CK410_SRC_CLKREQ8_L

CLK_NB_OE_L

SB_CLK100M_SATA_OE_L

SMB_CK410_CLK

CK410_CPU2_ITP_SRC10_P

CK410_SRC3_N


CK410_SRC5_NCK410_SRC5_P

CK410_SRC6_NCK410_SRC6_P

CK410_SRC8_P

CK410_DOT96_27M_NCK410_DOT96_27M_P

MIN_NECK_WIDTH=0.2mm

PP3V3_S0_CK410_VDD_REFVOLTAGE=3.3V

MIN_LINE_WIDTH=0.5mm

=PP3V3_S0_CK410

=PP3V3_S0_CK410

=PP3V3_S0_CK410

CK410_SRC2_P

CK410_LVDS_N


CK410_CPU2_ITP_SRC10_N

CK410_CPU1_P

PM_STPCPU_L

CK410_SRC_CLKREQ3_LCK410_SRC3_P

CK410_SRC2_N

CK410_SRC_CLKREQ1_L

CK410_LVDS_P

CK410_CPU0_N

PM_STPPCI_L

CK410_XTAL_IN

VOLTAGE=3.3VMIN_LINE_WIDTH=0.5mmMIN_NECK_WIDTH=0.2mm

PP3V3_S0_CK410_VDDA

PP3V3_S0_CK410_VDD_PCIMIN_LINE_WIDTH=0.5mmMIN_NECK_WIDTH=0.2mm

VOLTAGE=3.3VPP3V3_S0_CK410_VDD_CPU_SRC

VOLTAGE=3.3VMIN_LINE_WIDTH=0.5mmMIN_NECK_WIDTH=0.2mm

33

33

33

33

33

33

33

33

33

33

33

33

33

33

33

64

64

64

33

33

33

33

33

33

33

5

5

27

5

6

6

43

33

5

33

33

33

33

33

33

33

33

26

5

14

23

27

5

6

5

5

5

5

5

5

5

5

5

32

32

32

5

5

6

6

5

5

23

6

6

5

6

5

5

23

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUTIN

IN

OUTIN

OUT

OUT

OUTOUT

OUT

IO

IO

OUT

IN

OUT

OUT

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUTIN

IN

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

SET FCTSEL0,FCTSEL1 TO 00EVEN THESE TWO PINS INTERNAL PULL DOWN,CYPRESS RECOMMAND TO ADD EXTERNAL PULLS,

NOSTUFF R3450,R3451,R3453 FOR MANUAL CPU FREQUENCY

(ICH7M 14.318MHZ)

(PORT80 LPC 33MHZ)

(TO ICH7M USB 48MHZ)

(TO MCH FS_A)

(TO MCH FS_B)

# NAPA PLATFORM ONLY SUPPORT 133M/166M CPU SPEED, M42 133MHZ

(TO ICH7M PCI 33MHZ)

(FROM CPU FS_C)

(FROM CPU FS_B)

(GMCH DISPLAY PLLB FOR LVDS SPREAD 100MHZ)

(GMCH DISPLAY PLLA 96MHZ)

(FROM CPU FS_A)

# 0

1

FS_C

0

0

1

FS_B

0

1

0

1

1

1

0

FS_A

200M

(ICH7M SATA 100MHZ)

(ICH7M DMI 100MHZ)

(GIGA-LAN PCI-E 100MHZ)

(WIRELESS PCI-E 100MHZ)

(GMCH G_CLKIN 100MHZ)

(ITP HOST 133/167MHZ)

(CPU HOST 133/167MHZ)

(GMCH HOST 133/167MHZ)

(TO SMC PCI 33MHZ)

(TO TPM PCI 33MHZ)

(TO FIREWIRE PCI 33MHZ)

CPU

100M

166M

133M

NEED TO CHECK THE BSEL PULLS

(TO MCH FS_C)

1/16W

49.9

1%

402MF-LF

R34411 2

NOSTUFF

1/16WMF-LF402

1%

49.9R34021 2

NOSTUFF

R34181 2

402

0

MF-LF1/16W5%

2

1/16W

1

R3419

402

5%

MF-LF

0

2

R3420

402

1

5%1/16WMF-LF

0

02

R34211

5%1/16WMF-LF402

R3422

1/16WMF-LF

21

402

5%

0

21

R3423

402MF-LF

5%1/16W

0

21

5%

402

1/16W

0

MF-LF

R3465

5%1/16W

402

21

MF-LF

0R3426

33 36

33 36

22 33

1/16W

402

21

R3428

5%

MF-LF

0

R342721

5%

402

1/16WMF-LF

0

1%

49.9

MF-LF402

1/16W

R34101 2

NOSTUFF

402

R3429

MF-LF

1 2

1/16W5%

33 TPM

332

R34301

402

5%1/16WMF-LF

R343333

1/16WMF-LF

5%

1 2

402

R343233

1 2

402

5%1/16WMF-LF

38

53

45

22

21

R3435

402MF-LF

5%1/16W

0

1

5%

MF-LF402

1/16W

02

R3434

NOSTUFF

49.9

1/16WMF-LF402

1%

R34081 2

NOSTUFF

R343649.9

1/16W

402

1%

MF-LF

1 2

NOSTUFF

402MF-LF

49.9R34371 2

1/16W1%

5 47

402

2133

5%1/16WMF-LF

R3463

22 33

2

1/16W10KMF-LF5%

402

1R3467

4021/16W10KMF-LF5%

R34661

2

49.9

MF-LF402

1%1/16W

R34311 2

NOSTUFF

R3469

402MF-LF1/16W

1K5%

1

2

NOSTUFF

402MF-LF

R3468

1/16W

1K

5%

1 2

R34721K

1/16WMF-LF402

5%

1 2

R3470

402MF-LF

5%1K1/16W

1

2R34711K

5%

MF-LF1/16W

402

1 2

21

1/16WMF-LF402

1%

49.9R3409NOSTUFF

NOSTUFF

1K

MF-LF1/16W

R3473

2402

5%

1

R3475

1/16WMF-LF402

1K

5%

1 2

R3474

1/16W

1K

402MF-LF

5%

1 2

23

1%1/16WMF-LF402

149.9

2

NOSTUFF

R3406

21 33

21 33 21

5%

402MF-LF

0

1/16W

R3478

2

MF-LF402

01

1/16W5%

R3477

NOSTUFF

MF-LF402

2

1%

49.9

1/16W

R34391

402MF-LF

1KR34801

5%1/16W

2

49.9

NOSTUFF

R3481

1%

402

1 2

MF-LF1/16WNOSTUFF

402MF-LF1/16W1%

49.9R34821 2

5%

156

R3476

1/16WMF-LF

2

402

1/16W

R34500

1

MF-LF402

5%

2

R34530

5%1/16WMF-LF402

1 2

R3454

402

5%1K1/16WMF-LF

1

2

NOSTUFF

1/16W

49.9

1%

402

R34071 2

MF-LF

MF-LF402

1/16W5%

0R34511 2

NOSTUFF

402

5%1K1/16WMF-LF

R34521

2

1K

402

1

2

R34905%1/16WMF-LF

12 33

12 33

7 33

7 33

11 33

11 33

R3411

1/16W

402

21

MF-LF

5%

0NOSTUFF

MF-LF1/16W

49.9

1%

402

R34401 2

402MF-LF

21

R3413

5%1/16W

0

21

402MF-LF1/16W

ITP

5%

0R3415

402MF-LF1/16W

NOSTUFF

49.9

1%

R34381 2

NOSTUFF

R340449.9

1/16WMF-LF

21

402

1%

NOSTUFF

1%1/16W

49.9R34421 2

MF-LF402

21

R3412

402MF-LF

5%1/16W

0

MF-LF1/16W

R3414

402

21

5%

0

R3403NOSTUFF

49.9

1%

402

1 2

MF-LF1/16W

NOSTUFF

49.9

1%1/16W

402MF-LF

R34051 2

NOSTUFF

49.9

1%1/16WMF-LF

R34001 2

402

21

R3416

MF-LF1/16W5%

402

ITP

0

2

5%

MF-LF402

1/16W

1

R341733

2.2K

MF-LF1/16W

402

5%

1 2

R3401

SYNC_MASTER=CLOCK

34 108

G051-7173


CLOCK TERMINATION

SB_CLK48M_USBCTLR

=PP1V05_S0_FSB_NB

CK410_PCIF0_CLK

NB_CLK_DREFCLKIN_N

CK410_SRC2_N

CK410_SRC8_P

SB_CLK100M_DMI_P

CK410_CPU2_ITP_SRC10_N

CK410_CPU2_ITP_SRC10_P

CPU_XDP_CLK_N

SB_CLK100M_SATA_P

CK410_SRC8_N

CK410_SRC5_N

CK410_SRC2_P

=PP1V05_S0_FSB_NB

NB_BSEL<2>

NB_CLK_DREFCLKIN_P

CK410_SRC4_N

ENET_CLK100M_PCIE_P

CK410_SRC5_P

CK410_SRC6_N

CK410_CPU1_N

FSB_CLK_NB_P

CK410_CPU0_P

PCI_CLK_SB

=PP1V05_S0_FSB_NB

SB_CLK14P3M_TIMER

CPU_BSEL<2>

CPU_BSEL<1>

NB_BSEL<1>

CPU_BSEL_R<0>

CK410_USB48_FSA

NB_BSEL<0>

CK410_DOT96_27M_P

FSB_CLK_CPU_N

CK410_CPU1_P

CK410_CPU0_N

NB_CLK100M_GCLKIN_P

FSB_CLK_NB_N

CPU_XDP_CLK_P

AIRPORT_CLK100M_PCIE_P

SB_CLK100M_SATA_N

CK410_SRC6_P

NB_CLK100M_GCLKIN_N

SB_CLK100M_DMI_P

SB_CLK100M_DMI_N


ENET_CLK100M_PCIE_N

NB_CLK100M_GCLKIN_N

NB_CLK_DREFSSCLKIN_P

NB_CLK100M_GCLKIN_P

NB_CLK_DREFCLKIN_N


FSB_CLK_NB_N

CPU_XDP_CLK_P

ENET_CLK100M_PCIE_PCK410_PCIF1_CLK

CK410_PCI1_CLK

CK410_LVDS_N

FSB_CLK_CPU_P

CPU_XDP_CLK_N

SB_CLK100M_SATA_N

CK410_FSB_TEST_MODE

CPU_BSEL_R<1>

CK410_DOT96_27M_N

CK410_PCI3_CLK

CPU_BSEL<0>

PCI_CLK_PORT80_LPC

CPU_BSEL_R<2>

CK410_LVDS_P NB_CLK_DREFSSCLKIN_P

CK410_SRC4_P

AIRPORT_CLK100M_PCIE_N

CK410_SRC_CLKREQ8_L

AIRPORT_CLK100M_PCIE_N

NB_CLK_DREFCLKIN_P

FSB_CLK_CPU_N

SB_CLK100M_DMI_N

FSB_CLK_NB_P

FSB_CLK_CPU_P

ENET_CLK100M_PCIE_N

PCI_CLK_FW

PCI_CLK_SMC

PCI_CLK_TPMCK410_PCI2_CLK


SB_CLK100M_SATA_P

CK410_CLK14P3M_TIMER

CK410_PCI5_FCTSEL1

CK410_REF1_FCTSEL0

64

64

64

33

33

33

19

33

32

32

19

33

19

33

43

33

33

33

33

33

33

33

33

33

33

33

36

33

33

33

43

32

43

33

33

33

33

36

43

33

23

12

32

14

5

5

12

14

14

12

7

7

14

32

14

14

33

14

22

22

14

14

14

14

14

14

12

11

33

32

11

21

32

32

7

14

33

5

33

14

7

12

7

33

32

33

21

32

32

32

OUT

OUT

OUT

G

D

S

G

D

S

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

ODD detect need less than 100ms include OS latency

Indicates disk presence, to SMC

SB_GPIO5 IS PULLED HIGH

NC

NC

NC

ARE CONTROLLED BY PP5V_RUN 1MM / 0.6MM.

Per ATA Spec

NC

MIN_NECK & MIN_LINE WIDTH

PER ATA SPEC

NC

PER ATA7 SPEC

NC

NC

NC

516S0339

NC

APPLY A WIDE TRACE SHAPE FROM JC901 TO C3805/C3806.PLACE C3805/C3806 CLOSE TO JC901 FOR PP5V_PATA.

4.7K

2

1/16W5%

402MF-LF

R38511

50VCERM

10pF

402

5%

NO STUFF

C3804 1

2

MF-LF

5%6.2K1/16W

402

R38591

2402MF-LF1/16W5%0R38581

2

402

10V

CERM

20%0.1uF

NOSTUFF

C38051

2

10uF6.3VX5R603

20%

NOSTUFF

C38061

2

5%10K1/16W

R3824

MF-LF

NOSTUFF

4022

1

5%33K1/16WMF-LF402

R38531

2

FDC638PSM-LF

Q3810

1

2

5

6

3

4

2

20%10VCERM

0.1UF

402

C38761

6.2K5%1/16WMF-LF402

R38651

2

10KR3876

MF-LF1/16W

402

5%

2

1

SOT-3632N7002DW-X-FQ3875

6

2

1

2N7002DW-X-FSOT-363

Q3875

4

3

5

402MF-LF1/16W5%100KR38771

2

CRITICAL

J3801

51

52

1

10

1112

1314

1516

1718

19

2

20

2122

2324

2526

2728

29

3

30

3132

3334

3536

3738

39

4

40

4142

4344

4546

4748

49

5

50

78

9

6

M-ST-SM5-1775184-0

10%2

1 C3875

6.3VCERM-X5R

0.47UF

402

10K

1/16WMF-LF

5%

R3825

402

21

G051-7173

PATA CONNECTOR

38 108

MAKE_BASE=TRUE


VOLTAGE=5V

PP5V_S0_IDE_PATA

ODD_PWR_EN_SLOW_START_L_RODD_PWR_EN_SLOW_START_L

IDE_RESET_L

IDE_PDCS1_L

IDE_PDD<6>

IDE_PDD<5>

IDE_PDD<4>

SB_GPIO5

=PP3V3_S0_SB

ODD_PWR_EN_SLOW_START

=PP3V3_S0_PATA

MAKE_BASE=TRUE

ODD_PWR_EN_L

IDE_PDD<13>

IDE_PDD<14>

IDE_PDD<15>

IDE_PDIOR_L

IDE_PDDACK_L

SMC_ODD_DETECT

IDE_PDA<2>

IDE_PDD<2>

IDE_PDD<1>

IDE_PDD<0>

IDE_PDCS3_L

IDE_PDA<0>

IDE_CSEL_PD

IDE_PDD<9>

IDE_PDD<10>

IDE_PDD<11>

IDE_PDD<12>

IDE_PDD<3>

IDE_PDIOW_L

IDE_PDA<1>

IDE_PDDREQ

=PP5V_S5_PATA

IDE_PDD<8>

=PP5V_S0_IDE_PATA

IDE_PDIORDY

IDE_PDD<7>

IDE_IRQ14

64

26

25

23

21

21

21

21

22

22

64

21

21

21

21

21

21

21

21

21

21

21

21

21

21

21

21

21

21

21

64

21

21

21

21

OUT

IN

IN

OUT

OUT

IN

OUT

SYM_VER-1

SYM_VER-1


TABLE_ALT_HEAD

TABLE_ALT_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

CAPS TO BE SAME DISTANCEFROM SB WITHIN EACH PAIR

SATA DIFF PAIR GND VIAS

PLACE L3902 NEAR SB

518S0390

(TO IR RECEIVER)

NC

NC

NC

NC

PLACE NEAR ICH7 PIN

VALUE=3900PF IN REFERENCE SCHEM

SYSTEM (SLEEP) LED FILTER

Place L3901 near J3901

SATA CONNECTOR

1

GV3908HOLE-VIA-P5RP25

1


1


1


1


1


1


1


0

2 C39010.0047UF

1

402

21

C3903

0.0047UF402

603

6.3V2

1

10uF

X5R

20%

C3921NOSTUFF

C39201

220%10V

402CERM

0.1uF

NOSTUFF

24.91%1/16WMF-LF402

R39011

2

0

100

MF-LF1/16W

402

5%

R39001 2

2012H90-OHM-300mAL3901

3

1

2

4

CERM16V10%0.01UFC3922

402

1

2

600-OHM-300MA

0402

21

L3912

CERM50V10%470PFC3923

402

1

2

1/16W

R3950

5%

1 2100

402MF-LFC3950

2

1

603

4.7UF

CERM6.3V20%

90-OHM-300mA2012H

3

1

2

4

L3902

C390221

0.0047UF402

0.0047UF

1

402

2C3900

J390120247-019E

20

1

2

3

4

5

7

6

8

9

10

12

11

13

15

14

17

18

16

19

21

F-ST-SM

CRITICAL

L3901,L3902155S0164 KEEP MAG.LAYER IN BOM155S0227 ?

SATA CONNECTOR

051-7173 G

10839

=PP5V_S0_SATA

SATA_C_R2D_P

SATA_C_D2R_C_N

SATA_C_R2D_N

IR_RX_OUT

PP5V_S3_SYSLED_F

SATA_C_D2R_F_N

SATA_C_D2R_C_P

SATA_C_DET_L

SATA_RBIAS_N

SYS_LED_ANODE_LGND_CHASSIS_SATA

SYS_LED_ANODE

SATA_C_D2R_F_P

SATA_C_D2R_N

SATA_C_D2R_P

=PP5V_S3_SYSLED

SATA_C_R2D_F_P

SATA_C_R2D_F_N

MAKE_BASE=TRUE

SATA_RBIAS_PN

SATA_RBIAS_P

SATA_C_R2D_C_P

SATA_C_R2D_C_N

21

46

64

21

64

41

23

6 5

21

21

46

21

21

OUT

OUT

AVDDL0

AVDDL4

AVDD

THRML_PAD

VDDO_TTL0

AVDDL6

VDDO_TTL1

RX_N

TESTMODE

TSTPT

LINK*

LED_LINK10/100*

LED_LINK1000*

LED_ACT*

RSET

CTRL25

CTRL12

HSDACN

HSDACP

SWITCH_VAUX

SWITCH_VCC

VMAIN_AVLBL

VAUX_AVLBL

LOM_DISABLE*

XTALO

XTALI

SPI_DO

SPI_CLK

SPI_CS

SPI_DI

VPD_CLK

VPD_DATA

MDIP3

MDIN3

MDIN2

MDIP2

MDIN1

MDIP1

MDIN0

MDIP0

WAKE*

REFCLKN

TX_N

VDDO_TTL3

VDDO_TTL2

VDDO_TTL4

VDD0

VDD1

VDD3

VDD2

VDD6

VDD5

VDD4

VDD7

AVDDL1

AVDDL2

AVDDL5

VDD25

PERST*

REFCLKP

RX_P

AVDDL3

TX_P

PU_VDDO_TTL0

PU_VDDO_TTL1TEST

TESTTWSI

SPI

MAIN CLK

PCI EXPRESSANALOG

MEDIALED

E2

WC*

NC0NC1

VCC

VSS

SCL

SDA

IN

IN

IO

IO

IO

IO

IO

IO

IO

IO

IN

IN

IN

OUT

OUT

OUT

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

ASF IS UNAVAILABLE ON 8053

INTERNAL PULL-UP

NO PULL-UP NEEDED

NC

NC

NC

NC

NC

PLACE C4100-C4106 NEAR PINS AVDLL0-AVDLL6.

NC NC

NC

NC

1. KEEP ENET_XTALI AND ENET_XTALO

NC

NC

SCHEME MATCHES DOC MVL100258-01

PLACE C4127-C4134 NEAR PINS VDD0-VDD7 ON U4101

PLACE C4107 NEAR U4101 AVDD

OPTIONAL EXTERNAL LDO

TRACE LENGTH <12MIL

PLACE C4140 NEAR U4102 VCC

PLACE C4135-C4139 NEAR VDDO_TTL0-VDD_TTL4 ON U4101


NC

NC

PLACE RESISTORS CLOSE TO U4101


PLACE C4110 AND C4111 WITHIN12 MIL OF U4101 PIN 49 AND 50

PLACE C4113 AND C4112 WITHIN12 MIL OF U2100 E27 AND E28

2. DO NOT ROUTE UNDER CRYSTAL

NC

2

1

50VCERM

5%

402

C415115PF

5%

1/16W

MF-LF

R4122

14.7K

402

2

4.7K

R4123 2

1

MF-LF

5%

402

1/16W

C4101

2

1

402

16VX5R

10%0.1UF

24

6

56

5

U4101CRITICALOMIT

48

15

14

41

38

47

61

45

40 8 1

58

44

39

33

64

13 7 2

12

49

50

29

65

46

11

9

34

35

36

37

54

53

16

55

43

42

30

26

20

17

31

27

21

18

10

63

62

60

59

25

4

3

57

52

51

32

28

22

19

23

QFN

88E8053

10%

1

16V2

402X5R

C41400.1UF

CRITICALOMIT

M24C08

4

SO87

8

5

6

2

1

3

U4102

4.75K

21

R4102

MF-LF

402

1%

1/16W

16V

0.1UFC4107

2

1

X5R402

10%

2

C4110

402

16V0.1UFX5R

10%

1

10%

402

X5R16V

0.1UFC4111

1 2

21

C411210%0.1UF

40216V

X5R

21

C4113

402X5R16V10%

0.1UF

49.91%1/16WMF-LF

1

2402

R4106

2

1R4117

402

1%1/16WMF-LF

49.9

2

1R4118

402MF-LF1/16W

49.91%

2

1R4119

1%49.9

1/16WMF-LF402

2

1R4120

402

1/16W1%

MF-LF

49.9

2

1R4103

MF-LF

49.9

402

1%1/16W

2

1R4104

402MF-LF1/16W1%49.949.9

R4105

2402

1

MF-LF1/16W1%

2

1 C4116

50V10%

402CERM

0.001UF

2

1 C4118

402

10%0.001UF

50VCERM2

1 C41170.001UF

CERM

10%

402

50V

0.001UFC4115

2

1

402

10%

CERM50V

2

1 C4100

402CERM6.3V10%1UF


0402-LF

1 2

2

1R41314.7K5%1/16WMF-LF402

R4130

MF-LF

2

1

402

1/16W5%4.7K

CRITICAL

1

4 2

SM-3.2X2.5MM

3

Y410125.0000M

1

01/16W

4022MF-LF

5%

R4124NOSTUFF

MF-LF1/16W5%4.7KR41011

2402

NOSTUFF

1/16W

0

402

1 2

MF-LF

5%

R4107

2

1 C41050.001UF

CERM

10%50V

402

2 X5R

10%0.1UF

402

16V

C41041

10%

1

X5R402

216V

0.1UFC4103

0.1UF

2

1 C4102

10%

X5R16V

402

50V

0.001UF

2

1 C4106

402CERM

10%

2

1 C4128

402

16V

0.1UF

X5R

10%

2

1 C41330.001UF10%

402

50VCERM 2

1 C4134

50V

402CERM

0.001UF10%

2

1 C4131

402CERM

0.001UF10%50V

2

1 C4132

10%0.001UF

CERM402

50V2

1 C4127

16V10%

X5R402

0.1UF

2

1 C4126

10%

X5R402

16V

0.1UF

2

1 C4129

16V

402X5R

0.1UF10%

2

1 C4130

16V10%

402X5R

0.1UF0.001UF

2

1 C4139

CERM

10%

402

50V

C41380.001UF

2

1

50V10%

402CERM

C41370.1UF10%

2

1

16VX5R402

16V2

1 C4136

402

10%

X5R

0.1UF

2

1 C4135

402X5R

0.1UF10%16V

2

402CERM

C41501

50V5%15PF

SYNC_MASTER=ENET

G051-7173

108


ETHERNET CONTROLLER

41

ENET_CLK100M_PCIE_NENET_CLK100M_PCIE_P

PCIE_A_R2D_N

=PP3V3_S3_ENET

=PP1V2_S3_ENET

ENET_RSET

ENET_CTRL12ENET_CTRL25

=PP3V3_S3_ENET

PCIE_A_D2R_C_P

PCIE_WAKE_L

ENET_MDI_N<0>

ENET_MDI_P<1>ENET_MDI_N<1>

ENET_MDI_P<2>

ENET_MDI_P<3>

ENET_MDI_P<0>

ENET_VPD_CLK

=PP3V3_S3_ENET

ENET_MDI0

PCIE_A_R2D_C_N

=PP3V3_S3_ENET

ENET_VPD_DATA

ENET_XTALIENET_XTALO

ENET_PU_VDD_TTL0

ENET_PU_VDD_TTL1

=PP1V2_S3_ENET

ENET_MDI1 ENET_MDI2

PCIE_A_D2R_N

ENET_MDI3

PCIE_A_R2D_C_P

ENET_PU_VDD_TTL0

=PP2V5_S3_ENET

=PP3V3_S3_ENET

ENET_VPD_DATAENET_VPD_CLK

PCIE_A_D2R_C_N

PCIE_A_R2D_P

PCIE_A_D2R_P

ENET_PU_VDD_TTL1

ENET_MDI_N<2>

ENET_LOM_DIS_LSB_GPIO30

=PP3V3_S0_ENET

=PP3V3_S3_ENET

ENET_MDI_N<3>

ENET_RST_L

PP2V5_S3_ENET_AVDD

MIN_LINE_WIDTH=0.4MM


VOLTAGE=2.5V

64

64 64

43

64

64 64

64

64

33

33

36

36

6

6

36

23

37

37

37

37

37

37

36

36

22

36

36

36

36

36

22

22

36

64

36

36

36

22

36

37

22

64

36

37

26

37

NC2NC1

CHIP

SIDE

SIDE

LINE NC3NC4

NC2NC1

CHIP

SIDE

SIDE

LINE NC3

NC4

IO

IO

IO

IO

IO

IO

IO

IO

OUT

SYM_VER-2

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE


TABLE_ALT_HEAD

TABLE_5_ITEM

TABLE_5_ITEM



TABLE_ALT_ITEM

CROSS-OVERS ARE IN SCHEMATIC TO EASE ROUTING

ON EACH SIDE OF J4200

514S0119

PLACE ONE CAP NEAR EACH PIN 3 AND 6 OF TRANSFORMERS

PLACE ONE CAP AT EACH PIN 3 AND 6 OF TRANSFORMERS

PLACE C4211 AND C4212

13

125

4

98

7

6

3

2

16

15

14

11

10

1

T4201

1000BT-824-00275

CRITICAL

XFR-SM

XFR-SM

CRITICAL1000BT-824-00275

T42021

10

11

14

15

16

2

3

6

7

8 9

4

5 12

13

0.1UF10%16VX5R402

C42021

2

0.1UF10%16VX5R402

C42001

2

0.1UF

X5R16V10%

402

C42011

2

402

16VX5R

10%0.1UFC42031

2

751%1/16WMF-LF402

R42001

2402MF-LF

1%75

1/16W

R42011

2

1/16W

751%

402MF-LF

R42021

2402MF-LF1/16W1%75R42031

2

50V

402

10%

CERM

0.001UFC42041

2

0.001UF

CERM

10%

402

50V

C42051

2

402

50V10%

CERM

0.001UFC42061

2 CERM

10%

402

50V

0.001UFC42071

2

1808

0.001UF20%2KVCERM

C42101

2

0.001UF

CERM

10%50V

402

C42111

2

0.001UF10%50VCERM402

C42121

2

0402-LF

120-OHM-0.3A-EMI

21

L4250

J4200

10

819B-3608-M280RJ45

1

2

3

5

7

8

F-RT-SM

4

6

9

CRITICALOMIT

G051-7173

10842

SYNC_MASTER=ENET SYNC_DATE=11/14/2005

ETHERNET CONNECTOR

514S0144 1 FANCYCRITICALJ4200CONN,8P RJ-45 JACK,MIDPLANE,BLACK,LF

514S0143 NORMALCRITICAL1 J4200CONN,8P RJ-45 JACK,MIDPLANE,MG3,LF

E&E AND DELTA TRANSFORMER157S0011157S0037 T4201,T4202?

ENET_MDI_P<3>

ENET_CENTER_TAP<2>

ENET_MDI_TRAN_P<0>

ENET_MDI_TRAN_P<1>

PP2V5_S3_ENET_AVDD_F

ENET_MDI_N<1>

ENET_MDI_TRAN_N<3>

ENET_MDI_P<1>

ENET_MDI_P<2>

ENET_CENTER_TAP<3>

ENET_MDI_N<3>

ENET_BOB_SMITH_CAP


ENET_MDI_P<0>

ENET_MDI_N<0>

ENET_CENTER_TAP<1>

PP2V5_S3_ENET_AVDD

=GND_CHASSIS_RJ45

ENET_MDI_TRAN_N<0>

ENET_MDI_N<2>

ENET_MDI_TRAN_N<1>

ENET_MDI_TRAN_P<2>

ENET_MDI_TRAN_N<2>

ENET_MDI_TRAN_P<3>

ENET_CENTER_TAP<0>

36

36

36

36

36

36

36

36

6

36

5

5

5

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

OUT

IN

IN

OUT

OUT

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

MPCI_ACTN_323

TPB0_P

TPBIAS0

PCI_AD12

RESET*

TPBIAS2

PCI_RST*

PCI_INTA*

PCI_PME*

PCI_AD21

PCI_AD31

XO

XI

R1

R0

TPA0_N

TPA0_P

TPB0_N

TPBIAS1

TPA1_P

TPB1_P

TPA1_N

TPA2_P

TPA2_N

TPB2_P

TPB2_N

MODE_A

MODE_420

TEST0

TEST1

PTEST

SE

SM

VSS21

VSS22

VSS20

VSS18

VSS19

VSS16

VSS15

VSS17

VSS13

VSS14

VSS12

VSS11

VSS10

VSS9

VSS8

VSS7

VSS6

VSS5

VSS4

VSS3

VSS2

VSS1

VSS0

VSSA0

VSSA1

VSSA3

VSSA4

VSSA2

VDDA4

VDDA5

VDDA3

VDDA2

VDDA1

VDDA0

VDD0

VDD2

VDD1

VDD3

VDD4

VDD7

VDD9

PCI_VIOS

PCI_AD0

PCI_AD2

PCI_AD4

PCI_AD5

PCI_AD3

PCI_AD6

PCI_AD9

PCI_AD10

PCI_AD8

PCI_AD11

PCI_AD14

PCI_AD15

PCI_AD13

PCI_AD16

PCI_AD17

PCI_AD18

PCI_AD19

PCI_AD20

PCI_AD23

PCI_AD22

PCI_AD25

PCI_AD28

PCI_AD26

PCI_AD29

PCI_AD30

PCI_CBE2*

PCI_CBE1*

PCI_CBE0*

PCI_CBE3*

PCI_PAR

PCI_FRAME*

PCI_IRDY*

PCI_TRDY*

PCI_DEVSEL*

PCI_STOP*

PCI_IDSEL

PCI_REQ*

PCI_GNT*

PCI_PERR*

PCI_SERR*

PCI_CLK

CLKRUN*

VDD5

PCI_AD27

PCI_AD24

VDD6

PCI_AD1

TPB1_N

PC0

PC2

CONTENDER

CARDBUSN

PCI_AD7

PC1

IO

IO

IO

IO

IO

IO

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

6/21/2005 - CHANGED PCI_ID TO AD19 (PER ARCHITECTURAL DEFINITION)

THIS IS FROM ICH-7M

PLACE R4432 VERY CLOSE TO PIN B18 OF U2100

0.001A DURING SLEEP

PLACE ONE CAP PER TWO PINS STARTING WITH C4424 ON VDD0

7/26/2005 - CONNECTED PIN E10 TO GND

5/19/2005 - FIRST REVISION OF PAGE

6/21/2005 - CHANGED INT* TO INT_PIRQD_L (PER ARCHITECTURAL DEFINITION)

FW_A_TPA_P/N, FW_A_TPB_P/N, FW_A_TPBIAS - PORT 0 FIREWIRE DIFF PAIRS

PCI_DEVSEL_L, PCI_STOP_L, PCI_PAR, PCI_PERR_L, PCI_SERR_L

PCI_AD<0..31>,PCI_C_BE_L<0..3>,PCI_FRAME_L,PCI_IRDY_L,PCI_TRDY_L,

6/20/2005 - BGA VERSION OF FW323-06 ADDED

6/21/2005 - CHANGED REQ/GNT TO REQ3/GNT3 (PER ARCHITECTURAL DEFINITION)6/22/2005 - ADDED 510K PULL-DOWN ON RST* AND REMOVED CONNECTION TO PLT_RST_L

6/22/2005 - REMOVED CONSTRAINT SETS AS THEY WILL BE MANAGED ON BOARD SIDE

INT_PIRQD_L - INTERRUPT TO SB

PCI_PME_FW_L - DEDICATED PME FOR FIREWIRE (SB GPIO1)

FW_PC0 - FIREWIRE POWER CLASS IDENTIFIER

PCI_RST_L - PCI RESET FROM SB

PCI_REQ3_L - PCI REQUEST TO SB

PM_CLKRUN_L - CLOCK-RUN PCI PROTOCOL

PCI_CLK_FW - NEED TO REFERENCE TO ALIAS PAGE

INPUT/OUTPUT

FW_C_TPA_P/N, FW_C_TPB_P/N, FW_C_TPBIAS - PORT 2 FIREWIRE DIFF PAIRS

DUAL PORT DEVICES ARE POWER CLASS 4 (’100’)

6/22/2005 - REMOVED C4421 - REDUNDANT

OUTPUT

PAGE HISTORY

6/22/2005 - CHANGED CLK,PME,DIFF PAIR NAMES TO BE RE-USE COMPLIANT

PAGE NOTES

INPUT

PCI_GNT3_L - PCI GRANT FROM SB

SPEC RECOMMENDS 2.49K

LOW = NOT BUS MANAGER

MANUFACTURING TEST PINS

NEED TO CHECK CRYSTAL LOAD CAPACITANCE

LOW = PCI OPERATION

SINGLE PORT DEVICES ARE POWER CLASS 0 (’000’)

MODE FOR EXTERNAL LINK

FW_B_TPA_P/N, FW_B_TPB_P/N, FW_B_TPBIAS - PORT 1 FIREWIRE DIFF PAIRS

6/22/2005 - BRING OUT PC0 CONNECTION TO BE CONNECTED ON PORT PAGE

197S0030 3.2MMX2.5MM

CONNECT TO VDD FOR 3.3V OPERATION

=PP3V3_S0_FW - 3.3V POWER FOR FIREWIRE (MOBILE: OFF DURING SLEEP)

=PP3V3_S0_PCI - 3.3V POWER FOR PCI FIREWIRE (MOBILE: OFF DURING SLEEP)

MOBILE TURNS OFF CONTROLLER POWER DURING SLEEP

PLACE ONE CAP PER TWO PINS STARTING WITH C4416 ON VDDA0

10UF

X5R603

20%6.3V

C44161

2

2.1K

2

1R4452

1/16W1%

402MF-LF

0.1UF

CERM402

20%10V

C44281

2

0.1UF

CERM402

20%10V

C44261

2

0.1UF

CERM402

20%10V

C44221

210VCERM402

0.1UF20%

C44181

2

402

16V

0.1UF10%

X5R

C44291

2

0.1UF

X5R402

10%16V

C44251

2

0.1UF

X5R402

10%16V

C44171

2

0.1UF

X5R402

10%16V

C44201

2

1/16W5%

390

MF-LF402

R44001 2

X5R603

20%6.3V

10UFC44241

2

600-OHM-300MA

0402

L4400

1 2

BGA

CRITICAL

FW32306

OMIT

U4400

B1

D1

G12

M5

B6

E10

E12

F13

F12

F10

G10

L11

M12

M11

N12

M10

N11

M4

N5

N4

M3

H10

M2

N3

K4

M1

K2

J4

K1

J2

J1

H2

H12

H4

H1

J13

J12

K13

K10

L12

M13

K12

M9

L3

L1

G2

N8

N6

E1

L2

D2

M6

N10

M8

F2

E2

F1

N9

M7

N7

G13

A4

B7

A6

B4

A3

B3

C2

C1

B9

A9

B11

A11

C12

C11

A10

B10

A12

B12

D12

D13

B8

D8

C13

G4

N1

N2

K5

K6

K7

L13

H13

A2

D10

A13

B13

A7

A8

D6

A1

B2

G1

G6

G7

G8

H6

H7

H8

J5

J9

J10

C3

K8

K9

N13

D4

E4

E5

F4

F6

F7

F8

E13

E9

D9

D7

D5

A5

B5

510K5%1/16WMF-LF402

R44201

2

R4432

402

21100

1%1/16WMF-LF

22

MF-LF402

5%1/16W

R44311

2

SM-3.2X2.5MM

42

1 3

Y440324.576MHZ

CRITICAL

402

15pF50V5%

CERM

C4411 1

2402

15pF50V5%

CERM

C44121

2

0.1UF

CERM402

20%10V

C44301

2

0.1UF

CERM402

20%10V

C44321

2


051-7173 G

10844

FIREWIRE CONTROLLERSYNC_MASTER=ENET

PCI_TRDY_LPCI_IRDY_LPCI_FRAME_L

PCI_C_BE_L<1>

PCI_C_BE_L<3>

PCI_PAR

PCI_REQ3_L

PCI_SERR_L

PCI_CLK_FW

PCI_PERR_LPCI_GNT3_L

PCI_AD<31>

PCI_C_BE_L<2>

PP3V3_S3_FW_AVDDVOLTAGE=3.3VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.2MM

FW_XI

FW_PWRON_RST_L

FW_R0

FW_A_TPA_P

FW_B_TPA_N

FW_C_TPB_N

FW_A_TPA_N

PCI_AD<18>

PCI_AD<0>

=PP3V3_S3_PCI

INT_PIRQD_L

PCI_AD<29>

PCI_AD<14>

PCI_AD<17>

PCI_AD<19>PCI_AD<20>


PCI_AD<21>

PCI_AD<13>

FW_PC0

PCI_AD<12>

PCI_AD<4>

PCI_AD<2>PCI_AD<1>

PCI_AD<6>PCI_AD<7>

PCI_AD<11>

PCI_AD<15>

PCI_AD<23>

PCI_AD<30>

PCI_C_BE_L<0>

PCI_DEVSEL_L

FW_XO_R

PCI_STOP_L

PCI_AD<3>FW_XO

FW_A_TPBIAS

FW_A_TPB_PFW_A_TPB_N

FW_B_TPB_NFW_B_TPB_P

FW_B_TPA_PFW_B_TPBIAS

FW_C_TPA_P

FW_C_TPB_PFW_C_TPA_N

FW_C_TPBIAS

PCI_AD<22>

PCI_AD<16>

PCI_AD<10>PCI_AD<9>PCI_AD<8>

PCI_AD<26>


PM_CLKRUN_L

PCI_PME_FW_L

FW_PCI_IDSEL

PCI_RST_L FW_PCI_RST_L

PCI_AD<5>

FW_R1

=PP3V3_S3_FW

26

26

26

26

26

26

26

26

26

22

22

22

22

22

22

22

22

33

22

22

22

22

39

6

6

39

22

22

64

22

22

22

22

22

22

22

22

22

22

39

22

22

22

22

22

22

22

22

22

22

22

22

22

22

39

39

39

6

6

6

6

6

6

6

6

22

22

22

22

22

22

22

22

22

22

22

64

IO

IO

IO

IO

IO

SYM_VER-2

SYM_VER-2

OUT

TPO#

TPI

TPO

TPI#

VGND

VP

G

D

S



TABLE_5_ITEM

TABLE_5_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PORT 0

1394A

Plexi: 514-0124

(PPFW_PORT0_VP)

(GND_FW_PORT0_VGND)

CAPS MAY NOT BE NECESSARY.

(TPA-)

(TPB-)

IT IS 2.2V INSTEAD OF 2.7V BECAUSE THE SNAPBACK ESD DIODES HAVE A 0.5V DROP

CURRENT THROUGH THE BIAS RESISTOR SHOULD BE 5MA FOR A VOLTAGE DROP TO 2.2V

ENABLES PORT POWER WHEN MACHINE IS RUNNING

ENABLES PORT POWER WHEN MACHINE IS RUNNING

INPUT/OUTPUT:

FW_TPA0_P/N,FW_TPB0_P/N,FW_TPBIAS0 - FIREWIRE DIFF PAIRS

FW_PC0 - POWER CLASS IDENTIFIER (SINGLE PORT - TIE LOW)

Page Notes

=PPBUS_FW - PORT POWER

=PP3V3_S5_FW - DIGITAL POWER

OUTPUT:

7/26/05 - CHANGED FL4590 TO 1.1A VERSION7/26/05 - REMOVED R4520 - IT HASN’T BEEN STUFFED FOR MANY PRODUCTS7/26/05 - SWITCHED TO 514-0124 FOR PRE-PROTO CONNECTOR7/26/05 - CHANGED CONNECTOR PORT NAMING TO PORT07/26/05 - UPDATED LATE-VG POWER RAIL CIRCUIT FROM M1

5/19/05 - INITIAL REVISION

FireWire Design Guide (FWDG 0.6, 5/14/03)

1394b implementation based on Apple

INPUT:

PAGE HISTORY

6/22/05 - CHANGED DIFF PAIR NAMES TO MATCH REUSE6/22/05 - REMOVED CONSTRAINTS BECAUSE USING ALLEGRO CONST MANAGER 6/22/05 - CONNECTED FW_PC0 FOR SINGLE PORT

7/26/05 - REMOVED ETHERNET LOW-POWER MODE CIRCUIT 7/26/05 - UPDATED SIGNAL NAMES FOR FW PORT POWER ENABLE

NO STUFF FOR NOW THOUGH

1 FOR DUAL PORT

PORT POWER CLASS0 FOR SINGLE PORT

LATE-VG PROTECTION POWER

IF =FWPWR_PWRON IS NC:

IF =FWPWR_PWRON LOW WHEN OFF:

OR ON AC

OR ON AC AND NOT SHUTDOWN

[LATE VG NOTES]

Cable Power

=FWPWR_PWRON - ADDITIONAL POWER CONTROL

=GND_CHASSIS_FW_PORT0 - CHASSIS GROUND

(TPB+)

(TPA+)

Enables port power whenever

or system at run state with battery only

Enclosure: 514-0289

machine AC Adapter is plugged

"Snapback" & "Late VG" Protection

2

1 C4501

25V5%

402CERM

220PF

2

1 C4500

CERM-X5R

0.33UF10%6.3V

402

10%0.01uF

CERM16V

402

C4525 1

2

FERR-250-OHML4510

21

SM

2

1 C45100.001uF

CERM50V10%

402

4

32

1

FL4520

120-OHM2012

4

32

1

FL4521

120-OHM2012

6

2

1

D4520

SOT-363BAV99DW-X-F

3

5

4

D4521BAV99DW-X-F

SOT-363

3

5

4

D4520

SOT-363BAV99DW-X-F

6

1

D4521BAV99DW-X-F

SOT-363

2

2

1 C4552NO STUFF

50VCERM

0.001uF10%

402

21

L4550

SM-1

400-OHM-EMI

2

1 C4551

CERM402

20%10V

0.1uF

NO STUFF

2

1R450356.21%1/16WMF-LF402

21

FL45901.1A-24V

MINISMDC

2

1R4502

1/16W1%

402

56.2

MF-LF

2

1R4591

1/16W

330K

402MF-LF

5%

2

1 C4590

16V

0.01uF

CERM

10%

4022

1R4590470K

MF-LF402

5%1/16W

61

D4591BAS16TW-X-F

SOT-363

5 2

D4591BAS16TW-X-F

SOT-363

2

1R4501

MF-LF1/16W1%56.2

402

2

1R4595

1/16W5%

402MF-LF

470K

43

D4591BAS16TW-X-F

SOT-363

2

1R4593100K

5%

402

1/16WMF-LF

21

R4594

402

10K

MF-LF

5%1/16W

2

1R4500

1/16WMF-LF

1%

402

56.2

OMITCRITICAL

1

J45001394A

4

6

5

3

2

7 8

F-RT-TH1

2

1

3

Q45912N7002SOT23-LF

2

1C4520

16V

402

0.01UF10%

CERM 2

1C452110%16V

402

0.01UF

CERM

1

402CERM16V10%

2

C45220.01UF

2

1

CERM402

16V10%

C45230.01UF

4

3

6

5

2

1

Q4590FDC638P

SM-LF

2

1 C452410%50V

603-1X7R

0.01UF

2

1R4504

402

1%4.99K

1/16WMF-LF

SMB

B340LBXF

D45901 2

SOT23

13

D4550MMBZ5227B

402

21

R4550330

5%1/16WMF-LF

FANCYCRITICAL1 J4500CONN,6P 1394A RCPT,MIDPLANE,BLACK,LF514-0316

NORMALCRITICALJ45001514-0359 CONN,6P 1394A RCPT,MIDPLANE,MG3,LF


FIREWIRE PORTSYNC_MASTER=ENET

10845

051-7173 G

FW_PORT0_TPB_N

FW_PORT0_TPB_P

FW_PORT0_TPA_P

PP3V3_S5_FWLATEVG

FW_PORT0_TPA_N

VOLTAGE=19VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM

PPFW_SWITCH

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MMVOLTAGE=16.5V

PPFW_PORT0_VP_F

FWPWR_EN

FWPWR_ACIN

PP3V3_S5_FWLATEVG_F


VOLTAGE=3.3VMIN_LINE_WIDTH=0.35MM

=PP3V3_S5_FWLATEVG

FW_A_TPB_P

FW_A_TPA_N

FW_A_TPA_P

SMC_PS_ON

MIN_NECK_WIDTH=0.05MMMIN_LINE_WIDTH=0.05MMFWPWR_EN_L_DIV

PPBUS_S5_FWPWRSW_F



FW_A_TPB_N

FW_A_TPBIAS

FW_PORT0_TPB

FW_PC0

FWPWR_RUN

=PPBUS_S5_FWPWRSW

FWPWR_EN_L


=FWPWR_PWRON

=PP3V3_S0_FW



PP3V3_S5_FWLATEVG

FW_PORT0_TPB_P_FL

FW_PORT0_TPA_P_FL

FW_PORT0_TPA_N_FL

FW_PORT0_TPB_N_FL

=GND_CHASSIS_FW_UPPER

=GND_CHASSIS_FW_DOWN


PPFW_PORT0_VP

65 46 45

38

39

5

64

38

38

38

5

38

38

64

60

6

64

39

6

6

OUT

SYM_VER-1

IN

IN

IO

IO



TABLE_5_ITEM

TABLE_5_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PLACE L4901 NEAR J4900

PLACE C4900 NEAR J4900

GEYSER AND DIMM0 REMOTE TEMP SENSORS

RESERVE FOR POSSUM BUILD DEBUG USE516S0251

1K

5%1/16WMF-LF402

R49101 2

0.1uF20%

1

2

C4910

402CERM10V

OMIT

J4900F-ST-SM

53307-1071

3

2

8

10

4

9

7

65

1

CRITICAL

SM

4

32

1

L490190-OHM

CRITICAL

1 C490020%

210V

402CERM

0.1uF

RCLAMP0502B

D4900SC-75

3

2

1

CRITICAL

600-OHM-300MA

0402

21

L4900

600-OHM-300MAL4902

0402

21

ACES 88646-1071-NS FANCYCRITICAL1516S0482 J4900

ACES 88646-1071-NS CRITICALJ4900 NORMAL516S0482 1

CONNECTOR MISCSYNC_DATE=11/16/2005SYNC_MASTER=ENET

G051-7173

49 108

VOLTAGE=0VMIN_NECK_WIDTH=0.3MMMIN_LINE_WIDTH=0.6MM

GEYSER_GND_F

=SMB_GEYSER_DATA

THRM_DIMM0_DXP1

PP5V_S3_GEYSER_F


VOLTAGE=5V

CONN_GEYSER_ONOFF_FLTR_L

=SMB_GEYSER_CLK

SMC_LID

CONN_GEYSER_USB_P

=PP5V_S3_GEYSER

=USB2_GEYSER_N

=USB2_GEYSER_P

SMC_ONOFF_LMAKE_BASE=TRUE

CONN_GEYSER_ONOFF_L

CONN_GEYSER_USB_N

THRM_DIMM0_DXN

65

48

46

46

45

45

27

49

27

5

64

6

6

49

VDD

D-

VSS

P1_0

P1_4P1_3P1_2P1_1

P0_2P0_3P0_4

P0_1

P0_5 P1_5

P3_0

P1_7P1_6

P3_1

P3_5P3_4P3_3P3_2

P0_7

P2_0

P2_5P2_4P2_3P2_2P2_1

P0_6

P2_6 P3_6

P5_1P5_2

P5_0

P3_7

P5_7P5_6P5_5P5_4P5_3

P4_6P4_5P4_4P4_3

P2_7

P4_0P4_1P4_2

P4_7

P7_0P7_7 PAD

THRML

D+

P0_0

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

C5102 CLOSE TO U5100 PIN 2

PLACE C5100 AND C5101NEAR U5100 PIN 22 AND 49

4022

1

10%

CERM50V

0.001UFC5102

0.1UF10VCERM

20%

C51001

2402

C51010.1UF20%10VCERM

1

2402

19 50

U5100CY8C24794

OMIT22 49

26

18

17

27

15

28

16

33

10

9

34

8

35

36

7

14

29

30

31

13

11

32

12

54

45

46

47

53

52

51

48

41

1

42

2

43

56

44

55

37

6

38

39

5

40

4

3

23

24

57

25

21

20MLF

402

21

1/16W

100R5100

MF-LF

5%

SYNC_MASTER=ENET

051-7173 G

51 108


IR CONTROLLER

=USB2_IR_N

IR_RX_OUT

=PP5V_S3_IR

=USB2_IR_P

IR_RX_OUT_F

6

35

64

6

SYM_VER-1

SYM_VER-1

GND

D+

D-

VBUS

GND

D+

D-

VBUS

EN2*

OC2*

OUT2

TPADGND

OUT1IN

OC1*

EN1*

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_5_ITEM

TABLE_5_ITEM



LAYOUT NOTE:C5206,C5207 ARE EMC BY-PASS CAPS FOR J5201


USB 2.0 CONNECTORS

DESCRIPTION:USB EXTERNAL CONNECTORS

ROUTE USB DATA LINES AS DIFFERENTIAL PAIRS


ROUTE USB DATA LINES AS DIFFERENTIAL PAIRS

LAYOUT NOTE:C5202,C5203 ARE EMC BY-PASS CAPS FOR J5200

0.01UF10%

402

16VCERM

C52061

2

0.01UF16V10%

C52071

2 CERM402

CRITICAL

90-OHML5201

1

2 3

4

SM

CERM16V

0.01UF10%

402

C52031

2CERM

0.01UF

402

10%16V

C52021

2

90-OHM

1

2 3

4

SM

L5200CRITICAL

CERM10V20%

402

0.1UF1

2

C5208NOSTUFF

NOSTUFF

0.1UF10VCERM402

20%

C52091

2

CRITICAL

J5200USB

3

4

2

6

1

5F-RT-TH-M42

OMIT

CRITICAL

J5201USB

3

4

2

6

1

5F-RT-TH-M42

OMIT

20%

1

2

100UF6.3VPOLYB2

C5210CRITICAL

100UF20%6.3VPOLYB2

C52111

2

CRITICAL

CRITICAL

TPS2042B

MSOP

U5200

3

4

1

2

8

5

7

6

9

603

10uF6.3VX5R

20%

C52131

210V

402

0.1UF

CERM

20%

C52121

2

0402-LF


1 2

0402-LF

1


2

0402-LF


1 2

0402-LF

L5205

1 2

FERR-120-OHM-1.5A

R5250

402MF-LF1/16W

1K

5%

EXTAUSB_OC_F_L1 2

402MF-LF1/16W5%

1KEXTBUSB_OC_F_L

R52511 2

10%2

1 C5250

402CERM-X5R6.3V

0.47UF

10%2

1 C52510.47UF6.3VCERM-X5R402

D5200

2

1

3

SC-75

RCLAMP0502B

CRITICAL

2

1

3

SC-75

RCLAMP0502B

CRITICAL

D5201

10852

051-7173 G

CONN,4P USB RCPT,MIDPLANE,BLACK,LF J5200,J5201 CRITICAL2 FANCY514-0315

J5200,J52012 CONN,4P USB RCPT,MIDPLANE,MG3,LF CRITICAL NORMAL514-0288

=GND_CHASSIS_USB

MIN_NECK_WIDTH=0.3MMVOLTAGE=0V


USB2_GND_EXTA_F

USB2_EXTA_F_NPP5V_S3_USB2_EXTA_F

VOLTAGE=5VMIN_NECK_WIDTH=0.3MMMIN_LINE_WIDTH=0.6MMPP5V_S3_USB2_EXTA_F

USB2_EXTA_F_P

PP5V_S3_USB2_EXTB

MIN_NECK_WIDTH=0.3MMMIN_LINE_WIDTH=0.6MMVOLTAGE=5V

MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.3MMVOLTAGE=0V

USB2_GND_EXTB_FUSB2_EXTB_F_P

=USB2_EXTA_P

=EXTBUSB_OC_L

=PP5V_S5_USB

PM_SLP_S4_LS5V

=EXTAUSB_OC_L

=GND_CHASSIS_USB

=USB2_EXTB_P

=USB2_EXTB_N

=GND_CHASSIS_USB


VOLTAGE=5VMIN_NECK_WIDTH=0.3MM

PP5V_S3_USB2_EXTB_F

PP5V_S3_USB2_EXTB_F

=USB2_EXTA_N

=GND_CHASSIS_USB

USB2_EXTB_F_N


PP5V_S3_USB2_EXTAVOLTAGE=5VMIN_LINE_WIDTH=0.6MM

42

42

42

42

6

42

42

6

6

64

63

6

6

6

6

6

42

42

6

6

IN

IN

OUT

OUT

IO

IO

IN

IN

IN

OUT

IO

IO

IN

KEY

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

Plexi: 516S0363* Enclosure: 516S0406

CONNECT TO M35 MODULE

AIRPORT CONN

SB HAS INTERNAL 15K PULL-DOWNS

PLACE CAPS < 250 MILS FROM (U2100) SB

0.1UF

C53001 2

0.1UF

C5301

1 2

CERM

20%0.1UF

10V

402

C53041

210VCERM402

20%0.1UFC53051

2

0.1UF20%10VCERM402

C53061

2

20%0.1UF

10VCERM402

C53071

2

402CERM10V

0.1UF20%

C53081

2

PCIE_WAKE_L

CK410_SRC_CLKREQ6_L

5%1/16W

MF-LF402

0R53011 2

0

402MF-LF

1/16W5%R5302

12

402MF-LF1/16W5%

0R53031 2

10UF20%6.3VX5R603

C53091

2

0.1UF20%10VCERM402

C53101

2

F-ST-SM

CRITICAL

AS0B22-S45N-7FJ5300

53

54

1

10

11 12

13 14

15 16

17 18

19

2

20

21 22

23 24

25 26

27 28

29

3

30

31 32

33 34

35 36

37 38

39

4

40

41 42

43 44

45 46

47 48

49

5

50

51 52

6

7 8

9

051-7173

10853

G

PCIE_B_R2D_C_P

PCIE_B_R2D_C_N =SMB_AIRPORT_DATA

=SMB_AIRPORT_CLK

=PP3V3_S3_AIRPORT_AUXAIRPORT_CLK100M_PCIE_N


=USB2_AIRPORT_N

SMB_AIRPORT_CONN_DATA

SMB_AIRPORT_CONN_CLK

PP3V3_S3_AIRPORT_AUX_CONN

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.2MM

AIRPORT_RST_L

=USB2_AIRPORT_P

PCIE_B_D2R_N

PCIE_B_D2R_P

PCIE_B_R2D_P

PCIE_B_R2D_N

=PP1V5_S0_AIRPORT

=PP3V3_S0_AIRPORT

36 23

32

22

22 27

27

64

33

33

6

26

6

22

22

64

64

SYM_VER-1

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE



TO M13D SLOT

PLACE C5498 C5499 NEAR L5410


SB HAS INTERNAL 15K PULL-DOWNS

518S0486

NOSTUFF

20%

402

2

1

CERM10V

C54980.1UF

SM

4

32

1

L5400CRITICAL

90-OHM

NOSTUFF

20%

26.3V

1 C549910UF

603X5R

88609-04001

CRITICALJ5400F-ST-SM5

6

1

2

3

4

0402-LF

120-OHM-0.3A-EMI1 2

L5410

0402-LF

120-OHM-0.3A-EMIL5411

1 2

10854

051-7173 G

BLUETOOTH INTERFACE

=PP3V3_S3_BT

=USB2_BT_N=USB2_BT_P

USB2_BT_F_N

GND_BT_F

VOLTAGE=0V


USB2_BT_F_P

PP3V3_S3_BT_FMIN_LINE_WIDTH=0.2MMMIN_NECK_WIDTH=0.2MMVOLTAGE=3.3V

64

6

6

IN

IN

IN

P16

P51

P50

P42/SDA1

P97/IRQ15*/SDA0

P95/IRQ14*

P94/IRQ13*

P93/IRQ12*

P92/IRQ0*

P91/IRQ1*

P86/IRQ5*/SCK1/SCL1

P83/LPCPD*

P82/CLKRUN*

P80/PME*

P35/LRESET*

P34/LFRAME*

P10

P12

P13

P14

P15

P17

P31/LAD1

P30/LAD0

P32/LAD2

P33/LAD3

P36/LCLK

P37/SERIRQ

P44/TMO1

P77/AN7

P76/AN6

P81/GA20

P96/EXCL

P11

P47/PWX1/PWM1

P45

P46/PWX0/PWM0

P40/TMIO

P43/TMI1/EXSCK1

P27

P26

P25

P24

P23

P22

P21

P20

P41/TMO0

P52/SCL0

P60/KIN0*

P61/KIN1*

P62/KIN2*

P63/KIN3*

P64/KIN4*

P65/KIN5*

P66/IRQ6*/KIN6*

P67/IRQ7*/KIN7*

P70/AN0

P71/AN1

P72/AN2

P73/AN3

P74/AN4

P75/AN5

P84/IRQ3*/TXD1

P85/IRQ4*/RXD1

P90/IRQ2*

(1 OF 4)

PA2/KIN10*/PS2AC

PA3/KIN11*/PS2AD

PA5/KIN13*/PS2BD

PA4/KIN12*/PS2BC

PB2

PB3

PB4

PE0

PG6/EXIRQ14*/EXSDAB

PG5/EXIRQ13*/EXSCLA

PH1/EXIRQ7*

PH0/EXIRQ6*

PG7/EXIRQ15*/EXSCLB

PG4/EXIRQ12*/EXSDAA

PH3/EXEXCL

PH2/FWE

PB5

PF4/PWM4

PF2/IRQ10*/TMOY

PG2/EXIRQ10*/SDA2

PG0/EXIRQ8*/TMIX

PF7/PWM7

PC3/TIOCD0/TCLKB/WUE11*

PH5

PB7

PB6

PH4

PF5/PWM5

PF6/PWM6

PG1/EXIRQ9*/TMIY

PA6/KIN14*/PS2CC

PA7/KIN15*/PS2CD

PD0/AN8

PD1/AN9

PD2/AN10

PD3/AN11

PD4/AN12

PD5/AN13

PD6/AN14

PD7/AN15

PF0/IRQ8*/PWM2

PF1/IRQ9*/PWM3

PB0/LSMI*

PB1/LSCI

PC0/TIOCA0/WUE8*

PC1/TIOCB0/WUE9*

PC2/TIOCC0/TCLKA/WUE10*

PC4/TIOCA1/WUE12*

PC5/TIOCB1/TCLKC/WUE13*

PC6/TIOCA2/WUE14*

PC7/TIOCB2/TCLKD/WUE15*

PG3/EXIRQ11*/SCL2

PF3/IRQ11*/TMOX

PA1/KIN9*/PA2DD

PA0/KIN8*/PA2DC

PE1*/ETCK

PE2*/ETDI

PE3*/ETDO

PE4*/ETMS

(2 OF 4)

VCL

AVREF

VCC

VCC

VCC

AVCC

XTAL

EXTAL

AVCC

VCC

MD1

MD2

NMI

RES*

ETRST*

AVREF

AVSSVSS

(3 OF 4)

NC22

NC21

NC20

NC19

NC18

NC17

NC16

NC15

NC14

NC13

NC12

NC9

NC6

NC11

NC10

NC8

NC7

NC5

NC4

NC3

NC2

NC1

NC0

(4 OF 4)

OUT

OUT

OUT

OUT

IN

IN

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

IN

IO

IO

OUT

IN

IN

IO

IO

IO

IN

OUT

OUT

IN

OUT

IN

IN

IO

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IO

OUT

OUT

IN

OUT

IN

IN

IN

IN

IN

IN

IO

IO

IN

OUT

IO

IO

IO

IO

IO

IO

IN

IN

IN

OUT

IN

OUT

IO

IO

IO

IO

IN

IN

IN

OUT

IO

IN

IN

IN

IN

IO

IN

IN

OUT

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

(VCL IS INTERNAL RAIL)

LAYOUT NOTE:

NC

(BAT B SMBUS CLK)

(BAT B SMBUS DATA)

(TPM physical presence)

(Debug feature,16550 Transmit)

(Debug feature,16550 Receive)

(Should PD)

(To debug card for mode select)(Should PD)

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

PLACE C5807 NEAR PIN F1

(To debug card for mode select)

(Should PU)

PLACE R5899, C5820 NEAR SMC PIN N14, N15

LAYOUT NOTE:

(ANALOG_ID)

(Optical Disk Insert detect)

(Enable AC adapter PWR)

(CASE OPEN/CLOSE DETECT)

(LID OPEN/CLOSE SW)

(Serial Port Transmit)

(Serial Port Receive)

(AC I/P detect)

CRITICAL

CERM-X5R805

2

1

6.3V20%22UFC5802

U5800SMC_H8S2116

OMIT

D12

G4

G1

D5

G2

H2

J4

J3

J1

J2

B6

D6

B7

C7

C8

D8

B12

A15

B14

B15

C14

C15

C9

D9

A9

B9

A8

D7

B1

P15

N13

A7

H1

C13

C1

C2

D3

A5

C3

F14

E13

E15

E14

E12

D15

D14

D13

B5

F2

L13

L14

L15

K12

K14

J12

J13

N12

R13

R14

P14

R15

C6

A6

K4

BGA

K13

P13

U5800SMC_H8S2116

OMIT

R2

N3

N2

R1

D10

A11

B11

M3

P7

M8

F3

E1

R7

R8

C4

K2

C11

M6

R6

N9

P9

N5

G12

B3

D11

A12

D4

R5

P5

R9

M4

N1

M11

P11

R11

N11

P10

R10

N10

M10

M7

P6

B10

A10

G14

G15

G13

H14

H15

H13

H12

P8

N6

P3

R3

M2

M1

L4

L2

BGA

U5800SMC_H8S2116

OMIT

F1

M14

A1

J15

P2

N15

A2

B2

N14

P1

E2

K1

F4

E3

L1

P12

R12

D1

P4

R4

F12

F13

B13

A13

A4

B4

D2

M15

BGA

U5800SMC_H8S2116

OMIT

N8

M9

H4

E4

B8

A3

C5

C10

C12

A14

F15

L12

N7

J14

K15

M13

M12

M5

N4

L3

K3

H3

G3

BGA

6.3V

402CERM-X5R

0.47UFC58071

210%

2

1 C58030.1UF

CERM402

20%10V

2

1R580910K

MF-LF402

5%1/16W

2

1 C58200.1UF

CERM402

20%10V

2

1R5899

MF-LF1/16W5%4.7

402

2

1 C58040.1UF

CERM402

20%10V

2

1R589810K

MF-LF402

5%1/16W

21

XW5800SM

2

1 C58050.1UF

402

20%10VCERM 2

1 C58060.1UF

CERM402

20%10V

2

1R580110K

MF-LF402

5%1/16W

2

1R580210K

MF-LF402

5%1/16W

2

1R5803NOSTUFF

0

MF-LF402

5%1/16W

10858

G051-7173


SMCSYNC_MASTER=SMC

SMC_TPM_PP

SMC_BKLIGHT_ENABLE

LPC_FRAME_L

SMC_RX_LSMB_0_CLK

PCI_CLK_SMC

SMC_BATT_ISET

SMB_BSA_CLK

PM_BATLOW_LSYS_ONEWIRE

SMC_DISP_BKLT_B

SMC_LIDSMC_CPU_RESET_3_3_L

PM_LAN_ENABLE

ALS_GAINSMC_FWESMC_THRMTRIP

SMB_MLB_CLKSMB_MLB_DATA

SMB_RMT_DATA

SMC_RSTGATE_L

RSMRST_PWRGD

PM_RSMRST_L

ALL_SYS_PWRGD

PM_PWRBTN_LIMVP_VR_ON

SMC_P20SMC_P21

LPC_AD<0>LPC_AD<1>LPC_AD<2>LPC_AD<3>

SMC_LRESET_L

SMC_FAN_1_CTLSMC_FAN_0_CTL

SMC_FAN_2_CTLSMC_FAN_3_CTLSMC_FAN_0_TACHSMC_FAN_1_TACH

SMC_FAN_3_TACHSMC_FAN_2_TACH

SMC_TDO

SMS_ONOFF_LSMS_INT_L

SMC_PROCHOT

SMB_RMT_CLK

SMC_DISP_BKLT_A

SMC_TMS

SMC_TDISMC_TCKSMC_CASE_OPEN

SMB_0_DATASMC_SUS_CLKPM_SLP_S5_LPM_SLP_S4_LPM_SLP_S3_LSMC_BS_ALRT_LSMC_BC_ACOKSMC_ONOFF_L

SMB_BSB_CLKSC_RX_LSC_TX_LPM_SUS_STAT_L

SMC_BATT_ISENSESMC_PBUS_VSENSE

SMC_GPU_ISENSESMC_CPU_VSENSE

SMC_CPU_INIT_3_3_LSMC_PROCHOT_3_3_LSPI_SO

SPI_SCLKSPI_ARB

SMC_PM_G2_ENSMC_PS_ON

PM_SYSRST_L

PM_THRM_LPM_EXTTS_L<0>

SMC_EXCARD_CPSMC_EXCARD_PWR_EN

SMC_PB7SMC_EXCARD_PWR_OC_L

SMS_X_AXISSMS_Y_AXISSMS_Z_AXISSMC_PD3SMC_NB_ISENSESMC_MEM_ISENSEALS_LEFT

SMC_EXTSMI_LSMC_RUNTIME_SCI_L

BOOT_LPC_SPI_L

SMC_ODD_DETECT

SMC_DISPLAY_ENABLE

SMC_SB_NMI

SMC_AVCC_RC

=PP3V42_G3H_SMC

SMC_EXTAL

=PP3V42_G3H_SMC

PP3V3_AVREF_SMC

GND_SMC_AVSS

SMC_NMI

GND_SMC_AVSS

SMC_TRST_L

SMB_BSA_DATASMC_PG1SPI_CE_L

SMC_SYS_VSETSMC_SYS_ISETSMC_BATT_VSET

SMC_TPM_RESET_L

SMC_RCIN_L

SMC_TX_L

SMC_SYS_KBDLEDSMC_P46

SMC_P44

SMB_BSB_DATASMC_SYS_LED_16B

INT_SERIRQ

SMC_P27SMC_P26SMC_BATT_CHG_ENSMC_BATT_TRICKLE_EN_LSMC_P23SMC_P22

PM_CLKRUN_L

SMC_WAKE_SCI_L

SMC_FWIRE_ISENSE

SMC_TPM_GPIO

SMC_DCIN_ISENSESMC_GPU_VSENSE

ISENSE_CAL_EN

ALS_RIGHT

SMC_RST_L

SMC_XTAL

SMC_VCL

=PP3V42_G3H_SMC

SMC_CPU_ISENSE

SPI_SI

KBC_MDESMC_MD1

66

66

53

62

62

53

53

65

53

53

53

53

63

66

47

65

64 64

61

61

53

47

64

47

47

65

46

63

47

47

47

47

47

47

47

47

61

65

65

48

46

46

47

48 48

48

48

47

47

66

66

38

47

48

21

46

66

46

40

59

26

21

21

21

21

51

51

46

46

46

46

46

46

46

60

63

46

46

46

23

48

50

50

39

26

14

62

61

46

22

46 46

46

47

46

47

50

53

46

23

46

46

23

46

46

50

47

53

5

5

27

33

5

27

23

5 46

5

46

23

46

46

46

27

27

27

26

46

23

5

23

58

46

46

5

5

5

5

26

5

46

46

46

46

5

5

46

5

52

23

46

27

5

5

5

46

27

46

23

23

23

5

5

40

27

46

46

5

66

48

46

5

6

46

22

22

22

63

5

23

23

6

46

46

46

46

52

52

52

46

46

46

5

23

23

5

34

23

45

46

45

46

45

5

45

5

27

46

22

46

66

46

46

21

5

46

46

46

27

46

5

46

46

5

5

46

46

5

23

46

46

66

46

48

46

5

46

45

48

22

5

OUT

V-

V+

NCCD

GND

OUT

VDD

NC7

NC6

NC5

NC4

NC2

NC3

OUT

VDD

NC0

NC1

VIO

GND

GND

VIN VOUT

OUT

OUT

OUT

G

D

SIN

G

D

S G

D

S

TABLE_5_ITEM



TABLE_5_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_ALT_ITEM


TABLE_ALT_HEAD

System (Sleep) LED Circuit

Is this the best part to use?

SMC AVREF Supply

C5951 AND R5951 SHOULD BE PLACED CLOSE TO Q5950

SMC 1.05V to 3.3V Level Shifting

NC

NC

SMS_INT_L

1.05V Mid-Reference

NC

NC

197S0166

NC

NC

NC

NC

Silk: "PWR BTN"

Silk: "SMC RST"

SMC Crystal Circuit

NC

U5910 is really a 32.768KHz oscillator

Debug Power Button

197S0169

SMC_TPM_RESET_L

THESE NEED TO BE PULLED TO THE PROPER RAIL:

SMC 3.3V to 1.05V Level Shifting

SMC G3HOT OSCILLATORStuff R5992, R5993 for development only

SMC Reset Button / Brownout Detect

21 10KR5980100K21R5981

2 2.0K1R5982ONEWIRE_PULLUP_OLD

1R5983 2 470KR5984 1 2 10K

1 10K2R598621 10KR5985

1 10K2R5987

21

R591122

MF-LF402

5%1/16W

20%

CERM10V

402

0.1UFC59111

22

1C59104.7UF

CERM603

20%6.3V

R5918 10K1 2NOSTUFF

NOSTUFF 10KR5923 1 2R5925NOSTUFF 10K1 2

NOSTUFF 10KR5929 1 2NOSTUFF R5934 10K1 2

R5938 10K1 2NOSTUFF10KNOSTUFF 1 2R5936

21R5940 10KR5942 10K1 2

10K2R5924 1

NOSTUFFR5926 10K1 2

21R5949 NOSTUFF10K

21 10K NOSTUFFR594621R5945 10K NOSTUFF

R5944 21 NOSTUFF10K2R5943 1 NOSTUFF10K

10KR5941 1 2 NOSTUFF

NOSTUFFR5939 1 10K2NOSTUFF21 10KR5937

NOSTUFF2 10KR5935 110K NOSTUFF21R593310K NOSTUFF21R5932

R5931 NOSTUFF1 2 10K

20.00MHZY5920 1

25X3.2-SM

CRITICAL

21

R599510K

21

R598910K

10K21R5998 NOSTUFF

21R5999 10K NOSTUFF

1R5947 10K2

10K21R5996

R5954 10K21R5955 10K1 2R5988 470K1 2

10KR5994 21

2

NOSTUFF

0

MF-LF402

5%1/16W

1

R5972

R5973 1 2 100K

2

5

1

3

4 LMC7211SM-LF

U5977

2 10KR5997 1

L5910FERR-120-OHM-0.2A0603

2

1

21 10KR5928

402

R5930

1/16W5%

MF-LF

10K1 2

1 10K2R5919

U5900

CRITICAL

RN5VD30A-F

1

2

3

5

4

SOT23-5

CRITICAL

32.768KHZ-9-3.6VU5910

6

11

10

9

8

4

5

7

12

2

3

1

SG-3040LC-SM

1 2R5905 100K21R5906 100K

C5951NOSTUFF

X5R4V

2402

1

2.2UF20%

3

1 2CRITICAL

SOT23-3ISL60002-33VR5965

1/16W

R5990NOSTUFF

MF-LF

210

402

5% NOSTUFF

R59911

1/16WMF-LF402

2

5%

0

402

5%

021

MF-LF1/16W

R5992

21

R59930

402

5%1/16WMF-LF

1/16W5%

402MF-LF

1KR59001

2

0.1uF

CERM

20%10V

1C5900

2402

2CERM

10%16V

402

1C59010.01UF

2

1R59010

MF-LF603

5%1/10W

NOSTUFF

2

1R5910NOSTUFF

0

MF-LF603

5%1/10W

16VCERM2

1 C596710%

402

0.01uF

2

1C596610uF

X5R603

20%6.3V

21

C592015pF

402

5%50VCERM

2115pF

402CERM50V5%

C5921

10%0.47UF6.3V

402CERM-X5R

C59651

2

R59761

2402

5%

MF-LF1/16W

10K

2

1

MF-LF402

5%1/16W

NOSTUFF

1KR5977

2

1

6.2K

MF-LF402

5%1/16W

R5970

1K1/16W

5%

402MF-LF

R59711

2

2

1 C5977

CERM402

20%10V

0.1uF

2

Q5950SOT23-LF2N3906

1

3

2402

1

1%1/16WMF-LF

84.5R5950OMITCRITICAL

R59512.2K

MF-LF

5%

2

1

402

1/16W

R5952

402MF-LF

4.7K5%

1/16W

2

1

2N7002SOT23-LF

2

1

3

Q5952

5

3

4

SOT-363

Q59012N7002DW-X-F 2N7002DW-X-F

6

2

1

SOT-363

Q5901

1/16W

R5953

402

1 2

MF-LF

5%

10K

NOSTUFF 1R5920 10K2

R5927NOSTUFF 10K1 2

R5922NOSTUFF 1 2 10K

1 2 10KR5948

NORMALR595084.5, 1%, 1/16W, MF-LF, 4021114S0114

R59501 FANCY114S0126 115, 1%, 1/16W, MF-LF, 402

SYNC_MASTER=SMC

10859

G051-7173


SMC SUPPORT

TI REF3133353S1278 VR5965?353S1381

=PP3V42_G3H_SMCVREF

MIN_LINE_WIDTH=0.2 MM

PP3V42_G3H_SMC_CLK_F

MIN_NECK_WIDTH=0.2 MMVOLTAGE=3.425V

SMC_TX_L

=PP5V_S3_SYSLED

SYS_LED_L_VDIV

SYS_LED_ILIM

SMC_PG1SMC_LID

PM_SLP_S5_L

SMC_BATT_VSET

SMC_PS_ON

SMC_FWIRE_ISENSE

PM_THRMTRIP_L

ALS_LEFT

SMC_EXCARD_CP

=PP3V42_G3H_SMC

SMC_ONOFF_LRSMRST_PWRGD

SMC_RST_L

SMC_P21

SMC_SYS_VSET

P0V52_SMC_LSREF

SMC_RX_L

=PP3V3_S3_SMS

=PP3V3_S3_TPM

TPM_GPIO1

SC_RX_L

SC_TX_L

SMC_MEM_ISENSESMC_NB_ISENSE

SMC_CASE_OPEN

=PP3V3_S0_SMC_LS

SMC_GPU_VSENSE

SMC_PB7

SMC_TCK

SMC_PROCHOT_3_3_LSMC_SYS_KBDLED

SMC_P22

SMC_BATT_CHG_EN

SMC_TX_L

SMC_P27

=PP3V42_G3H_SMC

SMC_P20

SMC_BC_ACOK

SMC_TDI

ALS_GAIN

SMC_XTAL

SMC_EXTAL

SMC_EXCARD_PWR_EN

SMC_FAN_3_CTL

SMC_FAN_0_CTL

SMC_FAN_0_TACH

SMC_TPM_RESET_L

SMC_PD3

PM_SUS_STAT_L

CPU_PROCHOT_L

SMC_SYS_LED_16B

SMC_CPU_RESET_3_3_L

SMC_PROCHOT

SMC_SUS_CLK

TPM_GPIO2

SMS_INT_L

SMC_ONOFF_L

SMC_THRMTRIP

ALS_RIGHT

SMC_FAN_3_TACHSMC_FAN_2_TACH

SMC_EXCARD_PWR_OC_L

=PP3V42_G3H_SMC

SMC_BS_ALRT_L

SMC_FWE

SMC_P44

SMC_SUS_CLK_R

SMC_TMS

SYS_ONEWIRE

SMC_TDO

SMC_P26

SMC_GPU_ISENSE

SMC_BATT_TRICKLE_EN_L

=PP3V42_G3H_SMC_CLK

SYS_LED_L

SMC_MANUAL_RST_L

SMC_P46

SMC_RX_L

SMC_P23

SMC_FAN_2_CTL

SMC_DISP_BKLT_B

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MMPP3V3_AVREF_SMC

MIN_NECK_WIDTH=0.2 MMVOLTAGE=0V

MIN_LINE_WIDTH=0.4 MMGND_SMC_AVSS

SYS_LED_ANODE

CPU_PROCHOT_L

SMC_TPM_GPIO

53

66

47

65

65

64

48

47

47

64

66

47

48

64

47

62

46

45

45

21

48

46

47

46

47

66

46

48

65

47

45

58

46

48

65

47

65

66

46

61

58

45

64

40

45

39

14

45

46

45

59

45

45

64

64

61

62

45

45

45

46

45

45

53

23

46

45

45

45

46

45

45

45

45

45

48

46

64

5

35

45

5

23

45

5

45

7

5

45

45

40

45

5

45

45

5

52

53

53

45

45

45

45

45

64

45

45

5

45

45

45

5

5

45

45

45

5

5

45

45

45

45

45

45

45

45

45

5

7

45

45

45

45

53

23

40

45

45

5

45

45

45

5

45

45

5

5

45

45

5

64

5

45

5

45

45

45

45

45

7

45

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

GPIO15

516S0002

NOSTUFF

SM1

1 2

3 4

6

7

9

11 12

13 14

15 16

17 18

19

21 22

23 24

25 26

27 28

29 30

20

10

5

8

F-ST-5047J6000CRITICAL

LPC+ Debug ConnectorSYNC_DATE=06/30/2005SYNC_MASTER=NB

051-7173 G

10860

SMC_NMI

SMC_RX_L

SMC_RST_L

SV_SET_UP

=PP5V_S0_LPCPLUS

SMC_TDI

LPC_AD<3>

INT_SERIRQ

PM_SUS_STAT_L

SMC_TCK

SMC_TMS

DEBUG_RST_L

PM_CLKRUN_L

LPC_AD<1>

LPC_FRAME_L

LPC_AD<0>

BOOT_LPC_SPI_L

SMC_TRST_L

SMC_TDO

SMC_MD1

SMC_TX_L

PCI_CLK_PORT80_LPC

FWH_INIT_L

LPC_AD<2>

=PP3V42_G3H_LPCPLUS

53

53

53

53

46

45

53

53

53

53

46

46

46

45

45

45

46

46

38

45

45

45

45

46

46

21

45

45

45

45

23

64

45

21

23

23

45

45

26

23

21

21

21

22

45

45

45

45

33

6

21

64

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

G

D

S

IN

G

D

S

G

DS

G S

D

G S

D

G

D

S

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

CPU VOLTAGE SENSE

PLACE RC FILTER CLOSE TO SMC

PLACE RC FILTER CLOSE TO SMC

PLACE C6150 NEAR U5800

DRIVEN LOW IN S0 DRIVEN LOW BY SMCOR POWER BUTTON

CPU CURRENT SENSE

PROCESSOR DCIN VOLTAGE SENSE

Current Sense Calibration CircuitSwitches in fixed load on power supplies to calibrate current sense circuits

10K

MF-LF402

5%1/16W

R61441

21.00

MF-LF1206

1%1/4W

R61431

2

SOT-363

3

5

4

Q61012N7002DW-X-F

1/16W5%

402MF-LF

470KR61401

2

100K

MF-LF402

5%1/16W

R61411

2

470K

MF-LF402

5%1/16W

R61421

2

SOT23-LF2N7002Q6151

3

1

2

TP0610S0T23-3

Q6150

3

1

2

SOT23-5

U6100

3

4

1

5

2

LMV2011MF

CRITICAL

NOSTUFF

S0T23-3TP0610Q6152

3

1

2

402

1/16W5%100K

MF-LF

R61531

2

402MF-LF1/16W5%100KR61521

2

5.49K1%1/16WMF-LF402

R61511

2 402CERM-X5R6.3V10%0.22UFC61501

2

27.4K1%1/16WMF-LF402

R61501

2S0T23-3

TP0610Q6153

3

1

2

0.1UF

CERM402

20%10V

NOSTUFF

C61041

2

0.1UF

CERM402

20%10V

C61051

2

NOSTUFF

2

1

MF-LF1/16W1%

402

1MR6103

21

R6100

1/16WMF-LF

1%

402

1M

21

R6107

1/16WMF-LF402

0

5%

21

R6105

1/16W1%

MF-LF402

30.1K

21

R6108

MF-LF1/16W

402

0

5%

21

R6106

MF-LF1/16W1%

402

30.1K

50V10%

402CERM

470PFC61001 2

50V10%

402CERM

470PF1

2

C6103

0.1UF20%10VCERM

C61011

2402

1/16W1%

402MF-LF

4.53KR61021 2

402X5R

C61021

2

0.22UF6.3V20%

1

2

5

63

4

TSOP-LFSI3446DVQ6100CRITICAL

1/16W1%

4.53K

402MF-LF

R61121 2

0.22UF

X5R402

20%6.3V

C61121

2

2N7002DW-X-FSOT-363

Q61016

2

1

CPU Current & Voltage Sense

SYNC_DATE=08/30/2005SYNC_MASTER=ENET

10861

G051-7173

CPU_ISENSE_OUT_R

GND_SMC_AVSS

IMVP6_DROOP

CPU_ISENSE_R_NIMVP6_VO

=PPVIN_S5_IMVP6

PBUS_SMC_VSENSE_EN

=PP3V42_G3H_SMC

PM_SLP_S3

SMC_CPU_ISENSE

=PPVCORE_S0_CPU

GND_SMC_AVSS

SMC_CPU_VSENSE

ISENSE_CAL_EN

MIN_NECK_WIDTH=0.20 mmMIN_LINE_WIDTH=0.50 mmCPUVCORE_ISENSE_CAL

ISENSE_CAL_EN_LS5V

ISENSE_CAL_EN_L

=PPVCORE_S0_CPU

GND_SMC_AVSS

PBUS_S0_SMC_VSENSE

SMC_ONOFF_L

SMC_PBUS_VSENSE

=PP5V_S0_ISENSECAL

=PP3V3_S0_CPUPOWER

PBUS_SMC_VSENSE_EN_L

CPU_ISENSE_R_P

IMVP6_CPU_ISENSE_P

IMVP6_CPU_ISENSE_N

66

66

66

62

62

62

61

64

61

64

61

48

64

48

48

48

48

46

46

64

46

9

46

45

9

46

45

45

58

58

58

45

63

45

8

45

5

45

8

45

40

45

64

64

SMBDATA

SMBCLK

ALERT*

OT2*

DXP2

OT1*

DXN

DXP1

GND

VCC

IO

IO

IO

IO

OUT

OUT

SMBDATA

SMBCLK

ALERT*

OT2*

DXP2

OT1*

DXN

DXP1

GND

VCC

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NOTE: REPLACE J6250 AND J6251 FROM 518S0332 TO 518S0452 AND 518S0487

518S0487

518S0487

IF B SENSOR INPUT IS UNUSED STUFF

IF A SENSOR INPUT IS UNUSED STUFF

PLACE U6250 IN BATTERY CHARGER AREA


PLACE R6250 AND R6251

AWAY FROM U6250 BUT CLOSE TO

PLACE UNDER J2900

4. 10 MIL TRACE WIDTHS AND 10MIL SPACING BETWEEN THE GAURD

IF A SENSOR INPUT IS UNUSED STUFF

2. DXP AND DXN TRACE LENGTH MUST NOT EXCEED 4 INCHES

1. ROUTE DXP AND DXN DIFFERENTIALLY

C6250 AND C6251

NEXT TO DXP AND DXN

THE CORRESPONDING RESISTOR

3. ROUTE GROUNDED GAURD TRACES AROUND THE DXP/DXN DIFF PAIR

NC

NC

NC

NC

NC

3. ROUTE GROUNDED GAURD TRACES AROUND THE DXP/DXN DIFF PAIR

4. 10 MIL TRACE WIDTHS AND 10MIL SPACING BETWEEN THE GAURD

ADDITIONAL NOISE FILTERING

PLACE NEXT TO C6252 U6250 PIN 1


AFTER THIS CHANGE, THE SCHEAMTIC DOES NOT MATCH THE PCB ON THESE TWO LOCATIONS.

1. ROUTE DXP AND DXN DIFFERENTIALLY

2. DXP AND DXN TRACE LENGTH MUST NOT EXCEED 4 INCHES


DIMM0 TEMPERATURE ZONE

AFTER THIS CHANGE, THE SCHEAMTIC DOES NOT MATCH THE PCB ON THESE TWO LOCATIONS.

PLACE NEXT TO C6202 U6200 PIN 1

DIMM1 TEMPERATURE ZONE

NOTE: REPLACE J6250 AND J6251 FROM 518S0332 TO 518S0452 AND THEN 518S0487

NC

PLACE U6200 NEAR U1200

NEXT TO DXP AND DXN


21

R6203

1%1/16W

47

MF-LF402

1

9

7

8

10

4

5

3

2

6

UMAX1MAX6695AUBU6250

CRITICAL

2

1 C6252

402

0.1UF

X5R16V10%

21

R6252

402MF-LF

47

1/16W1%

2

1 C620210%16V

0.1UF

X5R402

2

1R6251

402MF-LF1/16W5%0

NOSTUFF

2

1

402

5%

R620001/16WMF-LF

1

402CERM250V10%0.0022UFC6200NOSTUFF

2

1 C62010.0022UF10%50VCERM402

2

1 C62500.0022UF10%50VCERM402

2

1 C6251

402CERM50V

0.0022UF10%

BC846BM3T5GQ6200 1

2

3

SOT732-3

MF-LF1/16W5%0

NOSTUFF

R62011

2402

BM02B-ACHKS-GAN-TF-LF-SN-M

CRITICAL

J6250

3

1

2

4

M-RT-SM

BM02B-ACHKS-GAN-TF-LF-SN-MJ6251CRITICAL

3

1

2

4

M-RT-SM

1

9

7

8

10

4

5

3

2

6

UMAX1MAX6695AUBU6200

CRITICAL

SYNC_MASTER=ENET

051-7173 G

62 108


TEMPERATURE SENSE

THRM_DIMM1_SMB_CLK

THRM_DIMM0_DXP2

THRM_DIMM0_3V3_UNFILTERED

THRM_DIMM0_SMB_DATA

THRM_DIMM0_SMB_CLKTHRM_DIMM0_DXN

THRM_DIMM1_DXN

THRM_DIMM1_DXP2

THRM_DIMM0_DXP1

=PP3V3_S0_THRM_SNR

THRM_DIMM1_3V3_UNFILTERED =PP3V3_S0_THRM_SNR

THRM_DIMM1_SMB_DATA

THRM_DIMM1_DXP1

64

64

49

49

27

27

27 40

40

10

10

27

SO

VDD

CE*

SCK

VSSHOLD*

SI

WP*

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

R6309 IS NOT NEEDED WHEN SHARING SPI FLASH WITH ICH7M AND TEKOA(LAN CHIP)

R6303 SHOULD BE PLACED LESS THAN 100 MILS FORM FLASH ROM

R6307 AND R6306 SHOULD BE PLACED LESS THAN 100 MILS FORM ICH7M

0.1UF20%10VCERM402

C63121

23.3K

MF-LF

5%

402

1/16W

R63011

2MF-LF1/16W

5%3.3K

402

R63021

2

50V5%

CERM402

22pFC63011

2

47

1/16W5%

402MF-LF

R63071 2

CERM

5%50V

22pF

402

C63081

2

22pF

402

50VCERM

5%

C63091

2

1/16W5%

47

MF-LF402

R63031 2

402

5%

MF-LF1/16W

47R63061 2

50V5%

CERM402

22pFC63111

2

SOI

SST25VF016B

16MBIT

CRITICAL OMIT

U6301

1

7

6 5

2

8

4

3

MF-LF1/16W

10K5%

402

R6308

12

402MF-LF1/16W

5%10K

NOSTUFF

R6309

12

SYNC_DATE=5/23/05SYNC_MASTER=MASTER

108

G051-7173

SPI BOOTROM

63

SPI_WP_LSPI_HOLD_L

SPI_CE_LSPI_SO

SPI_SISPI_SCLK_RSPI_SCLK SPI_SI_R

SPI_SO_R

=PP3V3_S5_ROM

45 45

45 45

22 22

22 22

64

G

S D

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NC

TACH5V DC

NC

MOTOR CONTROLGND

518S0486

47K

402MF-LF1/16W5%

R65651 2

5%MF-LF

402

47K1/16W

R65601

2

100K5%

MF-LF402

1/16W

R65611

2

88609-04001

4

3

2

1

6

5

J6501CRITICAL

F-ST-SM

SOT23-LF

1

2 3

Q65602N7002

65 108

051-7173 G

FanSYNC_MASTER=ENET SYNC_DATE=11/10/2005

=PP3V3_S0_FAN_RT

SMC_FAN_1_CTLFAN_RT_PWM

=PP5V_S0_FAN_RT

SMC_FAN_1_TACH FAN_RT_TACH

64

45

64

45

5

5 5

5

5 5

OUTPUTY

OUTPUTZ

DNC

RSVD

TESTSELF

PS

PARITY

RSVD

RSVD

RSVD

GND PADTHRML

OUTPUTX

VDD

VOUTZ

VOUTY

RSRVD1

RSVRD2

ST

GND

VOUTX

VDD

G

D

S

G S

D

TABLE_5_ITEM

TABLE_5_ITEM



DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

+X

Package Top

+Y1

(Placed on board bottom side)

+Y

1

Package Top

+X

+Z (up)

Desired Orientation

PAGE NOTES

=PP3V3_S3_SMS - 3.3V POWER FOR SMS (STAYS ALIVE IN SLEEP)

SMS_ONOFF_L - CONNECT TO SMC TO BE ABLE TO PUT SMS INTO LOW-POWER MODE

SMS_ACC_*_AXIS - ACCELEROMETER OUTPUT TO SCU

OUTPUT

7/26/2005 -

NC

INPUT

NC

SMC_ACC_SELFTEST-->is a test signal

1 -->Self test0 -->Normal operation

+Z (up)

Desired Orientation(Placed on board bottom side)

7/26/2005 - CONNECTED PD PIN TO SMC’S SMS_ONOFF_L

5/19/2005 - FIRST REVISION OF PAGE

PAGE HISTORY7/26/2005 - REMOVED BOM TABLE AND UPDATED SYMBOL TO KXM52-2050

2

1C66200.1uF

10V20%

CERM402

CRITICAL

QFNKXM52-2050

8

15

10

11

7

6

4

9

5 14

13

2

123

1

U6620

ACCEL_KIONIX

2

1R6621

MF-LF402

5%1/16W

10K

C66050.033uF

2

1

X5R16V10%

OMIT

402

0.033uF

2

1 C6606OMIT

16VX5R402

10%

2

6

7

8

1

5

4

3

U6650LGA

LIS3L02AL

ACCEL_ST

CRITICAL

2

1

3

Q66502N7002SOT23-LF

ACCEL_ST

1/16W5%

10K

ACCEL_ST

402MF-LF

R66501

2

R6652100K

5%

MF-LF2

1

402

1/16W

3

2

1

S0T23-3TP0610Q6651ACCEL_ST

2

1 C6604OMIT

0.033uF

X5R402

10%16V

ACCEL_STC6604,C6605,C66060.01UF,10%,16V,4023132S0042

ACCEL_KIONIXC6604,C6605,C66060.033UF,10%,16V,4023132S0131

SMS

66 108

G051-7173

SYNC_MASTER=SMC SYNC_DATE=08/23/2005

SMS_X_AXIS

SMS_Y_AXIS

SMS_Z_AXIS

SMS_ONOFF_L

SMS_ACC_SELFTEST

ST_ACCEL_ON_L

PP3V3_S3_ST_ACCEL

=PP3V3_S3_SMS64

45

45

45

45

46

IN

IO

IN

IO

IO LAD1

LAD2

LCLK

LFRAME*

LRESET*

LPCPD*

SERRIRQ

LAD0

CLKRUN/GPIO*

PP/GPIO

GPIO_EXPRESS_00

GPIO/SM_DAT

GPIO/SM_CLK

XTALI/32K_IN

TESTBI/BADD/GPIO

TESTI

3V0

3V1

3V2

3VSB

VNC

VBAT

XTALO

GND2

GND3

GND0

GND1

LAD3IO

IN

IN

IO

IN

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NCNC

VDD

VDD

GPIO2

NC

CLKRUN*

TESTBI/BADD

NC

NOTE:

SINCE CURRENT OF VSB IS NOT YET ON SPEC,

1/8W (R6704/R6705) IS USED FOR NOW

GPIO

NC

PP(INT PD)

GND

VDD

VSB

NC

197S0098

TPM

0.1UF10%16VX5R402

C67001

2

TPM

10%16VX5R402

0.1UFC67011

2

TPM

402X5R16V10%0.1UFC67021

2

TPM

402

10%16VX5R

0.1UFC67031

2

TPM

CRITICAL

TPMTSSOP

U6700 10

19

24

5

15

4

11

18

25

2

1

6

26

23

20

17

21

22

28

16

7

27

9

8

12

3

13

14

TPM

402MF-LF

10K1/16W5%

R67021

2

402

5%

MF-LF1/16W

10K

NOSTUFF

R67031

2

TPM

15pF

402CERM50V5%

C67951 2

TPM

402

15pF

50V5%

CERM

C67961 2

CRITICAL

SM-LF

TPM

32.768KY67951

4

TPM

21

R67980

402MF-LF1/16W5%

402

0

5%

MF-LF1/16W

NOSTUFF

R67991 2

MF-LF805

1/8W

NOSTUFF

5%0R67051

2TPM

5%

805

0

MF-LF1/8W

R67041 2

R6700

NOSTUFF

210

402MF-LF1/16W5%

TPMSYNC_DATE=07/18/2005SYNC_MASTER=SMC

051-7173 G

67 108


PP3V3_S0_TPM_3VSBVOLTAGE=3.3V

LPC_AD<0>

TPM_XTALO

PM_CLKRUN_L

INT_SERIRQ

PCI_CLK_TPM

LPC_AD<3>

LPC_FRAME_L

PM_SUS_STAT_L

TPM_GPIO1

TPM_GPIO2

TPM_XTALI

TPM_RST_L

=PP3V3_S3_TPM

TPM_LRESET_L

SMC_TPM_RESET_L

LPC_AD<2>

TPM_BADD

LPC_AD<1>

=PP3V3_S0_TPM

SMC_TPM_PP_RSMC_TPM_PP

47

47

47

45

47

47

47

46

47

47

45

38

45

45

45

45

45

45

21

23

23

21

21

23

64

46

21

21

5

5

5

33

5

5

5

46

46

46

26

45

5

5

64

45

IN

IN

IN

IN

OUT

NR/FBENIN OUT

GNDGNDTAB

OUT

OUT

RESET*

CD-L

CD-R

PORT-C_LPORT-F_L_HP

PORT-F_R_HP

PORT-B_R

PORT-B_L

VREFOUT-C

VREFOUT-B

VREFOUT-A

VREFOUT-D

CAP2

NC2

NC1

AFILT2

AFILT1

VREF_FILT

DVSS3

DVSS2

AVSS1

AVSS3

PORT-E_R

PORT-E_L

PORT-A_R_HP

PORT-A_L_HP

SENSE_B

SENSE_A

GPIO3/SPDIFIN

PC_BEEP

VOLUME_UP

VOLUME_DOWN

CD-G

PORT-D_R_HP

PORT-D_L_HP

PORT-C_R

SDATA_IN

SDATA_OUT

SYNC

BIT_CLK

DVDD_CORE1

DVDD_CORE3

AVDD2

AVDD1

SPDIF-OUT

GPIO2

GPIO0

GPIO1

MIC2

LO

HP

MIC1


TABLE_ALT_HEAD

TABLE_ALT_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

STUFFING OPTIONS FOR ALC882 CODEC

4.5V POWER SUPPLY FOR CODEC

PLACE R6809 CLOSE TO COMBO JACK

NC

APPLE P/N 353S1458

AUDIO CODEC

NCNC

PLACE CLOSE TO U6800

USING DC OFFSET SCREENED PART AS PRIMARY OPTION

CRITICAL

X5R

C6821

402

16V10%0.1UF

1

2

2

1

402CERM

CRITICAL

5%50V15pFC6825

2

1 C68230.1UF10%16V402X5R

CRITICALC6822 1

10UF20%

6.3VX5R 2603

402MF-LF

21

R68021K

1%1/16W

20%

SMA-LF

1

26.3VTANT

10uFC6810CRITICAL

39

MF-LF

1 2

402

5%

R6807

1/16W

MF-LF402

5%

1

1/16W

222

R6808

10%

CERM50V402

1

2

CRITICALC68330.001uF

SMA-LF

10UF2TANT

20%

1CRITICALC6807

6.3V

10%50VCERM

1

2

0.001uFC6813CRITICAL

402

0.001uF50V2402

1

10%

CERM

C6812CRITICAL

SMA-LF

C680420%

10uF

TANT6.3V

1CRITICAL

2

6.3V 2

1C6802

POLY

20%47UF

CASE-B3-LF

CRITICAL

2

1

POLY

20%6.3V

C6803CRITICAL

47UF

CASE-B3-LF

10%

402

0.001uFC68301

2

CRITICAL

CERM50V

402

29.4KR68111

2MF-LF1/16W1%

MF-LF

78.7K1%

402

1/16W

R68101

2

CRITICAL

10%

CERM402

1

2

0.001uFC6835

50V10%

402CERM

C68361

2 50V

CRITICAL

0.001uF

SOT223-6

VR6800

1

3 6

5

4

TPS79501

2

CRITICAL

FERR-220-OHM

0402

2

L6800

1

21

0402

L6801FERR-220-OHM

NO STUFF

5%

0

402

1/16WMF-LF

R68501 2

402

1/16W5%

0

MF-LF

1 2

R6852

NO STUFF

0

5%1/16W

402MF-LF

R68511 2

5%

402MF-LF1/16W

0R68531 2

MF-LF

20.0K

2

1%

R68541

402

NO STUFF

1/16W

CRITICALC6853

2

1

16V10%

X5R402

0.1UF

NO STUFF

R6809

4022

5%1/16W

1

100K

MF-LF

46

45

44

48

25

38

91

6

10

5

8

24

35

36

19

3

2

12

47

13

34

39

41

14

15

42

2647

27

30

31

40

43

33

32

37

28

29

21

22

17

1623

20

18

11

CRITICAL

LQFPSTAC92204XRU6800

50V402

10%

CERM

1

2

0.001uFC6801CRITICAL

100K

2

1R6800

1/16W5%

MF-LF402

603X5R

20%10UF

1C6800

6.3V 2

CRITICAL

1/16W

1

MF-LF

0

2

5%

R6801

402

CRITICAL

1000pF

CERM

C6805

6032

1

5%25V

1

603

25V5%1000pFC6806CRITICAL

CERM2

353S1458 DC OFFSET SCREEN PRTSU6800353S1345 ?

108

AUDIO: CODECSYNC_DATE=08/05/2006

68

G051-7173

SYNC_MASTER=M42AUDIO

BEEP

=GND_AUDIO_CODEC

AUD_SPDIF_OUT

VOLTAGE=4.5VMIN_NECK_WIDTH=0.2MM

PP4V5_AUDIO_ANALOGMIN_LINE_WIDTH=0.6MM

AUD_BI_PORT_C_R

AUD_SPDIF_IN

AUD_SENSE_A

AUD_BI_PORT_A_LAUD_BI_PORT_A_R

AUD_ANALOG_FILT_2

AUD_JDREF

AUD_ALC_COUT

AUD_BI_PORT_F_RAUD_BI_PORT_F_L

AUD_BI_PORT_E_RAUD_BI_PORT_E_L

SDATAIN

ACZ_SDATAIN<0>

AUD_BI_PORT_D_R

BAL_IN_L

VOLTAGE=3.3V


=PP3V3_S0_AUDIO

AUD_GPIO_1_R

AUD_GPIO_2

BAL_IN_COMBAL_IN_R

AUD_SENSE_B

AUD_SPDIF_OUT_R

ACZ_BITCLKACZ_SYNC

AUD_GPIO_0_R

AUD_BI_PORT_B_L


PP3V3_AUDIO_CODECVOLTAGE=3.3V

ACZ_SDATAOUT

AUD_BI_PORT_D_L

AUD_BI_PORT_C_L

AUD_BYPASS

ACZ_RST_L

VOL_DOWNVOL_UP

AUD_VREF_FILT

PP4V5_AUDIO_ANALOGVOLTAGE=4.5VMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM

VREG_FB

AUD_4V5_SHDN_L

=GND_AUDIO_CODEC


5V_REG_INVOLTAGE=5V


=PP3V3_S0_AUDIO

VOLTAGE=5V

MIN_LINE_WIDTH=0.60 MMMIN_NECK_WIDTH=0.20 MM

=PP5V_S0_AUDIO

AUD_ANALOG_FILT_1

AUD_GPIO_0

AUD_GPIO_1

VOL_UP

AUD_GPIO_0_R

AUD_GPIO_1_R

VOL_DOWN

MIN_NECK_WIDTH=0.20 MMVOLTAGE=0V

=GND_AUDIO_CODECMIN_LINE_WIDTH=0.30 MM

AUD_VREF_PORT_B

AUD_BI_PORT_B_R

64

64

64

57

64

57

64

57

56

57

57

56

57

56

55

57

21

56

21

21

21

21

57

55

56

64

55

54

56

54

55

56

57

57

57

57

57

57

57

5

55

57

54

54

57

57

57

5

5

54

57

5

57

55

5

54

54

54

54

54

55

55

57

54

54

54

54

54

57

57

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

IN

GND PGND

VDD PVDD

IN-

IN+

SYNC

OUT-

OUT+

SHDN*

THRMLPAD

GND PGND

VDD PVDD

IN-

IN+

SYNC

OUT-

OUT+

SHDN*

THRMLPAD

GND PGND

VDD PVDD

IN-

IN+

SYNC

OUT-

OUT+

SHDN*

THRMLPAD

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

APN:353S1595

SUB 169 Hz < FC < 282 Hz

SUB-TWEETER

LEFT SATELLITE

SPEAKER OUTPUT EMI FILTERS

RIGHT SATELLITE

SATELLITE 442 Hz < FC < 736 Hz

SATELLITE & SUB TWEETER AMPLIFIER

NO STUFF

6.3V20%

CRITICAL

POLY

C7200150uF

SMC-LF2

1

10K

2

1R7210

1/16W

402MF-LF

5%

0.018UF

X7R

21

C7210

402

CRITICAL

16V10%

CRITICALC72200.018UF

X7R

21

10%16V

402

0.047UF

X7R 2

1C7231CRITICAL

10%

402

16V

21

L7211

0402

FERR-1000-OHM

54

54

54

0.1UF

X5R16V10%

1

2

CRITICAL

402

C7207

L7200FERR-220-OHM

21

0402

1

FERR-1000-OHM

0402

2

L7220

21

L7210FERR-1000-OHM

0402

NO STUFFCRITICAL

C7260100PF5%

402CERM50V

1

2

NO STUFFCRITICAL

5%100PF50VCERM402

C72611

2

NO STUFF

5%

402CERM

100PF50V

CRITICAL

C72701

2

NO STUFFCRITICAL

50VCERM402

5%100PFC72711

2

56

56

56

56

20%

C7206

2

1

X5R

CRITICAL

6.3V

10UF

603

56

56

NO STUFFCRITICAL

50V

100PF

CERM402

5%

C72811

2

NO STUFF

5%

CERM

100PF50V

CRITICAL

402

C72801

2

0.047UF

X7R

21

C7230CRITICAL

16V10%

402

FERR-1000-OHM21

L7230

040254

0.018UF

X7R 2

1C7221CRITICAL

10%16V

402

X5R16V

0.1UF

402

CRITICAL1

2

C720910%

C7205120UF

CASE-B2

CRITICAL

POLY6.3V20%

1

2

TDFN1

CRITICAL

U7230

10

MAX9705

4

3

2

9

8

7

56

11

1

MAX9705

4

3

2

9

8

10

56

1

7

U7210

11

CRITICAL

TDFN1

U7220TDFN1

CRITICAL

11

MAX9705

10

4

3

2

9

8

7

56

1

CRITICAL

0.018UF

X7R

C7211

2

1

402

10%16V

0.1UF

X5R16V10%

C7208

2

1CRITICAL

402

2

1

10uF20%6.3V

603X5R

C7202CRITICAL

47UF

CASE-B3-LF2

1 C7201CRITICAL

20%6.3VPOLY

MF-LF

R7201

2

1/16W5%

1

402

100

47UF

CASE-B3-LF

C720320%

2

1

POLY6.3V

CRITICAL

C7204

2603

1

X5R

10UF20%6.3V

CRITICAL

0

402

5%

MF-LF1/16W

R726012

1/16WMF-LF

5%

402

0R7261

12

0

402

5%

MF-LF1/16W

R727012

1/16WMF-LF

5%

402

0R7271

12

0

402

5%

MF-LF1/16W

R728012

1/16WMF-LF

5%

402

0R7281

12

4022

1R72021001/16WMF-LF

5%

SM21

XW7200

72 108

G051-7173

SYNC_DATE=08/05/2006SYNC_MASTER=M42AUDIO

AUDI0: SPEAKER AMP

MIN_LINE_WIDTH=0.30 MMMIN_NECK_WIDTH=0.20 MM=PP5V_S0_AUDIO

VOLTAGE=5V

AUD_SPKRAMP_INR_L

=PP5V_S0_AUDIO_PWRPP5V_S0_AUDIO_F

=GND_AUDIO_PWR

AUD_BI_PORT_C_R

=PP5V_S0_AUDIO_PWR

AUD_SPKRAMP_SHUTDOWN_L

PP5V_S0_AUDIO_F

AUD_BI_PORT_D_R

AUD_GPIO_0

AUD_SPKRAMP_INSUB_L

AUD_BI_PORT_C_L AUD_SPKRAMP_INL_L

AUD_SPKRAMP_INSUB

AUD_SPKRAMP_INL

SPKRAMP_THERMPLANE=GND_AUDIO_PWR

SPKRAMP_SYNC1

SPKRAMP_SUB_P_OUT

SPKRAMP_L_N_OUTSPKRAMP_L_P_OUT

SPKRAMP_R_P_OUT

=GND_AUDIO_CODEC


MAX9705_SUB_N

=GND_AUDIO_CODEC

MAX9705_L_N

=GND_AUDIO_PWR

SPKRAMP_SUB_N_OUT

SPKRAMP_R_N_OUT

MIN_NECK_WIDTH=0.20 MM

PP5V_S0_AUDIO_F

MIN_LINE_WIDTH=0.30 MMVOLTAGE=5V

SPKRAMP_THERMPLANE

SPKRAMP_SYNC2

SPKRAMP_SYNC1

=GND_AUDIO_PWR

=GND_AUDIO_PWR

=GND_AUDIO_PWR

SPKRAMP_R_P_OUT

MIN_LINE_WIDTH=0.30 mmMIN_NECK_WIDTH=0.20 MM

=GND_AUDIO_PWR

MIN_LINE_WIDTH=0.30 mmMIN_NECK_WIDTH=0.20 MMSPKRCONN_R_N_OUT

MIN_NECK_WIDTH=0.20 MMSPKRCONN_L_N_OUT


MIN_LINE_WIDTH=0.30 mmMIN_NECK_WIDTH=0.20 MMSPKRCONN_SUB_N_OUT


SPKRCONN_SUB_P_OUTMIN_NECK_WIDTH=0.20 MM

MIN_LINE_WIDTH=0.30 mmMIN_NECK_WIDTH=0.20 MMSPKRCONN_L_P_OUT

MIN_LINE_WIDTH=0.30 mmMIN_NECK_WIDTH=0.20 MMSPKRAMP_R_N_OUT

SPKRAMP_L_P_OUTMIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.30 mm

SPKRAMP_SUB_P_OUTMIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.30 mm

SPKRAMP_SUB_N_OUTMIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.30 mm

=GND_AUDIO_PWR

SPKRCONN_R_P_OUTMIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.30 mm

=GND_AUDIO_PWR

MIN_LINE_WIDTH=0.30 mmMIN_NECK_WIDTH=0.20 MMSPKRAMP_L_N_OUT

MIN_LINE_WIDTH=0.60 MMMIN_NECK_WIDTH=0.20 MM=GND_AUDIO_PWR

VOLTAGE=0V

=GND_AUDIO_CODECMIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.30 MMVOLTAGE=0V

SPKRAMP_SYNC2

SPKRAMP_THERMPLANE=GND_AUDIO_PWR

AUD_SPKRAMP_INR

SPKRAMP_THERMPLANE


MAX9705_R_N

MIN_LINE_WIDTH=0.60 MMMIN_NECK_WIDTH=0.20 MM=PP5V_S0_AUDIO_PWR

VOLTAGE=5V

64

64

64

57

57

57

64

64

56

56

64

64

64

64

64

64

64

64

56

64

64

64

56

64

56

55

55

56

56

56

56

56

56

56

56

55

56

64

54

55

55

55

55

55

55

55 55

55

55

55

55

55

54

55

54

55

55

55

55

55

55

55

55

55

55

55

55

55

55

55

55

55

55

55

55

54

55

55

55

55

55

55

IN

IN

IN

IN

OUT

OUT

OUT

IN

IN

VCCGNDVOUT

SHLD_PIN

SHLD_PIN

VINGNDVCC

SHLD_PIN

SHLD_PIN

OUT

BI

BI

OUT

OUT

IN

BI

BI

OUT

OUT


PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM


TABLE_ALT_HEAD

TABLE_ALT_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

AUDIO SHIELD FILLREPLACE 518S0334 WITH 518S0486

SPEAKER CONNECTOR

MIC CONNECTOR

AUDIO JACK 1: LO/HP CONNECTOR, SPDIF TX

APN:518S0332

APN:514S0392

MIC EMI FILTER

AUDIO JACK 2: LINE IN CONNECTOR, SPDIF RX

APN:514-0291APN:514-0318

APN:514-0290APN:514-0317

402

0.001uF10%50VCERM2

1 C7303100PFC7301

CERM50V5%

1

2402

0402-LF

1 2


FERR-1000-OHM1 2

0402

L7302

L7303FERR-1000-OHM

0402

1 2

0402

L7305

21

FERR-1000-OHM

5.6V-15ADZ7300CRITICAL

4

0405

3

2

1

0405

DZ73011

4

3

2

CRITICAL

5.6V-15A

L7307

21

0402

FERR-1000-OHM

10%6.3V

1UF

CERM

C7300

4022

1

55

55

55

55

2SM

1

XW7300

SM21

XW7301

5%

1 2

1/16W

402MF-LF

10R7349

DZ7351CRITICAL31

2 4

04055.6V-15A

57

57

57

21

L7371

0402

FERR-1000-OHM

21

L7373

0402

FERR-1000-OHM

21

L7375

0402

FERR-1000-OHM

21

L7372FERR-1000-OHM

0402

21

L7351

0402

FERR-220-OHM

21

L7370FERR-1000-OHM

0402

21

L7374FERR-1000-OHM

0402

100PF

2

1C7370

50VCERM402

5%2

1C73715%

402CERM

100PF50V

2

1C7372

50VCERM402

5%100PF

C735110uF6.3V

603X5R

20%

1

2

1

SM2

XW7302

XW730321

SM

21

XW7304SM

R73822 1

0

402

5%1/16WMF-LF

NO STUFF

FERR-220-OHM1

0402

L7390

2

55

55

5%

0

MF-LF

1

402

2

R7320NO STUFF

1/16W

NO STUFFR73211

5%

402

1/16W

2

MF-LF

0

1

5%

402

0R7322

2

1/16WMF-LF

NO STUFF

1/16W

0

MF-LF

R7391

402

21

5%

C73575%

CERM

100PF50V

NO STUFF

402

1

2

NO STUFF

CERM 2

C7306

50V5%

100PF

402

1

3

4

6

9

10

1

5

2

8

OMIT

7

F-RT-THAUDIO-INJ7350CRITICAL

SM21

XW7305

2

1

3

4

F-ST-SM88611-02001J7302CRITICAL

CRITICALJ7303

5F-ST-SM

6

1

2

3

4

88609-04001

CRITICAL

J730148227-0301

M-RT-SM14

2

3

1

5

0.047uF10%16VX7R402

C7307

2

1

X7R16V

0.047uF

2

1

402

10%

C7308

OMITCRITICALJ7300

8

10

9

6

7

1

5

4

3

2F-RT-TH

AUDIO-OUT

2

1 C73540.001uF10%50VCERM402

L7354

0402

1 2

FERR-1000-OHM

L7356FERR-1000-OHM

0402

1 2

1/16WMF-LF

10K

5%

1 2

R7350

402

MF-LF

5%1/16W

402

R73511 24.7

CERM

5%

402

100PF50V

C7355

2

1C7353100PF

5%50V

CERM402

1

2

5%50V

1 C7356100PF

4022 CERM2

5%

1 C7352100PF

402CERM50V

L7350

1

0402

2

FERR-220-OHM

0402

FERR-1000-OHML7355

1 2

FERR-1000-OHM

0402

1 2

L7353

L7352FERR-1000-OHM

0402

1 2

0402

1 2

FERR-1000-OHML7357

CRITICAL

0405

DZ735031

42

5.6V-15A

C7350

CERM6.3V

1UF

402

10%2

1

54

57

NO STUFF

1/16WMF-LF402

1

5%

02

R7380

57

57

57

54

57

57

0402-LF

FERR-120-OHM-1.5A1 2

L7301

FERR-1000-OHM

0402

L7304

21

FERR-1000-OHML7306

1 2

0402

57

57

5%1/16WMF-LF

1 2

R7300

402

10K

R73014.7

1/16WMF-LF402

5%

1 2C7304100PF

CERM50V5%

1

2402

C7305

50V

100PF5%

1

2 CERM402

100PF1

402

5%250V

CERM

C7302

1 CRITICAL NORMALCONN,3.5MM COMBO AUDIO OUT,RA,MG3,LF514-0290 J7300

1 CRITICAL514-0291 NORMALJ7350CONN,3.5MM COMBO AUDIO IN,RA,MG3,LF

CRITICAL1514-0318 CONN,3.5MM COMBO AUDIO IN,RA,BLACK,LF J7350 FANCY

1514-0317 FANCYJ7300CONN,3.5MM COMBO AUDIO OUT,RA,BLACK,LF CRITICAL

?518S0332518S0491 J7302 IMPROVED TWO PIN CONNECTOR

AUDIO: JACKSYNC_DATE=08/05/2006SYNC_MASTER=M42AUDIO

G051-7173

73 108

MIC_LO_CONN

AUD_CONNJ1_SLEEVE_F

AUD_SPDIF_OUT

CHASSIS_AUDIO_JACK_ISOL

AUD_CONNJ1_TIPDET

AUD_CONNJ1_SLEEVEDET

AUD_J1_COM

AUD_J2_OPT_OUT

PP3V3_S0_AUDIO_SPDIF

AUD_CONNJ2_SLEEVEDET

AUD_CONNJ2_TIP


AUD_CONNJ2_RING

AUD_CONNJ2_TIPDET

GND_AUDIO_SPDIF_DGND

AUD_CONNJ2_TIP_F

AUD_PORTF_R

AUD_CONNJ2_SLEEVE_F

AUD_CONNJ1_RING

AUD_J2_TIPDET_R

AUD_J2_SLEEVEDET_R

AUD_PORTF_L MIC_SHIELD

MIC_HI

MIC_LO

MIC_HI_F MIC_HI_CONN

MIC_SHIELD_F MIC_SHLD_CONN

MIC_LO_F MIC_LO_CONN




CHASSIS_AUDIO_JACK_ISOLAUDIO_SHIELD_PLANE

=GND_AUDIO_PWR

SPKRCONN_R_N_OUTSPKRCONN_R_P_OUTSPKRCONN_SUB_N_OUTSPKRCONN_SUB_P_OUT

SPKRCONN_L_N_OUTSPKRCONN_L_P_OUT

MIC_HI_CONNMIC_SHLD_CONN

SPKR_SHIELD


AUD_SPDIF_IN

AUD_CONNJ1_RING_F

AUD_CONNJ2_TIPDET_F

AUD_CONNJ2_RING_F

=GND_AUDIO_CODEC

AUD_CONNJ2_SLEEVEDET_F

AUD_CONNJ1_TIP_F

AUD_CONNJ1_SLEEVEDET_F

AUD_PORTA_L

AUD_J1_SLEEVEDET_R

=PP3V3_S0_AUDIO

AUD_PORTA_R

=GND_AUDIO_CODEC

AUD_J1_TIPDET_R

=GND_CHASSIS_AUDIO_JACK CHASSIS_AUDIO_JACK_ISOL

AUD_CONNJ1_TIPDET_F

AUD_CONNJ1_SLEEVEPP3V3_S0_AUDIO_SPDIF

AUD_J2_COM

AUD_CONNJ2_SLEEVE

GND_AUDIO_SPDIF_DGND

AUD_CONNJ1_TIP

64

64

57

57

56

64

56

64

55

57

55

56

56

56

56

56

56

56

56

56

56

56

56

55

56

56

56 54

54

54

6 56

56

56

OUT

OUT

OUT

G

D

S

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

OUT

IN

OUT

IN

IN

IN

G

D

S

G

D

S G

D

S

OUT

IN

G

D

S

G

D

SIN

IN

OUTR

CEXT

GND

INR

OUTL

SHDN*

INL

VCC

IN

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PORT G DETECTPORT F DETECTHP/LO DE-POP SWITCH APN:353S1459

MIC INPUT CIRCUITRY

PLACE C7452 NEAR U6800

PORT E DETECT(E TELLS H TO TURN ON)

PORT F :LINE IN (ADC 1)

NC

PORT B :MICROPHONE ON BOTH CH (ADC 0)

CD INPUT :UNUSED

PORT A :HEADPHONE/LINE OUT

PORT E :SW USES TO TRIGGER DIGITAL OUT

PORT F LI

PORT A HP/LO

NC

CODEC PORT ASSIGNMENTS

PORT D :UNUSED

PORT C :SPEAKER AMP

NC

UNUSED CODEC ANALOG PORT TERMINATIONS

PORT A DETECT

2

1

C74010.1UF

40210V20%

CERM

21

R7402

MF-LF

5%1/16W

402

47K

4.7R7430

2

5%

MF-LF603

1/10W

1

2

1/10WMF-LF

5%

4.7R74311

603

402

1 2

R74324.7

1/16W5%

MF-LF

R74331 2

402

5%

4.7

1/16WMF-LF

20%6.3V

B2

1 2

CRITICAL

100UFC7430

POLY

POLY

CRITICALC7431

1 2

B2

100UF

6.3V20%

2

1 C74410.1UF10%

CRITICAL

402X5R16V

C7447

2

1

16VX5R

10%0.1UF

CRITICAL

402

2

1C7440CRITICAL

10%

402X5R

0.1UF

16V

54

54

54

2

1C7446

16V

402X5R

10%0.1UF

CRITICAL

1

2

6

Q74002N7002DW-X-FSOT-363

2

1R7401

402

1/16W

470K5%

MF-LF

1/16W

R7435

MF-LF

47.0K

402

1%

1

2

R743447.0K

4022

1

1/16WMF-LF

1%

C7445

2

1

402X5R16V10%

CRITICAL

0.1UF

MF-LF402

1/16W1%47.0KR7436

2

1

R7437

2

1

MF-LF402

47.0K

1/16W1%

54

54

54

56

56

56

56

54

54

54

54 57

56

0.1UF20%

C7404

2

1

CERM10V

402

R7404

MF-LF

2

1

1/16W

5.11K

402

1% 1%5.11K

1/16W

R7414

MF-LF

2

1

402

402

1

2

20%

CERM10V

C74140.1UF

54

C74500.1uF

402

CRITICALX5R10% 16V

1 2

R7453

1/16W

0

MF-LF402

5%

1 2

NO STUFF

SMXW7400

1 2

R74540

MF-LF1/16W

5%

402

1 2

6.8K21

R7450

1/16W 5%MF-LF 402

5%1/16W

402MF-LF

100KR74521

2

330

1/16W 5%402MF-LF

R7451

1 2

C7451

CERM50V

0.001UF

402

10%

CRITICAL

2

1

56

56

56

CRITICAL

0.1UF

10VCERM402

20%

C74001

2

FERR-1000-OHML7400

21

0402

4

5

3

Q74002N7002DW-X-FSOT-363

Q74012N7002DW-X-F

4

5

3

SOT-3632N7002DW-X-FSOT-363

1

2

6

Q7401

R7406

1/16W1%

4022

1

39.2K

MF-LF

21

R7403

402

5%

MF-LF1/16W

100K

2

1R7461

1/16W5%

MF-LF402

270K

2

1 C74020.01UF10%16V

402CERM

54 57

56 57

NO STUFF

2

1R741520.0K

1/16W

402

1%

MF-LF

1

SOT-3632N7002DW-X-FQ7402

6

2

2

1R7413

1/16W

20.0K

MF-LF

1%

402

Q74022N7002DW-X-FSOT-363

4

5

3

C74110.1UF

2

1

40210V20%

CERM

1/16W

2

1R7411470K5%

MF-LF402

21

R7412

MF-LF

5%

402

47K

1/16W

56

56

NO STUFF

R74601

1/16W5%

2 402MF-LF

270K

2

1 C7412NO STUFF

0.01UF

CERM402

16V10%

R740539.2K

1

1%1/16W

2MF-LF402

2

1R7440

MF-LF402

1/16W5%20K

CRITICALC74323.3uF1 2

805-1CERM-X5R

10%10V

1 2

805-1

3.3uFC7433

CERM-X5R10V10%

CRITICAL

MAX9890U7400

CRITICAL

A3

C1

B3

C2

B1

A2

C3

A1

UCSP1

1

20%

2402

10VCERM

0.1UFC7435

MF-LF402

1 2

NO STUFF

5%

R7438

1/16W

0

1

2402

5%10K

R7439

1/16WMF-LF

5 21 54

54

NO STUFF1

2402

CRITICAL

C74520.001UF

CERM50V10%

10874

051-7173

SYNC_MASTER=M42AUDIO

G


AUDIO: JACK TRANSLATORS

AUD_J1_SLEEVEDET_INV

AUD_BI_PORT_B_LMAKE_BASE=TRUE

BAL_IN_R

AUD_SENSE_A

AUD_PORTG_DET_L

AUD_PORTF_L_R

AUD_SENSE_A

ACZ_RST_L

AUD_BI_PORT_F_L

MAX9890_INR

AUD_J2_SLEEVEDET_R

AUD_BI_PORT_A_L

AUD_PORTA_R_R

AUD_BI_PORT_F_R AUD_PORTF_R

AUD_BI_PORT_D_L

AUD_BI_PORT_E_R

AUD_BI_PORT_E_L

BAL_IN_L

BAL_IN_COM

=GND_AUDIO_CODEC

MIC_IN

MIC_LO

=GND_AUDIO_CODEC

AUD_PORTA_R

AUD_PORTA_L

AUD_SENSE_B

PP4V5_AUDIO_ANALOG

AUD_J1_SLEEVEDET_R

AUD_PORTE_DET_L

=GND_AUDIO_CODEC

PP3V3_S0_AUDIO_F

AUD_J1_TIPDET_R

PP3V3_S0_AUDIO_F

PP3V3_S0_AUDIO_F

AUD_J2_DET_RCAUD_J2_TIPDET_R

=GND_AUDIO_CODEC

PP3V3_S0_AUDIO_F=PP3V3_S0_AUDIO

AUD_J1_DET_RC

=GND_AUDIO_CODEC

AUD_INJACK_INSERT_L

MAX9890_INL AUD_PORTA_L_R

AUD_BI_PORT_B_R

AUD_VREF_PORT_B

MIC_SHIELD

=GND_AUDIO_CODEC

=GND_CHASSIS_AUDIO_MIC

MIC_HI

MAX9890_CEXT

AUD_PORTA_L_R

=GND_AUDIO_CODEC

AUD_PORTA_R_R

AUD_PORTF_L

=GND_AUDIO_CODEC

AUD_PORTF_R_R

AUD_GPIO_1

AUD_SENSE_B

=GND_AUDIO_CODEC

AUD_OUTJACK_INSERT_L

PP4V5_AUDIO_ANALOG

AUD_PORTA_DET_L

AUD_J1_SLEEVEDET_R

AUD_BI_PORT_A_R

=GND_AUDIO_CODEC

AUD_SENSE_B

64

64

64

64

64

64

64

64

64

64

57

57

57

57

57

57

57

57

57

57

56

56

56

56

64

56

56

56

56

56

56

57

55

55

57

57

55

55

56

55

55

55

55

57

55

57

57

55

54

54

57

54

54

54

54

54

57

57

57

54

57 54

54

57

54

54

54

6

57

54

57

54

54

54

54

56

54

TPADVSS

BOOT2

BOOT1

PHASE1

UGATE1

LGATE1

PGND1

ISEN1

UGATE2

PHASE2

LGATE2

PVCCVDDVIN

PGND2

VID6

VID5

VID4

VID2

VID3

VID1

VID0

ISEN2

VSUM

OCSET

VO

DROOP

DFB

VSEN

RTN

DPRSTP*

DPRSLPVR

PSI*

PGD_IN

3V3

CLK_EN*

PGOOD

VR_ON

NTC

VR_TT*

SOFT

RBIAS

VDIFF

FB2

FB

COMP

VW

NC

IN

IN

IN

OUT

IN

OUT

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE


TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM



TABLE_5_ITEM

TABLE_5_ITEM

(IMVP6_PHASE1)

MPC1055LR36

DCR=0.8mOHM

(IMVP6_VO)

(IMVP6_PHASE2)

Note 1: C7532,C7533 = 27.4 Ohm For Validating CPU Only.

FROM SMC

1-Phase DCM

1

DCR=0.8mOHM

MPC1055LR36

0

DPRSLPVR

0

0

0

1

1

DPRSTP*

0

0

PSI*

1

(IMVP6_ISEN1)

(GND)

(IMVP6_FB)

(IMVP6_VSUM)

(IMVP6_ISEN2)

MIN_NECK_WIDTH

MIN_NECK_WIDTHMIN_LINE_WIDTH MIN_NECK_WIDTHMIN_LINE_WIDTH

ERT-J1VR103J

(IMVP6_VO)

MIN_LINE_WIDTH

IMVP6 CPU VCORE REGULATOR

(IMVP6_COMP)

(IMVP6_VW)

R0802/R0803 **on the CPU page** protect the IMVP6 if the CPU is not installed

1

1

ERT-J0EV474J

36A MAX CURRENT1-Phase DCM

(GND)

1-Phase CCM

2-Phase CCM

Operation Mode

1

50VCERM402

10%0.0022UFC7500

2

NO STUFF

R7503

805

5%1

1/8WMF-LF

NO STUFF1

2

2

C7512

10%

402CERM

25V

0.0047UF

NO STUFF

1

SM

OMIT

XW7500 1

2

402

10%

NO STUFF

CERM

0.0022UFC75901

2 50V

1%1/16W

402MF-LF

10KR7500

1 2

1/16W1%3.65KR75011

2 402MF-LF

41

CRITICAL

U7500ISL6262-SCRN

QFN

25

9

10

11

12

13

4

7

5

6

44

1

47

48

3

2

45

46

15

14

17

16

18

8

19

23

37

38

40

39

42

43

29

20 22 31

30

28

27

24

33

32

35

34

36

26

21 49

OMIT

402

6.3V

0.22uF

CERM-X5R

10%

C7515

2

1

402MF-LF1/16W1%11.5KR7516

2

1

Q7501HAT2165HLFPAK

CRITICAL

4

321

5 Q7504CRITICAL

HAT2165HLFPAK

5

4

1 2 3

32

4

5

1

LFPAK

HAT2168HQ7500CRITICAL

R751511K

1/16WMF-LF402

1%

1

2

4

321

5

Q7502HAT2168H

CRITICAL

LFPAK

402MF-LF

1%1/16W

10KR7505

1 2

402CERM-X5R6.3V10%

0.22uFC7504

1 2

MF-LF402

1/16W1%3.65KR75431

2

SM0.36uH-30A-0.80mOhmL7501

1 2

CRITICAL

L75000.36uH-30A-0.80mOhmSM

1 2

CRITICAL

0.0047UF10%

402CERM

25V

NO STUFF

C75111

2

Q7503

LFPAK

5

4

1 2 3

HAT2165H

CRITICAL

NO STUFFR7502

1/8W5%1

MF-LF805

1

2

402

50V

CERM

10%

0.0022UFC75021

2

NO STUFF

Q7505HAT2165H

CRITICAL

LFPAK

5

4

1 2 3

0.0022UF

402CERM50V

NO STUFF1

2

C7592

10%

402

6.3V

0.22uF

CERM-X5R

10%

C75271

2

402MF-LF1/16W5%10R7520

1 2

R75125%

402MF-LF

1 2

101/16W

16V

1uF10%

X5R603

C75261

2

0.01UF

402CERM16V10%

C75961

2

MF-LF1/16W5%10

402

R7521

1 2

10%16VX5R402

0.1uFC7530

1

2

NO STUFF

402MF-LF1/16W1%2.0KR7513

1 2

402MF-LF1/16W1%1.82KR75091

2

2 402MF-LF1/16W1%1.40KR75111

402X5R16V10%0.033UFC75141

2

1%

402MF-LF1/16W

61.9KR75141

2

C7513

402CERM50V10%390pF

1

2

402CERM

C75071

2

47PF5%50V

4.42K

402MF-LF1/16W1%

R75101

2

402

1/16WMF-LF

21

1%5.11KR7517

1/16W

2

1%

402MF-LF

1KR75181 C7529

180pF

CERM402

50V

5%

1

2

C75280.33uF

402CERM-X5R6.3V10%

1

2

0.068UF10%

C7531

10VCERM402

1 2

NO STUFF

CERM402

16V10%

0.01UFC7532

1 2

402X7R16V10%

0.018UFC7533

1 2

402MF-LF1/16W5%0R75221

2

MF-LF402

1/16W5%0R75231

2

10%

402X5R16V

0.033UFC75341

2

C7535

603CERM6.3V20%4.7uF

1

2

SMB

D7500

1

2

B340LBXF

CRITICAL

B340LBXF

CRITICAL

SMB

D7501

1

2

1/16W

499R7519

MF-LF402

1%

1

2

1 2402MF-LF1/16W1%4.02K

NO STUFFR7527

NO STUFFC7510

402CERM16V10%

0.01uF

1 2

0.015uF

21

402X7R16V10%

C7505R7508

402MF-LF1/16W

1 2

147K1%

402CERM50V10%470pFC75061

2

NO STUFF

C75160.001uF10%

50V

CERM402

1

2

1

2402

R7530

1%1/16WMF-LF

3.92K

CERM-X5R402

6.3V10%

0.22uFC7521

1 2

0.22uFC7503

CERM-X5R

10%6.3V

402

1 2

5%11/16WMF-LF402

R7504

1 2

402MF-LF1/16W5%1R7507

1 2

0603-LF

1

2

10KOHM-5%

R7531

499

402

1%

R75451

2

1/16WMF-LF

470KR7526NO STUFF

1 2

402

2

R7525

1

402MF-LF1/16W5%0

402MF-LF1/16W5%

1 2

0R7524

MF-LF

R7506

402

1/16W

NO STUFF

21

5%0

33UF20%

1

2CASED2E-SMPOLY16V

CRITICALC7509

CASED2E-SM

C75171

2

33UF16VPOLY

20%

CRITICAL

CRITICAL

POLY16V20%

C750133UF

CASED2E-SM2

1 1

2CASED2E-SM

33UF16VPOLY

20%

C7508CRITICAL

C75181

2

10%

X5R603

16V

1uF

6032

11uF10%

C7599

16VX5R

U7500 M42ISL62621353S1465

U7500 M42AISL95041353S1461

SYNC_MASTER=POWER

75 108

051-7173 G


IMVP6 CPU VCore Regulator

128S0093 128S0092 KEMET T520V336M016ATE0457650? C7501,C7508

128S0093 ?128S0092 KEMET T520V336M016ATE0457650C7509,C7517

PP3V3_S0_IMVP6_3V3


IMVP6_BOOT1

IMVP6_BOOT2

IMVP6_BOOT2_RC

IMVP6_BOOT1_RC

IMVP6_UGATE2=PPVIN_S5_IMVP6

IMVP6_ISEN1

0.25 MM 0.25 MMIMVP6_RTN

IMVP6_COMP 0.25 MM 0.20 MM

IMVP6_VSEN 0.25 MM 0.25 MM

0.25 MMIMVP6_FB2 0.20 MM

IMVP6_FET_RC2

IMVP6_OCSET

IMVP6_VO_RIMVP6_VSEN

IMVP6_DFB

IMVP6_NTC

GND_IMVP6_SGND

1V51V05S0_PGOOD

CPU_PSI_L

IMVP_DPRSLPVR

IMVP6_COMP

IMVP6_VW

IMVP6_FB

IMVP6_NTC_R

CPU_VID_R<2>

CPU_VID_R<0>

IMVP6_FET_RC1

IMVP6_PHASE1 0.25 MM1.5 MM

0.25 MMIMVP6_FET_RC2 0.25 MM

=PP3V3_S0_IMVP6

CPU_DPRSTP_L

0.25 MMIMVP6_UGATE2 0.25 MM

0.25 MM0.25 MMIMVP6_VO_R2

0.25 MM 0.20 MMIMVP6_DROOP

IMVP6_VO_R1 0.25 MM 0.25 MM

0.25 MM 0.20 MMCPU_VID_R<0..6>IMVP6_VSUM 0.25 MM 0.20 MM

GND_IMVP6_SGND 0.50 MM 0.20 MM

0.25 MMIMVP6_VO 0.20 MM

IMVP6_RBIAS 0.25 MM 0.20 MM

0.25 MMIMVP6_VDIFF 0.20 MM

IMVP6_SOFT 0.25 MM 0.20 MM

CPU_VCCSENSE_P

IMVP6_COMP_RC

IMVP6_VDIFF_RC

0.25 MM0.25 MMIMVP6_BOOT1

IMVP6_DFB 0.25 MM 0.20 MM

IMVP6_FET_RC1 0.25 MM 0.25 MM

IMVP6_UGATE1 1.5 MM 0.25 MM

IMVP6_LGATE1 0.25 MM1.5 MM

IMVP6_VSUM_R1 0.25 MM 0.25 MM

IMVP6_ISEN1 0.25 MM 0.25 MM

0.25 MMIMVP6_BOOT2 0.25 MM

CPU_VID_R<1>

IMVP6_LGATE2 0.25 MM 0.25 MM

0.25 MMIMVP6_PHASE2 0.25 MM

IMVP6_FB2

CPU_VID_R<5>

CPU_VID_R<6>

CPU_VCCSENSE_N

=PPVIN_S5_IMVP6

PM_DPRSLPVR

CPU_VID_R<4>

CPU_VID_R<3>

CPU_PROCHOT_L

IMVP6_SOFT

IMVP6_RBIAS

IMVP6_VDIFF

0.25 MM 0.20 MMIMVP6_OCSET

IMVP6_FB 0.25 MM 0.20 MM

0.25 MM 0.25 MMIMVP6_VW0.25 MM 0.25 MMCPU_VCCSENSE_P0.25 MM 0.25 MMCPU_VCCSENSE_N

0.25 MM 0.25 MMIMVP6_VSUM_R2

IMVP6_ISEN2 0.25 MM 0.25 MM

IMVP6_VR_TT

VR_PWRGOOD_DELAY

IMVP_VR_ON

VR_PWRGD_CK410_L

IMVP6_DROOP

IMVP6_LGATE1

=PPVOUT_S0_IMVP6_REG

=PPVIN_S5_IMVP6=PP5V_S0_IMVP6

PP5V_S0_IMVP6_VDDMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.25 MM

VOLTAGE=5V

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.25 MMPPVIN_S5_IMVP6_VIN

GND_IMVP6_SGND

IMVP6_RTN

IMVP6_VO

IMVP6_VSUM

IMVP6_ISEN2

IMVP6_LGATE2

IMVP6_PHASE2

IMVP6_UGATE1

IMVP6_PHASE1

64

64

64

58

58

63

58

58

58

21

58

58

58

58

58

58

58

58

58

58

23

58

58

46

58

58

58

26

58

58

58

58

58

58

48

58

58

5

58

58

58

58

58

58

58

62

7

5

58

58

9

9

58

58

58

64

7

58

48

9

58

58

48

5

58

58

8

58

58

58

58

58

58

58

9

58

58

58

9

9

8

48

14

9

9

7

58

5

58

58

58

58

8

8

58

14

45

26

48

58

64

48 64

58

58

48

58

58

58

58

58

58

NC4

NC3

NC2

NC1

EXTVCC

FCB

INTVCC

PGOOD

3_3VOUT

RUN_SS2

ITH2

RUN_SS1

ITH1

SW1

TG1

BOOST1

BG1

PLLIN

SENSE1+

SENSE1-

VOSENSE1

BOOST2

TG2

BG2

SW2

PLLFLTR

SENSE2+

VOSENSE2

SENSE2-

THRML_PAD

SGND

PGND

VIN

JUMPER JUMPER

TABLE_ALT_ITEM

TABLE_ALT_ITEM


TABLE_ALT_HEAD


QTY DESCRIPTIONPART#TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_ALT_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

5V/3.3V POWER SUPPLY

<Rc>

<Rd>

Vout = 0.8V * (1 + Rc / Rd)

5A MAX CURRENT

NC

<Ra>

NC

NC

4A MAX CURRENT

NC

NC

<Rb>NC

IHLP2525/4.2UHDCR=32 MOHM

Vout = 0.8V * (1 + Ra / Rb)

DCR=40 mOHMIHLP2525/4.7uH

1

SOD-323CMDSH-3D7624CRITICAL

2

402CERM

10%6.3V

1

2

C76051uF

0.01uF

CERM402

C76071

2 16V10%

R7630

MF-LF402

1/16W

1M1

2

5%

10%16VX5R402

2

1

0.1uFC7630R7625

402

1

2MF-LF

1%10K1/16W

CERM402

1

0.001uF50V210%

C7625

4022

1

CERM

5%25V

220PFC7626

2 402

1%101/16W

R76001

MF-LF

1uFC7600

X5R

10%16V

1

2603

7

18

17

4

20

5

10

16

29

32

19

27

23

28 13

11

6

25 15

26 14

33

23

1 9

8

31

21

22

30 12

QFN

CRITICALU7600

LTC3728LXC

24

1

2SOD-323CMDSH-3D7664CRITICAL

1

2

402CERM50V5%180PFC7629R7627

1%

402

1/16W

1

2MF-LF

63.4K

50V

1

2 10%

CERM402

C76280.001uF

NO STUFF

402

1

2

R762820.0K1/16WMF-LF

1%

MF-LF

1%

402

1/16W

1

2

R760330.1K

1/16W

5.62K1%

MF-LF402

R76041

2

0.01uF10%16VCERM402

C76041

2

01/16WMF-LF

1

402

5%

R7624

2

2

1

SMC-LF

150uF20%6.3VPOLY

C7692CRITICALCRITICAL

CERM-X5R805

22UFC7690

6.3V20%

1

2

10%

402X5R

1

2 16V

0.1uFC7624

402

50V

NO STUFFC7621

10.001UF

CERM

10%

2

SM

1 2

XW7600

1%

1

2 402MF-LF1/16W

3.32KR7626

10%16V

2 1

402

0.1uF

X5R

C7631

402

21

R7629

MF-LF1/16W

1.5K1%

C762210%0.001uF

12

50V

402CERM

1M

402MF-LF

R7670

1/16W5%

1

2

1

2.74K

2402

1%

MF-LF1/16W

R7666CERM-X5R

C7632

2 1

10%6.3V

402

0.22UF

R7669

MF-LF402

1/16W1%

21

976

C7662

CERM

2

50V

1

10%0.001uF

402

5%

R7664

MF-LF

1

01/16W

2402

2

10%16V

1

402X5R

0.1uFC7664

1/16WMF-LF402

1

2

1%20.0KR7665

10%16V

1

2X5R402

0.1uFC7670

CERM

1

2

0.001UF

402

C7665

50V10%

5%50V

1

2 CERM

C7666100PF

402

10%50V

402

1C7661

2CERM

0.001uF

NO STUFF

1

2402

1/16WMF-LF

1%105KR7667

402

1/16WMF-LF

1%

1

2

20.0KR7668

0.001UF2

1C7668

CERM50V10%

NO STUFF

402

C7669180PF5%50VCERM402

2

1

CERM

4.7UF

603

20%6.3V

1

2

C760110%

2 CERM

1uF6.3V

402

C760211

2402MF-LF1/16W5%0R76065V3V3S3_SKIP

05%1/16WMF-LF402

5V3V3S3_CONTR76071

2

XW7620

1 2OPEN-SAWTOOTH

1 2

XW7660OPEN-SAWTOOTH

402

5%

1

2 CERM25V

220PFC7689

CRITICAL

CERM-X5R

C765122UF20%

805

6.3V

1

2

C7652CRITICAL

6.3V2

1

POLY

20%

SMC-LF

150uF

I629

402

1%1/16W

R7661

MF-LF

21

715

2 1

CERM-X5R

10%

402

6.3V

C76080.22UF

402

1%

21

MF-LF1/16W

1.02KR7621 C7609

10%

X5R16V

402

2 1

0.1uF

CRITICALL76804.2UHSM

21

L7620CRITICAL

L812HW

OMIT

4.7UH-6.5A

1

2CASED2E-SM

33UF

CRITICAL

POLY

20%

C7640

16V POLY

20%

CRITICAL

33UF16V

C7680

CASED2E-SM2

1

10%1uF

1

2

C7681

X5R16V

603

C76411

2 X5R

10%16V

603

1uF

5

3 12

4PWRFLT-3P3X3P3STL8NH3LLQ7620CRITICALOMIT

PWRFLT-3P3X3P3

2 13

4

5

STL8NH3LLQ7621CRITICALOMIT

PWRFLT-3P3X3P3

21 3

4

5

OMITCRITICALQ7660STL8NH3LL

21 3

5

4

OMITCRITICALQ7661STL8NH3LLPWRFLT-3P3X3P3

C7650

CRITICAL

CERM-X5R

22UF20%

805

6.3V

C7691CRITICAL

CERM-X5R805

22UF6.3V20%

KEMET T520V336M016ATE0457650128S0093 ?128S0092 C7680,C7640

Q7660,Q7661 VISHAY SI7806ADN376S0448 ?376S0445

3V3_IND_3MM4.7UH,+/-20%,40mOHM,3mm152S0133 1 L7620

3V3_IND_2MM84.7UH,+/-20%,40mOHM,2.8mm1 L7620152S0365

FET_FDN6296376S0445 Q7620,Q7621,Q7660,Q76614 FAIRCHILD FDM6296

Q7620,Q7621376S0445 ?376S0448 VISHAY SI7806ADN

051-7173

10876

G


5V / 3.3V Power SupplySYNC_MASTER=POWER


VOLTAGE=5VMIN_LINE_WIDTH=0.6 mm

PP5V_S5_REG_PMIN_LINE_WIDTH=0.6 mmVOLTAGE=3.3V

MIN_NECK_WIDTH=0.25 mmPP3V3_S5_REG_P

=PPVIN_S5_5V3V3S5

5VS5_BOOST_RCMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm


5VS5_TG


5VS5_BOOST

5VS5_SNS_NMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm

GND_5V3V3S5_SGNDMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mmVOLTAGE=0V

5V3V3S5_PGOODMAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 mmVOLTAGE=5V

PP5V_S5_5V3V3S5_INTVCC


5VS5_ITH

VOLTAGE=12VPPVIN_S5_5V3V3S5_R


3V3S5_ITH


5VS5_BG

PP5V_S5_REG_P


3V3S5_BOOST

5VS5_ITH_RC3V3S5_ITH_RC

RSMRST_PWRGD

5V3V3S5_FCB 5V3V3S5_FSEL

5V3V3S5_FSEL

5V3V3S5_FCB

=PP3V3_S5_REG

5VS5_RUNSS

=PP5V_S5_REG


5VS5_SW


5VS5_SNS_PMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm

3V3S5_RUNSS

3V3S5_VOSNS


3V3S5_BG

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm3V3S5_SNS_P

3V3S5_TG


3V3S5_BOOST_RCMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm


3V3S5_SW


MIN_LINE_WIDTH=0.6 mm3V3S5_SNS_N


5VS5_VOSNS

64

46

59

63

59

59

45

59 59

59

59

64 64

59

63

59

GND

OUT1IN1

IN0

EN FB

PAD

OUT0

NC0

NC2

NC1

THRML

GND

IN OUT

BPSHDN_L

GND

IN OUT

BPSHDN_L

G

D

S

G

D

S

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

S5 ON BATT FALSE (0V) FALSE (0V)

TRUE (PBUS 12.6V)

FALSE (0V)

TRUE (PBUS 12.6V)

FWPWR_EN_L

FALSE (0V)

YUKON POWER CONTROL 2.5V REGULATORS

0.5A MAX CURRENT

S0 OR S3 ON AC

S5 ON AC

TRUE (3.3V)

TRUE (3.3V)

NAME

FALSE (0V)

TRUE (3.3V)

FALSE (0V)

FALSE (0V)

POWER YUKON

PM_SLP_S3BATT ENETPWR_EN

NCNC

Vout = 0.5V * (1 + Ra / Rb)

<Rb>

NC

<Ra>

0.3A MAX CURRENT

0.3A MAX CURRENT

PM_SLP_S4_L

1.2V REGULATORS3 | S0 LOGIC

FALSE (0V)

~S0 | ~SMC_PS_ON

S3 ON BATTERY TRUE (PBUS 12.6V)

TRUE (PBUS 12.6V)

TRUE (PBUS 12.6V)

NOTE: IF CHANGE TO STUFFING R7753 THEN ENETPWR_EN IS BUFFERED PM_SLP_S4_L

Q7750 HAS A BUILT-IN BODY DIODE

11

9

8

10

5

4

3

2

6

71

U7720MAX8516

CRITICAL

SOP

2

1 C772010%1uF6.3VCERM402

2

1 C77214.7UF20%6.3VCERM603

R77205.11K1/16WMF-LF4022

1

1%

2

1 R7721

1/16W

3.65K

402MF-LF

1%

2

1 C770020%6.3V

603CERM

4.7uFC7701

2

1

CERM402

16V10%0.01uF

2

1 C7702

6.3VCERM603

20%4.7uF

2

1 C7705

6.3VCERM

20%

603

4.7uF

16V2

1 C77040.01uF

402CERM

10%2

1 C7703

CERM

4.7uF

603

6.3V20%

3

51

2

4

U7700CRITICAL

MAX8887SOT23-5

CRITICAL

MAX8887

3

51

2

4

U7701SOT23-5

Q7750SOT-3632N7002DW-X-F

6

2

1

SOT-363

Q77505

3

4

2N7002DW-X-F

MF-LF1/16W5%470KR7751

4022

1

MF-LF1/16W5%470KR7750

4022

1

1 2

402

R77520

1/16WMF-LF

5%

NOSTUFF

MF-LF1/16W5%

0R7753

402

21

4022

1 C77500.0022UF10%50VCERM

051-7173

10877

SYNC_MASTER=ENET

G


2.5V/1.2V Regulator

PM_SLP_S3BATT

ENETPWR_EN

=PP3V3_S3_2V5S3

VOLTAGE=2.5V


=PP2V5_S0_REG

MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=2.5V

=PP2V5_S3_REG

ENETPWR_EN

=PP1V8_S3_1V2S3

=PP3V3_S0_2V5S0

1V2_FB

=PP1V2_S3_REG

2V5S3_BP

2V5S0_BP

FWPWR_EN_L

ENETPWR_EN

=PP3V3_S3_2V5S3

PM_SLP_S4_L

FWPWR_EN_L_R

=PPBUS_S5_YUKON_CTRL

63 61

64

64

64

64

45

60

60

63

64

60

64

64

63

39

60

60

23

64

PGND

PHASE

UG

LG

PVCC

FCCM

EN

PGOOD

COMP

FSET

ISEN

FB

VO

BOOT

VIN

THRMLPAD

VCC

R1-

R1+ R2

V-

V+

+

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_ALT_ITEM

TABLE_ALT_ITEM


TABLE_ALT_HEAD


TABLE_ALT_HEAD

TABLE_ALT_ITEM

NC

NC

<Ra>

<Rb>

PLACE C7804 NEAR U7801 PIN 7

Placement Note:

8A MAX CURRENT

Vout = 0.6V * (1 + Ra / Rb)

PLACE RC CLOSE TO SMC

1.8V POWER SUPPLY

1/16W

2

1 R78211%4.02K

402MF-LF

2

1 R78222.0K1%1/16WMF-LF402

3

2 1

L78201.53uH

CRITICAL

SM

CRITICAL2

1

D7820SMBB340LBXF

1

R7810

MF-LF402

1/16W1%2.49K

2

C7801

2

1

603

16VX5R

1uF10%

4

ISL6269

8

1

2

14

17

12

15

16

10

11

9

7

3

6

5

13

U7800QFN

CRITICAL

5%22PF

402CERM50V

C78071

2

100K

402

1%

MF-LF1/16W

R78081

2

NO STUFF

R7804

2

1

5%1/16W

402MF-LF

0

402

0

2

1 R78055%1/16WMF-LF

2

1 R780657.6K1%1/16WMF-LF402

2

1 C78060.01UF16VCERM402

10%

CRITICAL

CERM-X5R805

22UF20%6.3V

C78401

2

SO-8IRF7821PBF

CRITICALQ7820

31

4

876

2

5

CRITICAL

321

4

8765

Q7821SO-8IRF7832PBF

C784220%

POLY

1

2

CRITICAL

CASE-D2E-LF

2.5V-ESR9V

330UF

CRITICALC7843

2.5V-ESR9V

CASE-D2E-LF2

1

330uF

POLY

20%

50V

0.0022UF

402CERM

10%

C78081

2

C78022.2UF

2

1

6.3V20%

CERM1603

6.3VCERM1

2.2UFC7800

6032

1

20%

XW780021

SM

NO STUFF

2

1C7810

CERM50V

0.001uF

402

10%

NO STUFFR7807

21

5%0

MF-LF402

1/16W

R7800

1/16WMF-LF

5%2.2

1 2

402

C7809

1

0.1uF

402X5R

10%16V

2

NO STUFF

2

1 R780105%

MF-LF402

1/16W

NO STUFF

0.0047uFC780310%25VCERM402

2

1

C783020%16VPOLYCASED2E-SM

2

1CRITICAL

33UF

603

C78311

2

16V

1uF10%

X5R

MF-LF

21

R78611005%

402

1/16W

20%0.22UF

402

2

1 C7805

6.3VX5R

MF-LF

21

402

1%1/16W

4.53KR7803

0.1UFC7804

X5R16V10%

2

1

402

INA326EA-250

CRITICALU7801MSOP

1

2

8

3

6

4

7

5

C7864

CERM50V

402

2

10%0.001UF

1

1/16W

R7863100K1%

2 402MF-LF

1

2.0K1%

6032

1

MF-LF1/10W

R78601206

1%1/4WMF-LF

1

0.005

2

R7802

C7841CRITICAL

CERM-X5R805

22UF20%6.3V

10878

051-7173

SYNC_MASTER=POWER

G


1.8V SupplyC7842,C7843128S0095 ?128S0060 PANASONIC EEFSX0D331XE

128S0094 128S0060 PANASONIC EEFSX0D331ERC7842,C7843?

128S0093 128S0092 ? KEMET T520V336M016ATE0457650C7830

=PP1V8_S3_REGVOLTAGE=1.8V


1V8S3_BOOT_RC

1V8S3_BOOT

=PP1V8_S3_MEM_NB_SENSE

MEM_ISENSE_VCC

1V8S3_UG


1V8S3_FCCM

=PPVIN_S5_1V8S3

=PP5V_S5_1V8S3


1V8S3_LG

1V8S3_FB

MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm1V8S3_PHASE

PP1V8_S3_R

1V8S3_COMP_R

MEM_ISENSE_R2

PM_SLP_S4_L

GND_SMC_AVSS

MEM_ISENSE_R1_N

MEM_ISENSE_R1_P

SMC_MEM_ISENSE

=PP1V8_S3_MEM_NB

1V8S3_VCC

GND_1V8S3_SGND

1V8S3_COMP

=PP3V3_S3_PDCISENS

1V8S3_ISEN

1V8S3_FSET

MEM_ISENSE

GND_1V8S3_SGND

64

66

29

63

62

28

60

48

19

45

46

46

16

64

64

64

64

23

45

45

14

61

5

64

5

61

JUMPER

R1-

R1+ R2

V-

V+

+

NC4

NC3

NC2

NC1

EXTVCC

FCB

INTVCC

PGOOD

3_3VOUT

RUN_SS2

ITH2

RUN_SS1

ITH1

SW1

TG1

BOOST1

BG1

PLLIN

SENSE1+

SENSE1-

VOSENSE1

BOOST2

TG2

BG2

SW2

PLLFLTR

SENSE2+

VOSENSE2

SENSE2-

THRML_PAD

SGND

PGND

VIN

TABLE_ALT_ITEM

TABLE_ALT_ITEM


TABLE_ALT_HEAD

TABLE_ALT_ITEM


TABLE_ALT_HEAD

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

DCR=6.3 mOHM

<Rb>

Vout = 0.8V * (1 + Ra / Rb)


PLACE C7903 NEAR U7901 PIN 7

DCR=10.7 mOhm

NC

<Rd>

NC

PCI-1050

NCNC

NCNC

<Rc>

<Ra>

8A MAX CURRENT

Placement Note:

1.5V/1.05V POWER SUPPLY

Vout = 0.8V * (1 + Rc / Rd)

D104C/2.8uH

6A MAX CURRENT

2

1 R790110K5%1/16WMF-LF402

R79692.1K

21

1/16W1%

MF-LF402

21

L7920SM2.8UH

CRITICAL

XW792021

OPEN-SAWTOOTH

2

1 C7989220PF5%25VCERM402

50V

C7962

2 1

0.001uF

CERM402

10%

CRITICAL

CERM-X5R

C795020%6.3V

22UF

8052

11

CASE-D2E-LF2POLY

2.5V-ESR9V20%330UFC7952CRITICAL

21

R7961

1/16WMF-LF

1%

402

523

2 1

C790810%

402

0.22UF6.3VCERM-X5R1%

1.07K

21

R7921

402MF-LF1/16W

C7909

2 1

0.22uF6.3VCERM-X5R

10%

402

20%

POLY16V

CRITICALC794033UF

CASED2E-SM2

1

16VPOLY

20%

CRITICALC798033UF

CASED2E-SM2

1

603

16V

1uF10%

X5R2

1 C7981

2

1 R7900

1/16W1%10

402MF-LF

1

2 603

16V10%

X5R

1uFC7941

1

2

402

0.22UF20%6.3VX5R

C7906R79054.53K

1

402MF-LF1/16W

2

1%

1/16WMF-LF

1

1005%

2

R7990

402

C7903

X5R 2

1

402

0.1UF

16V10%

1

2

8

3

6

4

7

5MSOPINA326EA-250U7901CRITICAL

402CERM

1

250V10%

C79990.001UF

1

MF-LF4022

100K1/16W1%

R7991

CRITICAL

CERM-X5R

C7991

805

22UF20%

1

6.3V2

CRITICAL

8052 6.3V

1 C799022UF20%

CERM-X5R

1 2

R7902

1206MF-LF1/4W1%0.002

R79922.0K1%1/10W

6032

1

MF-LF

D7924

2

1

SOD-323CMDSH-3

CRITICAL

C7922

2 1

CERM50V

0.001uF

402

10%

CRITICALC7992330UF2.5V-ESR9V2

1

POLY

20%

CASE-D2E-LF

1/16W1%6.34KR7967

2

1

MF-LF402

R796820.0K

MF-LF2

1

1%1/16W

402

CRITICAL

2

3

L7960

1

SM1.53uH

D7961CRITICAL

B240-X-F

2

1SMB

IRF7821PBF

321

4

8765

Q7960CRITICAL

SO-8

321

4

8765 Q7961CRITICAL

IRF7832PBFSO-8

0.001uFC7961

2

1

CERM

NO STUFF

50V

402

10%

0.0022UFC7969

2

1

CERM50V

402

10%

2

1C7968NO STUFF

CERM50V

0.001uF

402

10%

X5R16V10%0.1uFC7964

2

1

402

2

1R79645%

MF-LF402

1/16W

0

2 50V

1 C7966

402CERM

5%47PF

2

1 C7965

CERM

10%330PF50V

402

2

1 R7965

402

1/16WMF-LF

1%33.2K

2

1 C79040.01uF10%16VCERM402

2 1

C793210%6.3VCERM-X5R402

0.22UF

2

1 R790330.1K1%1/16WMF-LF402

2

1 R79045.62K1%1/16WMF-LF402

1M

2MF-LF402

1/16W5%

1R797010%1uFC7900

2

1

X5R603

16V

2

1C7970

402X5R

0.1uF10%16V

21

XW7900SM

R79301M

MF-LF402

1/16W

2

1

5%

2

1

05%1/16WMF-LF402

R7924

MF-LF2

1R7966

402

1/16W1%698

3

U7900

91

23

33

1426

1525

6

11

12

31

30

1328

2

27

19

32

29

16

10

85

20

4

21

1724

1822

7

CRITICAL

LTC3728LXCQFN

0.1uF

2

1 C7930

402

10%16VX5R

24.3K

2

1 R7925

MF-LF1/16W1%

402

1V51V05S0_SKIP

2

1

R790605%1/16WMF-LF402

2

1R79071V51V05S0_CONT

05%1/16WMF-LF402

CERM

2

1

C790510%1uF

402

6.3V

2

1 C7925470pF

50VCERM402

10%

2

1 R79261.43K

402

1%1/16WMF-LF

21

R79294.53K

MF-LF402

1/16W1%

2 1

C79310.22uF

402

6.3V10%

CERM-X5R

2

1 C7924

16V

402

0.1uF10%

X5R

3 2 1

4

8 7 6 5

Q7920IRF7821PBF

CRITICAL

SO-8

CERM

2

1

C7921

50V

NO STUFF

10%

402

0.001uF

3 2 1

4

8 7 6 5

Q7921CRITICAL

IRF7832PBFSO-8

2

1 C792647pF

CERM50V5%

402

CRITICAL2

1

D7921B240-X-FSMB

5%

CERM

C7929180PF

2

1

402

50V

NO STUFFC7928

2

1

CERM50V

0.001UF

402

10%

R7927

2

1

MF-LF1/16W1%17.8K

402

2

1 R7928

402MF-LF

20.0K1/16W1%

2

1 D7964CRITICAL

CMDSH-3SOD-323

C79014.7UF

2

1

CERM603

20%6.3V

C79021

2402CERM6.3V

1uF10%

2

1 C7907

402

0.01uF10%16VCERM

C7952,C7992?128S0060128S0095 PANASONIC EEFSX0D331XE

128S0060128S0094 C7952,C7992? PANASONIC EEFSX0D331ER

128S0092 ? KEMET T520V336M016ATE0457650128S0093 C7980,C7940

1.5V / 1.05V Power Supply

10879

051-7173


G

SYNC_MASTER=POWER

=PP1V05_S0_CPU_NB

PP1V5_S0_REG_P

VOLTAGE=1.5VMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm

=PP5V_1V51V05S0_VCC

GND_1V51V05S0_SGND

VOLTAGE=0VMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm


1V5S0_SNS_PMIN_LINE_WIDTH=0.6 mm


1V5S0_SNS_NMIN_LINE_WIDTH=0.6 mm

1V05S0_SNS_PMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm

1V05S0_VOSNS

PPVIN_S5_1V51V05S0_RVOLTAGE=12VMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm


PP5V_S5_1V51V05S0_INTVCCVOLTAGE=5V


1V5S0_VOSNS


1V05S0_BGMIN_LINE_WIDTH=0.6 mm


1V05S0_SWMIN_LINE_WIDTH=0.6 mm


1V05S0_SNS_NMIN_LINE_WIDTH=0.6 mm

1V5S0_RUNSS


1V5S0_SW

1V5S0_TG



=PPVIN_S5_1V51V05S0

1V51V05S0_FSEL

1V05S0_RUNSS


1V5S0_BOOST_RCMIN_LINE_WIDTH=0.6 mm

1V51V05S0_FCB


=PP1V5_S0_REG MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm

1V5S0_BOOST


1V05S0_ITH

1V5S0_ITH_RC

1V5S0_ITH

1V51V05S0_FSELMIN_NECK_WIDTH=0.25 mm

1V5S0_BGMIN_LINE_WIDTH=0.6 mm

1V05S0_ITH_RC

GND_SMC_AVSSNB_ISENSE_R1_P

SMC_NB_ISENSE

NB_ISENSE_VCC

NB_ISENSE_R2

=PP3V3_S0_PDCISENS

NB_ISENSE


1V05S0_BOOST_RC

1V05S0_TG



1V05S0_BOOST

1V51V05S0_PGOOD

=PP3V3_S0_1V51V05S0


=PP1V05_S0_REG

NB_ISENSE_R1_N

=PP1V05_S0_CPU_NB_SENSE

1V51V05S0_FCB

66 61 48

63

46

46

66

63

64

64

64

62

5

64

62

63

62

62

64

62

62

45

45

64

58

64

5

64

62

FB

BIAS

SWSHDN*

NC

VIN BOOST

GND

G

D

S

IN

THRML

V2V1

RST*

V3

V4

VADJ1

VADJ2

GND PAD

G

D

S

G

D

S

G

D

S

G

D

S

D S

G

G

D

S

G

D

S

G

D

SIN

G

D

S

G

D

S

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE


QTY DESCRIPTIONPART#TABLE_5_ITEM


TABLE_ALT_HEAD

TABLE_ALT_ITEM

LOADING

5V S0 FET

LOADING

ALL SYSTEM PWRGD CIRCUIT

65 mOhm @2.5VRDS(ON)

3.425V "G3Hot" SUPPLY

<Rb>

Vout = 1.25V * (1 + Ra / Rb)

Supply needs to guarantee 3.31V delivered to SMC VRef generator

3.3V S0 FET

CHANNEL

1.5V/1.05V S0 RUN/SS CONTROL

<Ra>

1 A

RDS(ON)

FDC638P

Sleep

(S5)

CHANNEL

MOSFET

RDS(ON) 15 mOhm @10V

15 mOhm @10V

STL8NH3LL

STL8NH3LL

N-TYPE

3 A

N-TYPE

2 A

RDS(ON)

RDS(ON)

LOADING

These rails are monitored by LTC2908

1 0

SMC_PM_G2_ENABLE

CHANNEL N-TYPE

0

MOSFET

CHANNEL

LOADING

MOSFET

NC

PM_SLP_S4_L PM_SLP_S3_L

1

0

0

0

1 1

1

0

State

(S0)

Run

Soft-Off

Battery Off

(G3Hot)

FDC638P

P-TYPE

100 mA

MOSFET

CHANNEL

LOADING

2N7002

1

P-TYPE

SI3447BDVMOSFET

320 mA

(S3)

P-TYPE

3.3V S3 FET

POWER CONTROL SIGNALS

72 mOhm @1.8V

MOSFET

Nothing

13.5 Ohm

LOADING

CHANNEL

RDS(ON)

1.8V S0 FET

5V/3.3V S5 RUN/SS CONTROL

1.2V S0 FET

5V S3 FET

48 mOhm @4.5V

CRITICAL

CERM-X5R

1

2805

22UF20%6.3V

C8093CERM

C809222pF

50V5%

402

1

2 MF-LF402

1%

1

2

1/16W

348KR8091

200K

MF-LF402

1%1/16W

R80921

2

33uHCDPH4D19F-SM

L8090

1 2

6.3V

0.22uF

CERM-X5R402

10%

C80911

2

TSOT23-8

CRITICAL

LT3470U8090

7

6

8

4

2

1 5

3

CRITICAL

X5R

10%25V

C80901

2

10UF

1206-1

FDC638PSM-LF

Q80001

2

5

6

3

4

CRITICAL

402CERM

10%50V

1 2

C80000.0022uF

SOT-3632N7002DW-X-FQ8059

3

5

4

CRITICAL

LLPLTC2908U8070

1

2

9

5 4

7

3

6

8

CERM10V20%

402

0.1UFC80611

2

1/16W1%

402MF-LF

549KR80651

2

MC74VHC1G08SC70

U80803

2

1

4

5

10V20%

CERM

0.1UFC80621

2402

SOT-363

Q80596

2

1

2N7002DW-X-F

2N7002SOT23-LF

Q80603

1

2

2N7002DW-X-FQ8030SOT-363

6

2

1

R8031100K

MF-LF402

5%1/16W

1 2

R8030100K

MF-LF402

5%1/16W

1

2

4

2N7002DW-X-FSOT-3635

Q80303

2N7002Q8063

2SOT23-LF 3

1

CRITICAL

FDC638PSM-LF

Q8010

1

2

5

6

3

4

402

10%16VCERM

0.01UFC8010

1 2

10%

C80050.1UF

21

25V

402X5R

10%25VX5R4021 2

0.1UFC8015

1

R8005

MF-LF402

5%

2

1/16W

10K

1/16WMF-LF

100K

402

5%

1 2

R8015

1/16W5%

402MF-LF

R80321 2

100K

R8033

402MF-LF

5%100K1/16W

1

2

1/16W5%

402MF-LF

100K1

2

R8056

1/16W5%

402MF-LF

470KR80571 2

Q80612N7002DW-X-FSOT-363

3

5

4470K1/16W5%

402MF-LF

R80591 2

Q80612N7002DW-X-FSOT-363

6

2

1

SOT23-LF2N7002Q8062

3

1

2

1/16W5%

402MF-LF

100KR80581

2

MF-LF402

1/16W1%100KR80641 2

1%1/16W

402MF-LF

1 2

124KR8063

68.1K

MF-LF402

1%1/16W

R80611 2

1%

MF-LF402

R80621 2

100K1/16W

0.1UF10V

402CERM

20%

C80601

2

10K

MF-LF402

5%1/16W

R80001 2

100K5%

1 2

R8010

1/16WMF-LF402

MF-LF

100KR80255%1/16W

402

1 22

100K

MF-LF402

5%1/16W

R80501

2N7002DW-X-FSOT-363

Q8031

6

2

1

Q80312N7002DW-X-FSOT-363

3

5

4

C80250.01UF

CERM402

10%16V

1 2

CRITICAL

Q8025SI3447BDVSOT-6

1

2

5

6

3

4

OMIT

5

4

2

3

1

PWRFLT-3P3X3P3STL8NH3LLQ8005CRITICAL

OMIT STL8NH3LL

4

3

2

1

5

PWRFLT-3P3X3P3

Q8015CRITICAL

SYNC_MASTER=ENET

G

80 108

051-7173


S3/S0 FETS, G3H SUPPLYFAIRCHILD FDM6296 Q8005,Q8015 FET_FDN6296376S0445 2

VISHAY SI7806ADNQ8005,Q8015?376S0445376S0448

=PP5V_S3_FET

S0PWRGD_1V2_DIV

PP1V2_S0

=PP3V3_S0_FET

=PP5V_S5_P5VS0

P5VS0_EN_RC

P1V8S0_EN_L_RC

=PP1V2_S3_REG

=P1V2S0_ENMAKE_BASE=TRUEPM_SLP_S3_LS12V6_L

=P3V3S0_EN

=PP3V3_S5_P3V3S0

=PPVIN_G3H_P3V42G3H

P3V42G3H_FB

=PP3V3_S3_FET

=PP3V3_S5_P3V3S3

=PP5V_S5_PWRCTL

PM_SLP_S3=PP3V42_G3H_PWRCTL

PM_SLP_S3_L

PM_SLP_S3_L

PM_SLP_S3_L

PM_SLP_S3_LS5VMAKE_BASE=TRUE

=P1V8S0_EN_L

=P5VS0_EN

=P3V3S3_EN_L

P5VS3_EN_L_RC

=PP5V_S5_P5VS3

=PP0V9_S0_MEM_REG

P3V42G3H5_BOOST

PP3V42G3H_SW

=PP5V_S5_PWRCTL

S0PWRGD_OK

PM_SLP_S3_LS12V6

=PPVIN_S5_5V3V3S5

=PP3V42_G3H_PWRCTL SMC_PM_G2_EN_L

1V05S0_RUNSS

=PP2V5_S0_REG

1V5S0_RUNSS

3V3S5_RUNSS

5VS5_RUNSS

PM_SLP_S4_L

ALL_SYS_PWRGD

1V51V05S0_PGOOD

PM_SLP_S4_LS5VMAKE_BASE=TRUE

P3V3S0_EN_RC

=P5VS3_EN_L

SMC_PM_G2_EN

=PP3V42_G3H_REG

=PP3V3_S0_ALLSYSPG

=PP5V_S0_FET

S0PWRGD_0V9_DIV

=PP1V8_S0_FET

=PP1V8_S3_P1V8S0

P3V3S3_EN_L_RC

61

63

63

63

60

45

64

64

64

45

45

45

64

64

64

64

64

62

59

45

26

62

64

64

64

60

64

64

5

64

64

63

48 63

23

23

23

64

31

63

59

63

62

60

5

59

5

23

5

58

45

64

64

64

64

64

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

(ETHERNET 3.3V PWR)

(BLUETOOTH 3.3V PWR)

(ACCELEROMETER 3.3V PWR)

(TPM 3.3V SUSPEND PWR)

(TPS62050 VIN)

(FIREWIRE CHIP PCI SIGNAL INDICATOR)

GND RAILS

(REGULATOR OUTPUT 2.5V PWR)

(REGULATOR OUTPUT CPU VCORE PWR)

(CPU VCORE PWR)


(DDR2 DIMM 1.8V PWR)

(MCH DDR2 1.8V PWR)

(COME FROM S5 TO S3 MOSFET)

(LDO OUTPUT 1.2V PWR)

(TMDS 5V PWR)

(LPC DEBUG BOARD 5V PWR)

(ENET 1.2V PWR)

(LTC3728LXC EXTVCC)

(MCH TV 3.3V LDO)

(LTC3728 VIN)

(LTC3728 VIN)

(ISL6262 VIN)

PBUS HOT

(SMC 3.3V PWR)

(SMC 32.768KHz OSC)

(LPC DEBUG BOARD)


(ICH SUSPEND PULLS 3.3V PWR)

(ICH SUSPEND USB 3.3V PWR)

(ISL6262 VDD)

(SYSTEM LED PWR)

(ISL6269 PVCC)


(REGULATOR OUTPUT 5 PWR)

(PATA 5V PWR)


(SPI BOOTROM PWR)

DCIN G3HOT

G3 HOT

(CHARGER INPUT 18.5V PWR)

(ICH INTEL HDA SUSPEND 3.3V PWR)


(ICH USB CTL PULLS 3.3V PWR)

(AUDIO 5V PWR)

(AUDIO SPEAKER 5V PWR)

(DDR2 TERMINATION)

(DDR2 TERMINATION REGULATOR 1.8V SWITCH PWR)

(FIREWIRE DIGITAL 3.3V PWR)

(TMDS 1.8V PWR)

(SATA 3.3V PWR)

(ICH IDE I/O 3.3V PWR)

(ICH PCI I/O 3.3V PWR)


(ICH GPIO PULLS 3.3V PWR)

(MCH HV BUFFER 3.3V PWR)

(TMDS 2.5V PWR)

(MCH H/V SYNC 2.5V PWR)

(MCH LVDS ANALOG 2.5V PWR)

(MCH CRTDAC ANALOG 2.5V PWR)

(MCH LVDS DATA/CLK TX 2.5V PWR)

(MCH PCIE/DMI BAND GAP 2.5V PWR)

(ICH PCI PULLS 3.3V PWR)

(ICH PM PULLS 3.3V PWR)

(PATA PULLS 3.3V PWR)

(MCH PULLS 3.3V PWR)

(ICH LAN I/F 3.3V PWR, NEED TO CHECK INTEL)

(ICH INTEL HDA CORE 3.3V PWR)

(DIMM SPD 3.3V PWR)

(CLOCK GENERATOR 3.3V PWR)

(ISL6262 3V3)

(WIRELESS CARD 3.3V PWR)

(TPM 3.3V PWR)

(AUDIO 3.3V PWR)

(TMDS 3.3V PWR)

(CPU THERMAL SENSOR 3.3V PWR)




(MCH 3GIO PLL 1.5V PWR)

(MCH TVDAC DEDICATED/QUIET PWR 1.5V)

(MCH 3GIO[PCIE/DMI] 1.5V PWR)

(MCH FSB 1.05V PWR)

(HOST/MEMORY PLL 1.5V PWR)

"S0" RAILS ONLY ON IN RUN

(MCH DDR DLL&IO, FSB HSIO&IO PWR 1.5V)

(MCH DIGITAL DIVIDER IN HMPLL 1.5V PWR)

(ICH CPU I/O 1.05V PWR)

(DDR2 TERMINATION 0.9V PWR)

(LDO OUTPUT 0.9V PWR)

(MCH CORE 1.05V PWR)

(WIRELESS CARD 1.5V PWR)

(ICH LOGIC&IO 1.5V PWR)

(ICH USB CORE 1.5V PWR)

(ICH USB PLL 1.5V PWR)

(ICH LOGIC&IO[ATX] 1.5V PWR)

(ICH SATA PLL 1.5V PWR)

(ICH LOGIC&IO[ARX] 1.5V PWR)

(MCH LVDS DIGITAL 1.5V PWR)

(MCH PCIE GRAPHICS O/P COMPENSATION 1.5V PWR)

(CPU AVDD 1.5V PWR)


(MCH FSB 1.05V PWR)

(CPU FSB 1.05V PWR)


(ICH VCORE 1.05V PWR)

(ICH PM 3.3V PWR)

(USB IR CONTROLLER 5V PWR)

(ENET 2.5V PWR)

(SATA 5V PWR)

ON IN RUN AND SLEEP"S3" RAILS

(INVERTER PBUS PWR)

(ISL6269 VIN)

(FIREWIRE PORT PBUS PWR)

(YUKON POWER CONTROL)

(DC-IN OUTPUT 18.5V PWR)

(SMC INPUT 18.5V PWR)

ALWAYS ON WHEN UNIT HAS AC POWER (TRICKLE)"S5" RAILS

(USB IO PORT 5V PWR)

21

XW8101SM

21

XW8102SM

Power Conn / Alias

051-7173 G


81 108

SYNC_MASTER=ENET

=PP3V3_S3_AIRPORT_AUX

=PP3V3_S3_BT

=PP2V5_S3_ENET

=PP3V3_S3_SMS

=PP3V3_S3_ENET=PP3V3_S3_SMBUS_SMC_RMT

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.25 mmVOLTAGE=2.5V


PP2V5_S3

=PP5V_S3_CAMERA

MAKE_BASE=TRUEPP3V3_S5

VOLTAGE=3.3VMIN_NECK_WIDTH=0.3MMMIN_LINE_WIDTH=0.6MM

=PP3V3_S5_SB=PP3V3_S5_SB_USB=PP3V3_S5_SB_PM=PP3V3_S5_SB_VCCSUS3_3=PP3V3_S5_SB_VCCSUS3_3_USB=PP3V3_S5_SB_IO=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA=PP3V3_S5_ROM=PP3V3_S5_P3V3S3

=PPVBATT_G3H=PPDCIN_G3H

=PPBUSB_G3H

=PPBUSA_G3H

=PP5V_S0_NB_TVDAC

=PP5V_S0_TMDS

=PP5V_S0_ISENSECAL

=PP1V8_S3_P1V8S0=PP1V8_S3_MEMVTT

=PP1V8_S3_1V2S3

MIN_NECK_WIDTH=0.4MMMIN_LINE_WIDTH=0.6MMMAKE_BASE=TRUEPP1V8_S3_MEM_NB

VOLTAGE=1.8V

=PP3V3_S0_TMDS

=PP3V3_S0_RSTBUF=PP3V3_S0_IMVP6=PP3V3_S0_THRM_SNR

=PP3V3_S0_AUDIO

=PP3V3_S0_AIRPORT=PP3V3_S0_CK410=PPSPD_S0_MEM


=PP3V3_S0_SMC_LS=PP3V3_S0_PATA=PP3V3_S0_SB_PM=PP3V3_S0_SB_PCI=PP3V3_S0_SB_VCC3_3_IDE=PP3V3_S0_SB_VCC3_3_PCI=PP3V3_S0_SB_VCC3_3

=PP2V5_S0_NB_DISP_PLL=PP2V5_S0_TMDS=PP2V5_S0_NB_CRTDAC=PP2V5_S0_NB_VCCA_LVDS=PP2V5_S0_NB_VCCA_3GBG=PP2V5_S0_NB_VCC_TXLVDS=PP2V5_S0_NB_VCCSYNC

=PP1V8_S0_TMDS

=PP1V5_S0_AIRPORT=PP1V5_S0_SB=PP1V5_S0_SB_VCC1_5_A=PP1V5_S0_SB_VCC1_5_A_USB_CORE=PP1V5_S0_SB_VCCUSBPLL=PP1V5_S0_SB_VCC1_5_A_ATX=PP1V5_S0_SB_VCCSATAPLL=PP1V5_S0_SB_VCC1_5_A_ARX=PP1V5_S0_NB_3GPLL=PP1V5_S0_NB_3G=PP1V5_S0_NB_TVDAC

=PP1V5_S0_NB_PLL

=PP1V5_S0_CPUVOLTAGE=1.5V

MAKE_BASE=TRUEPP1V5_S0MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.4MM

=PP1V05_S0_NB=PP1V05_S0_NB_VTT

VOLTAGE=1.05V

MIN_LINE_WIDTH=0.6MMMAKE_BASE=TRUEPP1V05_S0_CPU_NB


=PP1V05_S0_CPU_NB_SENSE

=PPVCORE_S0_NB=PP1V05_S0_CPU=PP1V05_S0_FSB_NB

VOLTAGE=18.5V

PP18V5_G3HMAKE_BASE=TRUEMIN_LINE_WIDTH=0.6 MMMIN_NECK_WIDTH=0.20 MM

=PPBUS_S5_FWPWRSW=PPVIN_S5_1V8S3=PPVIN_S5_5V3V3S5

PPBUSB_G3H


MAKE_BASE=TRUEMIN_LINE_WIDTH=0.6MM

VOLTAGE=12.6V

=PP5V_S0_FAN_RT

=PP5V_1V51V05S0_VCC

=PP5V_S0_LCD

VOLTAGE=1.2V

MAKE_BASE=TRUE


PP1V2_S3

PP5V_S0MAKE_BASE=TRUEMIN_LINE_WIDTH=0.30 MMMIN_NECK_WIDTH=0.20 MMVOLTAGE=5V

=PP2V5_S3_REG

=PP5V_S0_SB=PP5V_S0_FET

=PP5V_S3_FET

MAKE_BASE=TRUEPPVCORE_CPU_S0

VOLTAGE=0.9V


=PP1V05_S0_CPU_NB

MAKE_BASE=TRUEMIN_LINE_WIDTH=0.6MM

PP1V8_S0

MIN_NECK_WIDTH=0.4MMVOLTAGE=1.8V

=PP1V05_S0_REG

=PP0V9_S0_MEM_REG


=PP0V9_S0_MEM_TERM

=PPVCORE_S0_CPU

MAKE_BASE=TRUEPP0V9_S0

VOLTAGE=0.9V


=PP1V5_S0_REG


=PP1V5_S0_NB

=PP1V5_S0_NB_VCCD_HMPLL=PP1V5_S0_NB_VCCAUX=PP1V5_S0_NB_PCIE

=PP3V3_S0_FET

=PP2V5_S0_REG

=PP1V8_S0_FET

=PP3V3_S0_2V5S0

=PP3V3_S0_ENET=PP3V3_S0_FW

=PP3V3_S0_SMBUS_SMC_BSB=PP3V3_S0_1V51V05S0

=PP3V3_S0_CPUPOWER

=PP3V3_S0_PBATTISENS=PP3V3_S0_PDCISENS

=PP3V3_S0_LCD=PP3V3_S0_FAN_RT=PP3V3_S0_ALLSYSPG=PP3V3_S0_SMBUS_SMC_MLB=PP3V3_S0_SMBUS_SMC_0=PP3V3_S0_SMBUS_SB

=PP3V3_S0_TPM

=PP3V3_S0_NB


=PP3V3_S0_SB_GPIO=PP3V3_S0_SB=PP3V3_S0_NB_VCC_HV

PP3V3_S0MAKE_BASE=TRUEMIN_LINE_WIDTH=0.30MMMIN_NECK_WIDTH=0.20MMVOLTAGE=3.3V

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmMAKE_BASE=TRUEPP2V5_S0

VOLTAGE=2.5V

=PP5V_S0_LPCPLUS=PP5V_S0_AUDIO_PWR

=PP5V_S0_MEMVTT=PP5V_S0_SATA

=PP3V3_S5_FWLATEVG

=PP3V42_G3H_SMC=PP3V42_G3H_SMC_CLK=PP3V42_G3H_ACIN=PP3V42_G3H_SB_RTC=PP3V42_G3H_LPCPLUS

=PP3V42_G3H_PWRCTL=PP3V42_G3H_LIDSWITCH

=PP3V42_G3H_SMBUS_SMC_BSA=PP3V42_G3H_SMCVREF

PP3V42_G3HMIN_LINE_WIDTH=0.2MM

VOLTAGE=3.425V

MAKE_BASE=TRUE


=PPVIN_G3H_P3V42G3H

=PP3V3_S5_REG

=PP5V_S5_PWRCTL=PP5V_S5_P5VS0

=PP5V_S5_REG

=PP5V_S5_1V8S3=PP5V_S5_PATA=PP5V_S5_USB

=PP5V_S0_AUDIO

MAKE_BASE=TRUEGND_AUDIO_PWR

=PP3V3_S5_P3V3S0

=PP5V_S5_P5VS3=PP5V_S5_SB

=GND_AUDIO_PWR

=PP18V5_G3H_CHGR

=PP3V42_G3H_REG

=PP18V5_G3H_INRUSH

=PPBUS_S5_YUKON_CTRL

=PPVIN_S5_IMVP6

=PP5V_S3_IR

MAKE_BASE=TRUEMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.3MM

PP5V_S5

VOLTAGE=5V

=PP3V3_S5_LCD

=PP5V_S3_GEYSER

MAKE_BASE=TRUEMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.4MM

PP1V05_S0

VOLTAGE=1.05V

=PPVCORE_S0_SB

=PPVIN_S5_1V51V05S0

=PPBUS_S5_INV

=PP1V8_S3_MEM

=PP1V2_S3_REG=PP1V2_S3_ENET

=PP5V_S0_IMVP6

=PP1V8_S3_REG MIN_NECK_WIDTH=0.4MMMIN_LINE_WIDTH=0.6MM

PP1V8_S3

VOLTAGE=1.8V

MAKE_BASE=TRUE

=PP1V8_S3_MEM_NB

=PPVOUT_S0_IMVP6_REG

=PP1V8_S3_MEM_NB_SENSE

MAKE_BASE=TRUE


PPDCIN_G3HMIN_LINE_WIDTH=0.6MM

VOLTAGE=18.5V

=GND_AUDIO_CODECMAKE_BASE=TRUEGND_AUDIO_CODEC

=PP5V_S3_SYSLED

=PP3V3_S3_RSTGATE=PP3V3_S3_PCI=PP3V3_S3_2V5S3=PP3V3_S3_TPM

=PP3V3_S3_FET

PP5V_S3MIN_LINE_WIDTH=0.6MMMAKE_BASE=TRUE

VOLTAGE=5VMIN_NECK_WIDTH=0.3MM

=PP3V3_S3_PDCISENS=PP3V3_S3_FW


PP3V3_S3MIN_LINE_WIDTH=0.2 MM

VOLTAGE=3.3V

MAKE_BASE=TRUE

61 29

11

28

57

26

57

9

33

25

48

19

20

34

48

29

19

56

52

25

23

25

25

69

69

49

56

29

25

25

25

25

19

19

19

19

25

25

25

25

25

25

9

19

19

8

19

63

51

62

63

24

9

19

19

17

19

63

66

51

19

25

23

25

19

47

46

66

47

55

56

58

25

28

63

16

55

46

53

43

44

36

46

36

27

5

67

5

23

22

11

24

24

22

24

50

63

66

65

66

66

19

68

48

63

31

60

68

26

58

10

54

43

32

28

24

46

34

26

26

24

24

24

19

68

19

17

17

17

17

68

43

25

24

24

24

24

24

24

19

19

19

19

8

5

19

17

62

16

7

12

5

39

61

59

5

5

62

67

5

5

60

25

63

63

5

62

5

5

31

21

30

8

5

62

17

19

17

16

13

63

60

63

60

36

39

27

62

48

66

62

67

5

63

27

27

27

53

14

24

21

22

17

5

5

5

55

31

35

39

45

46

65

26

5

63

65

27

46

5

63

59

63

63

59

61

34

42

54

5

63

63

25

55

66

63

65

60

48

41

5

67

40

5

24

62

67

19

60

36

58

61

5

14

58

61

54 5

35

26

38

60

46

63

5

61

38

5

V-

V+

G

D

S

G S

D

DS

G

G

D

S

G

D

S

G

DS

G

D

S

V-

V+

S1

GATE

S2

S3 D4D3

D2D1

TABLE_ALT_ITEM


TABLE_ALT_HEAD

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

ACIN DETECTION

OVP

INRUSH LIMITER

BATTERY INTERFACE

LID HALL EFFECT SENSOR

518S0287

NC

MLB TOP VIEW

PIN 1

DC-JACK INTERFACE

2

1

1/16WMF-LF

R8232

402

1%24.3K

C82300.1UF

402X5R2 25V

1

10%

MF-LF2

1

402

100KR8233

1/16W5%

402MF-LF1/16W

100KR82311

2

5%

MC74VHC1G08SC70

U8250

3

2

1

4

5

SOT23-5LM397

2

4

1

3

5

CRITICALU8290

5

4

3

2

1

CRITICALJ820087438-0543M-RT-SM

21

L8205SM-LFFERR-50-OHM

L8202120-OHM-0.3A-EMI0402-LF

1 2

L8203120-OHM-0.3A-EMI0402-LF

1 2

1

SM-LF

2

FERR-50-OHML8201

L8204120-OHM-0.3A-EMI0402-LF

1 2

F-ST-SM1

5

34

18

20

13

15

17

19

16

12

14

11

9

7

1

10

8

6

2

J8250CRITICAL

127216FA020

0402

21

600-OHM-300MAL8209

0402

21

600-OHM-300MAL8207

L82080402

21

600-OHM-300MA

2

1 C8206

CERM50V5%47pF

4022

0.001UF10%

CERM402

50V

C82051

2

1

402MF-LF

100K1/16W5%

R8200

50V2

1

20%0.001UF

CERM402

C8203

CERM16V

0.01uF10%

C8220

2

1

402

10%

C82210.01uF16VCERM2

1

402

1K

MF-LF1/16W

402

1%

1

2

R8201

402 2

1

05%

MF-LF1/16W

ONEWIRE_ALWAYSON

R8202

SOT-363

6

2

Q822012N7002DW-X-F

10K

MF-LF1/16W5%

1

2 402

R8203

S0T23-33

2

1

Q8240TP0610

ONEWIRE_PWRCTL

2

100KR8204

402

1/16WMF-LF

5%

1 ONEWIRE_PWRCTL

3

2N7002DW-X-FSOT-363

Q82205

4

Q8210

1

2

6

2N7002DW-X-FSOT-363

4

5

3

2N7002DW-X-FSOT-363

Q8210

5%

R8299

MF-LF1/16W

2.0K

1

2402

ONEWIRE_PULLUP

TP0610Q8298

1

32

S0T23-3

ONEWIRE_PULLUP

R8298ONEWIRE_PULLUP

5%

2

1

1/16WMF-LF402

100K

1 2

R8296

MF-LF1/16W

05%

402

ONEWIRE_PU_PROT

ONEWIRE_PULLUP

Q82992N7002

3

1

2

SOT23-LF

ONEWIRE_PU_ACOK

0R8297

MF-LF

5%1/16W

402

1

2

100K

ONEWIRE_PWRCTL1 2

MF-LF1/16W5%

402

R8211

SOT-363

1 6

D8201BAS16TW-X-F

R8205

805

21

47

1/8WMF-LF

5%

CRITICAL

SC-751

2

3

RCLAMP2402B

D8200

2

1 C8215

CERM50V5%47pF

4022

1 C8209

402CERM50V10%0.001UF

4022

1 C821110%

CERM50V

0.001UF

CRITICAL

SM-LF

4

3

5

2 U8200LMC7211

1

2

1

402

C82180.1UF25VX5R

10%102KR82081

1%1/16WMF-LF4022

MF-LF402

1M

1/16W

1 2

5%

R8210

1/16W

402

1%

MF-LF

1

2

R820957.6K

2

1R8207

1/16WMF-LF402

1%10.7K

R8206

402

1%

1

2MF-LF1/16W

102K

R8214

402

330K5%1/16WMF-LF

1

2

402MF-LF

470K1/16W5%

R82131

2

C82170.22UF20%

X5R603

25V

1

2

CRITICAL

SI4405DY-E3SO-8

Q8250

5

6

7

8

4

1

2

3

0.01uF25V10%

402X7R

1

2

C8202

F82001206

1 2

6AMP-24V

CRITICAL

? Q8250 VISHAY SI4413ADY376S0410376S0466

10882

051-7173

DC-In & Battery ConnectorsSYNC_MASTER=POWER

G


ONEWIRE_PWR_EN_L_DIV

PP18V5_DCIN_ONEWIRE

ONEWIRE_PU_EN

ACIN_DIV

ACIN_1V20_REF

MIN_LINE_WIDTH=0.6 MMPP18V5_DCIN MIN_NECK_WIDTH=0.20 MM

VOLTAGE=18.5V

=PP3V42_G3H_LIDSWITCH

=SMBUS_BATT_SCL

=SMBUS_BATT_SDA

=GND_BATT_CHGND

ACIN_ENABLE_GATE

MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.6 MMVOLTAGE=18.5V

=PP18V5_G3H_INRUSH

ACIN_ENABLE_L_DIV

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.2 MM

ACIN_ENABLE_L

SMC_BC_ACOK

ONEWIRE_ESD

PP3V42_ONEWIRE

ONEWIRE_PU_EN_L

=PP3V42_G3H_ACIN

ONEWIRE_PWR_EN_L


VOLTAGE=18.5VPP18V5_DCIN_F

MIN_LINE_WIDTH=2 MM

ONEWIRE_DCIN_DIV

SMC_BC_ACOK

SMC_LID

SMC_LID_F

GND_SMC_LID_F

=GND_BATT_CHGND

BATT_POS

SMBUS_BATT_SCL_F

SMC_BS_ALRT_L_F

BATT_NEG

PP3V42_G3H_LIDSWITCH_F

SMC_PS_ON

=PP3V42_G3H_ACIN

PPDCIN_G3H_R =PPDCIN_G3H

SMC_BS_ALRT_L

BATT_POS_F

SMBUS_BATT_SDA_F

ONEWIRE_OV

ONEWIRE_EN

ADAPTER_SENSE

=GND_DCIN_CHGND

SYS_ONEWIRE

66 65

46

46

66

46

45

45

66

46

65

65

45

40

65

39

65

45

64

27

27

6

5

64

64

5

5

6

5

5

5

5

64

64

66

5

6

5

VDDPVDD

ACLIM

ICM

ICOMP

VCOMP

VADJ

CELLS

CSOP

CHLIM

CSON

ACPRN

VREF

SGATE

CSIN

DCIN

BGATE

BOOT

UGATE

LGATE

PHASE

DCSET

PGND

THRML_PAD

DCPRN

CSIP

EN

ACSET

GND

G

D

S

G

D

S

G

D

S

G

D

S

GND

OUT

VIN+ VIN-

V+

GND

OUT

VIN+ VIN-

V+

G

D

S

S1

GATE

S2

S3D4D3

D2D1

S1

GATE

S2

S3 D4D3

D2D1

S1

GATE

S2

S3 D4D3

D2D1

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM


TABLE_ALT_HEAD

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PBUS SUPPLY / BATTERY CHARGER

CHLIM circuit (R8362, R8363, C8328) subject to changepending M1 resolution (100mV offset, radar 4221420)


NC

Place near R8308

Placement Note:

Placement Note:


PLACE NEAR R8397

CLOSE TO PIN 26

CRITICAL

ISL6255AHRZU8300

QFN

21

23

6

13

26

4

9

15

29

16

11

12

3

5

1

28

25

22

19

20

7

214

17

27

8

10

24

18

CRITICAL

F8300

1 2

12067AMP

XW8300

21

SM

MF-LF

NO STUFF

1%

R8303

2

1

402

100K

1/16W

SOD-123

21

B0530WXFD8300

2N7002DW-X-FSOT-363

4

5

3Q8322

SOT-363

1

2

6

2N7002DW-X-FQ8322

4

5

3Q83242N7002DW-X-FSOT-363

1

2

6 Q83242N7002DW-X-FSOT-363

10%0.1UFC8340

X5R402

25V

1

2

1W

0612

1R83970.020.5%

MF

2

3.32K

1/16W

1

1%

MF-LF

2402

R8361 C8327

402CERM

1

2

1UF10%6.3V

1/16W

2

1R8340

1%

MF-LF

88.7K

402

2

1

5%1/16WMF-LF402

0

NO STUFF

R8364

2

05%1/16W

402

1NO STUFF

MF-LF

R8365

X5R402

4V2

1

20%2.2uFC8328R8363

2

1

MF-LF1/16W

402

1%24.9K

6.3VCERM

C8375

2

1

402

10%1uF

MF-LF

R8341

1%

2

1

1/16W

10K

402

CRITICAL

SOT23-5

43

5 1

2

INA193U8370

C8370

402CERM

2

1

6.3V

1uF10%

402

6.3V

0.22UFC8371

X5R2

1

20%

2

1 C8372

402X5R

20%0.22UF

6.3V

1 2

402

C8300

16VX5R

10%0.033UF

93.1KR8342

1/16W

2

1

MF-LF

1%

402

NO STUFF

2

402

5%

C8325

50V

150pF

CERM

1

120pF

NO STUFF

50VCERM

2

5%

1

402

C8326

R830021

MF-LF

5%

402

1/16W

4.7

2

1

3

Q8340

D

G

S

IRLML5203-2.6ASM

6.3V

C8311

402

1UF

21

10%

CERM

R8305

402MF-LF1/16W5%18

21

R8344

1/16W

2

1

1%

402MF-LF

100K

402MF-LF

100KR8302

1/16W

21

1%

NO STUFF

10%

1

25VX5R402

0.1UF

2

C8303

R83704.53K1/16W

21

1%

402MF-LF

R8308

1W0.5%

21

0.01

0612MF

402

R83065%1/16W

21

MF-LF

2.2

4.53K1/16W

21

R83711%

MF-LF402

MF-LF1/16W

402

1 2

1%4.99KR8360

R836290.9K

21

1%

402MF-LF1/16W

21

R8325

MF-LF1/16W1%

402

10K

22525MF

1

5%3W

R832027

R8352100K1%1/16W

4022

1

MF-LF

R8367

1/16WMF-LF

2

1

1%

402

100

C8313

2

CERM

10%50V

402

0.0033uF

1

2

1/16WMF-LF

1R834310K1%

402

1206-1

C83071

25VX5R2

10%10UF

CRITICAL

BAS16TW-X-F

16

SOT-363

D8322

BAS16TW-X-FSOT-363

25

D8322

D8322BAS16TW-X-F

43

SOT-363

10%

X5R25V

0.1UFC8341

402

1

2

R83091

MF-LF

1%100K

1/16W

4022

50VCERM 2

1

402

10%

C8316

NO STUFF

0.001uF

2.25%

MF-LF402

R8310

21

1/16W

R8311270

1/16WMF-LF

1%

1

2 402

10%

402

1

2

0.1UF

X5R25V

NO STUFF

C8317

1/16W

R8301

MF-LF

1%34.8K

1 2402

0.022uFC8301

CERM-X5R

2

402

1

16V10%

C83020.0082uF10%

225V

402X7R

1

603

50V10%

2

1 C83810.0022uF

CERMMF-LF1/10W

49.91%

603

21

R8381

2

MF-LF

0

1402

1/16W5%

R8312

C8318

10%

402

1

2

0.22UF

10VCERM

CRITICAL

CASED2E-SM

33UF

POLY

1

2 16V

C831020%20%

16V

CRITICAL1

2

33UF

POLY

C8308

CASED2E-SM

SOT-363

3 4

D8201BAS16TW-X-F 5%

MF-LF1/8W

47

1 2

805

R8304

U8375

CRITICAL

INA193

43

5 1

2

SOT23-5

402

1

1%

MF-LF

R8351100K

1/16W

2

R8350

1/16W

2

1

100K

MF-LF

1%

402

2N7002

2

1

3

SOT23-LF

Q8350

C83121UF

2

1

6.3V

402

10%

CERM

SI4405DY-E3Q8300CRITICAL

SO-8

3

2

1

4

8

7

6

5

10%0.1UF

X5R

C8304

25V

402

1

2

LFPAK

5

4

2 3

HAT2168HQ8301CRITICAL

1

Q8302

LFPAK

5

4

1 2 3

CRITICAL

HAT2165H

2 1

3

SM

L83004.7UH

CRITICAL

X5R25V

1

2

10%10UFC8305

1206-1

CRITICAL

1206-1

2

1

25V10%10UFC8306

X5R

CRITICAL

CRITICAL

2 16VELEC

20%

1 C8309100UF

6.3X5.5SM1

SI4405DY-E3Q8320

SO-8

5

6

7

8

1

2

3

4

CRITICAL

SI4405DY-E3Q8321CRITICAL

3

2

1

4

8

7

6

5

SO-8

1

2

1%470KR8330

1/16WMF-LF402

R8331

2

1

5%330K

1/16WMF-LF402 2

1

402MF-LF

39.2K

1/16W1%

R8322

R8323

2

1

MF-LF402

1%1/16W

35.7K

402

10%

2

1

CERM16V

0.01uFC8320

2

1

X5R402

C83210.1UF10%16V

NO STUFF

C83240.01uF10%

2

1

402

16VCERM

CERM

NO STUFF

10%

2

402

1 C8322

16V

0.01UF

2

1 C8323

20%

CERM402

0.1UF

10V

R8324

2

1

MF-LF

1%

402

1/16W

100K

Q8321376S0466 376S0410 ? VISHAY SI4413ADY

128S0093 128S0092 ? KEMET T520V336M016ATE0457650C8308,C8310

376S0466 ?376S0410 Q8300,Q8320 VISHAY SI4413ADY


PBUS Supply/Battery Charger

051-7173

10883

SYNC_MASTER=SMC

G

PPVDCIN_G3H_PREMIN_LINE_WIDTH=0.6 MMMIN_NECK_WIDTH=0.25 MM

=PP3V3_S0_PBATTISENS

GND_CHGR_SGND

CHGR_UGATE

CHGR_CSIN

CHGR_BGATE

CHGR_EN_L

CHGR_EN

SMC_SYS_ISET

BATT_POS_F


MIN_LINE_WIDTH=0.2 MM

BATT_ENABLE_L


BATT_FET_GATE

=PPBUSB_G3H

=PP3V3_S0_PDCISENS

CHGR_ACSET_RC

CHGR_VCOMP_CC

CHGR_VCOMP_RC

PPVBAT_G3H_CHGR_OUT

CHGR_VDD

SMC_BC_ACOK BATT_RCSMC_BATT_TRICKLE_EN_L

CHGR_ICM

BYPASS_R_DRV

SMC_BATT_ISENSE

DCIN_ISENSECHGR_ICM_R

SMC_BATT_CHG_EN

CHGR_VADJ


BYPASS_R_GATE

SMC_DCIN_ISENSE

GND_SMC_AVSS

CHGR_VADJ

SMC_BATT_ISET

GND_SMC_AVSS

PPVBATT_G3H_R =PPVBATT_G3H

PPVBATT_G3H_PRE

BATT_FET_DRAIN

BATT_ISENSE

=PP3V42_G3H_ACIN

CHGR_DCPRN

=PPBUSA_G3H

CHGR_BOOT

CHGR_LGATE

PPVBAT_G3H_CHGR_OUTMIN_NECK_WIDTH=0.25 MMMIN_LINE_WIDTH=0.6 MM

CHGR_PHASE

CHGR_PHASE_RC

CHGR_CHLIM

CHGR_BOOT_RC

CHGR_VREF

GND_CHGR_SGND

CHGR_ACSET

CHGR_CSOP

CHGR_ICOMP

PP18V5_S5_CHGR_SW_RMIN_NECK_WIDTH=0.25 MMMIN_LINE_WIDTH=0.6 MM

=PP18V5_G3H_CHGR

CHGR_DCSET

CHGR_ICOMP_RC

CHGR_ACLIM


CHGR_SGATE

CHGR_VDDP

CHGR_CSON

CHGR_VDD

CHGR_ACPRN

CHGR_VCOMP

PPVBAT_G3H_CHGR_REGMIN_NECK_WIDTH=0.25 MMMIN_LINE_WIDTH=0.6 MM

CHGR_DCIN

66

66

62

62

65

61

61

46 46

46

48

48

64

66

45 45

45

46

45

46

65

66

64

66

45

65

64

62

5

66

5 5

45

5

66

45

45

66

5

45

64

64

64

5

66

64

66

D

SG

IN

IO

IO

IO

IO

IN

SYM_VER-1

G

D

S

G

D

S

IO

IO

IO

IO

IO

IO

IO

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

THIS GND CONECTS TO CHASSIS GND

LCD + CAMERA CONNECTOR

*Enclosure: 518S0364Plexi: 516S0212

CAMERA I/F

LCD I/F

(LVDS DDC POWER)

LVDS REFERENCE CURRENT,1.5K OHM PULL DOWN RESISTOR NEEDED

INVERTER CONNECTOR

REPLACE 518S0334 WITH 518S0486

2

1

3

Q9405TP0610S0T23-3

21

C9414

CERM

0.0022UF

50V10%

402

2

1R9400

MF-LF1/16W

100K

402

1%

50V

0.001uF10%

402CERM

C9415

2

1

MF-LF1/16W1%

1.5K

402

R94131 2

402MF-LF1/16W1%100KR94141

2

1/16W

10K5%

MF-LF402

R94161

2

NOSTUFF

10K5%

402MF-LF1/16W

R94151

2

NOSTUFF

10UF20%6.3VX5R603

1

2

C9412

X5R

0.1UF

16V10%

402

C94111

2


1 2

0402-LF

10%0.001uF

CERM50V

402

C9416 1

2

100K

1/16W

402MF-LF

5%

R94021

2

88609-04001

4

3

2

1

6

5

J9400F-ST-SM

CRITICAL

L940790-OHM

CRITICAL

SM

4

32

1

MC74VHC1G08SC70

INVERTER_BUF

U9453

3

2

1

4

5

0.1UF

INVERTER_BUF

402

10%16VX5R

C9459 1

2

INVERTER_UNBUF

0

402MF-LF

5%1/16W

R94281 2

21

0402-LF

L9408120-OHM-0.3A-EMI

10K

1/16WMF-LF

5%

402

R9423

1 2

FDC638PSM-LF

Q9403

1

2

5

6

3

4

SOT23-LF2N7002Q9404

3

1

2

2

1

3

Q94062N7002SOT23-LF

14

18

S-050162BJ9401

24

25

23

3

26

11

13

16

17

8

9

10

7

6

4

1

5

19

15

12

20

21

22

2

F-RT-SM

CRITICAL

FERR-120-OHM-1.5A

0402-LF

21

L9402


0402-LF

21

5%50VCERM

100PFC9400

1

2

402

MF-LF1/16W1%

100KR94011 2

402

2

1 C9403

CERM402

5%50V

100PF100PF50V5%

402CERM

C94021

2

1 C94015%100PF

402

50VCERM2

L9400

1 2

120-OHM-0.3A-EMI

0402-LF

0402-LF

L9401

1 2

120-OHM-0.3A-EMI

50VCERM

10%

0.001uF

402

C94091 2

2

1 C9410

CERM

10%

402

0.001uF50V

MF-LF

10K5%1/16W

402

R94091

21/16W

10K

402MF-LF

5%

R94081

2

CERM

0.001uF10%

402

50V

C94081

2

21


0402-LF

0.0033UF

50V

402CERM

C9413

1 2

10%

SYNC_MASTER=GRAPHIC

INVERTER,LVDS,TMDSSYNC_DATE=06/06/2005

G

10894

051-7173

INV_PWREN_L


MIN_LINE_WIDTH=0.30 MMVOLTAGE=12.6V

PPBUS_ALL_INV_CONN

INV_GND

=PP3V3_S5_LCD

LCDVDD_PWREN_L

LVDS_VDDEN

LVDS_CLKCTLA

LVDS_VREFL

LVDS_VREFH LVDS_IBG

LCDVDD_PWREN_L_R

=USB2_CAMERA_P

=USB2_CAMERA_N

=PP5V_S3_CAMERA

=GND_CHASSIS_LVDS

=SMBUS_ATS_SCL=SMBUS_ATS_SDA

LVDS_A_CLK_N

LVDS_A_DATA_P<1>LVDS_A_DATA_N<2>LVDS_A_DATA_P<2>

LVDS_A_DATA_N<1>LVDS_A_DATA_P<0>LVDS_A_DATA_N<0>

LVDS_A_CLK_P

=PPBUS_S5_INV

=PP3V3_S0_LCD

LVDS_CLKCTLB

=PP3V3_S0_LCD

LVDS_BKLTCTL

PP3V3_LCDVDD_SW_FVOLTAGE=3.3V MIN_LINE_WIDTH=0.30 MM MIN_NECK_WIDTH=0.20 MM

PP3V3_S0_LCD_FVOLTAGE=3.3V MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.25 MM

=GND_CHASSIS_LVDS


VOLTAGE=5V

PP5V_S3_CAMERA_F

USB2_CAMERA_CONN_NUSB2_CAMERA_CONN_P

LVDS_BKLTEN

=PP3V3_S0_LCD

BKLIGHT_CTL

MIN_LINE_WIDTH=0.30 MMMIN_NECK_WIDTH=0.20 MMVOLTAGE=5V

PP5V_INV

INV_BKLIGHT_PWM_L

VOLTAGE=5VMIN_LINE_WIDTH=0.30 MM

PP5V_INV_F


INVT_CHGND

VOLTAGE=3.3VMIN_LINE_WIDTH=0.30 MMMIN_NECK_WIDTH=0.20 MM

PP3V3_LCDVDD_SW

=PP3V3_S0_LCD

LVDS_DDC_CLKLVDS_DDC_DATA

=PP5V_S0_LCD

INV_PWREN_F_L

67

67

67

67

67

67

5

5

64

13

13

13

13 13

6

6

64

6

27

27

13

13

13

13

13

13

13

13

64

64

13

64

13

6

13

64

5

5

6

64

13

13

64

IN

IN

IN

OUT

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

TX0_P

TX0_N

TX1_N

TX1_P

TX2_P

TX2_N

TXC_P

SCLDDC

SDADDC

SDG_P

TEST

EXT_SWING

TXC_N

SGND1

SGND0

PGND2

AGND0

AGND1

AGND2

GND1

SPGND

GND0

HTPLG

A1

SDSDA

SDSCL

RESET*

EXT_RES

SDI_P

SDI_N

SDC_P

SDC_N

SDB_P

SDB_N

SDR_N

SDR_P

SDG_N

VCC1

VCC0

VCC2

AVCC0

AVCC1

PVCC1

PVCC2

SVCC0

SVCC1

SPVCC

OVCC

CORESDVO RCVR

I2C MASTERINTER

TEXT MODECONFIG/PRGRM

DIFF SIGDATA

OUT

OUT

OUT

IO

IO

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

ONE 0.1UF AND 0.001UF FOR EACH PIN

C9526,C9527 close to CHIP


PLACE THE CAP NEAR THE NB SIDE

NC

ADDRESS=0X70

IF HIGH, ADDRESS=0X72

NC

TMDS CHIP SDVO INPUT INTERRUPT SIGNAL TO MCH

PLACE IT CLOSE TO CONNECTOR

TMDS_I2C_SCL AND TMDS_I2C_SDA DON’T NEED TO CONNECT


MCH SDVO CHANNEL R,G,B,CLK SIGNAL TO TMDS CHIP

2

1 C95110.1UF10%16V

402X5R2

1 C95100.001UF10%50VCERM402

2

1 C95090.1UF10%16VX5R402

2

1 C95080.001UF10%50VCERM402

2

1 C95070.1UF10%16VX5R402

21

C9520

402

0.1UF10%X5R

16V

2

1 C95480.1UF

402

10%

X5R16V2

1 C95470.1UF10%16V

402X5R2

1 C9546

402

10%0.1UF

16VX5R2

1 C95450.1UF10%

402

16VX5R2

1 C9544

402

10%0.1UF

X5R16V2

1 C9543

402

16VX5R

10%0.1UF

2

1 C9542

402

0.1UF10%16VX5R2

1 C9541

16V10%

402X5R

0.1UF

0.1UFC9531

2

1

X5R16V10%

4022

1 C9502

X5R402

16V10%0.1UF

402

10%

1

2 X5R16V

0.1UFC9533

16V10%0.1UF

1

2

C9535

402X5R

2

1 C954010UF20%6.3VX5R603

2

1C95390.1UF10%16VX5R402

2

1C95380.1UF10%16VX5R402

2

1 C95360.001UF10%50VCERM402

2

1

50VCERM402

0.001UF10%

C9537

0.001UF50V

C9532

2

1

CERM

10%

402

2 50V

C95341

402

10%0.001UF

CERM

2

1 C9501

402

10%

CERM

0.001UF50V

0.001UF

2

1 C9500

402CERM50V10%

2

1

402

10%

C9530

CERM

0.001UF50V

2

1R9501

402

3.3K5%

1/16WMF-LF

2

1R9502

402

5%1/16WMF-LF

3.3K

2

1 C9522

402CERM

10%50V

0.001UF

2

1 C9523

402

10%50V

0.001UF

CERM

2

1

0.001UF10%50V

402CERM

C9524

402

50V

1

2 CERM

10%

C95250.001UF

21

0402-LF

120-OHM-0.3A-EMIL9501

21

0402-LF

120-OHM-0.3A-EMIL9500

21

0402-LF

120-OHM-0.3A-EMIL9506

21

0402-LF

120-OHM-0.3A-EMIL9503

21

0402-LF

120-OHM-0.3A-EMIL9504

21

0402-LF

120-OHM-0.3A-EMIL9505

48

26

11

34

28

10

13

19

30

3

45

39

4

5

37

38

32

33

40

41

46

47

43

44

9

8

2

27

1

29

317

25

35

21

24

18

12

6

U9500CRITICAL

LQFP

14

22

23

20

16

17

36

SIL1362ACLU

42

15

BAV99DW-X-FD9500

3

5 4

SOT-363

4022

1R9504

MF-LF1/16W1%249

C9505

603X5R6.3V20%10UF

2

1

2402

10%

X5R16V

1

0.1UFC9506

C95140.1UF10%16VX5R402

2

1

CERM50V

C95265%10pF

4022

1

NOSTUFF

1

2402

C9527

50VCERM

5%10pF

NOSTUFF

2

1R9505

MF-LF

5%1/16W

10K

402 2

1R95065%1/16WMF-LF

10K

402

2

1R9503

402

1K5%1/16WMF-LF

21

R9500

5%1/16WMF-LF402

2.2K

2

1

10UF20%

X5R603

6.3V

C9513

2

1

402CERM50V10%0.001UFC9512

2

1 C950410UF20%

603X5R6.3V2

1 C950310%16V

402

0.1UF

X5R

0.1UFC9521

2

1

10%

X5R402

16V

21

C9519

X5R16V402

0.1UF10%

PEG_D2R_P<1>6

2 1D9500

SOT-363

BAV99DW-X-F

21

R9507

402

1/16WMF-LF

49.9

1%

21

R9508

402

49.9

MF-LF

1%1/16W

21

R9509

402

1%

MF-LF1/16W

49.9

1%

21

R951049.9

1/16W

402MF-LF

21

R9537

402

1/16W1%

MF-LF

49.9

21

R9538

402

1%

MF-LF

49.9

1/16W

21

R9539

402

1/16W1%

MF-LF

49.9

R95402

1%

49.9

1/16W

1

402MF-LF

EXTERNAL TMDSSYNC_MASTER=GRAPHIC

051-7173 G

10895


=PP3V3_S0_TMDS

PP3V3_S0_ANALOG_TMDS_F



PP1V8_S0_ANALOG_SDVO_FPP3V3_S0_ANALOG_SDVO_F

TMDS_TX_CLK_NTMDS_TX_CLK_P

TMDS_TX_P<1>

TMDS_TX_P<0>

TMDS_TX_P<2>

TMDS_TX_N<0>TMDS_TX_P<1>TMDS_TX_N<1>TMDS_TX_P<2>TMDS_TX_N<2>TMDS_TX_CLK_PTMDS_TX_CLK_N

TMDS_EXT_SWING

TMDS_I2C_SDA

=PP3V3_S0_TMDS


PP3V3_S0_PVCC2_TMDS_F

TMDS_RST_L

TMDS_HTPLG_R

TMDS_SDC_N

TMDS_SDC_P

TMDS_SDB_P

PEG_R2D_C_N<2>

PEG_R2D_C_P<2>

PEG_R2D_C_N<1>

PEG_R2D_C_P<1>

TMDS_SDR_P

PP3V3_S0_PVCC1_TMDS_FVOLTAGE=3.3V


=PP3V3_S0_TMDS

=PP1V8_S0_TMDS=PP3V3_S0_TMDS

PEG_R2D_C_P<3>

TMDS_TX_N<2>

TMDS_TX_N<1>

TMDS_TX_N<0>

PEG_R2D_C_N<3>

TMDS_HTPLG

PEG_D2R_N<1>

=PP5V_S0_TMDS

=PP2V5_S0_TMDS

TMDS_TX<0>

TMDS_TX<1>

TMDS_TX<2>

=PP1V8_S0_TMDS

=PP3V3_S0_TMDS

=PP3V3_S0_TMDS

TMDS_I2C_SCL

TMDS_SDG_P

SDVO_CTRLDATA

TMDS_SDR_N

TMDS_SDG_N

PP5V_S0_DVIPORT

PP5V_S0_DVIPORT_D

TMDS_INT_P

TMDS_SDB_N

TMDS_INT_N

TMDS_EXT_RES

SDVO_CTRLCLK

PP1V8_S0_ANALOG_SDVO_FVOLTAGE=1.8V



PEG_R2D_C_N<0>

PEG_R2D_C_P<0>




PP3V3_S0_ANALOG_SDVO_F

PP1V8_S0_TMDS_F


TMDS_TX_CLK

TMDS_TX_P<0>


PP1V8_S0_TMDS_FVOLTAGE=1.8V


69

69

69

69

69

69

68

69 69

69

69

69

69

69

69

69

69

69

69

68

68

68 68

69

69

69

69

68

68

68

69

13

64

68

68

68

68 68

68

68

68

68

68

68

68

68

68

68

64

68

26

13

13

13

13

68

64

64 64

13

68

68

68

13

69

13

64

64

64

64

64

14

69

69

14

68

68

13

13

68

68

68

68

68

68

68

LCFILTER

LCFILTER

LCFILTERGND

VCC

DAS1A

S2A

S1B

S2B

S1C

S2C

S1D

S2D IN

EN_L

DD

DC

DB

SYM_VER-1

SYM_VER-1

SYM_VER-1

SYM_VER-1

VCC

125GND

A Y

VCC

125GND

A Y

G

DS

G

DS

IO

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE


TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_5_ITEM

TABLE_5_ITEM



NC

PLACE THE RESISTOR CLOSE TO GMCH AND THE CAP NEAR THE CONNECTOR

PLACE THE RESISTOR CLOSE TO GMCH AND THE CAP NEAR CONNECTOR

NC

DVI power DIODE on page 95 (D9500)

Isolation required for DVI power switch

Video Connectors

PLACE THE RESISTOR CLOSE TO GMCH



EXTERNAL VIDEO (VGA) INTERFACE

TO SET INTERNAL VOLTAGE LEVELS

A 255 OHM 1% RESISTOR IS REQUIRED BETWEEN CRT_IREF

AND GROUND

TV REFERENCE CURRENT,USES AN EXTERNAL RESISTOR OF 5K OHM 1%

TMDS(MINI DVI) INTERFACE

SM-220MHZ-LF

FL9800

1 2

3 4

SM-220MHZ-LF

FL9801

1 2

3 4

SM-220MHZ-LF

FL9802

1 2

3 4

751%1/16WMF-LF402

R98501

2

751%1/16WMF-LF402

R98511

2

751%

402MF-LF1/16W

R98521

2

75

MF-LF1/16W1%

402

R98531

2

402MF-LF1/16W1%75R98541

2 402MF-LF1/16W1%75R98551

2

402

1/16WMF-LF

5%

39R98701 2

1/16WMF-LF402

5%

39R98711 2

0.5AMP-13.2VF9804

SM-LF

1 2

1/16WMF-LF402

5%

391 2

R9861

402CERM

0.001uFC980810%50V

1

2

402

20%

CERM10V

0.1UFC98601

2

MF-LF1/16W

5%2.2K

402

R98621

2

2.2K1/16W

402MF-LF

5%

R98631

2

50V

33PF5%

402CERM

NOSTUFF

C98421

2

C9809100pF5%

CERM50V

402

1

2

CERM402

5%33PF50V

NOSTUFF

C98431

2

SOP

CRITICAL

TS3V330

U98014

7

9

12

15

8

1

2

5

11

14

3

6

10

13

16

J9801RT-TH

36353433

19

24

32

31

30

29

20

28

27

18

26

25

17

16

15

14

13

12

4

11

10

9

8

7

3

1

2

6

5

MINI-DVI

CRITICALOMIT

22

L980590-OHM-300mA

CRITICAL

2012H

4

32

1

CRITICAL

L980790-OHM-300mA

2012H

4

32

1

CRITICAL

L980690-OHM-300mA

2012H

4

32

1

CRITICAL

L9804370-OHM-280MA

SM1

3

21

4

2

1

10%

X5R16V

0.1UF

402

C9821NOSTUFF

8

4

5 3

7

USSN74LVC2G125DCUU9804

8

4

2 6

1

USSN74LVC2G125DCUU9804

402CERM2

100pF5%50V

C98121

3.3PF0.25%50V

402CERM

C98241

2

3.3PF

CERM

0.25%

402

50V

C98341

2

3.3PF

CERM402

0.25%50V

1

2

C9820

1501/16WMF-LF

NOSTUFF

1%

402

R98561

2

NOSTUFF

402

150

MF-LF

1%1/16W

R98641

2

NOSTUFF

MF-LF402

1501%

1/16W

R98591

2

C9804

402

0.1UF20%

CERM10V

1

2

X5R402

0.1UF10%16V

C98391

2

SM-1

400-OHM-EMIL9844

1 2

402

5%

39

1/16W

R98601 2

MF-LF

4.99K

1%

402MF-LF1/16W

R98681 2

1%

255

402MF-LF1/16W

R98691 2

2N7002DW-X-FSOT-363

Q9801

6

2

1

5%

402MF-LF1/16W

2.2KR98221

2

2N7002DW-X-FSOT-363

Q9801

3

5

4

MF-LF402

1/16W5%

2.2KR98211

2

SYNC_MASTER=EUGENE SYNC_DATE=05/21/05

051-7173 G

98 108

MINI-DVI CONNECTOR

?155S0164155S0227 KEEP MAG.LAYER IN BOML9805,L9806,L9807

FANCY514-0319 CONN,32P MINI-DVI RCPT,RA,BLACK,LF1 CRITICALJ9801

NORMALJ9801514-0292 CONN,32P MINI-DVI RCPT,RA,MG3,LF1 CRITICAL

GPU_CRT_DDC_DATA

TMDS_TX_CONN_N<2>


EXT_COMPVID_B

TMDS_TX_CONN_N<0>

TMDS_TX_CONN_P<0>

TMDS_TX_CONN_P<1>

=PP5V_S0_TMDS

MIN_NECK_WIDTH=0.25 MMMIN_LINE_WIDTH=0.5 MMVOLTAGE=5V

EXT_C_R

=PP3V3_S0_TMDS

CRT_DDC_DATACRT_DDC_CLK

EXT_Y_G

=PP3V3_S0_TMDS

VGA_VSYNC

VGA_HSYNC

CRT_IREF

TV_IREF

CRT_RED_L

TV_IRTNC

TV_IRTNA

TV_IRTNB

CRT_GREEN_L

=SB_GPIO22

CRT_BLUE_L

CRT_RED

TV_DACC_OUT

TV_DACA_OUT

CRT_BLUE

TV_DACB_OUT

CRT_GREEN

GPU_CRT_DDC_CLK

CRT_HSYNC_R

CRT_VSYNC_R

PP5V_S0_DVIPORT

TMDS_TX_P<2>

TMDS_TX_CONN_N<1>

TMDS_TX_N<0>

TMDS_TX_P<0>

TMDS_TX_CLK_N

TMDS_TX_CLK_P

TMDS_TX_N<1>

TMDS_TX_P<1>

TMDS_TX_N<2>

TMDS_TX_CONN_P<2>

VGA_VSYNC

PP5V_S0_TMDS_FUSEVOLTAGE=5VMIN_LINE_WIDTH=0.5 MMMIN_NECK_WIDTH=0.25 MM

PP5V_S0_DVIPORT_D

VGA_B

VGA_HSYNC

VGA_G

VGA_R


PP5V_S0_DVIPORTVOLTAGE=5VMIN_LINE_WIDTH=0.5 MMMIN_NECK_WIDTH=0.25 MM

CRT_HSYNC_LSCRT_HSYNC_LS_R

=PP3V3_S0_TMDS

CRT_VSYNC_LSCRT_VSYNC_LS_R

GPU_CRT_DDC_DATA

=GND_CHASSIS_TMDS_DOWN

GPU_CRT_DDC_CLK

TMDS_HTPLG

TMDS_TX_CONN_CLK_P

TMDS_TX_CONN_CLK_N

69

69

69

69

68

68

68

69

69

69

68

69

6

64

64

13

13

64

69

69

13

13

13

13

13

13

13

6

13

13

13

13

13

13

13

69

13

13

68

68

68

68

68

68

68

68

68

69

68

69

6

68

64

69

6

69

68

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1

99

Title: Basenet Report

Design: m42a

Date: Aug 5 16:01:17 2006

Base nets and synonyms for m42a_lib.M42A(@m42a_lib.m42a(sch_1))

Base Signal Synonyms Location([Zone][dir])

1V2_FB 1V2_FB - @m42a_lib.M42A 60A3

1V05S0_BG 1V05S0_BG - @m42a_lib.M42A 62B4

1V05S0_BOOST 1V05S0_BOOST - @m42a_lib.M42A 62B4

1V05S0_BOOST_RC 1V05S0_BOOST_RC - @m42a_lib.M42A 62C3

1V05S0_COMP 1V05S0_COMP - @m42a_lib.M42A 5D7

1V05S0_FSET 1V05S0_FSET - @m42a_lib.M42A 5D7

1V05S0_ITH 1V05S0_ITH - @m42a_lib.M42A 62B4

1V05S0_ITH_RC 1V05S0_ITH_RC - @m42a_lib.M42A 62B3

1V05S0_RUNSS 1V05S0_RUNSS - @m42a_lib.M42A 62B4 63B7

1V05S0_SNS_N 1V05S0_SNS_N - @m42a_lib.M42A 62C3

1V05S0_SNS_P 1V05S0_SNS_P - @m42a_lib.M42A 62C3

1V05S0_SW 1V05S0_SW - @m42a_lib.M42A 62B4

1V05S0_TG 1V05S0_TG - @m42a_lib.M42A 62C4

1V05S0_VOSNS 1V05S0_VOSNS - @m42a_lib.M42A 62B4






1V5S0_RUNSS 1V5S0_RUNSS - @m42a_lib.M42A 5D7 62B5 63B7






1V8S3_BOOT 1V8S3_BOOT - @m42a_lib.M42A 61B5

1V8S3_BOOT_RC 1V8S3_BOOT_RC - @m42a_lib.M42A 61C4

1V8S3_COMP 1V8S3_COMP - @m42a_lib.M42A 5D7 61B6

1V8S3_COMP_R 1V8S3_COMP_R - @m42a_lib.M42A 61B6

1V8S3_FB 1V8S3_FB - @m42a_lib.M42A 61B6

1V8S3_FCCM 1V8S3_FCCM - @m42a_lib.M42A 61B6

1V8S3_FSET 1V8S3_FSET - @m42a_lib.M42A 5D7 61C6

1V8S3_ISEN 1V8S3_ISEN - @m42a_lib.M42A 61B5

1V8S3_LG 1V8S3_LG - @m42a_lib.M42A 61B5

1V8S3_PHASE 1V8S3_PHASE - @m42a_lib.M42A 61B5

1V8S3_UG 1V8S3_UG - @m42a_lib.M42A 61C5

1V8S3_VCC 1V8S3_VCC - @m42a_lib.M42A 61C6

1V51V05S0_FCB 1V51V05S0_FCB - @m42a_lib.M42A 62A3 62B5

1V51V05S0_FSEL 1V51V05S0_FSEL - @m42a_lib.M42A 62A2 62B4

1V51V05S0_PGOOD 1V51V05S0_PGOOD - @m42a_lib.M42A 58C7 62A1 63C2

2V5S0_BP 2V5S0_BP - @m42a_lib.M42A 60C3

2V5S3_BP 2V5S3_BP - @m42a_lib.M42A 60C3




3V3S5_COMP 3V3S5_COMP - @m42a_lib.M42A 5D7

3V3S5_FSET 3V3S5_FSET - @m42a_lib.M42A 5D7



3V3S5_RUNSS 3V3S5_RUNSS - @m42a_lib.M42A 59B5 63C7






5V3V3S5_FCB 5V3V3S5_FCB - @m42a_lib.M42A 59A3 59B5

5V3V3S5_FSEL 5V3V3S5_FSEL - @m42a_lib.M42A 59A2 59B4

5VS5_BG 5VS5_BG - @m42a_lib.M42A 59B4

5VS5_BOOST 5VS5_BOOST - @m42a_lib.M42A 59B4

5VS5_BOOST_RC 5VS5_BOOST_RC - @m42a_lib.M42A 59C3

5VS5_ITH 5VS5_ITH - @m42a_lib.M42A 59B4

5VS5_ITH_RC 5VS5_ITH_RC - @m42a_lib.M42A 59B3

5VS5_RUNSS 5VS5_RUNSS - @m42a_lib.M42A 5D7 59B4 63C7

5VS5_SNS_N 5VS5_SNS_N - @m42a_lib.M42A 59C3

5VS5_SNS_P 5VS5_SNS_P - @m42a_lib.M42A 59C3

5VS5_SW 5VS5_SW - @m42a_lib.M42A 59B4

5VS5_TG 5VS5_TG - @m42a_lib.M42A 59C4

5VS5_VOSNS 5VS5_VOSNS - @m42a_lib.M42A 59B4

5V_REG_IN 5V_REG_IN - @m42a_lib.M42A 54A5

=EXTBUSB_OC_L =EXTBUSB_OC_L - @m42a_lib.M42A 6C2 42C8

USB_C_OC_L - @m42a_lib.M42A 6C1 22C4 22D8

EXTBUSB_OC_L - @m42a_lib.M42A 6C2

=FWPWR_PWRON =FWPWR_PWRON - @m42a_lib.M42A 6D2 39C6

NC_FWPWR_PWRON - @m42a_lib.M42A 6D1

=GND_BATT_CHGND =GND_BATT_CHGND - @m42a_lib.M42A 6D8 65A6 65A6

=GND_CHASSIS_AUDIO_JACK - 6D8 56B8

@m42a_lib.M42A

=GND_CHASSIS_AUDIO_MIC - 6D8 57A6

@m42a_lib.M42A

=GND_CHASSIS_DIPDIMM_LEFT - 6D8 28A5

@m42a_lib.M42A

GND_CHASSIS_IO - @m42a_lib.M42A 6C7 6D7

=GND_CHASSIS_USB - @m42a_lib.M42A 6C8 42A2 42A4 42C2 42C4

=GND_CHASSIS_FW_DOWN - 6C8 39A1

@m42a_lib.M42A

GND_CHASSIS_IO - @m42a_lib.M42A 6C7 6D7

=GND_CHASSIS_USB - @m42a_lib.M42A 6C8 42A2 42A4 42C2 42C4

=GND_CHASSIS_FW_DOWN - 6C8 39A1

@m42a_lib.M42A

=GND_CHASSIS_DIPDIMM_LEFT - 6D8 28A5

@m42a_lib.M42A

=GND_CHASSIS_AUDIO_SPKRCONN - 6D8

@m42a_lib.M42A

=GND_CHASSIS_AUDIO_SHIELD3 - 6D8

@m42a_lib.M42A


@m42a_lib.M42A


@m42a_lib.M42A

=GND_CHASSIS_AUDIO_MIC - 6D8 57A6

@m42a_lib.M42A

=GND_CHASSIS_AUDIO_JACK - 6D8 56B8

@m42a_lib.M42A

=GND_CHASSIS_DIPDIMM =GND_CHASSIS_DIPDIMM_CENTER - 6B8 28D5 29A5

_CENTER @m42a_lib.M42A

GND_CHASSIS_CENTER - @m42a_lib.M42A 6B7

=GND_CHASSIS_DIPDIMM =GND_CHASSIS_DIPDIMM_RIGHT - 6B8 29D4

_RIGHT @m42a_lib.M42A

GND_CHASSIS_RIGHT - @m42a_lib.M42A 6B7

=GND_CHASSIS_FW_UPPE =GND_CHASSIS_FW_UPPER - 6A6 39A1

R @m42a_lib.M42A

=GND_CHASSIS_TMDS_DOWN - 6A6 69A3

@m42a_lib.M42A

GND_CHASSIS_IO1 - @m42a_lib.M42A 6A5

=GND_CHASSIS_TMDS_DOWN - 6A6 69A3

@m42a_lib.M42A

=GND_CHASSIS_LVDS =GND_CHASSIS_LVDS - @m42a_lib.M42A 6C8 67A2 67B2

GND_CHASSIS_SATA - @m42a_lib.M42A 6C7 35C8

=GND_CHASSIS_RJ45 =GND_CHASSIS_RJ45 - @m42a_lib.M42A 6C8 37A4

=GND_CHASSIS_TMDS_UPPER - 6C8 69A4 69C3

@m42a_lib.M42A

GND_CHASSIS_DCIN - @m42a_lib.M42A 6C7

=GND_DCIN_CHGND - @m42a_lib.M42A 6C8 65C8

GND_CHASSIS_DCIN - @m42a_lib.M42A 6C7

=GND_DCIN_CHGND - @m42a_lib.M42A 6C8 65C8

=GND_CHASSIS_TMDS_UPPER - 6C8 69A4 69C3

@m42a_lib.M42A

=P1V2S0_EN =P1V2S0_EN - @m42a_lib.M42A 63B5

PM_SLP_S3_LS12V6_L - @m42a_lib.M42A 63B6

=P3V3S0_EN - @m42a_lib.M42A 63B5

=P5VS0_EN - @m42a_lib.M42A 63C5

PM_SLP_S3_LS12V6_L - @m42a_lib.M42A 63B6

=P1V8S0_EN_L =P1V8S0_EN_L - @m42a_lib.M42A 63A5

PM_SLP_S3_LS5V - @m42a_lib.M42A 63A6

=P3V3S3_EN_L =P3V3S3_EN_L - @m42a_lib.M42A 63C5

PM_SLP_S4_LS5V - @m42a_lib.M42A 42B8 63D6

=P5VS3_EN_L - @m42a_lib.M42A 63D5

PM_SLP_S4_LS5V - @m42a_lib.M42A 42B8 63D6

=PP1V05_S0_FSB_NB =PP1V05_S0_FSB_NB - @m42a_lib.M42A 12A7 12B7 12C2 19D7 33B8

33C7 33C8 64D6

=PP1V05_S0_NB - @m42a_lib.M42A 19D1 19D7 64C6

=PP1V05_S0_CPU_NB - @m42a_lib.M42A 62A6 64D8

=PP1V05_S0_NB_VTT - @m42a_lib.M42A 17D3 19B5 19D7 64C6

=PP1V05_S0_CPU - @m42a_lib.M42A 7B5 7B6 7D5 7D5 8C7 9C8

11B3 11C5 64D6

=PPVCORE_S0_NB - @m42a_lib.M42A 16C8 16D3 19C8 19D7 64D6

PP1V05_S0_CPU_NB - @m42a_lib.M42A 64D7

=PPVCORE_S0_NB - @m42a_lib.M42A 16C8 16D3 19C8 19D7 64D6

=PP1V05_S0_NB_VTT - @m42a_lib.M42A 17D3 19B5 19D7 64C6

=PP1V05_S0_NB - @m42a_lib.M42A 19D1 19D7 64C6

=PP1V05_S0_CPU_NB - @m42a_lib.M42A 62A6 64D8

=PP1V05_S0_CPU - @m42a_lib.M42A 7B5 7B6 7D5 7D5 8C7 9C8

11B3 11C5 64D6

=PP1V05_S0_REG =PP1V05_S0_REG - @m42a_lib.M42A 5B2 62B1 64D8

=PP1V05_S0_CPU_NB_SENSE - 62A8 64D6

@m42a_lib.M42A

=PP1V05_S0_SB_CPU_IO - 21C1 21C1 24C3 25C4 64D6

@m42a_lib.M42A

=PPVCORE_S0_SB - @m42a_lib.M42A 24D3 25D3 64D6

PP1V05_S0 - @m42a_lib.M42A 5B2 64D7

=PPVCORE_S0_SB - @m42a_lib.M42A 24D3 25D3 64D6

=PP1V05_S0_SB_CPU_IO - 21C1 21C1 24C3 25C4 64D6

@m42a_lib.M42A

=PP1V05_S0_CPU_NB_SENSE - 62A8 64D6

@m42a_lib.M42A

=PP1V5_S0_NB =PP1V5_S0_NB - @m42a_lib.M42A 19C1 19D7 64C6

=PP1V5_S0_NB_PCIE - @m42a_lib.M42A 13D2 19D7 64C6

=PP1V5_S0_AIRPORT - @m42a_lib.M42A 43D3 64C6

=PP1V5_S0_SB_VCCSATAPLL - 24B5 25D6 64C6

@m42a_lib.M42A

=PP1V5_S0_SB_VCC1_5_A_ATX - 24A5 25C6 64C6

@m42a_lib.M42A

=PP1V5_S0_SB_VCCUSBPLL - 24A5 25B6 64C6

@m42a_lib.M42A

=PP1V5_S0_SB_VCC1_5_A_USB_CORE - 24A3 25B2 64C6

@m42a_lib.M42A

=PP1V5_S0_SB_VCC1_5_A - 24A3 25C2 64C6

@m42a_lib.M42A

=PP1V5_S0_SB - @m42a_lib.M42A 25A8 25C8 64C6

=PP1V5_S0_NB_VCCAUX - 16D1 17B6 19B6 19D7 64C6

@m42a_lib.M42A

=PP1V5_S0_NB_VCCD_HMPLL - 17C6 19D7 64C6

@m42a_lib.M42A

=PP1V5_S0_NB_VCCD_LVDS - 17C6 19B8 19D7 64C6

@m42a_lib.M42A

=PP1V5_S0_NB_PLL - @m42a_lib.M42A 19C6 19D7 64C6

=PP1V5_S0_NB_TVDAC - @m42a_lib.M42A 19A8 19D7 64C6

=PP1V5_S0_NB_3G - @m42a_lib.M42A 19B5 64C6

=PP1V5_S0_NB_3GPLL - @m42a_lib.M42A 19A5 64C6

=PP1V5_S0_SB_VCC1_5_A_ARX - 24B5 25D6 64C6

@m42a_lib.M42A

=PP1V5_S0_CPU - @m42a_lib.M42A 8B7 9D8 64C6

=PP1V5_S0_REG - @m42a_lib.M42A 62B8 64C8

PP1V5_S0 - @m42a_lib.M42A 5B2 64C7

=PP1V5_S0_SB_VCCUSBPLL - 24A5 25B6 64C6

@m42a_lib.M42A

=PP1V5_S0_SB_VCCSATAPLL - 24B5 25D6 64C6

@m42a_lib.M42A

=PP1V5_S0_SB_VCC1_5_A_USB_CORE - 24A3 25B2 64C6

@m42a_lib.M42A

=PP1V5_S0_SB_VCC1_5_A_ATX - 24A5 25C6 64C6

@m42a_lib.M42A

=PP1V5_S0_SB_VCC1_5_A_ARX - 24B5 25D6 64C6

@m42a_lib.M42A

=PP1V5_S0_SB_VCC1_5_A - 24A3 25C2 64C6

@m42a_lib.M42A

=PP1V5_S0_SB - @m42a_lib.M42A 25A8 25C8 64C6


=PP1V5_S0_NB_VCCD_LVDS - 17C6 19B8 19D7 64C6

@m42a_lib.M42A

=PP1V5_S0_NB_VCCD_HMPLL - 17C6 19D7 64C6

@m42a_lib.M42A

=PP1V5_S0_NB_VCCAUX - 16D1 17B6 19B6 19D7 64C6

@m42a_lib.M42A

=PP1V5_S0_NB_TVDAC - @m42a_lib.M42A 19A8 19D7 64C6

=PP1V5_S0_NB_PLL - @m42a_lib.M42A 19C6 19D7 64C6

=PP1V5_S0_NB_PCIE - @m42a_lib.M42A 13D2 19D7 64C6

=PP1V5_S0_NB_3GPLL - @m42a_lib.M42A 19A5 64C6

=PP1V5_S0_NB_3G - @m42a_lib.M42A 19B5 64C6

=PP1V5_S0_CPU - @m42a_lib.M42A 8B7 9D8 64C6

=PP1V5_S0_AIRPORT - @m42a_lib.M42A 43D3 64C6

=PP1V8_S3_MEM_NB =PP1V8_S3_MEM_NB - @m42a_lib.M42A 14C2 16B6 19D7 28D2 29D2

61C2 64C6

PP1V8_S3_MEM_NB - @m42a_lib.M42A 64C4

=PP2V5_S0_NB_CRTDAC =PP2V5_S0_NB_CRTDAC - 19D4 19D7 64B6

@m42a_lib.M42A

=PP2V5_S0_NB_VCCA_3GBG - 17D6 19B7 19D7 64B6

@m42a_lib.M42A

=PP2V5_S0_NB_VCC_TXLVDS - 17D6 19B8 19D7 64B6

@m42a_lib.M42A

=PP2V5_S0_NB_DISP_PLL - 19D6 64B6

@m42a_lib.M42A

=PP2V5_S0_NB_VCCA_LVDS - 17C6 19C7 19D1 64B6

@m42a_lib.M42A

=PP2V5_S0_TMDS - @m42a_lib.M42A 64B6 68B7

=PP2V5_S0_NB_VCCSYNC - 17D6 19B6 19D7 64B6

@m42a_lib.M42A

=PP2V5_S0_REG - @m42a_lib.M42A 60C2 63B3 64B8

PP2V5_S0 - @m42a_lib.M42A 5B2 64B7

=PP2V5_S0_TMDS - @m42a_lib.M42A 64B6 68B7

=PP2V5_S0_REG - @m42a_lib.M42A 60C2 63B3 64B8

=PP2V5_S0_NB_VCC_TXLVDS - 17D6 19B8 19D7 64B6

@m42a_lib.M42A

=PP2V5_S0_NB_VCCSYNC - 17D6 19B6 19D7 64B6

@m42a_lib.M42A

=PP2V5_S0_NB_VCCA_LVDS - 17C6 19C7 19D1 64B6

@m42a_lib.M42A

=PP2V5_S0_NB_VCCA_3GBG - 17D6 19B7 19D7 64B6

@m42a_lib.M42A

=PP2V5_S0_NB_DISP_PLL - 19D6 64B6

@m42a_lib.M42A

=PP3V3_S0_FAN_RT =PP3V3_S0_FAN_RT - @m42a_lib.M42A 5D2 51C4 64A6

=PP3V3_S0_ENET - @m42a_lib.M42A 36C8 64A6

=PP3V3_S0_FW - @m42a_lib.M42A 39C6 64A6

=PP3V3_S0_2V5S0 - @m42a_lib.M42A 60C4 64A6

=PP3V3_S0_1V51V05S0 - 62B1 64A6

@m42a_lib.M42A

=PP3V3_S0_SMBUS_SMC_BSB - 27B1 64A6

@m42a_lib.M42A

=PP3V3_S0_RSTBUF - @m42a_lib.M42A 26B4 64A6

=PP3V3_S0_SMBUS_SB - @m42a_lib.M42A 27D8 64A6

=PP3V3_S0_SMBUS_SMC_0 - 27D5 64A6

@m42a_lib.M42A

=PP3V3_S0_SMBUS_SMC_MLB - 27C5 64A6

@m42a_lib.M42A

=PP3V3_S0_ALLSYSPG - @m42a_lib.M42A 63B1 64A6

=PP3V3_S0_LCD - @m42a_lib.M42A 64A6 67B5 67B5 67B7 67C6

=PP3V3_S0_PBATTISENS - 64A6 66B3

@m42a_lib.M42A

=PP3V3_S0_PDCISENS - @m42a_lib.M42A 62A5 64A6 66C4

=PP3V3_S0_CPUPOWER - @m42a_lib.M42A 48C2 64A6

=PP3V3_S0_SB - @m42a_lib.M42A 22B5 25D8 34C8 64B6

=PP3V3_S0_SB_GPIO - @m42a_lib.M42A 21C3 21D3 23B2 23D5 64B6

=PP3V3_S0_SB_VCC3_3 - 24B5 24B5 25B8 25C6 64B6

@m42a_lib.M42A

=PP3V3_S0_SB_VCC3_3_PCI - 24B3 25A4 64B6

@m42a_lib.M42A

=PP3V3_S0_SB_VCC3_3_IDE - 24C3 25B4 64B6

@m42a_lib.M42A

=PP3V3_S0_SB_PCI - @m42a_lib.M42A 26D1 64B6

=PP3V3_S0_SB_PM - @m42a_lib.M42A 26B6 26B8 64B6

=PP3V3_S0_PATA - @m42a_lib.M42A 34C2 64A6

=PP3V3_S0_SMC_LS - @m42a_lib.M42A 46D3 64A6

=PP3V3_S0_NB - @m42a_lib.M42A 14C7 14D6 19C7 20A4 20B4

20B4 64A6

=PP3V3_S0_SB_VCCLAN3_3 - 24D3 25D3 64A6

@m42a_lib.M42A

=PP3V3_S0_SB_3V3_1V5_VCCHDA - 24C3 25C4 64A6

@m42a_lib.M42A

=PPSPD_S0_MEM - @m42a_lib.M42A 28A7 29A3 29A7 64A6

=PP3V3_S0_CK410 - @m42a_lib.M42A 32C7 32D3 32D8 64A6

=PP3V3_S0_AIRPORT - @m42a_lib.M42A 43C3 64A6

=PP3V3_S0_TPM - @m42a_lib.M42A 53D4 64A6

=PP3V3_S0_AUDIO - @m42a_lib.M42A 54A6 54D7 56D8 57B5 64A6

=PP3V3_S0_TMDS - @m42a_lib.M42A 64A6 68B1 68B2 68C8 68C8

68D8 68D8 69B7 69D1 69D5

=PP3V3_S0_THRM_SNR - @m42a_lib.M42A 10C4 49B3 49D3 64A6

=PP3V3_S0_IMVP6 - @m42a_lib.M42A 58D8 64A6

=PP3V3_S0_NB_VCC_HV - 17C6 19B7 19C7 64B6

@m42a_lib.M42A

=PP3V3_S0_FET - @m42a_lib.M42A 63C3 64B8

PP3V3_S0 - @m42a_lib.M42A 5A2 64B7

=PPSPD_S0_MEM - @m42a_lib.M42A 28A7 29A3 29A7 64A6

=PP3V3_S0_TPM - @m42a_lib.M42A 53D4 64A6

=PP3V3_S0_TMDS - @m42a_lib.M42A 64A6 68B1 68B2 68C8 68C8

68D8 68D8 69B7 69D1 69D5

=PP3V3_S0_THRM_SNR - @m42a_lib.M42A 10C4 49B3 49D3 64A6

=PP3V3_S0_SMC_LS - @m42a_lib.M42A 46D3 64A6

=PP3V3_S0_SMBUS_SMC_MLB - 27C5 64A6

@m42a_lib.M42A

=PP3V3_S0_SMBUS_SMC_BSB - 27B1 64A6

@m42a_lib.M42A

=PP3V3_S0_SMBUS_SMC_0 - 27D5 64A6

@m42a_lib.M42A

=PP3V3_S0_SMBUS_SB - @m42a_lib.M42A 27D8 64A6

=PP3V3_S0_SB_VCCLAN3_3 - 24D3 25D3 64A6

@m42a_lib.M42A

=PP3V3_S0_SB_VCC3_3_PCI - 24B3 25A4 64B6

@m42a_lib.M42A

=PP3V3_S0_SB_VCC3_3_IDE - 24C3 25B4 64B6

@m42a_lib.M42A

=PP3V3_S0_SB_VCC3_3 - 24B5 24B5 25B8 25C6 64B6

@m42a_lib.M42A

=PP3V3_S0_SB_PM - @m42a_lib.M42A 26B6 26B8 64B6

=PP3V3_S0_SB_PCI - @m42a_lib.M42A 26D1 64B6

=PP3V3_S0_SB_GPIO - @m42a_lib.M42A 21C3 21D3 23B2 23D5 64B6

=PP3V3_S0_SB_3V3_1V5_VCCHDA - 24C3 25C4 64A6

@m42a_lib.M42A

=PP3V3_S0_SB - @m42a_lib.M42A 22B5 25D8 34C8 64B6

=PP3V3_S0_RSTBUF - @m42a_lib.M42A 26B4 64A6

=PP3V3_S0_PDCISENS - @m42a_lib.M42A 62A5 64A6 66C4

=PP3V3_S0_PBATTISENS - 64A6 66B3

@m42a_lib.M42A

=PP3V3_S0_PATA - @m42a_lib.M42A 34C2 64A6

=PP3V3_S0_NB_VCC_HV - 17C6 19B7 19C7 64B6

@m42a_lib.M42A

=PP3V3_S0_NB - @m42a_lib.M42A 14C7 14D6 19C7 20A4 20B4

20B4 64A6

=PP3V3_S0_LCD - @m42a_lib.M42A 64A6 67B5 67B5 67B7 67C6

=PP3V3_S0_IMVP6 - @m42a_lib.M42A 58D8 64A6

=PP3V3_S0_FW - @m42a_lib.M42A 39C6 64A6

=PP3V3_S0_FET - @m42a_lib.M42A 63C3 64B8

=PP3V3_S0_ENET - @m42a_lib.M42A 36C8 64A6

=PP3V3_S0_CPUPOWER - @m42a_lib.M42A 48C2 64A6

=PP3V3_S0_CK410 - @m42a_lib.M42A 32C7 32D3 32D8 64A6

=PP3V3_S0_AUDIO - @m42a_lib.M42A 54A6 54D7 56D8 57B5 64A6

=PP3V3_S0_ALLSYSPG - @m42a_lib.M42A 63B1 64A6

=PP3V3_S0_AIRPORT - @m42a_lib.M42A 43C3 64A6

=PP3V3_S0_2V5S0 - @m42a_lib.M42A 60C4 64A6

=PP3V3_S0_1V51V05S0 - 62B1 64A6

@m42a_lib.M42A

=PP3V42_G3H_LPCPLUS =PP3V42_G3H_LPCPLUS - 5D2 47C6 64D1

@m42a_lib.M42A

=PP3V42_G3H_SMCVREF - 46C8 64D1

@m42a_lib.M42A

=PP3V42_G3H_SMC - @m42a_lib.M42A 45D2 45D3 45D3 46D1 46D5

46D8 48C8 64D1

=PP3V42_G3H_SB_RTC - @m42a_lib.M42A 26D6 64D1

=PP3V42_G3H_ACIN - @m42a_lib.M42A 64D1 65C4 65C8 66A5

=PP3V42_G3H_SMC_CLK - 46A8 64D1

@m42a_lib.M42A

=PP3V42_G3H_LIDSWITCH - 64D1 65A8

@m42a_lib.M42A

=PP3V42_G3H_REG - @m42a_lib.M42A 63D1 64D3

=PP3V42_G3H_SMBUS_SMC_BSA - 27C3 64D1

@m42a_lib.M42A

=PP3V42_G3H_PWRCTL - @m42a_lib.M42A 63B8 63C8 64D1

PP3V42_G3H - @m42a_lib.M42A 5A2 64D1

=PP3V42_G3H_SMC_CLK - 46A8 64D1

@m42a_lib.M42A

=PP3V42_G3H_SMCVREF - 46C8 64D1

@m42a_lib.M42A

=PP3V42_G3H_SMC - @m42a_lib.M42A 45D2 45D3 45D3 46D1 46D5

46D8 48C8 64D1

=PP3V42_G3H_SMBUS_SMC_BSA - 27C3 64D1

@m42a_lib.M42A

=PP3V42_G3H_SB_RTC - @m42a_lib.M42A 26D6 64D1

=PP3V42_G3H_REG - @m42a_lib.M42A 63D1 64D3

=PP3V42_G3H_PWRCTL - @m42a_lib.M42A 63B8 63C8 64D1

=PP3V42_G3H_LIDSWITCH - 64D1 65A8

@m42a_lib.M42A

=PP3V42_G3H_ACIN - @m42a_lib.M42A 64D1 65C4 65C8 66A5

=PP5V_S0_FAN_RT =PP5V_S0_FAN_RT - @m42a_lib.M42A 5D2 51C4 64D3

=PP5V_S0_ISENSECAL - @m42a_lib.M42A 48A8 64D3

=PP5V_S0_LCD - @m42a_lib.M42A 64D3 67D7

=PP5V_S0_TMDS - @m42a_lib.M42A 64D3 68B7 69C6

=PP5V_S0_IMVP6 - @m42a_lib.M42A 58D8 64D3

=PP5V_1V51V05S0_VCC - 62A8 64D3

@m42a_lib.M42A

=PP5V_S0_NB_TVDAC - @m42a_lib.M42A 19C4 19C7 64D3

=PP5V_S0_LPCPLUS - @m42a_lib.M42A 5D2 47C6 64D3

=PP5V_S0_AUDIO_PWR - @m42a_lib.M42A 55B8 55B8 55D8 64D3

=PP5V_S0_AUDIO - @m42a_lib.M42A 54A6 55C8 64D3

=PP5V_S0_MEMVTT - @m42a_lib.M42A 31C6 64D3

=PP5V_S0_FET - @m42a_lib.M42A 63C3 64D6

=PP5V_S0_SATA - @m42a_lib.M42A 35C6 64D3

=PP5V_S0_SB - @m42a_lib.M42A 25D8 64D3

PP5V_S0 - @m42a_lib.M42A 5A2 64D4

=PP5V_S0_TMDS - @m42a_lib.M42A 64D3 68B7 69C6

=PP5V_S0_SB - @m42a_lib.M42A 25D8 64D3

=PP5V_S0_SATA - @m42a_lib.M42A 35C6 64D3

=PP5V_S0_NB_TVDAC - @m42a_lib.M42A 19C4 19C7 64D3

=PP5V_S0_MEMVTT - @m42a_lib.M42A 31C6 64D3

=PP5V_S0_LPCPLUS - @m42a_lib.M42A 5D2 47C6 64D3

=PP5V_S0_LCD - @m42a_lib.M42A 64D3 67D7

=PP5V_S0_ISENSECAL - @m42a_lib.M42A 48A8 64D3

=PP5V_S0_IMVP6 - @m42a_lib.M42A 58D8 64D3

=PP5V_S0_FET - @m42a_lib.M42A 63C3 64D6

=PP5V_S0_AUDIO_PWR - @m42a_lib.M42A 55B8 55B8 55D8 64D3

=PP5V_S0_AUDIO - @m42a_lib.M42A 54A6 55C8 64D3

=PP5V_1V51V05S0_VCC - 62A8 64D3

@m42a_lib.M42A

=PP5V_S0_IDE_PATA =PP5V_S0_IDE_PATA - @m42a_lib.M42A 34C5

PP5V_S0_IDE_PATA - @m42a_lib.M42A 34D3

=PPDCIN_G3H =PPDCIN_G3H - @m42a_lib.M42A 64B3 65D3

=PPVBATT_G3H - @m42a_lib.M42A 64B3 66B2

=PPVIN_G3H_P3V42G3H - 63D3 64B1

@m42a_lib.M42A

PPDCIN_G3H - @m42a_lib.M42A 64B1

=PPVIN_G3H_P3V42G3H - 63D3 64B1

@m42a_lib.M42A

=PPVBATT_G3H - @m42a_lib.M42A 64B3 66B2

=SMBUS_ATS_SCL =SMBUS_ATS_SCL - @m42a_lib.M42A 27D1 67A2

SMBUS_SMC_RMT_SCL - @m42a_lib.M42A 27D2

SMB_RMT_CLK - @m42a_lib.M42A 27D3 45B5

SMBUS_SMC_RMT_SCL - @m42a_lib.M42A 27D2

=SMBUS_ATS_SDA =SMBUS_ATS_SDA - @m42a_lib.M42A 27C1 67A2

SMBUS_SMC_RMT_SDA - @m42a_lib.M42A 27D2

SMB_RMT_DATA - @m42a_lib.M42A 27D3 45B5

SMBUS_SMC_RMT_SDA - @m42a_lib.M42A 27D2

=SMB_AIRPORT_CLK =SMB_AIRPORT_CLK - @m42a_lib.M42A 27C6 43B4

=SMB_GEYSER_CLK - @m42a_lib.M42A 27B6 40C4

SMBUS_SB_SCL - @m42a_lib.M42A 27D7

=I2C_SODIMMB_SCL - @m42a_lib.M42A 27C6 29A6

SMB_CLK - @m42a_lib.M42A 23D5 27D8

=I2C_SODIMMA_SCL - @m42a_lib.M42A 27D6 28A6

SMB_CK410_CLK - @m42a_lib.M42A 27D6 32B6

SMB_CLK - @m42a_lib.M42A 23D5 27D8

SMB_CK410_CLK - @m42a_lib.M42A 27D6 32B6

SMBUS_SB_SCL - @m42a_lib.M42A 27D7

=SMB_GEYSER_CLK - @m42a_lib.M42A 27B6 40C4

=I2C_SODIMMB_SCL - @m42a_lib.M42A 27C6 29A6

=I2C_SODIMMA_SCL - @m42a_lib.M42A 27D6 28A6

=SMB_AIRPORT_DATA =SMB_AIRPORT_DATA - @m42a_lib.M42A 27C6 43B4

=SMB_GEYSER_DATA - @m42a_lib.M42A 27B6 40C4

SMBUS_SB_SDA - @m42a_lib.M42A 27D7

=I2C_SODIMMB_SDA - @m42a_lib.M42A 27C6 29A6

SMB_DATA - @m42a_lib.M42A 23D5 27D8

=I2C_SODIMMA_SDA - @m42a_lib.M42A 27C6 28A6

SMB_CK410_DATA - @m42a_lib.M42A 27D6 32B6

SMB_DATA - @m42a_lib.M42A 23D5 27D8

SMB_CK410_DATA - @m42a_lib.M42A 27D6 32B6

SMBUS_SB_SDA - @m42a_lib.M42A 27D7

=SMB_GEYSER_DATA - @m42a_lib.M42A 27B6 40C4

=I2C_SODIMMB_SDA - @m42a_lib.M42A 27C6 29A6

=I2C_SODIMMA_SDA - @m42a_lib.M42A 27C6 28A6

=USB2_AIRPORT_N =USB2_AIRPORT_N - @m42a_lib.M42A 6B2 43B4

USB_H_N - @m42a_lib.M42A 6B1 22C2

USB2_AIRPORT_N - @m42a_lib.M42A 6B2

=USB2_AIRPORT_P =USB2_AIRPORT_P - @m42a_lib.M42A 6B2 43B4

USB_H_P - @m42a_lib.M42A 6B1 22C2

USB2_AIRPORT_P - @m42a_lib.M42A 6B2

=USB2_CAMERA_N =USB2_CAMERA_N - @m42a_lib.M42A 6C2 67A4

USB_D_N - @m42a_lib.M42A 6C1 22C2

USB2_CAMERA_N - @m42a_lib.M42A 6C2

=USB2_CAMERA_P =USB2_CAMERA_P - @m42a_lib.M42A 6C2 67B4

USB_D_P - @m42a_lib.M42A 6C1 22C2

USB2_CAMERA_P - @m42a_lib.M42A 6C2

ACIN_1V20_REF ACIN_1V20_REF - @m42a_lib.M42A 65C4

ACIN_DIV ACIN_DIV - @m42a_lib.M42A 65C4

ACIN_ENABLE_GATE ACIN_ENABLE_GATE - @m42a_lib.M42A 5C1 65C3

ACIN_ENABLE_L ACIN_ENABLE_L - @m42a_lib.M42A 65C2

ACIN_ENABLE_L_DIV ACIN_ENABLE_L_DIV - @m42a_lib.M42A 65C1

ACZ_BITCLK ACZ_BITCLK - @m42a_lib.M42A 5C1 21C7 54D7

ACZ_RST_L ACZ_RST_L - @m42a_lib.M42A 5C1 21C7 54C7 57C3

ACZ_SDATAIN<0> ACZ_SDATAIN<0> - @m42a_lib.M42A 5D1 21C7 54D7

ACZ_SDATAOUT ACZ_SDATAOUT - @m42a_lib.M42A 5D1 21C7 54D7

ACZ_SYNC ACZ_SYNC - @m42a_lib.M42A 5C1 21C7 54D7

ADAPTER_SENSE ADAPTER_SENSE - @m42a_lib.M42A 65C7

AIRPORT_CLK100M_PCIE AIRPORT_CLK100M_PCIE_N - 33B2 33C4 43C6

_N @m42a_lib.M42A

AIRPORT_CLK100M_PCIE AIRPORT_CLK100M_PCIE_P - 33B2 33D4 43C6

_P @m42a_lib.M42A

AIRPORT_RST_L AIRPORT_RST_L - @m42a_lib.M42A 26B1 43C4

ALL_SYS_PWRGD ALL_SYS_PWRGD - @m42a_lib.M42A 5B2 26A5 45D8 63B1

ALS_GAIN ALS_GAIN - @m42a_lib.M42A 45B5 46C6

ALS_LEFT ALS_LEFT - @m42a_lib.M42A 5A7 45A8 46C3

ALS_RIGHT ALS_RIGHT - @m42a_lib.M42A 45A8 46C3

AUDIO_SHIELD_PLANE AUDIO_SHIELD_PLANE - @m42a_lib.M42A 56C3

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1

100

AUD_4V5_SHDN_L AUD_4V5_SHDN_L - @m42a_lib.M42A 54A5

AUD_ALC_COUT AUD_ALC_COUT - @m42a_lib.M42A 54B5

AUD_ANALOG_FILT_1 AUD_ANALOG_FILT_1 - @m42a_lib.M42A 54C4

AUD_ANALOG_FILT_2 AUD_ANALOG_FILT_2 - @m42a_lib.M42A 54C4

AUD_BI_PORT_A_L AUD_BI_PORT_A_L - @m42a_lib.M42A 54C1 57C3

AUD_BI_PORT_A_R AUD_BI_PORT_A_R - @m42a_lib.M42A 54C1 57B3

AUD_BI_PORT_B_L AUD_BI_PORT_B_L - @m42a_lib.M42A 54C1 57A6

AUD_BI_PORT_B_R - @m42a_lib.M42A 54C1 57A6

AUD_BI_PORT_C_L AUD_BI_PORT_C_L - @m42a_lib.M42A 54C7 55B8

AUD_BI_PORT_C_R AUD_BI_PORT_C_R - @m42a_lib.M42A 54C7 55C8

AUD_BI_PORT_D_L AUD_BI_PORT_D_L - @m42a_lib.M42A 54C7 57A5

AUD_BI_PORT_D_R AUD_BI_PORT_D_R - @m42a_lib.M42A 54C7 55A8

AUD_BI_PORT_E_L AUD_BI_PORT_E_L - @m42a_lib.M42A 54C1 57A5

AUD_BI_PORT_E_R AUD_BI_PORT_E_R - @m42a_lib.M42A 54C1 57A5

AUD_BI_PORT_F_L AUD_BI_PORT_F_L - @m42a_lib.M42A 54C1 57B3

AUD_BI_PORT_F_R AUD_BI_PORT_F_R - @m42a_lib.M42A 54C1 57A3

AUD_BYPASS AUD_BYPASS - @m42a_lib.M42A 54C4

AUD_CONNJ1_RING AUD_CONNJ1_RING - @m42a_lib.M42A 56C7

AUD_CONNJ1_RING_F AUD_CONNJ1_RING_F - @m42a_lib.M42A 56C6

AUD_CONNJ1_SLEEVE AUD_CONNJ1_SLEEVE - @m42a_lib.M42A 56D7

AUD_CONNJ1_SLEEVEDET AUD_CONNJ1_SLEEVEDET - 56C7

@m42a_lib.M42A

AUD_CONNJ1_SLEEVEDET AUD_CONNJ1_SLEEVEDET_F - 56C6

_F @m42a_lib.M42A

AUD_CONNJ1_SLEEVE_F AUD_CONNJ1_SLEEVE_F - 56D5

@m42a_lib.M42A

AUD_CONNJ1_TIP AUD_CONNJ1_TIP - @m42a_lib.M42A 56C7

AUD_CONNJ1_TIPDET AUD_CONNJ1_TIPDET - @m42a_lib.M42A 56D7

AUD_CONNJ1_TIPDET_F AUD_CONNJ1_TIPDET_F - 56D6

@m42a_lib.M42A

AUD_CONNJ1_TIP_F AUD_CONNJ1_TIP_F - @m42a_lib.M42A 56C6

AUD_CONNJ2_RING AUD_CONNJ2_RING - @m42a_lib.M42A 56B7

AUD_CONNJ2_RING_F AUD_CONNJ2_RING_F - @m42a_lib.M42A 56B6

AUD_CONNJ2_SLEEVE AUD_CONNJ2_SLEEVE - @m42a_lib.M42A 56B7

AUD_CONNJ2_SLEEVEDET AUD_CONNJ2_SLEEVEDET - 56A7

@m42a_lib.M42A

AUD_CONNJ2_SLEEVEDET AUD_CONNJ2_SLEEVEDET_F - 56A6

_F @m42a_lib.M42A

AUD_CONNJ2_SLEEVE_F AUD_CONNJ2_SLEEVE_F - 56B6

@m42a_lib.M42A

AUD_CONNJ2_TIP AUD_CONNJ2_TIP - @m42a_lib.M42A 56B7

AUD_CONNJ2_TIPDET AUD_CONNJ2_TIPDET - @m42a_lib.M42A 56B7

AUD_CONNJ2_TIPDET_F AUD_CONNJ2_TIPDET_F - 56B6

@m42a_lib.M42A

AUD_CONNJ2_TIP_F AUD_CONNJ2_TIP_F - @m42a_lib.M42A 56B6

AUD_GPIO_0 AUD_GPIO_0 - @m42a_lib.M42A 54B8 55A8

AUD_GPIO_0_R AUD_GPIO_0_R - @m42a_lib.M42A 54B7 54C7

AUD_GPIO_1 AUD_GPIO_1 - @m42a_lib.M42A 54B8 57C3

AUD_GPIO_1_R AUD_GPIO_1_R - @m42a_lib.M42A 54A7 54C7

AUD_GPIO_2 AUD_GPIO_2 - @m42a_lib.M42A 54C7

AUD_INJACK_INSERT_L AUD_INJACK_INSERT_L - 57C7

@m42a_lib.M42A

AUD_J1_COM AUD_J1_COM - @m42a_lib.M42A 56C4

AUD_J1_DET_RC AUD_J1_DET_RC - @m42a_lib.M42A 57D7

AUD_J1_SLEEVEDET_INV AUD_J1_SLEEVEDET_INV - 57C7

@m42a_lib.M42A

AUD_J1_SLEEVEDET_R AUD_J1_SLEEVEDET_R - @m42a_lib.M42A 56C3 57C6 57C8

AUD_J1_TIPDET_R AUD_J1_TIPDET_R - @m42a_lib.M42A 56C3 57D8

AUD_J2_COM AUD_J2_COM - @m42a_lib.M42A 56B4

AUD_J2_DET_RC AUD_J2_DET_RC - @m42a_lib.M42A 57B7

AUD_J2_OPT_OUT AUD_J2_OPT_OUT - @m42a_lib.M42A 56B7

AUD_J2_SLEEVEDET_R AUD_J2_SLEEVEDET_R - @m42a_lib.M42A 56A4 57B8

AUD_J2_TIPDET_R AUD_J2_TIPDET_R - @m42a_lib.M42A 56A4 57B8

AUD_JDREF AUD_JDREF - @m42a_lib.M42A 54C4

AUD_OUTJACK_INSERT_L AUD_OUTJACK_INSERT_L - 57D7

@m42a_lib.M42A

AUD_PORTA_DET_L AUD_PORTA_DET_L - @m42a_lib.M42A 57D5

AUD_PORTA_L AUD_PORTA_L - @m42a_lib.M42A 56C3 57D1

AUD_PORTA_L_R AUD_PORTA_L_R - @m42a_lib.M42A 57B1 57D3

AUD_PORTA_R AUD_PORTA_R - @m42a_lib.M42A 56C3 57C1

AUD_PORTA_R_R AUD_PORTA_R_R - @m42a_lib.M42A 57B1 57C3

AUD_PORTE_DET_L AUD_PORTE_DET_L - @m42a_lib.M42A 57D5

AUD_PORTF_L AUD_PORTF_L - @m42a_lib.M42A 56B4 57B1

AUD_PORTF_L_R AUD_PORTF_L_R - @m42a_lib.M42A 57B2

AUD_PORTF_R AUD_PORTF_R - @m42a_lib.M42A 56B4 57A1

AUD_PORTF_R_R AUD_PORTF_R_R - @m42a_lib.M42A 57A2

AUD_PORTG_DET_L AUD_PORTG_DET_L - @m42a_lib.M42A 57C5

AUD_SENSE_A AUD_SENSE_A - @m42a_lib.M42A 54C1 57C5 57D8

AUD_SENSE_B AUD_SENSE_B - @m42a_lib.M42A 54C1 57C4 57C8 57D8

AUD_SPDIF_IN AUD_SPDIF_IN - @m42a_lib.M42A 54C1 56B3

AUD_SPDIF_OUT AUD_SPDIF_OUT - @m42a_lib.M42A 54D1 56D3

AUD_SPDIF_OUT_R AUD_SPDIF_OUT_R - @m42a_lib.M42A 54D4

AUD_SPKRAMP_INL AUD_SPKRAMP_INL - @m42a_lib.M42A 55B6

AUD_SPKRAMP_INL_L AUD_SPKRAMP_INL_L - @m42a_lib.M42A 55B7

AUD_SPKRAMP_INR AUD_SPKRAMP_INR - @m42a_lib.M42A 55C6

AUD_SPKRAMP_INR_L AUD_SPKRAMP_INR_L - @m42a_lib.M42A 55C7

AUD_SPKRAMP_INSUB AUD_SPKRAMP_INSUB - @m42a_lib.M42A 55A6

AUD_SPKRAMP_INSUB_L AUD_SPKRAMP_INSUB_L - 55A7

@m42a_lib.M42A

AUD_SPKRAMP_SHUTDOWN AUD_SPKRAMP_SHUTDOWN_L - 55A6 55B8 55C8

_L @m42a_lib.M42A

AUD_VREF_FILT AUD_VREF_FILT - @m42a_lib.M42A 54C4

AUD_VREF_PORT_B AUD_VREF_PORT_B - @m42a_lib.M42A 54C1 57A6

BAL_IN_COM BAL_IN_COM - @m42a_lib.M42A 54C7 57A3

BAL_IN_L BAL_IN_L - @m42a_lib.M42A 54C7 57A3

BAL_IN_R BAL_IN_R - @m42a_lib.M42A 54C7 57A3

BATT_ENABLE_L BATT_ENABLE_L - @m42a_lib.M42A 66A4

BATT_FET_DRAIN BATT_FET_DRAIN - @m42a_lib.M42A 66A5

BATT_FET_GATE BATT_FET_GATE - @m42a_lib.M42A 66A4

BATT_IN BATT_IN - @m42a_lib.M42A 5D1

BATT_ISENSE BATT_ISENSE - @m42a_lib.M42A 66B2

BATT_NEG BATT_NEG - @m42a_lib.M42A 5D1 65A6

BATT_POS BATT_POS - @m42a_lib.M42A 5D1 65A6

BATT_POS_F BATT_POS_F - @m42a_lib.M42A 65A2 66B2

BATT_RC BATT_RC - @m42a_lib.M42A 66A5

BEEP BEEP - @m42a_lib.M42A 54C6

BIOS_REC BIOS_REC - @m42a_lib.M42A 23A6 23C5

BKLIGHT_CTL BKLIGHT_CTL - @m42a_lib.M42A 67C4

BOOT_LPC_SPI_L BOOT_LPC_SPI_L - @m42a_lib.M42A 5C2 22B3 45C8 47C6

BYPASS_R_DRV BYPASS_R_DRV - @m42a_lib.M42A 66A3

BYPASS_R_GATE BYPASS_R_GATE - @m42a_lib.M42A 66A3

CHASSIS_AUDIO_JACK_I CHASSIS_AUDIO_JACK_ISOL - 56A3 56A8 56B1 56B6 56B6

SOL @m42a_lib.M42A 56C1 56C1 56C8

CHGR_ACLIM CHGR_ACLIM - @m42a_lib.M42A 66C6

CHGR_ACPRN CHGR_ACPRN - @m42a_lib.M42A 66B6

CHGR_ACSET CHGR_ACSET - @m42a_lib.M42A 66C6

CHGR_ACSET_RC CHGR_ACSET_RC - @m42a_lib.M42A 66C8

CHGR_BGATE CHGR_BGATE - @m42a_lib.M42A 66C5

CHGR_BOOT CHGR_BOOT - @m42a_lib.M42A 66C5

CHGR_BOOT_RC CHGR_BOOT_RC - @m42a_lib.M42A 66C4

CHGR_CHLIM CHGR_CHLIM - @m42a_lib.M42A 66B6

CHGR_CSIN CHGR_CSIN - @m42a_lib.M42A 66C5

CHGR_CSON CHGR_CSON - @m42a_lib.M42A 66C6

CHGR_CSOP CHGR_CSOP - @m42a_lib.M42A 66C6

CHGR_DCIN CHGR_DCIN - @m42a_lib.M42A 66C5

CHGR_DCPRN CHGR_DCPRN - @m42a_lib.M42A 66B5

CHGR_DCSET CHGR_DCSET - @m42a_lib.M42A 66B5

CHGR_EN CHGR_EN - @m42a_lib.M42A 66B5

CHGR_EN_L CHGR_EN_L - @m42a_lib.M42A 66A6

CHGR_ICM CHGR_ICM - @m42a_lib.M42A 66C6

CHGR_ICM_R CHGR_ICM_R - @m42a_lib.M42A 66C6

CHGR_ICOMP CHGR_ICOMP - @m42a_lib.M42A 66C6

CHGR_ICOMP_RC CHGR_ICOMP_RC - @m42a_lib.M42A 66C7

CHGR_LGATE CHGR_LGATE - @m42a_lib.M42A 66C5

CHGR_PHASE CHGR_PHASE - @m42a_lib.M42A 66C5

CHGR_PHASE_RC CHGR_PHASE_RC - @m42a_lib.M42A 66B4

CHGR_SGATE CHGR_SGATE - @m42a_lib.M42A 66C5

CHGR_UGATE CHGR_UGATE - @m42a_lib.M42A 66C5

CHGR_VADJ CHGR_VADJ - @m42a_lib.M42A 66B6 66C6

CHGR_VCOMP CHGR_VCOMP - @m42a_lib.M42A 66C6

CHGR_VCOMP_CC CHGR_VCOMP_CC - @m42a_lib.M42A 66C7

CHGR_VCOMP_RC CHGR_VCOMP_RC - @m42a_lib.M42A 66C7

CHGR_VDD CHGR_VDD - @m42a_lib.M42A 66B6 66D6

CHGR_VDDP CHGR_VDDP - @m42a_lib.M42A 66C5

CHGR_VREF CHGR_VREF - @m42a_lib.M42A 66B6

CK410_CLK14P3M_TIMER CK410_CLK14P3M_TIMER - 32A4 33B8

@m42a_lib.M42A

CK410_CPU0_N CK410_CPU0_N - @m42a_lib.M42A 5C7 32C4 33D5

CK410_CPU0_P CK410_CPU0_P - @m42a_lib.M42A 5C7 32C4 33D5

CK410_CPU1_N CK410_CPU1_N - @m42a_lib.M42A 5C7 32C4 33D5

CK410_CPU1_P CK410_CPU1_P - @m42a_lib.M42A 5C7 32C4 33D5

CK410_CPU2_ITP_SRC10 CK410_CPU2_ITP_SRC10_N - 5C7 32C4 33D5

_N @m42a_lib.M42A

CK410_CPU2_ITP_SRC10 CK410_CPU2_ITP_SRC10_P - 5C7 32C4 33D5

_P @m42a_lib.M42A

CK410_DOT96_27M_N CK410_DOT96_27M_N - @m42a_lib.M42A 5C7 32A4 33B5

CK410_DOT96_27M_P CK410_DOT96_27M_P - @m42a_lib.M42A 5C7 32A4 33B5

CK410_FSB_TEST_MODE CK410_FSB_TEST_MODE - 32C6 33B8

@m42a_lib.M42A

CK410_IREF CK410_IREF - @m42a_lib.M42A 32B6

CK410_LVDS_N CK410_LVDS_N - @m42a_lib.M42A 5C7 32B4 33A5

CK410_LVDS_P CK410_LVDS_P - @m42a_lib.M42A 5C7 32B4 33A5

CK410_PCI1_CLK CK410_PCI1_CLK - @m42a_lib.M42A 32B6 33D8



CK410_PCI4_CLK CK410_PCI4_CLK - @m42a_lib.M42A 32B6

CK410_PCI4_CLK_SPN CK410_PCI4_CLK_SPN - @m42a_lib.M42A 5C7

CK410_PCI5_FCTSEL1 CK410_PCI5_FCTSEL1 - @m42a_lib.M42A 32B6 33A8

CK410_PCIF0_CLK CK410_PCIF0_CLK - @m42a_lib.M42A 32B7 33D8

CK410_PCIF1_CLK CK410_PCIF1_CLK - @m42a_lib.M42A 5C7 32B6 33D8

CK410_PD_VTT_PWRGD_L CK410_PD_VTT_PWRGD_L - 26A8 32A4

@m42a_lib.M42A

VR_PWRGD_CK410_L - @m42a_lib.M42A 26A7 58C7

CK410_REF1_FCTSEL0 CK410_REF1_FCTSEL0 - @m42a_lib.M42A 32A4 33A8

CK410_SRC1_N CK410_SRC1_N - @m42a_lib.M42A 6B4 32B4

CK410_SRC1_N_SPN - @m42a_lib.M42A 5C7 6B3

CK410_SRC1_P CK410_SRC1_P - @m42a_lib.M42A 6B4 32B4

CK410_SRC1_P_SPN - @m42a_lib.M42A 5C7 6B3

CK410_SRC2_N CK410_SRC2_N - @m42a_lib.M42A 5C7 32B4 33C5

CK410_SRC2_P CK410_SRC2_P - @m42a_lib.M42A 5C7 32B4 33C5





CK410_SRC4_N CK410_SRC4_N - @m42a_lib.M42A 5C7 32B4 33B5

CK410_SRC4_P CK410_SRC4_P - @m42a_lib.M42A 5C7 32B4 33B5


CK410_SRC5_P CK410_SRC5_P - @m42a_lib.M42A 5C7 32B4 33C5


CK410_SRC6_P CK410_SRC6_P - @m42a_lib.M42A 5C7 32B4 33D5





CK410_SRC8_N CK410_SRC8_N - @m42a_lib.M42A 5B7 32A4 33C5

CK410_SRC8_P CK410_SRC8_P - @m42a_lib.M42A 5B7 32A4 33C5

CK410_SRC_CLKREQ1_L CK410_SRC_CLKREQ1_L - 6B4 32B4

@m42a_lib.M42A

CK410_SRC_CLKREQ1_L_SPN - 5B7 6B3

@m42a_lib.M42A

CK410_SRC_CLKREQ3_L CK410_SRC_CLKREQ3_L - 6B4 32B4

@m42a_lib.M42A

CK410_SRC_CLKREQ3_L_SPN - 5B7 6B3

@m42a_lib.M42A

CK410_SRC_CLKREQ6_L CK410_SRC_CLKREQ6_L - 32B4 43C6

@m42a_lib.M42A

CK410_SRC_CLKREQ8_L CK410_SRC_CLKREQ8_L - 5B7 32A4 33A5

@m42a_lib.M42A

CK410_USB48_FSA CK410_USB48_FSA - @m42a_lib.M42A 32A4 33C8

CK410_XTAL_IN CK410_XTAL_IN - @m42a_lib.M42A 32C6

CK410_XTAL_OUT CK410_XTAL_OUT - @m42a_lib.M42A 32C6

CLK_NB_OE_L CLK_NB_OE_L - @m42a_lib.M42A 14B6 32B4

CONN_GEYSER_ONOFF_FL CONN_GEYSER_ONOFF_FLTR_L - 40C6

TR_L @m42a_lib.M42A

CONN_GEYSER_USB_N CONN_GEYSER_USB_N - @m42a_lib.M42A 40C6

CONN_GEYSER_USB_P CONN_GEYSER_USB_P - @m42a_lib.M42A 40C6

CPUVCORE_ISENSE_CAL CPUVCORE_ISENSE_CAL - 48A5

@m42a_lib.M42A

CPU_A20M_L CPU_A20M_L - @m42a_lib.M42A 7C8 21C4

CPU_BSEL<0> CPU_BSEL<0> - @m42a_lib.M42A 7B4 33C6

CPU_BSEL<1> CPU_BSEL<1> - @m42a_lib.M42A 7B4 33B6

CPU_BSEL<2> CPU_BSEL<2> - @m42a_lib.M42A 7B4 33B6

CPU_BSEL_R<0> CPU_BSEL_R<0> - @m42a_lib.M42A 33C7

CPU_BSEL_R<1> CPU_BSEL_R<1> - @m42a_lib.M42A 33B7

CPU_BSEL_R<2> CPU_BSEL_R<2> - @m42a_lib.M42A 33B7

CPU_COMP<0> CPU_COMP<0> - @m42a_lib.M42A 7B3




CPU_DPRSTP_L CPU_DPRSTP_L - @m42a_lib.M42A 7B3 21C4 58C7

CPU_DPSLP_L CPU_DPSLP_L - @m42a_lib.M42A 7B3 21C4

CPU_FERR_L CPU_FERR_L - @m42a_lib.M42A 7C8 21C2

CPU_GTLREF CPU_GTLREF - @m42a_lib.M42A 7B4

CPU_IGNNE_L CPU_IGNNE_L - @m42a_lib.M42A 7C8 21C4

CPU_INIT_L CPU_INIT_L - @m42a_lib.M42A 7D6 21C4

CPU_INTR CPU_INTR - @m42a_lib.M42A 7C8 21C4

CPU_ISENSE_OUT_R CPU_ISENSE_OUT_R - @m42a_lib.M42A 48C3

CPU_ISENSE_R_N CPU_ISENSE_R_N - @m42a_lib.M42A 48C3

CPU_ISENSE_R_P CPU_ISENSE_R_P - @m42a_lib.M42A 48C3

CPU_NMI CPU_NMI - @m42a_lib.M42A 7C8 21C4

CPU_PROCHOT_L CPU_PROCHOT_L - @m42a_lib.M42A 7C6 46B5 46C2 58C8

CPU_PSI_L CPU_PSI_L - @m42a_lib.M42A 7A3 58C7

CPU_PWRGD CPU_PWRGD - @m42a_lib.M42A 7B3 21C4

CPU_RCIN_L CPU_RCIN_L - @m42a_lib.M42A 21C4

CPU_SMI_L CPU_SMI_L - @m42a_lib.M42A 7C8 21C4

CPU_STPCLK_L CPU_STPCLK_L - @m42a_lib.M42A 7C8 21C4

CPU_TEST1 CPU_TEST1 - @m42a_lib.M42A 7B4

CPU_TEST2 CPU_TEST2 - @m42a_lib.M42A 7B4

CPU_THERMAL_SCREW_DO CPU_THERMAL_SCREW_DOWN - 6A8

WN @m42a_lib.M42A

CPU_THERMAL_SCREW_RI CPU_THERMAL_SCREW_RIGHT - 6A7

GHT @m42a_lib.M42A

CPU_THERMAL_SCREW_UP CPU_THERMAL_SCREW_UP - 6A7

@m42a_lib.M42A

CPU_THERMD_N CPU_THERMD_N - @m42a_lib.M42A 7C6 10B6

CPU_THERMD_P CPU_THERMD_P - @m42a_lib.M42A 7C6 10B6

CPU_THERMTRIP_R CPU_THERMTRIP_R - @m42a_lib.M42A 21C2

CPU_VCCSENSE_N CPU_VCCSENSE_N - @m42a_lib.M42A 8B6 58A4 58A5

CPU_VCCSENSE_P CPU_VCCSENSE_P - @m42a_lib.M42A 8B6 58A4 58A5

CPU_VID<0> CPU_VID<0> - @m42a_lib.M42A 8B7 9C3





CPU_VID<5> CPU_VID<5> - @m42a_lib.M42A 8B7 9D3

CPU_VID<6> CPU_VID<6> - @m42a_lib.M42A 8B7 9D3

CPU_VID_R<0> CPU_VID_R<0> - @m42a_lib.M42A 9C2 58C7

CPU_VID_R<0..6> CPU_VID_R<0..6> - @m42a_lib.M42A 58A4





CPU_VID_R<5> CPU_VID_R<5> - @m42a_lib.M42A 9D2 58C7

CPU_VID_R<6> CPU_VID_R<6> - @m42a_lib.M42A 9D2 58C7

CPU_XDP_CLK_N CPU_XDP_CLK_N - @m42a_lib.M42A 11B3 33D2 33D3

CPU_XDP_CLK_P CPU_XDP_CLK_P - @m42a_lib.M42A 11B3 33D2 33D3

CRB_SV_DET CRB_SV_DET - @m42a_lib.M42A 23B6 23C3

CRT_BLUE CRT_BLUE - @m42a_lib.M42A 13B5 69B8

CRT_DDC_CLK CRT_DDC_CLK - @m42a_lib.M42A 13B5 69D7

CRT_DDC_DATA CRT_DDC_DATA - @m42a_lib.M42A 13B5 69D7

CRT_GREEN CRT_GREEN - @m42a_lib.M42A 13B5 69A8

CRT_HSYNC_LS CRT_HSYNC_LS - @m42a_lib.M42A 69C2

CRT_HSYNC_LS_R CRT_HSYNC_LS_R - @m42a_lib.M42A 69C3

CRT_HSYNC_R CRT_HSYNC_R - @m42a_lib.M42A 13B5 69C3

CRT_IREF CRT_IREF - @m42a_lib.M42A 13B5 69C8

CRT_RED CRT_RED - @m42a_lib.M42A 13B5 69A8

CRT_VSYNC_LS CRT_VSYNC_LS - @m42a_lib.M42A 69C2

CRT_VSYNC_LS_R CRT_VSYNC_LS_R - @m42a_lib.M42A 69C3

CRT_VSYNC_R CRT_VSYNC_R - @m42a_lib.M42A 13B5 69C3

DCIN_ISENSE DCIN_ISENSE - @m42a_lib.M42A 66C3

DEBUG_RST_L DEBUG_RST_L - @m42a_lib.M42A 5C2 26B1 47C6

DMI_IRCOMP_R DMI_IRCOMP_R - @m42a_lib.M42A 22C2

DMI_N2S_N<0> DMI_N2S_N<0> - @m42a_lib.M42A 14B4 22D2




DMI_N2S_P<0> DMI_N2S_P<0> - @m42a_lib.M42A 14B4 22D2




DMI_S2N_N<0> DMI_S2N_N<0> - @m42a_lib.M42A 14B4 22D2




DMI_S2N_P<0> DMI_S2N_P<0> - @m42a_lib.M42A 14B4 22D2




ENETPWR_EN ENETPWR_EN - @m42a_lib.M42A 60B5 60C5 60D4

ENET_BOB_SMITH_CAP ENET_BOB_SMITH_CAP - @m42a_lib.M42A 37A5

ENET_CENTER_TAP<0> ENET_CENTER_TAP<0> - @m42a_lib.M42A 37C6

ENET_CENTER_TAP<1> ENET_CENTER_TAP<1> - @m42a_lib.M42A 37B6



ENET_CLK100M_PCIE_N ENET_CLK100M_PCIE_N - 33C3 33D2 36C6

@m42a_lib.M42A

ENET_CLK100M_PCIE_P ENET_CLK100M_PCIE_P - 33C3 33D2 36C6

@m42a_lib.M42A

ENET_CTRL12 ENET_CTRL12 - @m42a_lib.M42A 6A4 36C8

ENET_CTRL12_SPN - @m42a_lib.M42A 6A3

ENET_CTRL25 ENET_CTRL25 - @m42a_lib.M42A 6A4 36C8

ENET_CTRL25_SPN - @m42a_lib.M42A 6A3

ENET_LOM_DIS_L ENET_LOM_DIS_L - @m42a_lib.M42A 36D8

ENET_MDI0 ENET_MDI0 - @m42a_lib.M42A 36B5




ENET_MDI_N<0> ENET_MDI_N<0> - @m42a_lib.M42A 36C3 37C8

ENET_MDI_N<1> ENET_MDI_N<1> - @m42a_lib.M42A 36C3 37B8



ENET_MDI_P<0> ENET_MDI_P<0> - @m42a_lib.M42A 36C3 37C8

ENET_MDI_P<1> ENET_MDI_P<1> - @m42a_lib.M42A 36C3 37B8



ENET_MDI_TRAN_N<0> ENET_MDI_TRAN_N<0> - @m42a_lib.M42A 37C5

ENET_MDI_TRAN_N<1> ENET_MDI_TRAN_N<1> - @m42a_lib.M42A 37B5

ENET_MDI_TRAN_N<2> ENET_MDI_TRAN_N<2> - @m42a_lib.M42A 5A7 37B5

ENET_MDI_TRAN_N<3> ENET_MDI_TRAN_N<3> - @m42a_lib.M42A 37B5

ENET_MDI_TRAN_P<0> ENET_MDI_TRAN_P<0> - @m42a_lib.M42A 37C5

ENET_MDI_TRAN_P<1> ENET_MDI_TRAN_P<1> - @m42a_lib.M42A 37B5

ENET_MDI_TRAN_P<2> ENET_MDI_TRAN_P<2> - @m42a_lib.M42A 5A7 37B5

ENET_MDI_TRAN_P<3> ENET_MDI_TRAN_P<3> - @m42a_lib.M42A 5A7 37B5

ENET_PU_VDD_TTL0 ENET_PU_VDD_TTL0 - @m42a_lib.M42A 36A6 36C6

ENET_PU_VDD_TTL1 ENET_PU_VDD_TTL1 - @m42a_lib.M42A 36A6 36B6

ENET_RSET ENET_RSET - @m42a_lib.M42A 36C8

ENET_RST_L ENET_RST_L - @m42a_lib.M42A 26A1 36C6

ENET_VPD_CLK ENET_VPD_CLK - @m42a_lib.M42A 36A2 36C6

ENET_VPD_DATA ENET_VPD_DATA - @m42a_lib.M42A 36A2 36C6

ENET_XTALI ENET_XTALI - @m42a_lib.M42A 36B6

ENET_XTALO ENET_XTALO - @m42a_lib.M42A 36B6

EXTAUSB_OC_F_L EXTAUSB_OC_F_L - @m42a_lib.M42A 42C8

EXTBUSB_OC_F_L EXTBUSB_OC_F_L - @m42a_lib.M42A 42C8

EXT_COMPVID_B EXT_COMPVID_B - @m42a_lib.M42A 69B6

EXT_C_R EXT_C_R - @m42a_lib.M42A 69A6

EXT_Y_G EXT_Y_G - @m42a_lib.M42A 69A6

FAN_RT_PWM FAN_RT_PWM - @m42a_lib.M42A 5D2 51B3

FAN_RT_TACH FAN_RT_TACH - @m42a_lib.M42A 5D2 51C3

FSB_ADSTB_L<0> FSB_ADSTB_L<0> - @m42a_lib.M42A 7D8 12C4

FSB_ADSTB_L<1> FSB_ADSTB_L<1> - @m42a_lib.M42A 7C8 12C4

FSB_ADS_L FSB_ADS_L - @m42a_lib.M42A 7D6 12C4

FSB_A_L<3> FSB_A_L<3> - @m42a_lib.M42A 7D8 12D4













FSB_A_L<16> FSB_A_L<16> - @m42a_lib.M42A 7D8 12C4

FSB_A_L<17> FSB_A_L<17> - @m42a_lib.M42A 7C8 12C4















FSB_BNR_L FSB_BNR_L - @m42a_lib.M42A 7D6 12C4

FSB_BPRI_L FSB_BPRI_L - @m42a_lib.M42A 7D6 12C4

FSB_BREQ0_L FSB_BREQ0_L - @m42a_lib.M42A 7D6 12C4

FSB_CLK_CPU_N FSB_CLK_CPU_N - @m42a_lib.M42A 7C6 33C2 33D3

FSB_CLK_CPU_P FSB_CLK_CPU_P - @m42a_lib.M42A 7C6 33C2 33D3

FSB_CLK_NB_N FSB_CLK_NB_N - @m42a_lib.M42A 12A6 33C2 33D3

FSB_CLK_NB_P FSB_CLK_NB_P - @m42a_lib.M42A 12A6 33D2 33D3

FSB_CPURST_L FSB_CPURST_L - @m42a_lib.M42A 7D6 11B5 12C4

FSB_DBSY_L FSB_DBSY_L - @m42a_lib.M42A 7D6 12B4

FSB_DEFER_L FSB_DEFER_L - @m42a_lib.M42A 7D6 12B4

FSB_DINV_L<0> FSB_DINV_L<0> - @m42a_lib.M42A 7C4 12B4

FSB_DINV_L<1> FSB_DINV_L<1> - @m42a_lib.M42A 7B4 12B4

FSB_DINV_L<2> FSB_DINV_L<2> - @m42a_lib.M42A 7C3 12B4

FSB_DINV_L<3> FSB_DINV_L<3> - @m42a_lib.M42A 7B3 12B4

FSB_DPWR_L FSB_DPWR_L - @m42a_lib.M42A 7B3 12B4

FSB_DRDY_L FSB_DRDY_L - @m42a_lib.M42A 7D6 12B4

FSB_DSTBN_L<0> FSB_DSTBN_L<0> - @m42a_lib.M42A 7C4 12B4

FSB_DSTBN_L<1> FSB_DSTBN_L<1> - @m42a_lib.M42A 7B4 12B4

FSB_DSTBN_L<2> FSB_DSTBN_L<2> - @m42a_lib.M42A 7C3 12B4

FSB_DSTBN_L<3> FSB_DSTBN_L<3> - @m42a_lib.M42A 7B3 12B4

FSB_DSTBP_L<0> FSB_DSTBP_L<0> - @m42a_lib.M42A 7C4 12B4

FSB_DSTBP_L<1> FSB_DSTBP_L<1> - @m42a_lib.M42A 7B4 12B4

FSB_DSTBP_L<2> FSB_DSTBP_L<2> - @m42a_lib.M42A 7C3 12B4

FSB_DSTBP_L<3> FSB_DSTBP_L<3> - @m42a_lib.M42A 7B3 12B4

FSB_D_L<0> FSB_D_L<0> - @m42a_lib.M42A 7C4 12D6













FSB_D_L<13> FSB_D_L<13> - @m42a_lib.M42A 7C4 12C6





FSB_D_L<18> FSB_D_L<18> - @m42a_lib.M42A 7B4 12C6





















FSB_D_L<39> FSB_D_L<39> - @m42a_lib.M42A 7C3 12B6











FSB_D_L<50> FSB_D_L<50> - @m42a_lib.M42A 7B3 12B6














FSB_HITM_L FSB_HITM_L - @m42a_lib.M42A 7D6 12B4

FSB_HIT_L FSB_HIT_L - @m42a_lib.M42A 7D6 12B4

FSB_IERR_L FSB_IERR_L - @m42a_lib.M42A 7D6

FSB_LOCK_L FSB_LOCK_L - @m42a_lib.M42A 7D6 12B4

FSB_REQ_L<0> FSB_REQ_L<0> - @m42a_lib.M42A 7D8 12B4

FSB_REQ_L<1> FSB_REQ_L<1> - @m42a_lib.M42A 7D8 12B4

FSB_REQ_L<2> FSB_REQ_L<2> - @m42a_lib.M42A 7D8 12A4



FSB_RS_L<0> FSB_RS_L<0> - @m42a_lib.M42A 7D6 12A4



FSB_SLPCPU_L FSB_SLPCPU_L - @m42a_lib.M42A 7A3 12A4

FSB_TRDY_L FSB_TRDY_L - @m42a_lib.M42A 7D6 12A4

FWH_INIT_L FWH_INIT_L - @m42a_lib.M42A 5C2 6B2 21C4 47C5

SMC_CPU_INIT_3_3_L - @m42a_lib.M42A 6B1 45D5

FWH_MFG_MODE FWH_MFG_MODE - @m42a_lib.M42A 23A6 23C5

FWPWR_ACIN FWPWR_ACIN - @m42a_lib.M42A 39C6

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1

101

FWPWR_EN FWPWR_EN - @m42a_lib.M42A 39C5

FWPWR_EN_L FWPWR_EN_L - @m42a_lib.M42A 39C4 60C8

FWPWR_EN_L_DIV FWPWR_EN_L_DIV - @m42a_lib.M42A 39C5

FWPWR_EN_L_R FWPWR_EN_L_R - @m42a_lib.M42A 60C7

FWPWR_RUN FWPWR_RUN - @m42a_lib.M42A 39C6

FW_A_TPA_N FW_A_TPA_N - @m42a_lib.M42A 38B3 39B6

FW_PORT0_TPA_N - @m42a_lib.M42A 39B5

FW_A_TPA_P FW_A_TPA_P - @m42a_lib.M42A 38B3 39B6

FW_PORT0_TPA_P - @m42a_lib.M42A 39B5

FW_A_TPBIAS FW_A_TPBIAS - @m42a_lib.M42A 38B3 39B6

FW_A_TPB_N FW_A_TPB_N - @m42a_lib.M42A 38B3 39B6

FW_PORT0_TPB_N - @m42a_lib.M42A 39B5

FW_A_TPB_P FW_A_TPB_P - @m42a_lib.M42A 38B3 39B6

FW_PORT0_TPB_P - @m42a_lib.M42A 39B5

FW_B_TPA_N FW_B_TPA_N - @m42a_lib.M42A 6D2 38B3

FW_B_TPA_N_SPN - @m42a_lib.M42A 5B7 6D1

FW_B_TPA_P FW_B_TPA_P - @m42a_lib.M42A 6D2 38B3

FW_B_TPA_P_SPN - @m42a_lib.M42A 5B7 6D1

FW_B_TPBIAS FW_B_TPBIAS - @m42a_lib.M42A 6D2 38B3

FW_B_TPBIAS_SPN - @m42a_lib.M42A 5B7 6D1

FW_B_TPB_N FW_B_TPB_N - @m42a_lib.M42A 6D2 38B3

FW_B_TPB_N_SPN - @m42a_lib.M42A 5B7 6D1

FW_B_TPB_P FW_B_TPB_P - @m42a_lib.M42A 6D2 38B3

FW_B_TPB_P_SPN - @m42a_lib.M42A 5B7 6D1

FW_C_TPA_N FW_C_TPA_N - @m42a_lib.M42A 6D2 38B3

FW_C_TPA_N_SPN - @m42a_lib.M42A 5B7 6D1

FW_C_TPA_P FW_C_TPA_P - @m42a_lib.M42A 6D2 38B3

FW_C_TPA_P_SPN - @m42a_lib.M42A 5B7 6D1

FW_C_TPBIAS FW_C_TPBIAS - @m42a_lib.M42A 6D2 38B3

FW_C_TPBIAS_SPN - @m42a_lib.M42A 5B7 6D1

FW_C_TPB_N FW_C_TPB_N - @m42a_lib.M42A 6D2 38B3

FW_C_TPB_N_SPN - @m42a_lib.M42A 5B7 6D1

FW_C_TPB_P FW_C_TPB_P - @m42a_lib.M42A 6D2 38B3

FW_C_TPB_P_SPN - @m42a_lib.M42A 5B7 6D1

FW_PCI_IDSEL FW_PCI_IDSEL - @m42a_lib.M42A 38A5

FW_PCI_RST_L FW_PCI_RST_L - @m42a_lib.M42A 38A5

FW_PORT0_TPA_N_FL FW_PORT0_TPA_N_FL - @m42a_lib.M42A 39B2

FW_PORT0_TPA_P_FL FW_PORT0_TPA_P_FL - @m42a_lib.M42A 39B2

FW_PORT0_TPB FW_PORT0_TPB - @m42a_lib.M42A 39A5

FW_PORT0_TPB_N_FL FW_PORT0_TPB_N_FL - @m42a_lib.M42A 39B2

FW_PORT0_TPB_P_FL FW_PORT0_TPB_P_FL - @m42a_lib.M42A 39B2

FW_PWRON_RST_L FW_PWRON_RST_L - @m42a_lib.M42A 38C3

FW_R0 FW_R0 - @m42a_lib.M42A 38B3

FW_R1 FW_R1 - @m42a_lib.M42A 38C3

FW_XI FW_XI - @m42a_lib.M42A 38C3

FW_XO FW_XO - @m42a_lib.M42A 38C3

FW_XO_R FW_XO_R - @m42a_lib.M42A 38C3

GEYSER_GND_F GEYSER_GND_F - @m42a_lib.M42A 40C5

GND_1V8S3_SGND GND_1V8S3_SGND - @m42a_lib.M42A 61B5 61C6

GND_1V51V05S0_SGND GND_1V51V05S0_SGND - @m42a_lib.M42A 62B7

GND_5V3V3S5_SGND GND_5V3V3S5_SGND - @m42a_lib.M42A 59B7

GND_AUDIO_CODEC GND_AUDIO_CODEC - @m42a_lib.M42A 5D1 64B2

=GND_AUDIO_CODEC - @m42a_lib.M42A 54A6 54B6 54D2 55A8 55B8

55C8 56B3 56B5 57A5 57A6

57B3 57B3 57B5 57B8 57C3

57C5 57C8 57D8 64B3

GND_AUDIO_PWR GND_AUDIO_PWR - @m42a_lib.M42A 5D1 64B2

=GND_AUDIO_PWR - @m42a_lib.M42A 55A3 55A5 55A8 55B3 55B3

55B8 55C3 55C3 55C8 55D3

55D8 56C2 64B3

GND_AUDIO_SPDIF_DGND GND_AUDIO_SPDIF_DGND - 56A8 56C8

@m42a_lib.M42A

GND_BT_F GND_BT_F - @m42a_lib.M42A 44B4

GND_CHASSIS_CPU GND_CHASSIS_CPU - @m42a_lib.M42A 6B8

GND_CHASSIS_FANSCREW GND_CHASSIS_FANSCREW - 6B8

@m42a_lib.M42A

GND_CHGR_SGND GND_CHGR_SGND - @m42a_lib.M42A 66A5 66B7

GND_IMVP6_SGND GND_IMVP6_SGND - @m42a_lib.M42A 58A4 58B7 58C8

GND_SMC_AVSS GND_SMC_AVSS - @m42a_lib.M42A 45C2 45C4 46B6 48A1 48B5

48C1 61C1 62A5 66B1 66C2

GND_SMC_LID_F GND_SMC_LID_F - @m42a_lib.M42A 65A7

GPU_CRT_DDC_CLK GPU_CRT_DDC_CLK - @m42a_lib.M42A 69B6 69D5

GPU_CRT_DDC_DATA GPU_CRT_DDC_DATA - @m42a_lib.M42A 69B6 69D5

IDE_CSEL_PD IDE_CSEL_PD - @m42a_lib.M42A 34B4

IDE_IRQ14 IDE_IRQ14 - @m42a_lib.M42A 21B6 34B6

IDE_PDA<0> IDE_PDA<0> - @m42a_lib.M42A 21B5 34B5



IDE_PDCS1_L IDE_PDCS1_L - @m42a_lib.M42A 21B5 34B5

IDE_PDCS3_L IDE_PDCS3_L - @m42a_lib.M42A 21B5 34B3

IDE_PDD<0> IDE_PDD<0> - @m42a_lib.M42A 21C5 34C5

IDE_PDD<1> IDE_PDD<1> - @m42a_lib.M42A 21B5 34C5















IDE_PDDACK_L IDE_PDDACK_L - @m42a_lib.M42A 21B6 34B3

IDE_PDDREQ IDE_PDDREQ - @m42a_lib.M42A 21B6 34B6

IDE_PDIORDY IDE_PDIORDY - @m42a_lib.M42A 21B6 34B6

IDE_PDIOR_L IDE_PDIOR_L - @m42a_lib.M42A 21B6 34C3

IDE_PDIOW_L IDE_PDIOW_L - @m42a_lib.M42A 21B6 34B5

IDE_RESET_L IDE_RESET_L - @m42a_lib.M42A 23A3 34C5

IMVP6_BOOT1 IMVP6_BOOT1 - @m42a_lib.M42A 58A8 58C6

IMVP6_BOOT1_RC IMVP6_BOOT1_RC - @m42a_lib.M42A 58D5

IMVP6_BOOT2 IMVP6_BOOT2 - @m42a_lib.M42A 58A6 58C6

IMVP6_BOOT2_RC IMVP6_BOOT2_RC - @m42a_lib.M42A 58C5

IMVP6_COMP IMVP6_COMP - @m42a_lib.M42A 5D7 58A4 58B7

IMVP6_COMP_RC IMVP6_COMP_RC - @m42a_lib.M42A 58B8

IMVP6_CPU_ISENSE_N IMVP6_CPU_ISENSE_N - @m42a_lib.M42A 48C4

IMVP6_CPU_ISENSE_P IMVP6_CPU_ISENSE_P - @m42a_lib.M42A 48D4

IMVP6_DFB IMVP6_DFB - @m42a_lib.M42A 58A4 58B6

IMVP6_DROOP IMVP6_DROOP - @m42a_lib.M42A 48D5 58A4 58B6

IMVP6_FB IMVP6_FB - @m42a_lib.M42A 58A4 58B7

IMVP6_FB2 IMVP6_FB2 - @m42a_lib.M42A 58A4 58B7

IMVP6_FET_RC1 IMVP6_FET_RC1 - @m42a_lib.M42A 58A8 58C2

IMVP6_FET_RC2 IMVP6_FET_RC2 - @m42a_lib.M42A 58A6 58B2

IMVP6_ISEN1 IMVP6_ISEN1 - @m42a_lib.M42A 58A8 58C6

IMVP6_ISEN2 IMVP6_ISEN2 - @m42a_lib.M42A 58A6 58C6

IMVP6_LGATE1 IMVP6_LGATE1 - @m42a_lib.M42A 58A8 58C6

IMVP6_LGATE2 IMVP6_LGATE2 - @m42a_lib.M42A 58A6 58C6

IMVP6_NTC IMVP6_NTC - @m42a_lib.M42A 58C7

IMVP6_NTC_R IMVP6_NTC_R - @m42a_lib.M42A 58C7

IMVP6_OCSET IMVP6_OCSET - @m42a_lib.M42A 58A4 58B6

IMVP6_PHASE1 IMVP6_PHASE1 - @m42a_lib.M42A 58A8 58C6

IMVP6_PHASE2 IMVP6_PHASE2 - @m42a_lib.M42A 58A6 58C6

IMVP6_RBIAS IMVP6_RBIAS - @m42a_lib.M42A 5D7 58A4 58B7

IMVP6_RTN IMVP6_RTN - @m42a_lib.M42A 58A4 58B6

IMVP6_SOFT IMVP6_SOFT - @m42a_lib.M42A 58A4 58C7

IMVP6_UGATE1 IMVP6_UGATE1 - @m42a_lib.M42A 58A8 58C6

IMVP6_UGATE2 IMVP6_UGATE2 - @m42a_lib.M42A 58A6 58C6

IMVP6_VDIFF IMVP6_VDIFF - @m42a_lib.M42A 58A4 58B7

IMVP6_VDIFF_RC IMVP6_VDIFF_RC - @m42a_lib.M42A 58B7

IMVP6_VO IMVP6_VO - @m42a_lib.M42A 48C5 58A4 58B6

IMVP6_VO_R IMVP6_VO_R - @m42a_lib.M42A 58B4

IMVP6_VO_R1 IMVP6_VO_R1 - @m42a_lib.M42A 58A8

IMVP6_VO_R2 IMVP6_VO_R2 - @m42a_lib.M42A 58A6

IMVP6_VR_TT IMVP6_VR_TT - @m42a_lib.M42A 58C7

IMVP6_VSEN IMVP6_VSEN - @m42a_lib.M42A 58A4 58B5

IMVP6_VSUM IMVP6_VSUM - @m42a_lib.M42A 58A4 58C6

IMVP6_VSUM_R1 IMVP6_VSUM_R1 - @m42a_lib.M42A 58A8

IMVP6_VSUM_R2 IMVP6_VSUM_R2 - @m42a_lib.M42A 58A6

IMVP6_VW IMVP6_VW - @m42a_lib.M42A 58A4 58B7

IMVP_DPRSLPVR IMVP_DPRSLPVR - @m42a_lib.M42A 58C7

IMVP_VR_ON IMVP_VR_ON - @m42a_lib.M42A 45D8 58C7

INT_PIRQA_L INT_PIRQA_L - @m42a_lib.M42A 22A7 26C3

INT_PIRQB_L INT_PIRQB_L - @m42a_lib.M42A 22A7 26C3

INT_PIRQC_L INT_PIRQC_L - @m42a_lib.M42A 22A7 26C3

INT_PIRQD_L INT_PIRQD_L - @m42a_lib.M42A 22A7 26C3 38A5

INT_SERIRQ INT_SERIRQ - @m42a_lib.M42A 5C2 23C8 45C8 47C5 53C6

INVT_CHGND INVT_CHGND - @m42a_lib.M42A 6D8 67C2

INV_BKLIGHT_PWM_L INV_BKLIGHT_PWM_L - @m42a_lib.M42A 5B1 67D2

INV_GND INV_GND - @m42a_lib.M42A 5B1 67D2

INV_PWREN_F_L INV_PWREN_F_L - @m42a_lib.M42A 67D6

INV_PWREN_L INV_PWREN_L - @m42a_lib.M42A 67D6

IR_RX_OUT IR_RX_OUT - @m42a_lib.M42A 35C6 41C6

IR_RX_OUT_F IR_RX_OUT_F - @m42a_lib.M42A 41C5

ISENSE_CAL_EN ISENSE_CAL_EN - @m42a_lib.M42A 45B8 48A8

ISENSE_CAL_EN_L ISENSE_CAL_EN_L - @m42a_lib.M42A 48A7

ISENSE_CAL_EN_LS5V ISENSE_CAL_EN_LS5V - @m42a_lib.M42A 48A6

ITPRESET_L ITPRESET_L - @m42a_lib.M42A 11B3

ITP_TDO ITP_TDO - @m42a_lib.M42A 11B3

J2900_SA1 J2900_SA1 - @m42a_lib.M42A 29A4

KBC_MDE KBC_MDE - @m42a_lib.M42A 45C2

LCDVDD_PWREN_L LCDVDD_PWREN_L - @m42a_lib.M42A 67B7

LCDVDD_PWREN_L_R LCDVDD_PWREN_L_R - @m42a_lib.M42A 67B6

LPC_AD<0> LPC_AD<0> - @m42a_lib.M42A 5D2 21D4 45D8 47C6 53C6

LPC_AD<1> LPC_AD<1> - @m42a_lib.M42A 5D2 21D4 45D8 47C6 53C6

LPC_AD<2> LPC_AD<2> - @m42a_lib.M42A 5C2 21D4 45D8 47C5 53C6

LPC_AD<3> LPC_AD<3> - @m42a_lib.M42A 5C2 21D4 45D8 47C5 53C6

LPC_FRAME_L LPC_FRAME_L - @m42a_lib.M42A 5C2 21C5 45C8 47C6 53C6

LVDS_A_CLK_N LVDS_A_CLK_N - @m42a_lib.M42A 13D5 67B2

LVDS_A_CLK_P LVDS_A_CLK_P - @m42a_lib.M42A 13C5 67B2

LVDS_A_DATA_N<0> LVDS_A_DATA_N<0> - @m42a_lib.M42A 13C5 67B2



LVDS_A_DATA_P<0> LVDS_A_DATA_P<0> - @m42a_lib.M42A 13C5 67B2



LVDS_BKLTCTL LVDS_BKLTCTL - @m42a_lib.M42A 13D5 67C6

LVDS_BKLTEN LVDS_BKLTEN - @m42a_lib.M42A 13D5 67D7

LVDS_B_CLK_N LVDS_B_CLK_N - @m42a_lib.M42A 6D6 13C5

LVDS_B_CLK_N_SPN - @m42a_lib.M42A 5A7 6D5

LVDS_B_CLK_P LVDS_B_CLK_P - @m42a_lib.M42A 6D6 13C5

LVDS_B_CLK_P_SPN - @m42a_lib.M42A 5A7 6D5

LVDS_B_DATA_N<0> LVDS_B_DATA_N<0> - @m42a_lib.M42A 6D6 13C5

LVDS_B_DATA_N0_SPN - @m42a_lib.M42A 5A7 6D5





LVDS_B_DATA_P<0> LVDS_B_DATA_P<0> - @m42a_lib.M42A 6D6 13C5

LVDS_B_DATA_P0_SPN - @m42a_lib.M42A 6D5


LVDS_B_DATA_P1_SPN - @m42a_lib.M42A 5A7 6D5


LVDS_B_DATA_P2_SPN - @m42a_lib.M42A 5A7 6D5

LVDS_CLKCTLA LVDS_CLKCTLA - @m42a_lib.M42A 13D5 67A7

LVDS_CLKCTLB LVDS_CLKCTLB - @m42a_lib.M42A 13D5 67A7

LVDS_DDC_CLK LVDS_DDC_CLK - @m42a_lib.M42A 13D5 67B6

LVDS_DDC_DATA LVDS_DDC_DATA - @m42a_lib.M42A 13D5 67B6

LVDS_IBG LVDS_IBG - @m42a_lib.M42A 13D5 67A6

LVDS_VDDEN LVDS_VDDEN - @m42a_lib.M42A 13D5 67B7

MAX9705_L_N MAX9705_L_N - @m42a_lib.M42A 55B6

MAX9705_R_N MAX9705_R_N - @m42a_lib.M42A 55C6

MAX9705_SUB_N MAX9705_SUB_N - @m42a_lib.M42A 55A6

MAX9890_CEXT MAX9890_CEXT - @m42a_lib.M42A 57B1

MAX9890_INL MAX9890_INL - @m42a_lib.M42A 57B2

MAX9890_INR MAX9890_INR - @m42a_lib.M42A 57B2

MEMVTT_EN MEMVTT_EN - @m42a_lib.M42A 31B5

MEMVTT_VREF MEMVTT_VREF - @m42a_lib.M42A 31C4

MEM_A_A<0> MEM_A_A<0> - @m42a_lib.M42A 15C5 28B4

MEM_A_A<13..0> MEM_A_A<13..0> - @m42a_lib.M42A 30C6



MEM_A_A<3> MEM_A_A<3> - @m42a_lib.M42A 15B5 28B6



MEM_A_A<6> MEM_A_A<6> - @m42a_lib.M42A 15B5 28C4








MEM_A_A<14> MEM_A_A<14> - @m42a_lib.M42A 6A4 28C4

MEM_A_A14_SPN - @m42a_lib.M42A 6A3

MEM_A_A<15> MEM_A_A<15> - @m42a_lib.M42A 6A4 28C4

MEM_A_A15_SPN - @m42a_lib.M42A 6A3

MEM_A_BS<0> MEM_A_BS<0> - @m42a_lib.M42A 15D5 28B6

MEM_A_BS<2..0> MEM_A_BS<2..0> - @m42a_lib.M42A 30C6

MEM_A_BS<1> MEM_A_BS<1> - @m42a_lib.M42A 15D5 28B4

MEM_A_BS<2> MEM_A_BS<2> - @m42a_lib.M42A 15D5 28C6

MEM_A_CAS_L MEM_A_CAS_L - @m42a_lib.M42A 15D5 28B6 30B6

MEM_A_DM<0> MEM_A_DM<0> - @m42a_lib.M42A 15D5 28D4

MEM_A_DM<1> MEM_A_DM<1> - @m42a_lib.M42A 15D5 28D4

MEM_A_DM<2> MEM_A_DM<2> - @m42a_lib.M42A 15D5 28C6

MEM_A_DM<3> MEM_A_DM<3> - @m42a_lib.M42A 15C5 28C4

MEM_A_DM<4> MEM_A_DM<4> - @m42a_lib.M42A 15C5 28B4

MEM_A_DM<5> MEM_A_DM<5> - @m42a_lib.M42A 15C5 28B6

MEM_A_DM<6> MEM_A_DM<6> - @m42a_lib.M42A 15C5 28A6

MEM_A_DM<7> MEM_A_DM<7> - @m42a_lib.M42A 15C5 28A4

MEM_A_DQ<0> MEM_A_DQ<0> - @m42a_lib.M42A 15D7 28D4








MEM_A_DQ<8> MEM_A_DQ<8> - @m42a_lib.M42A 15C7 28D6








MEM_A_DQ<16> MEM_A_DQ<16> - @m42a_lib.M42A 15C7 28C4
















MEM_A_DQ<32> MEM_A_DQ<32> - @m42a_lib.M42A 15C7 28B6

MEM_A_DQ<33> MEM_A_DQ<33> - @m42a_lib.M42A 15C7 28B4

MEM_A_DQ<34> MEM_A_DQ<34> - @m42a_lib.M42A 15B7 28B4








MEM_A_DQ<42> MEM_A_DQ<42> - @m42a_lib.M42A 15B7 28A4


















MEM_A_DQ<60> MEM_A_DQ<60> - @m42a_lib.M42A 15A7 28A4




MEM_A_DQS_N<0> MEM_A_DQS_N<0> - @m42a_lib.M42A 15C5 28D6

MEM_A_DQS_N<1> MEM_A_DQS_N<1> - @m42a_lib.M42A 15C5 28D6

MEM_A_DQS_N<2> MEM_A_DQS_N<2> - @m42a_lib.M42A 15C5 28C4

MEM_A_DQS_N<3> MEM_A_DQS_N<3> - @m42a_lib.M42A 15C5 28C6

MEM_A_DQS_N<4> MEM_A_DQS_N<4> - @m42a_lib.M42A 15C5 28B6

MEM_A_DQS_N<5> MEM_A_DQS_N<5> - @m42a_lib.M42A 15C5 28B4

MEM_A_DQS_N<6> MEM_A_DQS_N<6> - @m42a_lib.M42A 15C5 28A4

MEM_A_DQS_N<7> MEM_A_DQS_N<7> - @m42a_lib.M42A 15C5 28A6

MEM_A_DQS_P<0> MEM_A_DQS_P<0> - @m42a_lib.M42A 15C5 28D6

MEM_A_DQS_P<1> MEM_A_DQS_P<1> - @m42a_lib.M42A 15C5 28D6

MEM_A_DQS_P<2> MEM_A_DQS_P<2> - @m42a_lib.M42A 15C5 28C4

MEM_A_DQS_P<3> MEM_A_DQS_P<3> - @m42a_lib.M42A 15C5 28C6

MEM_A_DQS_P<4> MEM_A_DQS_P<4> - @m42a_lib.M42A 15C5 28B6

MEM_A_DQS_P<5> MEM_A_DQS_P<5> - @m42a_lib.M42A 15C5 28B4

MEM_A_DQS_P<6> MEM_A_DQS_P<6> - @m42a_lib.M42A 15C5 28A4

MEM_A_DQS_P<7> MEM_A_DQS_P<7> - @m42a_lib.M42A 15C5 28A6

MEM_A_RAS_L MEM_A_RAS_L - @m42a_lib.M42A 15B5 28B4 30B6

MEM_A_WE_L MEM_A_WE_L - @m42a_lib.M42A 15B5 28B6 30B6

MEM_B_A<0> MEM_B_A<0> - @m42a_lib.M42A 15C2 29B4 30B5



MEM_B_A<3> MEM_B_A<3> - @m42a_lib.M42A 15B2 29B6 30B5



MEM_B_A<6> MEM_B_A<6> - @m42a_lib.M42A 15B2 29C4 30B5





MEM_B_A<11> MEM_B_A<11> - @m42a_lib.M42A 15B2 29C4 30A5

MEM_B_A<12> MEM_B_A<12> - @m42a_lib.M42A 15B2 29C6 30A5

MEM_B_A<13> MEM_B_A<13> - @m42a_lib.M42A 15B2 29B4 30A5

MEM_B_A<14> MEM_B_A<14> - @m42a_lib.M42A 6A4 29C4

MEM_B_A14_SPN - @m42a_lib.M42A 6A3

MEM_B_A<15> MEM_B_A<15> - @m42a_lib.M42A 6A4 29C4

MEM_B_A15_SPN - @m42a_lib.M42A 6A3

MEM_B_BS<0> MEM_B_BS<0> - @m42a_lib.M42A 15D2 29B6

MEM_B_BS<2..0> MEM_B_BS<2..0> - @m42a_lib.M42A 30A6

MEM_B_BS<1> MEM_B_BS<1> - @m42a_lib.M42A 15D2 29B4

MEM_B_BS<2> MEM_B_BS<2> - @m42a_lib.M42A 15D2 29C6

MEM_B_CAS_L MEM_B_CAS_L - @m42a_lib.M42A 15D2 29B6 30A6

MEM_B_DM<0> MEM_B_DM<0> - @m42a_lib.M42A 15D2 29D4

MEM_B_DM<1> MEM_B_DM<1> - @m42a_lib.M42A 15D2 29D4

MEM_B_DM<2> MEM_B_DM<2> - @m42a_lib.M42A 15D2 29C4

MEM_B_DM<3> MEM_B_DM<3> - @m42a_lib.M42A 15C2 29C6

MEM_B_DM<4> MEM_B_DM<4> - @m42a_lib.M42A 15C2 29A4



MEM_B_DM<7> MEM_B_DM<7> - @m42a_lib.M42A 15C2 29B4

MEM_B_DQ<0> MEM_B_DQ<0> - @m42a_lib.M42A 15D4 29D4








MEM_B_DQ<8> MEM_B_DQ<8> - @m42a_lib.M42A 15C4 29D6








MEM_B_DQ<16> MEM_B_DQ<16> - @m42a_lib.M42A 15C4 29C4
















MEM_B_DQ<32> MEM_B_DQ<32> - @m42a_lib.M42A 15C4 29A6

MEM_B_DQ<33> MEM_B_DQ<33> - @m42a_lib.M42A 15C4 29A4

MEM_B_DQ<34> MEM_B_DQ<34> - @m42a_lib.M42A 15B4 29A6














MEM_B_DQ<48> MEM_B_DQ<48> - @m42a_lib.M42A 15B4 29B4












MEM_B_DQ<60> MEM_B_DQ<60> - @m42a_lib.M42A 15A4 29B6




MEM_B_DQS_N<0> MEM_B_DQS_N<0> - @m42a_lib.M42A 15C2 29D6

MEM_B_DQS_N<1> MEM_B_DQS_N<1> - @m42a_lib.M42A 15C2 29D6

MEM_B_DQS_N<2> MEM_B_DQS_N<2> - @m42a_lib.M42A 15C2 29C6

MEM_B_DQS_N<3> MEM_B_DQS_N<3> - @m42a_lib.M42A 15C2 29C4

MEM_B_DQS_N<4> MEM_B_DQS_N<4> - @m42a_lib.M42A 15C2 29A6

MEM_B_DQS_N<5> MEM_B_DQS_N<5> - @m42a_lib.M42A 15C2 29A4

MEM_B_DQS_N<6> MEM_B_DQS_N<6> - @m42a_lib.M42A 15C2 29B4

MEM_B_DQS_N<7> MEM_B_DQS_N<7> - @m42a_lib.M42A 15C2 29B6

MEM_B_DQS_P<0> MEM_B_DQS_P<0> - @m42a_lib.M42A 15C2 29D6

MEM_B_DQS_P<1> MEM_B_DQS_P<1> - @m42a_lib.M42A 15C2 29D6

MEM_B_DQS_P<2> MEM_B_DQS_P<2> - @m42a_lib.M42A 15C2 29C6

MEM_B_DQS_P<3> MEM_B_DQS_P<3> - @m42a_lib.M42A 15C2 29C4

MEM_B_DQS_P<4> MEM_B_DQS_P<4> - @m42a_lib.M42A 15C2 29A6



MEM_B_DQS_P<7> MEM_B_DQS_P<7> - @m42a_lib.M42A 15C2 29B6

MEM_B_RAS_L MEM_B_RAS_L - @m42a_lib.M42A 15B2 29B4 30A6

MEM_B_WE_L MEM_B_WE_L - @m42a_lib.M42A 15B2 29B6 30A6

MEM_CKE<0> MEM_CKE<0> - @m42a_lib.M42A 14C4 28C6

MEM_CKE<3..0> MEM_CKE<3..0> - @m42a_lib.M42A 30D6




MEM_CLK_N<0> MEM_CLK_N<0> - @m42a_lib.M42A 14D4 28D4

MEM_CLK_N<1> MEM_CLK_N<1> - @m42a_lib.M42A 14D4 28A4

MEM_CLK_N<2> MEM_CLK_N<2> - @m42a_lib.M42A 14D4 29A4

MEM_CLK_N<3> MEM_CLK_N<3> - @m42a_lib.M42A 14D4 29D4

MEM_CLK_P<0> MEM_CLK_P<0> - @m42a_lib.M42A 14D4 28D4

MEM_CLK_P<1> MEM_CLK_P<1> - @m42a_lib.M42A 14D4 28A4

MEM_CLK_P<2> MEM_CLK_P<2> - @m42a_lib.M42A 14D4 29A4

MEM_CLK_P<3> MEM_CLK_P<3> - @m42a_lib.M42A 14D4 29D4

MEM_CS_L<0> MEM_CS_L<0> - @m42a_lib.M42A 14C4 28B4

MEM_CS_L<3..0> MEM_CS_L<3..0> - @m42a_lib.M42A 30D6




MEM_ISENSE MEM_ISENSE - @m42a_lib.M42A 61C2

MEM_ISENSE_R1_N MEM_ISENSE_R1_N - @m42a_lib.M42A 61C3

MEM_ISENSE_R1_P MEM_ISENSE_R1_P - @m42a_lib.M42A 61C3

MEM_ISENSE_R2 MEM_ISENSE_R2 - @m42a_lib.M42A 61C2

MEM_ISENSE_VCC MEM_ISENSE_VCC - @m42a_lib.M42A 61C2

MEM_ODT<0> MEM_ODT<0> - @m42a_lib.M42A 14C4 28B4

MEM_ODT<3..0> MEM_ODT<3..0> - @m42a_lib.M42A 30D6




MEM_RCOMP MEM_RCOMP - @m42a_lib.M42A 14C4

MEM_RCOMP_L MEM_RCOMP_L - @m42a_lib.M42A 14C4

MEM_VREF_A MEM_VREF_A - @m42a_lib.M42A 28D1 28D7

MEM_VREF_B MEM_VREF_B - @m42a_lib.M42A 29D1 29D7

MEM_VREF_NB_0 MEM_VREF_NB_0 - @m42a_lib.M42A 14C2 19C7

MEM_VREF_NB_1 MEM_VREF_NB_1 - @m42a_lib.M42A 14C2 19C6

MIC_HI MIC_HI - @m42a_lib.M42A 56B3 57A8

MIC_HI_CONN MIC_HI_CONN - @m42a_lib.M42A 56B1 56D3

MIC_HI_F MIC_HI_F - @m42a_lib.M42A 56B2

MIC_IN MIC_IN - @m42a_lib.M42A 57A7

MIC_LO MIC_LO - @m42a_lib.M42A 56B3 57A8

MIC_LO_CONN MIC_LO_CONN - @m42a_lib.M42A 56B1 56D3

MIC_LO_F MIC_LO_F - @m42a_lib.M42A 56B2

MIC_SHIELD MIC_SHIELD - @m42a_lib.M42A 56B3 57A8

MIC_SHIELD_F MIC_SHIELD_F - @m42a_lib.M42A 56B2

MIC_SHLD_CONN MIC_SHLD_CONN - @m42a_lib.M42A 56B1 56D3

MM1573DN_NR MM1573DN_NR - @m42a_lib.M42A 19C3

NB_BSEL<0> NB_BSEL<0> - @m42a_lib.M42A 14C6 33C7

NB_BSEL<1> NB_BSEL<1> - @m42a_lib.M42A 14C6 33B7

NB_BSEL<2> NB_BSEL<2> - @m42a_lib.M42A 14C6 33B7

NB_CFG<3> NB_CFG<3> - @m42a_lib.M42A 6D4 14C6

TP_NB_CFG3 - @m42a_lib.M42A 6D3



NB_CFG<5> NB_CFG<5> - @m42a_lib.M42A 14C6 20C7






NB_CFG<9> NB_CFG<9> - @m42a_lib.M42A 14C6 20B7

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1

102


















NB_CFG<20> NB_CFG<20> - @m42a_lib.M42A 14B6 20A5

NB_CLK100M_GCLKIN_N NB_CLK100M_GCLKIN_N - 14C4 33B2 33C4

@m42a_lib.M42A

NB_CLK100M_GCLKIN_P NB_CLK100M_GCLKIN_P - 14C4 33C2 33C4

@m42a_lib.M42A

NB_CLK_DREFCLKIN_N NB_CLK_DREFCLKIN_N - @m42a_lib.M42A 14C4 33B3 33C2

NB_CLK_DREFCLKIN_P NB_CLK_DREFCLKIN_P - @m42a_lib.M42A 14C4 33B3 33C2

NB_CLK_DREFSSCLKIN_N NB_CLK_DREFSSCLKIN_N - 14C4 33A4 33C2

@m42a_lib.M42A

NB_CLK_DREFSSCLKIN_P NB_CLK_DREFSSCLKIN_P - 14B4 33A3 33C2

@m42a_lib.M42A

NB_FSB_VREF NB_FSB_VREF - @m42a_lib.M42A 12C4

NB_FSB_XRCOMP NB_FSB_XRCOMP - @m42a_lib.M42A 12A6

NB_FSB_XSCOMP NB_FSB_XSCOMP - @m42a_lib.M42A 12A6

NB_FSB_XSWING NB_FSB_XSWING - @m42a_lib.M42A 12A6

NB_FSB_YRCOMP NB_FSB_YRCOMP - @m42a_lib.M42A 12A6

NB_FSB_YSCOMP NB_FSB_YSCOMP - @m42a_lib.M42A 12A6

NB_FSB_YSWING NB_FSB_YSWING - @m42a_lib.M42A 12A6

NB_ISENSE NB_ISENSE - @m42a_lib.M42A 62A6

NB_ISENSE_R1_N NB_ISENSE_R1_N - @m42a_lib.M42A 62A7

NB_ISENSE_R1_P NB_ISENSE_R1_P - @m42a_lib.M42A 62A7

NB_ISENSE_R2 NB_ISENSE_R2 - @m42a_lib.M42A 62A6

NB_ISENSE_VCC NB_ISENSE_VCC - @m42a_lib.M42A 62A6

NB_RIGHT_DOWN_SCREW NB_RIGHT_DOWN_SCREW - 6A8

@m42a_lib.M42A

NB_RST_IN_L_R NB_RST_IN_L_R - @m42a_lib.M42A 14B6

NB_SB_SYNC_L NB_SB_SYNC_L - @m42a_lib.M42A 14B6 22A6

NB_TV_DCONSEL0 NB_TV_DCONSEL0 - @m42a_lib.M42A 14D6

NB_TV_DCONSEL1 NB_TV_DCONSEL1 - @m42a_lib.M42A 14C6

NB_VCCSM_LF1 NB_VCCSM_LF1 - @m42a_lib.M42A 16B4




NB_VTTLF_CAP1 NB_VTTLF_CAP1 - @m42a_lib.M42A 17A4

NB_VTTLF_CAP2 NB_VTTLF_CAP2 - @m42a_lib.M42A 17A4

NB_VTTLF_CAP3 NB_VTTLF_CAP3 - @m42a_lib.M42A 17B4

ODD_PWR_EN_SLOW_STAR ODD_PWR_EN_SLOW_START - 34C7

T @m42a_lib.M42A

ODD_PWR_EN_SLOW_STAR ODD_PWR_EN_SLOW_START_L - 34C6

T_L @m42a_lib.M42A

ODD_PWR_EN_SLOW_STAR ODD_PWR_EN_SLOW_START_L_R - 34C5

T_L_R @m42a_lib.M42A

ONEWIRE_DCIN_DIV ONEWIRE_DCIN_DIV - @m42a_lib.M42A 65C5

ONEWIRE_EN ONEWIRE_EN - @m42a_lib.M42A 65C7

ONEWIRE_ESD ONEWIRE_ESD - @m42a_lib.M42A 65C5

ONEWIRE_OV ONEWIRE_OV - @m42a_lib.M42A 65C6

ONEWIRE_PU_EN ONEWIRE_PU_EN - @m42a_lib.M42A 65B7

ONEWIRE_PU_EN_L ONEWIRE_PU_EN_L - @m42a_lib.M42A 65C8

ONEWIRE_PWR_EN_L ONEWIRE_PWR_EN_L - @m42a_lib.M42A 65C7

ONEWIRE_PWR_EN_L_DIV ONEWIRE_PWR_EN_L_DIV - 65C6

@m42a_lib.M42A

P0V52_SMC_LSREF P0V52_SMC_LSREF - @m42a_lib.M42A 46D3

P1V8S0_EN_L_RC P1V8S0_EN_L_RC - @m42a_lib.M42A 63A5

P3V3S0_EN_RC P3V3S0_EN_RC - @m42a_lib.M42A 63B5

P3V3S3_EN_L_RC P3V3S3_EN_L_RC - @m42a_lib.M42A 63C5

P3V42G3H5_BOOST P3V42G3H5_BOOST - @m42a_lib.M42A 63D2

P3V42G3H_FB P3V42G3H_FB - @m42a_lib.M42A 5D7 63D2

P5VS0_EN_RC P5VS0_EN_RC - @m42a_lib.M42A 63C5

P5VS3_EN_L_RC P5VS3_EN_L_RC - @m42a_lib.M42A 63D5

PATA_PWR_EN_L PATA_PWR_EN_L - @m42a_lib.M42A 23B3 23C3

PBUS_S0_SMC_VSENSE PBUS_S0_SMC_VSENSE - @m42a_lib.M42A 48C6

PBUS_SMC_VSENSE_EN PBUS_SMC_VSENSE_EN - @m42a_lib.M42A 48C8

PBUS_SMC_VSENSE_EN_L PBUS_SMC_VSENSE_EN_L - 48C7

@m42a_lib.M42A

PCIE_A_D2R_C_N PCIE_A_D2R_C_N - @m42a_lib.M42A 36D6

PCIE_A_D2R_C_P PCIE_A_D2R_C_P - @m42a_lib.M42A 36D6

PCIE_A_D2R_N PCIE_A_D2R_N - @m42a_lib.M42A 22D4 36D5

PCIE_A_D2R_P PCIE_A_D2R_P - @m42a_lib.M42A 22D4 36D5

PCIE_A_R2D_C_N PCIE_A_R2D_C_N - @m42a_lib.M42A 22D4 36C5

PCIE_A_R2D_C_P PCIE_A_R2D_C_P - @m42a_lib.M42A 22D4 36C5

PCIE_A_R2D_N PCIE_A_R2D_N - @m42a_lib.M42A 36C6

PCIE_A_R2D_P PCIE_A_R2D_P - @m42a_lib.M42A 36C6

PCIE_B_D2R_N PCIE_B_D2R_N - @m42a_lib.M42A 22D4 43C7

PCIE_B_D2R_P PCIE_B_D2R_P - @m42a_lib.M42A 22D4 43C7

PCIE_B_R2D_C_N PCIE_B_R2D_C_N - @m42a_lib.M42A 22D4 43B7

PCIE_B_R2D_C_P PCIE_B_R2D_C_P - @m42a_lib.M42A 22D4 43B7

PCIE_B_R2D_N PCIE_B_R2D_N - @m42a_lib.M42A 43B6

PCIE_B_R2D_P PCIE_B_R2D_P - @m42a_lib.M42A 43B6

PCIE_C_D2R_N PCIE_C_D2R_N - @m42a_lib.M42A 6C4 22D4

PCIE_C_D2R_N_SPN - @m42a_lib.M42A 6C3

PCIE_C_D2R_P PCIE_C_D2R_P - @m42a_lib.M42A 6C4 22D4

PCIE_C_D2R_P_SPN - @m42a_lib.M42A 6C3

PCIE_C_R2D_C_N PCIE_C_R2D_C_N - @m42a_lib.M42A 6C4 22D4

PCIE_C_R2D_C_N_SPN - @m42a_lib.M42A 6C3

PCIE_C_R2D_C_P PCIE_C_R2D_C_P - @m42a_lib.M42A 6C4 22D4

PCIE_C_R2D_C_P_SPN - @m42a_lib.M42A 6C3

PCIE_D_D2R_N PCIE_D_D2R_N - @m42a_lib.M42A 6C4 22D4

PCIE_D_D2R_N_SPN - @m42a_lib.M42A 6C3

PCIE_D_D2R_P PCIE_D_D2R_P - @m42a_lib.M42A 6C4 22D4

PCIE_D_D2R_P_SPN - @m42a_lib.M42A 6C3

PCIE_D_R2D_C_N PCIE_D_R2D_C_N - @m42a_lib.M42A 6C4 22D4

PCIE_D_R2D_C_N_SPN - @m42a_lib.M42A 6C3

PCIE_D_R2D_C_P PCIE_D_R2D_C_P - @m42a_lib.M42A 6C4 22D4

PCIE_D_R2D_C_P_SPN - @m42a_lib.M42A 6C3

PCIE_E_D2R_N PCIE_E_D2R_N - @m42a_lib.M42A 6C4 22C4

PCIE_E_D2R_N_SPN - @m42a_lib.M42A 6C3

PCIE_E_D2R_P PCIE_E_D2R_P - @m42a_lib.M42A 6C4 22C4

PCIE_E_D2R_P_SPN - @m42a_lib.M42A 6C3

PCIE_E_R2D_C_N PCIE_E_R2D_C_N - @m42a_lib.M42A 6C4 22C4

PCIE_E_R2D_C_N_SPN - @m42a_lib.M42A 6C3

PCIE_E_R2D_C_P PCIE_E_R2D_C_P - @m42a_lib.M42A 6C4 22C4

PCIE_E_R2D_C_P_SPN - @m42a_lib.M42A 6C3

PCIE_F_D2R_N PCIE_F_D2R_N - @m42a_lib.M42A 6C4 22C4

PCIE_F_D2R_N_SPN - @m42a_lib.M42A 6C3

PCIE_F_D2R_P PCIE_F_D2R_P - @m42a_lib.M42A 6C4 22C4

PCIE_F_D2R_P_SPN - @m42a_lib.M42A 6C3

PCIE_F_R2D_C_N PCIE_F_R2D_C_N - @m42a_lib.M42A 6C4 22C4

PCIE_F_R2D_C_N_SPN - @m42a_lib.M42A 6C3

PCIE_F_R2D_C_P PCIE_F_R2D_C_P - @m42a_lib.M42A 6B4 22C4

PCIE_F_R2D_C_P_SPN - @m42a_lib.M42A 6B3

PCIE_WAKE_L PCIE_WAKE_L - @m42a_lib.M42A 23C8 36C6 43C6

PCI_AD<0> PCI_AD<0> - @m42a_lib.M42A 22B7 38C5












PCI_AD<12> PCI_AD<12> - @m42a_lib.M42A 22B7 38B5







PCI_AD<19> PCI_AD<19> - @m42a_lib.M42A 22A7 38B6













PCI_CLK_FW PCI_CLK_FW - @m42a_lib.M42A 33D6 38A5

PCI_CLK_PORT80_LPC PCI_CLK_PORT80_LPC - @m42a_lib.M42A 5C2 33D6 47C5

PCI_CLK_SB PCI_CLK_SB - @m42a_lib.M42A 22A6 33D6

PCI_CLK_SMC PCI_CLK_SMC - @m42a_lib.M42A 33D6 45C8

PCI_CLK_TPM PCI_CLK_TPM - @m42a_lib.M42A 33D6 53C6

PCI_C_BE_L<0> PCI_C_BE_L<0> - @m42a_lib.M42A 22B6 38B5




PCI_DEVSEL_L PCI_DEVSEL_L - @m42a_lib.M42A 22A6 26D3 38A5

PCI_FRAME_L PCI_FRAME_L - @m42a_lib.M42A 22A7 26D3 38A5

PCI_GNT3_L PCI_GNT3_L - @m42a_lib.M42A 22B6 38A5

PCI_IRDY_L PCI_IRDY_L - @m42a_lib.M42A 22A6 26D3 38A5

PCI_LOCK_L PCI_LOCK_L - @m42a_lib.M42A 22A6 26D3

PCI_PAR PCI_PAR - @m42a_lib.M42A 22A6 38B5

PCI_PERR_L PCI_PERR_L - @m42a_lib.M42A 22A6 26D3 38A5

PCI_PME_FW_L PCI_PME_FW_L - @m42a_lib.M42A 22B5 38A5

PCI_REQ0_L PCI_REQ0_L - @m42a_lib.M42A 22B6 26C3



PCI_REQ3_L PCI_REQ3_L - @m42a_lib.M42A 22B6 26C3 38A5

PCI_RST_L PCI_RST_L - @m42a_lib.M42A 22A6 38A6

PCI_SERR_L PCI_SERR_L - @m42a_lib.M42A 22A6 26D3 38A5

PCI_STOP_L PCI_STOP_L - @m42a_lib.M42A 22A6 26D3 38A5

PCI_TRDY_L PCI_TRDY_L - @m42a_lib.M42A 22A6 26D3 38A5

PEG_COMP PEG_COMP - @m42a_lib.M42A 13D3

PEG_D2R_N<0> PEG_D2R_N<0> - @m42a_lib.M42A 6D6 13D3

PEG_D2R_N0_SPN - @m42a_lib.M42A 6D5

PEG_D2R_N<1> PEG_D2R_N<1> - @m42a_lib.M42A 13D3 68B6

PEG_D2R_N<2> PEG_D2R_N<2> - @m42a_lib.M42A 6D6 13D3

PEG_D2R_N2_SPN - @m42a_lib.M42A 6D5

PEG_D2R_N<3> PEG_D2R_N<3> - @m42a_lib.M42A 6C6 13D3

PEG_D2R_N3_SPN - @m42a_lib.M42A 6C5













PEG_D2R_N<10> PEG_D2R_N<10> - @m42a_lib.M42A 6C6 13C3












PEG_D2R_P<0> PEG_D2R_P<0> - @m42a_lib.M42A 6C6 13C3

PEG_D2R_P0_SPN - @m42a_lib.M42A 6C5

PEG_D2R_P<1> PEG_D2R_P<1> - @m42a_lib.M42A 13C3 68B6

























PEG_D2R_P<14> PEG_D2R_P<14> - @m42a_lib.M42A 6B6 13C3

PEG_D2R_P14_SPN - @m42a_lib.M42A 6B5

PEG_D2R_P<15> PEG_D2R_P<15> - @m42a_lib.M42A 6B6 13C3

PEG_D2R_P15_SPN - @m42a_lib.M42A 6B5

PEG_R2D_C_N<0> PEG_R2D_C_N<0> - @m42a_lib.M42A 13C3 68C6

PEG_R2D_C_N<1> PEG_R2D_C_N<1> - @m42a_lib.M42A 13C3 68C6

PEG_R2D_C_N<2> PEG_R2D_C_N<2> - @m42a_lib.M42A 13C3 68B6

PEG_R2D_C_N<3> PEG_R2D_C_N<3> - @m42a_lib.M42A 13B3 68B6


PEG_R2D_C_N4_SPN - @m42a_lib.M42A 6B5























PEG_R2D_C_P<0> PEG_R2D_C_P<0> - @m42a_lib.M42A 13B3 68C6

PEG_R2D_C_P<1> PEG_R2D_C_P<1> - @m42a_lib.M42A 13B3 68C6

PEG_R2D_C_P<2> PEG_R2D_C_P<2> - @m42a_lib.M42A 13B3 68B6



PEG_R2D_C_P4_SPN - @m42a_lib.M42A 6B5















PEG_R2D_C_P<12> PEG_R2D_C_P<12> - @m42a_lib.M42A 6B6 13A3








PLT_RST_BUF_L PLT_RST_BUF_L - @m42a_lib.M42A 26B3

PLT_RST_GATED_L PLT_RST_GATED_L - @m42a_lib.M42A 26A3

PLT_RST_L PLT_RST_L - @m42a_lib.M42A 22A6 26C3

NB_RST_IN_L - @m42a_lib.M42A 14B7 26C1

PM_BATLOW_L PM_BATLOW_L - @m42a_lib.M42A 23C1 45B8

PM_BMBUSY_L PM_BMBUSY_L - @m42a_lib.M42A 14B6 23C5

PM_CLKRUN_L PM_CLKRUN_L - @m42a_lib.M42A 5C2 23C8 38A5 45D5 47C6

53C6

PM_DPRSLPVR PM_DPRSLPVR - @m42a_lib.M42A 14B7 23C3 58D8

PM_DPRSLPVR_R PM_DPRSLPVR_R - @m42a_lib.M42A 14B6

PM_EXTTS_L<0> PM_EXTTS_L<0> - @m42a_lib.M42A 6B2 14B7 45B8

DIMM_OVERTEMP_L - @m42a_lib.M42A 6B1 28C4 29C4

PM_LAN_ENABLE PM_LAN_ENABLE - @m42a_lib.M42A 23C3 45D8

PM_PWRBTN_L PM_PWRBTN_L - @m42a_lib.M42A 23C3 45D8

PM_RI_L PM_RI_L - @m42a_lib.M42A 23D5

PM_RSMRST_L PM_RSMRST_L - @m42a_lib.M42A 23C1 45D8

PM_SB_PWROK PM_SB_PWROK - @m42a_lib.M42A 23C3 26A6

PM_SLP_S3 PM_SLP_S3 - @m42a_lib.M42A 48C8 63B7

PM_SLP_S3BATT PM_SLP_S3BATT - @m42a_lib.M42A 60C7

PM_SLP_S3_L PM_SLP_S3_L - @m42a_lib.M42A 23C3 45C5 63A7 63A7 63B8

PM_SLP_S3_LS12V6 PM_SLP_S3_LS12V6 - @m42a_lib.M42A 63B7

PM_SLP_S4_L PM_SLP_S4_L - @m42a_lib.M42A 23C3 45C5 60C8 61B8 63D6

PM_SLP_S5_L PM_SLP_S5_L - @m42a_lib.M42A 23C3 45C5 46D3

PM_STPCPU_L PM_STPCPU_L - @m42a_lib.M42A 23C8 32C4

PM_STPPCI_L PM_STPPCI_L - @m42a_lib.M42A 23C8 32C4

PM_SUS_STAT_L PM_SUS_STAT_L - @m42a_lib.M42A 5C2 23C5 45D5 46D3 47C5

53C6

PM_SYSRST_L PM_SYSRST_L - @m42a_lib.M42A 23C5 26C5 45C8

XDP_DBRESET_L_R - @m42a_lib.M42A 26C6

PM_THRMTRIP_L PM_THRMTRIP_L - @m42a_lib.M42A 7C6 14B6 21C2 46B3

PM_THRM_L PM_THRM_L - @m42a_lib.M42A 23C8 45B8

PP0V9_S0 PP0V9_S0 - @m42a_lib.M42A 5A2 64D7

=PP0V9_S0_MEM_TERM - @m42a_lib.M42A 30D4 64D6

=PP0V9_S0_MEM_REG - @m42a_lib.M42A 31B3 63B2 64D8

=PP0V9_S0_MEM_TERM - @m42a_lib.M42A 30D4 64D6

=PP0V9_S0_MEM_REG - @m42a_lib.M42A 31B3 63B2 64D8

PP1V2_S0 PP1V2_S0 - @m42a_lib.M42A 63B4

PP1V2_S3 PP1V2_S3 - @m42a_lib.M42A 5A2 64C4

=PP1V2_S3_REG - @m42a_lib.M42A 60B2 63B5 64C6

=PP1V2_S3_ENET - @m42a_lib.M42A 36A8 36D7 64C3

=PP1V2_S3_REG - @m42a_lib.M42A 60B2 63B5 64C6

=PP1V2_S3_ENET - @m42a_lib.M42A 36A8 36D7 64C3

PP1V5_S0_DPLL PP1V5_S0_DPLL - @m42a_lib.M42A 19D5

PP1V5_S0_NB_3GPLL_F PP1V5_S0_NB_3GPLL_F - 19A4

@m42a_lib.M42A

PP1V5_S0_NB_QTVDAC PP1V5_S0_NB_QTVDAC - @m42a_lib.M42A 19A7

PP1V5_S0_NB_VCC3G PP1V5_S0_NB_VCC3G - @m42a_lib.M42A 17D6 19B2

PP1V5_S0_NB_VCCA_3GP PP1V5_S0_NB_VCCA_3GPLL - 17D6 19A2

LL @m42a_lib.M42A

PP1V5_S0_NB_VCCA_DPL PP1V5_S0_NB_VCCA_DPLLA - 17C6 19D4

LA @m42a_lib.M42A

PP1V5_S0_NB_VCCA_DPL PP1V5_S0_NB_VCCA_DPLLB - 17C6 19D4

LB @m42a_lib.M42A

PP1V5_S0_NB_VCCA_HPL PP1V5_S0_NB_VCCA_HPLL - 17C6 19C4

L @m42a_lib.M42A

PP1V5_S0_NB_VCCA_MPL PP1V5_S0_NB_VCCA_MPLL - 17C6 19C4

L @m42a_lib.M42A

PP1V5_S0_NB_VCCD_QTV PP1V5_S0_NB_VCCD_QTVDAC - 17B6 19A5

DAC @m42a_lib.M42A

PP1V5_S0_NB_VCCD_TVD PP1V5_S0_NB_VCCD_TVDAC - 17C6 19A5

AC @m42a_lib.M42A

PP1V5_S0_REG_P PP1V5_S0_REG_P - @m42a_lib.M42A 62B8

PP1V5_S0_SB_VCC1_5_B PP1V5_S0_SB_VCC1_5_B - 22C1 24D5 25B6

@m42a_lib.M42A

PP1V5_S0_SB_VCCDMIPL PP1V5_S0_SB_VCCDMIPLL - 24B5 25A5

L @m42a_lib.M42A

PP1V5_S0_SB_VCCDMIPL PP1V5_S0_SB_VCCDMIPLL_F - 25A7

L_F @m42a_lib.M42A

PP1V8_S0 PP1V8_S0 - @m42a_lib.M42A 5B2 64C7

=PP1V8_S0_TMDS - @m42a_lib.M42A 64B6 68D6 68D6

=PP1V8_S0_FET - @m42a_lib.M42A 63B3 64B8

=PP1V8_S0_TMDS - @m42a_lib.M42A 64B6 68D6 68D6

=PP1V8_S0_FET - @m42a_lib.M42A 63B3 64B8

PP1V8_S0_ANALOG_SDVO PP1V8_S0_ANALOG_SDVO_F - 68C4 68D3

_F @m42a_lib.M42A

PP1V8_S0_TMDS_F PP1V8_S0_TMDS_F - @m42a_lib.M42A 68B4 68D3


=PP1V8_S3_1V2S3 - @m42a_lib.M42A 60B5 64C3

=PP1V8_S3_MEM_NB_SENSE - 61C4 64C3

@m42a_lib.M42A

=PP1V8_S3_MEMVTT - @m42a_lib.M42A 31C6 64C3

=PP1V8_S3_P1V8S0 - @m42a_lib.M42A 63A5 64C3


=PP1V8_S3_MEM - @m42a_lib.M42A 19C7 19C8 28B2 28D4 28D6

29B2 29D4 29D6 64C3


=PP1V8_S3_P1V8S0 - @m42a_lib.M42A 63A5 64C3

=PP1V8_S3_MEM_NB_SENSE - 61C4 64C3

@m42a_lib.M42A

=PP1V8_S3_MEMVTT - @m42a_lib.M42A 31C6 64C3

=PP1V8_S3_MEM - @m42a_lib.M42A 19C7 19C8 28B2 28D4 28D6

29B2 29D4 29D6 64C3

=PP1V8_S3_1V2S3 - @m42a_lib.M42A 60B5 64C3

PP1V8_S3_MEMVTT_VDDQ PP1V8_S3_MEMVTT_VDDQ - 31C5

@m42a_lib.M42A

PP1V8_S3_R PP1V8_S3_R - @m42a_lib.M42A 61B2

PP2V5_S0_NB_CRTDAC_F PP2V5_S0_NB_CRTDAC_F - 19D3

@m42a_lib.M42A

PP2V5_S0_NB_CRTDAC_F PP2V5_S0_NB_CRTDAC_FOLLOW - 19D3

OLLOW @m42a_lib.M42A

PP2V5_S0_NB_VCCA_CRT PP2V5_S0_NB_VCCA_CRTDAC - 17D6 19D1

DAC @m42a_lib.M42A


=PP2V5_S3_REG - @m42a_lib.M42A 60C2 64C6

=PP2V5_S3_ENET - @m42a_lib.M42A 36D3 64C3

=PP2V5_S3_REG - @m42a_lib.M42A 60C2 64C6

=PP2V5_S3_ENET - @m42a_lib.M42A 36D3 64C3

PP2V5_S3_ENET_AVDD PP2V5_S3_ENET_AVDD - @m42a_lib.M42A 36D5 37D8

PP2V5_S3_ENET_AVDD_F PP2V5_S3_ENET_AVDD_F - 37D7

@m42a_lib.M42A

PP3V3_AUDIO_CODEC PP3V3_AUDIO_CODEC - @m42a_lib.M42A 54D6

PP3V3_AVREF_SMC PP3V3_AVREF_SMC - @m42a_lib.M42A 45D2 46C6

PP3V3_G3C_SB_RTC_D PP3V3_G3C_SB_RTC_D - @m42a_lib.M42A 26D4

PP3V3_S5_SB_RTC - @m42a_lib.M42A 21D6 24B3 25A4 26D3

PP3V3_LCDVDD_SW PP3V3_LCDVDD_SW - @m42a_lib.M42A 67C5

PP3V3_LCDVDD_SW_F PP3V3_LCDVDD_SW_F - @m42a_lib.M42A 67B2

PP3V3_S0_ANALOG_SDVO PP3V3_S0_ANALOG_SDVO_F - 68C4 68D6

_F @m42a_lib.M42A

PP3V3_S0_ANALOG_TMDS PP3V3_S0_ANALOG_TMDS_F - 68B1 68B4 68D6

_F @m42a_lib.M42A

PP3V3_S0_AUDIO_F PP3V3_S0_AUDIO_F - @m42a_lib.M42A 57B3 57C8 57C8 57D8

PP3V3_S0_AUDIO_SPDIF PP3V3_S0_AUDIO_SPDIF - 56B8 56D8

@m42a_lib.M42A

PP3V3_S0_CK410_VDD48 PP3V3_S0_CK410_VDD48 - 32D5

@m42a_lib.M42A

PP3V3_S0_CK410_VDDA PP3V3_S0_CK410_VDDA - 32C7

@m42a_lib.M42A

PP3V3_S0_CK410_VDD_C PP3V3_S0_CK410_VDD_CPU_SRC - 32D6

PU_SRC @m42a_lib.M42A

PP3V3_S0_CK410_VDD_P PP3V3_S0_CK410_VDD_PCI - 32D5

CI @m42a_lib.M42A

PP3V3_S0_CK410_VDD_R PP3V3_S0_CK410_VDD_REF - 32C5

EF @m42a_lib.M42A

PP3V3_S0_IMVP6_3V3 PP3V3_S0_IMVP6_3V3 - @m42a_lib.M42A 58D7

PP3V3_S0_LCD_F PP3V3_S0_LCD_F - @m42a_lib.M42A 67B3

PP3V3_S0_NB_TVDAC PP3V3_S0_NB_TVDAC - @m42a_lib.M42A 19C3

PP3V3_S0_NB_TVDAC_F PP3V3_S0_NB_TVDAC_F - 19C2

@m42a_lib.M42A

PP3V3_S0_NB_TVDAC_FO PP3V3_S0_NB_TVDAC_FOLLOW - 19C3

LLOW @m42a_lib.M42A

PP3V3_S0_NB_VCCA_TVB PP3V3_S0_NB_VCCA_TVBG - 17C6 19B1

G @m42a_lib.M42A

PP3V3_S0_NB_VCCA_TVD PP3V3_S0_NB_VCCA_TVDACA - 17C6 19C1

ACA @m42a_lib.M42A

PP3V3_S0_NB_VCCA_TVD PP3V3_S0_NB_VCCA_TVDACB - 17C6 19B1

ACB @m42a_lib.M42A

PP3V3_S0_NB_VCCA_TVD PP3V3_S0_NB_VCCA_TVDACC - 17C6 19B1

ACC @m42a_lib.M42A

PP3V3_S0_PVCC1_TMDS_ PP3V3_S0_PVCC1_TMDS_F - 68C4 68C6

F @m42a_lib.M42A

PP3V3_S0_PVCC2_TMDS_ PP3V3_S0_PVCC2_TMDS_F - 68C4 68C7

F @m42a_lib.M42A

PP3V3_S0_TPM_3VSB PP3V3_S0_TPM_3VSB - @m42a_lib.M42A 53C4

PP3V3_S3 PP3V3_S3 - @m42a_lib.M42A 5A2 64B4

=PP3V3_S3_PDCISENS - @m42a_lib.M42A 61C1 64B3

=PP3V3_S3_FW - @m42a_lib.M42A 38D5 64B3

=PP3V3_S3_AIRPORT_AUX - 43C3 64B3

@m42a_lib.M42A

=PP3V3_S3_RSTGATE - @m42a_lib.M42A 26B3 64B3

=PP3V3_S3_PCI - @m42a_lib.M42A 38C5 64B3

=PP3V3_S3_SMS - @m42a_lib.M42A 46D5 52C7 64B3

=PP3V3_S3_TPM - @m42a_lib.M42A 46D5 53C2 64B3

=PP3V3_S3_2V5S3 - @m42a_lib.M42A 60C4 60D6 64B3

=PP3V3_S3_ENET - @m42a_lib.M42A 36A5 36B4 36B5 36C8 36D6

36D8 64B3

=PP3V3_S3_BT - @m42a_lib.M42A 44C6 64B3

=PP3V3_S3_FET - @m42a_lib.M42A 63D3 64B6

=PP3V3_S3_SMBUS_SMC_RMT - 27D3 64B3

@m42a_lib.M42A

=PP3V3_S3_TPM - @m42a_lib.M42A 46D5 53C2 64B3

=PP3V3_S3_SMS - @m42a_lib.M42A 46D5 52C7 64B3

=PP3V3_S3_SMBUS_SMC_RMT - 27D3 64B3

@m42a_lib.M42A

=PP3V3_S3_RSTGATE - @m42a_lib.M42A 26B3 64B3

=PP3V3_S3_PDCISENS - @m42a_lib.M42A 61C1 64B3

=PP3V3_S3_PCI - @m42a_lib.M42A 38C5 64B3

=PP3V3_S3_FW - @m42a_lib.M42A 38D5 64B3

=PP3V3_S3_FET - @m42a_lib.M42A 63D3 64B6

=PP3V3_S3_ENET - @m42a_lib.M42A 36A5 36B4 36B5 36C8 36D6

36D8 64B3

=PP3V3_S3_BT - @m42a_lib.M42A 44C6 64B3

=PP3V3_S3_AIRPORT_AUX - 43C3 64B3

@m42a_lib.M42A

=PP3V3_S3_2V5S3 - @m42a_lib.M42A 60C4 60D6 64B3

PP3V3_S3_AIRPORT_AUX PP3V3_S3_AIRPORT_AUX_CONN - 43C4

_CONN @m42a_lib.M42A

PP3V3_S3_BT_F PP3V3_S3_BT_F - @m42a_lib.M42A 44C4

PP3V3_S3_FW_AVDD PP3V3_S3_FW_AVDD - @m42a_lib.M42A 38D3

PP3V3_S3_ST_ACCEL PP3V3_S3_ST_ACCEL - @m42a_lib.M42A 52B6

PP3V3_S5 PP3V3_S5 - @m42a_lib.M42A 5A2 64A4

=PP3V3_S5_LCD - @m42a_lib.M42A 64A3 67C7

=PP3V3_S5_FWLATEVG - @m42a_lib.M42A 39A8 64A3

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1

103

=PP3V3_S5_P3V3S3 - @m42a_lib.M42A 63D5 64A3

=PP3V3_S5_P3V3S0 - @m42a_lib.M42A 63C5 64A3

=PP3V3_S5_ROM - @m42a_lib.M42A 50D4 64A3

=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA - 24C3 64A3

@m42a_lib.M42A

=PP3V3_S5_SB_IO - @m42a_lib.M42A 22C6 64A3

=PP3V3_S5_SB_VCCSUS3_3_USB - 24B3 25D2 64A3

@m42a_lib.M42A

=PP3V3_S5_SB_PM - @m42a_lib.M42A 11B5 23D1 26C5 64A3

=PP3V3_S5_SB_VCCSUS3_3 - 24A5 24B3 25B6 25D2 64A3

@m42a_lib.M42A

=PP3V3_S5_REG - @m42a_lib.M42A 59B8 64A6

=PP3V3_S5_SB - @m42a_lib.M42A 23A7 23B7 23D4 23D8 25C8

64A3

=PP3V3_S5_SB_USB - @m42a_lib.M42A 22D8 64A3

=PP3V3_S5_SB_VCCSUS3_3_USB - 24B3 25D2 64A3

@m42a_lib.M42A

=PP3V3_S5_SB_VCCSUS3_3 - 24A5 24B3 25B6 25D2 64A3

@m42a_lib.M42A

=PP3V3_S5_SB_USB - @m42a_lib.M42A 22D8 64A3

=PP3V3_S5_SB_PM - @m42a_lib.M42A 11B5 23D1 26C5 64A3

=PP3V3_S5_SB_IO - @m42a_lib.M42A 22C6 64A3

=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA - 24C3 64A3

@m42a_lib.M42A

=PP3V3_S5_SB - @m42a_lib.M42A 23A7 23B7 23D4 23D8 25C8

64A3

=PP3V3_S5_ROM - @m42a_lib.M42A 50D4 64A3

=PP3V3_S5_REG - @m42a_lib.M42A 59B8 64A6

=PP3V3_S5_P3V3S3 - @m42a_lib.M42A 63D5 64A3

=PP3V3_S5_P3V3S0 - @m42a_lib.M42A 63C5 64A3

=PP3V3_S5_LCD - @m42a_lib.M42A 64A3 67C7

=PP3V3_S5_FWLATEVG - @m42a_lib.M42A 39A8 64A3

PP3V3_S5_FWLATEVG PP3V3_S5_FWLATEVG - @m42a_lib.M42A 39A6 39B5

PP3V3_S5_FWLATEVG_F PP3V3_S5_FWLATEVG_F - 39A7

@m42a_lib.M42A

PP3V3_S5_REG_P PP3V3_S5_REG_P - @m42a_lib.M42A 59B8

PP3V42G3H_SW PP3V42G3H_SW - @m42a_lib.M42A 63D2

PP3V42_G3H_LIDSWITCH PP3V42_G3H_LIDSWITCH_F - 65A7

_F @m42a_lib.M42A

PP3V42_G3H_SMC_CLK_F PP3V42_G3H_SMC_CLK_F - 46A7

@m42a_lib.M42A

PP3V42_ONEWIRE PP3V42_ONEWIRE - @m42a_lib.M42A 65C7

PP4V5_AUDIO_ANALOG PP4V5_AUDIO_ANALOG - @m42a_lib.M42A 54A3 54D2 57C3 57C5

PP5V_INV PP5V_INV - @m42a_lib.M42A 67D5

PP5V_INV_F PP5V_INV_F - @m42a_lib.M42A 5B1 67D3

PP5V_S0_AUDIO PP5V_S0_AUDIO - @m42a_lib.M42A 5D1

PP5V_S0_AUDIO_F PP5V_S0_AUDIO_F - @m42a_lib.M42A 55B8 55B8 55C4

PP5V_S0_AUDIO_PWR PP5V_S0_AUDIO_PWR - @m42a_lib.M42A 5D1

PP5V_S0_DVIPORT PP5V_S0_DVIPORT - @m42a_lib.M42A 68A6 69B4 69C3

PP5V_S0_DVIPORT_D PP5V_S0_DVIPORT_D - @m42a_lib.M42A 68A8 69C5

PP5V_S0_IMVP6_VDD PP5V_S0_IMVP6_VDD - @m42a_lib.M42A 58D7

PP5V_S0_SB_V5REF PP5V_S0_SB_V5REF - @m42a_lib.M42A 24D5 25D7

PP5V_S0_TMDS_FUSE PP5V_S0_TMDS_FUSE - @m42a_lib.M42A 69C5

PP5V_S3 PP5V_S3 - @m42a_lib.M42A 5A2 64B4

=PP5V_S3_IR - @m42a_lib.M42A 41D6 64B3

=PP5V_S3_GEYSER - @m42a_lib.M42A 40D6 64B3

=PP5V_S3_CAMERA - @m42a_lib.M42A 64B3 67A5

=PP5V_S3_FET - @m42a_lib.M42A 63D3 64B6

=PP5V_S3_SYSLED - @m42a_lib.M42A 35B6 46B4 64B3

=PP5V_S3_IR - @m42a_lib.M42A 41D6 64B3

=PP5V_S3_GEYSER - @m42a_lib.M42A 40D6 64B3

=PP5V_S3_FET - @m42a_lib.M42A 63D3 64B6

=PP5V_S3_CAMERA - @m42a_lib.M42A 64B3 67A5

PP5V_S3_CAMERA_F PP5V_S3_CAMERA_F - @m42a_lib.M42A 67A3

PP5V_S3_GEYSER_F PP5V_S3_GEYSER_F - @m42a_lib.M42A 40D5

PP5V_S3_SYSLED_F PP5V_S3_SYSLED_F - @m42a_lib.M42A 35B8

PP5V_S3_USB2_EXTA PP5V_S3_USB2_EXTA - @m42a_lib.M42A 42C7

PP5V_S3_USB2_EXTA_F PP5V_S3_USB2_EXTA_F - 42D2 42D3

@m42a_lib.M42A

PP5V_S3_USB2_EXTB PP5V_S3_USB2_EXTB - @m42a_lib.M42A 42C7

PP5V_S3_USB2_EXTB_F PP5V_S3_USB2_EXTB_F - 42B2 42C3

@m42a_lib.M42A

PP5V_S5 PP5V_S5 - @m42a_lib.M42A 5A2 64A4

=PP5V_S5_1V8S3 - @m42a_lib.M42A 61C7 64A3

=PP5V_S5_PATA - @m42a_lib.M42A 34D6 64A3

=PP5V_S5_USB - @m42a_lib.M42A 42C8 64A3

=PP5V_S5_P5VS0 - @m42a_lib.M42A 63C5 64A3

=PP5V_S5_PWRCTL - @m42a_lib.M42A 63A7 63D6 64A3

=PP5V_S5_REG - @m42a_lib.M42A 59B1 64A6

=PP5V_S5_P5VS3 - @m42a_lib.M42A 63D5 64A3

=PP5V_S5_SB - @m42a_lib.M42A 25C8 64A3

=PP5V_S5_USB - @m42a_lib.M42A 42C8 64A3

=PP5V_S5_SB - @m42a_lib.M42A 25C8 64A3

=PP5V_S5_REG - @m42a_lib.M42A 59B1 64A6

=PP5V_S5_PWRCTL - @m42a_lib.M42A 63A7 63D6 64A3

=PP5V_S5_PATA - @m42a_lib.M42A 34D6 64A3

=PP5V_S5_P5VS3 - @m42a_lib.M42A 63D5 64A3

=PP5V_S5_P5VS0 - @m42a_lib.M42A 63C5 64A3

=PP5V_S5_1V8S3 - @m42a_lib.M42A 61C7 64A3

PP5V_S5_1V51V05S0_IN PP5V_S5_1V51V05S0_INTVCC - 62A2 62C3 62C6

TVCC @m42a_lib.M42A

PP5V_S5_5V3V3S5_INTV PP5V_S5_5V3V3S5_INTVCC - 59A2 59C3 59C6

CC @m42a_lib.M42A

PP5V_S5_REG_P PP5V_S5_REG_P - @m42a_lib.M42A 59A6 59B1

PP5V_S5_SB_V5REF_SUS PP5V_S5_SB_V5REF_SUS - 24D5 25C7

@m42a_lib.M42A

PP18V5_DCIN PP18V5_DCIN - @m42a_lib.M42A 65D4

PP18V5_DCIN_F PP18V5_DCIN_F - @m42a_lib.M42A 65D7

PP18V5_DCIN_ONEWIRE PP18V5_DCIN_ONEWIRE - 65C6

@m42a_lib.M42A

PP18V5_G3H PP18V5_G3H - @m42a_lib.M42A 5A2 64C1

=PP18V5_G3H_INRUSH - @m42a_lib.M42A 64C3 65D1

=PP18V5_G3H_CHGR - @m42a_lib.M42A 64C1 66D8

=PP18V5_G3H_INRUSH - @m42a_lib.M42A 64C3 65D1

=PP18V5_G3H_CHGR - @m42a_lib.M42A 64C1 66D8

PP18V5_S5_CHGR_SW_R PP18V5_S5_CHGR_SW_R - 66C4

@m42a_lib.M42A

PPBUSA_G3H PPBUSA_G3H - @m42a_lib.M42A 5A2

PPBUSB_G3H PPBUSB_G3H - @m42a_lib.M42A 5A2 64C1

=PPBUS_S5_YUKON_CTRL - 60C8 64C1

@m42a_lib.M42A

=PPVIN_S5_IMVP6 - @m42a_lib.M42A 48C7 58C2 58D5 58D8 64C1

=PPVIN_S5_1V51V05S0 - 62D8 64C1

@m42a_lib.M42A

=PPBUSB_G3H - @m42a_lib.M42A 64C3 66C2

=PPBUS_S5_INV - @m42a_lib.M42A 64C1 67D4

=PPBUS_S5_FWPWRSW - @m42a_lib.M42A 39D6 64C1

=PPVIN_S5_5V3V3S5 - @m42a_lib.M42A 59D8 63B7 64C1

=PPVIN_S5_1V8S3 - @m42a_lib.M42A 61C7 64C1

=PPVIN_S5_IMVP6 - @m42a_lib.M42A 48C7 58C2 58D5 58D8 64C1

=PPVIN_S5_5V3V3S5 - @m42a_lib.M42A 59D8 63B7 64C1

=PPVIN_S5_1V8S3 - @m42a_lib.M42A 61C7 64C1

=PPVIN_S5_1V51V05S0 - 62D8 64C1

@m42a_lib.M42A

=PPBUS_S5_YUKON_CTRL - 60C8 64C1

@m42a_lib.M42A

=PPBUS_S5_INV - @m42a_lib.M42A 64C1 67D4

=PPBUS_S5_FWPWRSW - @m42a_lib.M42A 39D6 64C1

=PPBUSB_G3H - @m42a_lib.M42A 64C3 66C2

=PPBUSA_G3H - @m42a_lib.M42A 64C3 66C2

PPBUS_ALL_INV_CONN PPBUS_ALL_INV_CONN - @m42a_lib.M42A 5B1 67D3

PPBUS_S5_FWPWRSW_F PPBUS_S5_FWPWRSW_F - @m42a_lib.M42A 39D6

PPDCIN_G3H_R PPDCIN_G3H_R - @m42a_lib.M42A 65D4

PPFW_PORT0_VP PPFW_PORT0_VP - @m42a_lib.M42A 39C2

PPFW_PORT0_VP_F PPFW_PORT0_VP_F - @m42a_lib.M42A 39C3

PPFW_SWITCH PPFW_SWITCH - @m42a_lib.M42A 5B2 39D4

PPVBATT_G3C_RTC PPVBATT_G3C_RTC - @m42a_lib.M42A 26D6

PPVBATT_G3C_RTC_R PPVBATT_G3C_RTC_R - @m42a_lib.M42A 26D5

PPVBATT_G3H_PRE PPVBATT_G3H_PRE - @m42a_lib.M42A 66B3

PPVBATT_G3H_R PPVBATT_G3H_R - @m42a_lib.M42A 66B2

PPVBAT_G3H_CHGR_OUT PPVBAT_G3H_CHGR_OUT - 5C1 66B5 66C2

@m42a_lib.M42A

PPVBAT_G3H_CHGR_REG PPVBAT_G3H_CHGR_REG - 66C4

@m42a_lib.M42A

PPVCORE_CPU_S0 PPVCORE_CPU_S0 - @m42a_lib.M42A 5B2 64D7

=PPVCORE_S0_CPU - @m42a_lib.M42A 8B5 8D7 9B8 48A5 48B3

64D6

=PPVOUT_S0_IMVP6_REG - 58D1 64D8

@m42a_lib.M42A

=PPVCORE_S0_CPU - @m42a_lib.M42A 8B5 8D7 9B8 48A5 48B3

64D6

PPVDCIN_G3H_PRE PPVDCIN_G3H_PRE - @m42a_lib.M42A 66D4

PPVIN_S5_1V51V05S0_R PPVIN_S5_1V51V05S0_R - 62C5

@m42a_lib.M42A

PPVIN_S5_5V3V3S5_R PPVIN_S5_5V3V3S5_R - @m42a_lib.M42A 59C5

PPVIN_S5_IMVP6_VIN PPVIN_S5_IMVP6_VIN - @m42a_lib.M42A 58D7

RSMRST_PWRGD RSMRST_PWRGD - @m42a_lib.M42A 45D8 46D6 59A1

5V3V3S5_PGOOD - @m42a_lib.M42A 59A2

S0PWRGD_0V9_DIV S0PWRGD_0V9_DIV - @m42a_lib.M42A 63B2

S0PWRGD_1V2_DIV S0PWRGD_1V2_DIV - @m42a_lib.M42A 63A2

S0PWRGD_OK S0PWRGD_OK - @m42a_lib.M42A 63B2

SATA_A_D2R_N SATA_A_D2R_N - @m42a_lib.M42A 6C4 21B6

SATA_A_D2R_N_SPN - @m42a_lib.M42A 6C3

SATA_A_D2R_P SATA_A_D2R_P - @m42a_lib.M42A 6C4 21B6

SATA_A_D2R_P_SPN - @m42a_lib.M42A 6C3

SATA_A_R2D_C_N SATA_A_R2D_C_N - @m42a_lib.M42A 6C4 21B6

SATA_A_R2D_C_N_SPN - @m42a_lib.M42A 6C3

SATA_A_R2D_C_P SATA_A_R2D_C_P - @m42a_lib.M42A 6C4 21B6

SATA_A_R2D_C_P_SPN - @m42a_lib.M42A 6C3

SATA_C_D2R_C_N SATA_C_D2R_C_N - @m42a_lib.M42A 35D7

SATA_C_D2R_C_P SATA_C_D2R_C_P - @m42a_lib.M42A 35C7

SATA_C_D2R_F_N SATA_C_D2R_F_N - @m42a_lib.M42A 35D5

SATA_C_D2R_F_P SATA_C_D2R_F_P - @m42a_lib.M42A 35C5

SATA_C_D2R_N SATA_C_D2R_N - @m42a_lib.M42A 21B6 35D4

SATA_C_D2R_P SATA_C_D2R_P - @m42a_lib.M42A 21B6 35C4

SATA_C_DET_L SATA_C_DET_L - @m42a_lib.M42A 23D2 35D2

SATA_C_PWR_EN_L SATA_C_PWR_EN_L - @m42a_lib.M42A 23A3 23B3

SATA_C_R2D_C_N SATA_C_R2D_C_N - @m42a_lib.M42A 21B6 35D4

SATA_C_R2D_C_P SATA_C_R2D_C_P - @m42a_lib.M42A 21B6 35D4

SATA_C_R2D_F_N SATA_C_R2D_F_N - @m42a_lib.M42A 35D6

SATA_C_R2D_F_P SATA_C_R2D_F_P - @m42a_lib.M42A 35D6

SATA_C_R2D_N SATA_C_R2D_N - @m42a_lib.M42A 35D7

SATA_C_R2D_P SATA_C_R2D_P - @m42a_lib.M42A 35D7

SATA_RBIAS_N SATA_RBIAS_N - @m42a_lib.M42A 21B6 35D2

SATA_RBIAS_P - @m42a_lib.M42A 21B6 35D2

SATA_RBIAS_PN - @m42a_lib.M42A 35D3

SATA_RBIAS_P - @m42a_lib.M42A 21B6 35D2

SB_A20GATE SB_A20GATE - @m42a_lib.M42A 21C4

SB_ACZ_BITCLK SB_ACZ_BITCLK - @m42a_lib.M42A 21C6

SB_ACZ_RST_L SB_ACZ_RST_L - @m42a_lib.M42A 21C6

SB_ACZ_SDATAOUT SB_ACZ_SDATAOUT - @m42a_lib.M42A 21C6

SB_ACZ_SYNC SB_ACZ_SYNC - @m42a_lib.M42A 21C6

SB_CLK14P3M_TIMER SB_CLK14P3M_TIMER - @m42a_lib.M42A 23D3 33A6

SB_CLK48M_USBCTLR SB_CLK48M_USBCTLR - @m42a_lib.M42A 23D3 33C7

SB_CLK100M_DMI_N SB_CLK100M_DMI_N - @m42a_lib.M42A 22C2 33B2 33C3

SB_CLK100M_DMI_P SB_CLK100M_DMI_P - @m42a_lib.M42A 22C2 33B2 33C3

SB_CLK100M_SATA_N SB_CLK100M_SATA_N - @m42a_lib.M42A 21B6 33B2 33B3

SB_CLK100M_SATA_OE_L SB_CLK100M_SATA_OE_L - 23C3 32B4

@m42a_lib.M42A

SB_CLK100M_SATA_P SB_CLK100M_SATA_P - @m42a_lib.M42A 21B6 33B2 33B3

SB_GPIO2 SB_GPIO2 - @m42a_lib.M42A 22A6 26C3

SB_GPIO3 SB_GPIO3 - @m42a_lib.M42A 22A6 23A4 26C3


SB_GPIO5 SB_GPIO5 - @m42a_lib.M42A 22A6 26C3 34C8

ODD_PWR_EN_L - @m42a_lib.M42A 34C8


SB_GPIO19 SB_GPIO19 - @m42a_lib.M42A 23D3


SB_GPIO26 SB_GPIO26 - @m42a_lib.M42A 23C8

SB_GPIO29 SB_GPIO29 - @m42a_lib.M42A 22C4 22D8

SB_GPIO30 SB_GPIO30 - @m42a_lib.M42A 22C4 22D8 36D8

SB_GPIO31 SB_GPIO31 - @m42a_lib.M42A 22C4 22D8


SB_INTVRMEN SB_INTVRMEN - @m42a_lib.M42A 21D6

SB_RTC_RST_L SB_RTC_RST_L - @m42a_lib.M42A 21D6 26D4

SB_RTC_X1 SB_RTC_X1 - @m42a_lib.M42A 21D6 26C8

SB_RTC_X1_R SB_RTC_X1_R - @m42a_lib.M42A 26C7

SB_RTC_X2 SB_RTC_X2 - @m42a_lib.M42A 21D6 26C8

SB_RUNTIME_SCI_L SB_RUNTIME_SCI_L - @m42a_lib.M42A 23C5

SB_SM_INTRUDER_L SB_SM_INTRUDER_L - @m42a_lib.M42A 21D6 26D4

SB_SPKR SB_SPKR - @m42a_lib.M42A 23C5

SC_RX_L SC_RX_L - @m42a_lib.M42A 45C5 46B1

SC_TX_L SC_TX_L - @m42a_lib.M42A 45C5 46B1

SDATAIN SDATAIN - @m42a_lib.M42A 54C6

SDVO_CTRLCLK SDVO_CTRLCLK - @m42a_lib.M42A 14B6 68A6

SDVO_CTRLDATA SDVO_CTRLDATA - @m42a_lib.M42A 14B6 68A6

SMBUS_BATT_SCL_F SMBUS_BATT_SCL_F - @m42a_lib.M42A 5D1 65B6

SMBUS_BATT_SDA_F SMBUS_BATT_SDA_F - @m42a_lib.M42A 5D1 65A6

SMB_0_CLK SMB_0_CLK - @m42a_lib.M42A 27D6 45C8

SMBUS_SMC_0_SCL - @m42a_lib.M42A 27D5

THRM_DIMM1_SMB_CLK - @m42a_lib.M42A 27D3 49B4

SMBUS_SMC_0_SCL - @m42a_lib.M42A 27D5

SMB_0_DATA SMB_0_DATA - @m42a_lib.M42A 27D6 45C5

SMBUS_SMC_0_SDA - @m42a_lib.M42A 27D5

THRM_DIMM1_SMB_DATA - 27C3 49B4

@m42a_lib.M42A

SMBUS_SMC_0_SDA - @m42a_lib.M42A 27D5

SMB_AIRPORT_CONN_CLK SMB_AIRPORT_CONN_CLK - 43B5

@m42a_lib.M42A

SMB_AIRPORT_CONN_DAT SMB_AIRPORT_CONN_DATA - 43B5

A @m42a_lib.M42A

SMB_ALERT_L SMB_ALERT_L - @m42a_lib.M42A 23C5

SMB_BSA_CLK SMB_BSA_CLK - @m42a_lib.M42A 27C3 45B5

SMBUS_SMC_BSA_SCL - @m42a_lib.M42A 27C2

=SMBUS_BATT_SCL - @m42a_lib.M42A 27C1 65A2

SMBUS_SMC_BSA_SCL - @m42a_lib.M42A 27C2

=SMBUS_BATT_SCL - @m42a_lib.M42A 27C1 65A2

SMB_BSA_DATA SMB_BSA_DATA - @m42a_lib.M42A 27C3 45B5

SMBUS_SMC_BSA_SDA - @m42a_lib.M42A 27C2

=SMBUS_BATT_SDA - @m42a_lib.M42A 27C1 65A2

SMBUS_SMC_BSA_SDA - @m42a_lib.M42A 27C2

=SMBUS_BATT_SDA - @m42a_lib.M42A 27C1 65A2

SMB_BSB_CLK SMB_BSB_CLK - @m42a_lib.M42A 27B3 45C5

SMB_BSB_DATA SMB_BSB_DATA - @m42a_lib.M42A 27B3 45C8

SMB_LINK_ALERT_L SMB_LINK_ALERT_L - @m42a_lib.M42A 23D5

SMB_MLB_CLK SMB_MLB_CLK - @m42a_lib.M42A 27C6 45B5

THRM_DIMM0_SMB_CLK - @m42a_lib.M42A 27B3 49C4

SMBUS_SMC_MLB_SCL - @m42a_lib.M42A 5B2 27C5

SMB_THRM_CLK - @m42a_lib.M42A 10B3 27C3

THRM_DIMM0_SMB_CLK - @m42a_lib.M42A 27B3 49C4

SMB_THRM_CLK - @m42a_lib.M42A 10B3 27C3

SMBUS_SMC_MLB_SCL - @m42a_lib.M42A 5B2 27C5

SMB_MLB_DATA SMB_MLB_DATA - @m42a_lib.M42A 27B6 45B5

THRM_DIMM0_SMB_DATA - 27B3 49C4

@m42a_lib.M42A

SMBUS_SMC_MLB_SDA - @m42a_lib.M42A 5B2 27B5

SMB_THRM_DATA - @m42a_lib.M42A 10B3 27B3

THRM_DIMM0_SMB_DATA - 27B3 49C4

@m42a_lib.M42A

SMB_THRM_DATA - @m42a_lib.M42A 10B3 27B3

SMBUS_SMC_MLB_SDA - @m42a_lib.M42A 5B2 27B5

SMC_AVCC_RC SMC_AVCC_RC - @m42a_lib.M42A 45D3

SMC_BATT_CHG_EN SMC_BATT_CHG_EN - @m42a_lib.M42A 5C1 45D8 46B6 66A4

SMC_BATT_ISENSE SMC_BATT_ISENSE - @m42a_lib.M42A 45D5 66B1

SMC_BATT_ISET SMC_BATT_ISET - @m42a_lib.M42A 5C1 45B5 66B7

SMC_BATT_TRICKLE_EN_ SMC_BATT_TRICKLE_EN_L - 5C1 45D8 46B6 66A3

L @m42a_lib.M42A

SMC_BATT_VSET SMC_BATT_VSET - @m42a_lib.M42A 45B5 46C3

SMC_BC_ACOK SMC_BC_ACOK - @m42a_lib.M42A 5C1 45C5 46B6 65C3 65C7

66A5

SMC_BKLIGHT_ENABLE SMC_BKLIGHT_ENABLE - @m42a_lib.M42A 45C8

SMC_BS_ALRT_L SMC_BS_ALRT_L - @m42a_lib.M42A 5D1 45C5 46C6 65A2

SMC_BS_ALRT_L_F SMC_BS_ALRT_L_F - @m42a_lib.M42A 65A6

SMC_CASE_OPEN SMC_CASE_OPEN - @m42a_lib.M42A 45C5 46B3

SMC_CPU_ISENSE SMC_CPU_ISENSE - @m42a_lib.M42A 45D5 48C1

SMC_CPU_RESET_3_3_L SMC_CPU_RESET_3_3_L - 45B5 46C1

@m42a_lib.M42A

SMC_CPU_VSENSE SMC_CPU_VSENSE - @m42a_lib.M42A 5B2 45D5 48B1

SMC_DCIN_ISENSE SMC_DCIN_ISENSE - @m42a_lib.M42A 45D5 66C2

SMC_DISPLAY_ENABLE SMC_DISPLAY_ENABLE - @m42a_lib.M42A 45C8

SMC_DISP_BKLT_A SMC_DISP_BKLT_A - @m42a_lib.M42A 45B5

SMC_DISP_BKLT_B SMC_DISP_BKLT_B - @m42a_lib.M42A 45B5 46C3

SMC_EXCARD_CP SMC_EXCARD_CP - @m42a_lib.M42A 45B8 46C3

SMC_EXCARD_PWR_EN SMC_EXCARD_PWR_EN - @m42a_lib.M42A 45B8 46C3

SMC_EXCARD_PWR_OC_L SMC_EXCARD_PWR_OC_L - 45B8 46D3

@m42a_lib.M42A

SMC_EXTAL SMC_EXTAL - @m42a_lib.M42A 45C4 46C7

SMC_EXTSMI_L SMC_EXTSMI_L - @m42a_lib.M42A 23B8 45B8

SMC_FAN_0_CTL SMC_FAN_0_CTL - @m42a_lib.M42A 45B8 46C3

SMC_FAN_0_TACH SMC_FAN_0_TACH - @m42a_lib.M42A 45B8 46C3

SMC_FAN_1_CTL SMC_FAN_1_CTL - @m42a_lib.M42A 5D2 45B8 51B4

SMC_FAN_1_TACH SMC_FAN_1_TACH - @m42a_lib.M42A 5D2 45B8 51C4


SMC_FAN_2_TACH SMC_FAN_2_TACH - @m42a_lib.M42A 45B8 46C3


SMC_FAN_3_TACH SMC_FAN_3_TACH - @m42a_lib.M42A 5A7 45B8 46C3

SMC_FWE SMC_FWE - @m42a_lib.M42A 45B5 46C6

SMC_FWIRE_ISENSE SMC_FWIRE_ISENSE - @m42a_lib.M42A 45D5 46B3

SMC_GPU_ISENSE SMC_GPU_ISENSE - @m42a_lib.M42A 45D5 46C6

SMC_GPU_VSENSE SMC_GPU_VSENSE - @m42a_lib.M42A 45D5 46C6

SMC_LID SMC_LID - @m42a_lib.M42A 5B2 40C4 45B5 46C6 65A8

SMC_LID_F SMC_LID_F - @m42a_lib.M42A 65A7

SMC_LRESET_L SMC_LRESET_L - @m42a_lib.M42A 26B1 45C8

SMC_MANUAL_RST_L SMC_MANUAL_RST_L - @m42a_lib.M42A 5B2 46D8

SMC_MD1 SMC_MD1 - @m42a_lib.M42A 5C2 45C2 47B6

SMC_MEM_ISENSE SMC_MEM_ISENSE - @m42a_lib.M42A 45A8 46B3 61C1

SMC_NB_ISENSE SMC_NB_ISENSE - @m42a_lib.M42A 45B8 46B3 62A5

SMC_NMI SMC_NMI - @m42a_lib.M42A 5C2 45C1 47B5

SMC_ODD_DETECT SMC_ODD_DETECT - @m42a_lib.M42A 34B3 45B8

SMC_ONOFF_L SMC_ONOFF_L - @m42a_lib.M42A 40C8 45C5 46C8 46D6 48C8

CONN_GEYSER_ONOFF_L - 40C7

@m42a_lib.M42A

SMC_P20 SMC_P20 - @m42a_lib.M42A 45D8 46C6






SMC_P44 SMC_P44 - @m42a_lib.M42A 45C8 46C6

SMC_P46 SMC_P46 - @m42a_lib.M42A 45C8 46C6

SMC_PB7 SMC_PB7 - @m42a_lib.M42A 45B8 46C6

SMC_PBUS_VSENSE SMC_PBUS_VSENSE - @m42a_lib.M42A 45D5 48C5

SMC_PD3 SMC_PD3 - @m42a_lib.M42A 45B8 46C3

SMC_PG1 SMC_PG1 - @m42a_lib.M42A 45B5 46C6

SMC_PM_G2_EN SMC_PM_G2_EN - @m42a_lib.M42A 45D5 63C8

SMC_PM_G2_EN_L SMC_PM_G2_EN_L - @m42a_lib.M42A 63C7

SMC_PROCHOT SMC_PROCHOT - @m42a_lib.M42A 45B5 46B6

SMC_PROCHOT_3_3_L SMC_PROCHOT_3_3_L - @m42a_lib.M42A 45D5 46C1

SMC_PS_ON SMC_PS_ON - @m42a_lib.M42A 5C1 39C6 45D5 46B3 65C3

SMC_RCIN_L SMC_RCIN_L - @m42a_lib.M42A 21C3 45C8

SMC_RSTGATE_L SMC_RSTGATE_L - @m42a_lib.M42A 26A3 45D8

SMC_RST_L SMC_RST_L - @m42a_lib.M42A 5C2 45C3 46D7 47C5

SMC_RUNTIME_SCI_L SMC_RUNTIME_SCI_L - @m42a_lib.M42A 23C8 45B8

SMC_RX_L SMC_RX_L - @m42a_lib.M42A 5C2 45C8 46B2 46D6 47B5

SMC_SB_NMI SMC_SB_NMI - @m42a_lib.M42A 23C3 45D8

SMC_SUS_CLK SMC_SUS_CLK - @m42a_lib.M42A 45C5 46A6

SMC_SUS_CLK_R SMC_SUS_CLK_R - @m42a_lib.M42A 46A7

SMC_SYS_ISET SMC_SYS_ISET - @m42a_lib.M42A 45B5 66D7

SMC_SYS_KBDLED SMC_SYS_KBDLED - @m42a_lib.M42A 45C8 46C6

SMC_SYS_LED_16B SMC_SYS_LED_16B - @m42a_lib.M42A 45C8 46A4

SMC_SYS_VSET SMC_SYS_VSET - @m42a_lib.M42A 45B5 46C3

SMC_TCK SMC_TCK - @m42a_lib.M42A 5C2 45C5 46C6 47C5

SMC_TDI SMC_TDI - @m42a_lib.M42A 5C2 45C5 46C6 47C5

SMC_TDO SMC_TDO - @m42a_lib.M42A 5C2 45C5 46C6 47B6

SMC_THRMTRIP SMC_THRMTRIP - @m42a_lib.M42A 45B5 46B5

SMC_TMS SMC_TMS - @m42a_lib.M42A 5C2 45B5 46C6 47C6

SMC_TPM_GPIO SMC_TPM_GPIO - @m42a_lib.M42A 45D5 46B2

SMC_TPM_PP SMC_TPM_PP - @m42a_lib.M42A 45C8 53C7

SMC_TPM_PP_R SMC_TPM_PP_R - @m42a_lib.M42A 53C6

SMC_TPM_RESET_L SMC_TPM_RESET_L - @m42a_lib.M42A 45C8 46D6 53B7

SMC_TRST_L SMC_TRST_L - @m42a_lib.M42A 5C2 45C1 47C6

SMC_TX_L SMC_TX_L - @m42a_lib.M42A 5C2 45C8 46B2 46D6 47B6

SMC_VCL SMC_VCL - @m42a_lib.M42A 45D3

SMC_WAKE_SCI_L SMC_WAKE_SCI_L - @m42a_lib.M42A 23C1 45D5

SMC_XTAL SMC_XTAL - @m42a_lib.M42A 45C4 46C7

SMLINK<0> SMLINK<0> - @m42a_lib.M42A 23D5

SMLINK<1> SMLINK<1> - @m42a_lib.M42A 23D5

SMS_ACC_SELFTEST SMS_ACC_SELFTEST - @m42a_lib.M42A 52B6

SMS_INT_L SMS_INT_L - @m42a_lib.M42A 23C3 45B5 46D6

SMS_ONOFF_L SMS_ONOFF_L - @m42a_lib.M42A 45B5 52C7

SMS_X_AXIS SMS_X_AXIS - @m42a_lib.M42A 45B8 52C2

SMS_Y_AXIS SMS_Y_AXIS - @m42a_lib.M42A 45B8 52C2

SMS_Z_AXIS SMS_Z_AXIS - @m42a_lib.M42A 45B8 52C2

SPI_ARB SPI_ARB - @m42a_lib.M42A 22C6 45D5

SPI_CE_L SPI_CE_L - @m42a_lib.M42A 22C6 45B5 50C7

SPI_HOLD_L SPI_HOLD_L - @m42a_lib.M42A 50C4

SPI_SCLK SPI_SCLK - @m42a_lib.M42A 22C6 45D5 50C7

SPI_SCLK_R SPI_SCLK_R - @m42a_lib.M42A 50C4

SPI_SI SPI_SI - @m42a_lib.M42A 22C6 45D5 50C1

SPI_SI_R SPI_SI_R - @m42a_lib.M42A 50C3

SPI_SO SPI_SO - @m42a_lib.M42A 22C6 45D5 50C1

SPI_SO_R SPI_SO_R - @m42a_lib.M42A 50C3

SPI_WP_L SPI_WP_L - @m42a_lib.M42A 50C4

SPKRAMP_L_N_OUT SPKRAMP_L_N_OUT - @m42a_lib.M42A 55B4 55C3

SPKRAMP_L_P_OUT SPKRAMP_L_P_OUT - @m42a_lib.M42A 55B4 55C3

SPKRAMP_R_N_OUT SPKRAMP_R_N_OUT - @m42a_lib.M42A 55C3 55C4

SPKRAMP_R_P_OUT SPKRAMP_R_P_OUT - @m42a_lib.M42A 55C4 55D3

SPKRAMP_SUB_N_OUT SPKRAMP_SUB_N_OUT - @m42a_lib.M42A 55A4 55B3

SPKRAMP_SUB_P_OUT SPKRAMP_SUB_P_OUT - @m42a_lib.M42A 55A4 55B3

SPKRAMP_SYNC1 SPKRAMP_SYNC1 - @m42a_lib.M42A 55A4 55C4

SPKRAMP_SYNC2 SPKRAMP_SYNC2 - @m42a_lib.M42A 55A4 55B4

SPKRAMP_THERMPLANE SPKRAMP_THERMPLANE - @m42a_lib.M42A 55A4 55A4 55B4 55C4

SPKRCONN_L_N_OUT SPKRCONN_L_N_OUT - @m42a_lib.M42A 55C1 56D2

SPKRCONN_L_P_OUT SPKRCONN_L_P_OUT - @m42a_lib.M42A 55C1 56D2

SPKRCONN_R_N_OUT SPKRCONN_R_N_OUT - @m42a_lib.M42A 55C1 56C2

SPKRCONN_R_P_OUT SPKRCONN_R_P_OUT - @m42a_lib.M42A 55D1 56C2

SPKRCONN_SUB_N_OUT SPKRCONN_SUB_N_OUT - @m42a_lib.M42A 55B1 56C2

SPKRCONN_SUB_P_OUT SPKRCONN_SUB_P_OUT - @m42a_lib.M42A 55B1 56C2

SPKR_SHIELD SPKR_SHIELD - @m42a_lib.M42A 56C2

ST_ACCEL_ON_L ST_ACCEL_ON_L - @m42a_lib.M42A 52B6

SUS_CLK_SB SUS_CLK_SB - @m42a_lib.M42A 6B4 23C3

SUS_CLK_SB_SPN - @m42a_lib.M42A 6B3

SV_SET_UP SV_SET_UP - @m42a_lib.M42A 5C2 23B6 23C3 47B5

SYS_LED_ANODE SYS_LED_ANODE - @m42a_lib.M42A 5B2 35C5 46A3

SYS_LED_ANODE_L SYS_LED_ANODE_L - @m42a_lib.M42A 35C7

SYS_LED_ILIM SYS_LED_ILIM - @m42a_lib.M42A 46A3

SYS_LED_L SYS_LED_L - @m42a_lib.M42A 46A3

SYS_LED_L_VDIV SYS_LED_L_VDIV - @m42a_lib.M42A 46A3

SYS_ONEWIRE SYS_ONEWIRE - @m42a_lib.M42A 5C1 45B8 46D6 65C8

THRM_ALERT THRM_ALERT - @m42a_lib.M42A 10B4

THRM_ALERT_L THRM_ALERT_L - @m42a_lib.M42A 10C4

THRM_CPU_DX_N THRM_CPU_DX_N - @m42a_lib.M42A 10B5

THRM_CPU_DX_P THRM_CPU_DX_P - @m42a_lib.M42A 10B5

THRM_DIMM0_3V3_UNFIL THRM_DIMM0_3V3_UNFILTERED - 49D4

TERED @m42a_lib.M42A

THRM_DIMM0_DXN THRM_DIMM0_DXN - @m42a_lib.M42A 40C5 49C6

THRM_DIMM0_DXP1 THRM_DIMM0_DXP1 - @m42a_lib.M42A 40C4 49D6

THRM_DIMM0_DXP2 THRM_DIMM0_DXP2 - @m42a_lib.M42A 49C6

THRM_DIMM1_3V3_UNFIL THRM_DIMM1_3V3_UNFILTERED - 49B4

TERED @m42a_lib.M42A

THRM_DIMM1_DXN THRM_DIMM1_DXN - @m42a_lib.M42A 49B5

THRM_DIMM1_DXP1 THRM_DIMM1_DXP1 - @m42a_lib.M42A 49B5

THRM_DIMM1_DXP2 THRM_DIMM1_DXP2 - @m42a_lib.M42A 49A5

TMDS_EXT_RES TMDS_EXT_RES - @m42a_lib.M42A 68B4

TMDS_EXT_SWING TMDS_EXT_SWING - @m42a_lib.M42A 68B3

TMDS_HTPLG TMDS_HTPLG - @m42a_lib.M42A 68A7 69C6

TMDS_HTPLG_R TMDS_HTPLG_R - @m42a_lib.M42A 68A7

TMDS_I2C_SCL TMDS_I2C_SCL - @m42a_lib.M42A 68B2

TMDS_I2C_SDA TMDS_I2C_SDA - @m42a_lib.M42A 68B2

TMDS_INT_N TMDS_INT_N - @m42a_lib.M42A 68B5

TMDS_INT_P TMDS_INT_P - @m42a_lib.M42A 68B5

TMDS_RST_L TMDS_RST_L - @m42a_lib.M42A 26B1 68B5

TMDS_SDB_N TMDS_SDB_N - @m42a_lib.M42A 68B4

TMDS_SDB_P TMDS_SDB_P - @m42a_lib.M42A 68B4

TMDS_SDC_N TMDS_SDC_N - @m42a_lib.M42A 68B4

TMDS_SDC_P TMDS_SDC_P - @m42a_lib.M42A 68B4

TMDS_SDG_N TMDS_SDG_N - @m42a_lib.M42A 68B4

TMDS_SDG_P TMDS_SDG_P - @m42a_lib.M42A 68B4

TMDS_SDR_N TMDS_SDR_N - @m42a_lib.M42A 68B4

TMDS_SDR_P TMDS_SDR_P - @m42a_lib.M42A 68B4

TMDS_TX<0> TMDS_TX<0> - @m42a_lib.M42A 68D2

TMDS_TX<1> TMDS_TX<1> - @m42a_lib.M42A 68D2

TMDS_TX<2> TMDS_TX<2> - @m42a_lib.M42A 68C2

TMDS_TX_CLK TMDS_TX_CLK - @m42a_lib.M42A 68C2

TMDS_TX_CLK_N TMDS_TX_CLK_N - @m42a_lib.M42A 68B2 68C1 69A2

TMDS_TX_CLK_P TMDS_TX_CLK_P - @m42a_lib.M42A 68B2 68C3 69A2

TMDS_TX_CONN_CLK_N TMDS_TX_CONN_CLK_N - @m42a_lib.M42A 69B3

TMDS_TX_CONN_CLK_P TMDS_TX_CONN_CLK_P - @m42a_lib.M42A 69B3

TMDS_TX_CONN_N<0> TMDS_TX_CONN_N<0> - @m42a_lib.M42A 69B3



TMDS_TX_CONN_P<0> TMDS_TX_CONN_P<0> - @m42a_lib.M42A 69B3



TMDS_TX_N<0> TMDS_TX_N<0> - @m42a_lib.M42A 68B2 68D1 69B2

TMDS_TX_N<1> TMDS_TX_N<1> - @m42a_lib.M42A 68B2 68D1 69B2

TMDS_TX_N<2> TMDS_TX_N<2> - @m42a_lib.M42A 68B2 68C1 69B2

TMDS_TX_P<0> TMDS_TX_P<0> - @m42a_lib.M42A 68B2 68D3 69B2

TMDS_TX_P<1> TMDS_TX_P<1> - @m42a_lib.M42A 68B2 68D3 69B2

TMDS_TX_P<2> TMDS_TX_P<2> - @m42a_lib.M42A 68B2 68C3 69B2

TPM_BADD TPM_BADD - @m42a_lib.M42A 53C3

TPM_GPIO1 TPM_GPIO1 - @m42a_lib.M42A 46B1 53C6

TPM_GPIO2 TPM_GPIO2 - @m42a_lib.M42A 46B1 53C6

TPM_LRESET_L TPM_LRESET_L - @m42a_lib.M42A 26B1 53B7

TPM_RST_L TPM_RST_L - @m42a_lib.M42A 53B6

TPM_XTALI TPM_XTALI - @m42a_lib.M42A 53C6

TPM_XTALO TPM_XTALO - @m42a_lib.M42A 53C6

TPS73115_NR TPS73115_NR - @m42a_lib.M42A 19D5

TP_AZ_DOCK_EN_L TP_AZ_DOCK_EN_L - @m42a_lib.M42A 23C5

TP_AZ_DOCK_RST_L TP_AZ_DOCK_RST_L - @m42a_lib.M42A 23C5

TP_CPU_A32_L TP_CPU_A32_L - @m42a_lib.M42A 7C8

TP_CPU_A33_L TP_CPU_A33_L - @m42a_lib.M42A 7B8







TP_CPU_APM0_L TP_CPU_APM0_L - @m42a_lib.M42A 7B8

TP_CPU_APM1_L TP_CPU_APM1_L - @m42a_lib.M42A 7B8

TP_CPU_CPUSLP_L TP_CPU_CPUSLP_L - @m42a_lib.M42A 21C4

TP_CPU_EXTBREF TP_CPU_EXTBREF - @m42a_lib.M42A 7B6

TP_CPU_HFPLL TP_CPU_HFPLL - @m42a_lib.M42A 7B8

TP_CPU_SPARE0 TP_CPU_SPARE0 - @m42a_lib.M42A 7B6








TP_LVDS_VBG TP_LVDS_VBG - @m42a_lib.M42A 13D5

TP_NB_TESTIN_L TP_NB_TESTIN_L - @m42a_lib.M42A 14D6

TP_NB_XOR_FSB2_H7 TP_NB_XOR_FSB2_H7 - @m42a_lib.M42A 14D6

TP_NB_XOR_LVDS_A34 TP_NB_XOR_LVDS_A34 - @m42a_lib.M42A 14C6

TP_NB_XOR_LVDS_A35 TP_NB_XOR_LVDS_A35 - @m42a_lib.M42A 14C6

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1

104

TP_NB_XOR_LVDS_D27 TP_NB_XOR_LVDS_D27 - @m42a_lib.M42A 14C6

TP_NB_XOR_LVDS_D28 TP_NB_XOR_LVDS_D28 - @m42a_lib.M42A 14C6

TP_PCI_GNT0_L TP_PCI_GNT0_L - @m42a_lib.M42A 22B6



TP_PCI_PME_L TP_PCI_PME_L - @m42a_lib.M42A 22A6

TP_SB_ACZ_SDIN1 TP_SB_ACZ_SDIN1 - @m42a_lib.M42A 21C6

TP_SB_ACZ_SDIN2 TP_SB_ACZ_SDIN2 - @m42a_lib.M42A 21C6

TP_SB_DRQ0_L TP_SB_DRQ0_L - @m42a_lib.M42A 21D4

TP_SB_GPIO6 TP_SB_GPIO6 - @m42a_lib.M42A 23C5

TP_SB_GPIO22 TP_SB_GPIO22 - @m42a_lib.M42A 6B1 22B6

=SB_GPIO22 - @m42a_lib.M42A 6B2 69A6

SB_GPIO22 - @m42a_lib.M42A 6B2

=SB_GPIO22 - @m42a_lib.M42A 6B2 69A6

TP_SB_GPIO23 TP_SB_GPIO23 - @m42a_lib.M42A 21D5

TP_SB_GPIO25_DO_NOT_ TP_SB_GPIO25_DO_NOT_USE - 23C3

USE @m42a_lib.M42A

TP_SB_GPIO38 TP_SB_GPIO38 - @m42a_lib.M42A 23C3

TP_SB_RCVENIN_L TP_SB_RCVENIN_L - @m42a_lib.M42A 15B2

TP_SB_RSVD9 TP_SB_RSVD9 - @m42a_lib.M42A 22A6

TP_SB_SATALED_L TP_SB_SATALED_L - @m42a_lib.M42A 21C6

TP_SB_XOR-AD5 TP_SB_XOR-AD5 - @m42a_lib.M42A 22A7

TP_SB_XOR-AD9 TP_SB_XOR-AD9 - @m42a_lib.M42A 22A7

TP_SB_XOR-AE5 TP_SB_XOR-AE5 - @m42a_lib.M42A 22A7

TP_SB_XOR-AG4 TP_SB_XOR-AG4 - @m42a_lib.M42A 22A7

TP_SB_XOR-AH4 TP_SB_XOR-AH4 - @m42a_lib.M42A 22A7

TP_SB_XOR-U3 TP_SB_XOR-U3 - @m42a_lib.M42A 21C6

TP_SB_XOR-U7 TP_SB_XOR-U7 - @m42a_lib.M42A 21C6

TP_SB_XOR-V6 TP_SB_XOR-V6 - @m42a_lib.M42A 21C6

TP_SB_XOR-V7 TP_SB_XOR-V7 - @m42a_lib.M42A 21C6

TP_SB_XOR-Y1 TP_SB_XOR-Y1 - @m42a_lib.M42A 21C6

TP_SB_XOR-Y2 TP_SB_XOR-Y2 - @m42a_lib.M42A 21C6

TP_SB_XOR_AE9 TP_SB_XOR_AE9 - @m42a_lib.M42A 22A6

TP_SB_XOR_AG8 TP_SB_XOR_AG8 - @m42a_lib.M42A 22A6

TP_SB_XOR_AH8 TP_SB_XOR_AH8 - @m42a_lib.M42A 22A6

TP_SB_XOR_W1 TP_SB_XOR_W1 - @m42a_lib.M42A 21C6

TP_USBN_F TP_USBN_F - @m42a_lib.M42A 5C1

TP_USBP_F TP_USBP_F - @m42a_lib.M42A 5C1

TV_DACA_OUT TV_DACA_OUT - @m42a_lib.M42A 13C5 69B8

TV_DACB_OUT TV_DACB_OUT - @m42a_lib.M42A 13C5 69A8

TV_DACC_OUT TV_DACC_OUT - @m42a_lib.M42A 13C5 69A8

TV_IREF TV_IREF - @m42a_lib.M42A 13C5 69C8

USB2_BT_F_N USB2_BT_F_N - @m42a_lib.M42A 44C4

USB2_BT_F_P USB2_BT_F_P - @m42a_lib.M42A 44B4

USB2_CAMERA_CONN_N USB2_CAMERA_CONN_N - @m42a_lib.M42A 67A2

USB2_CAMERA_CONN_P USB2_CAMERA_CONN_P - @m42a_lib.M42A 67B2

USB2_EXTA_F_N USB2_EXTA_F_N - @m42a_lib.M42A 42C2

USB2_EXTA_F_P USB2_EXTA_F_P - @m42a_lib.M42A 42C2

USB2_EXTB_F_N USB2_EXTB_F_N - @m42a_lib.M42A 42B2

USB2_EXTB_F_P USB2_EXTB_F_P - @m42a_lib.M42A 42B2

USB2_GND_EXTA_F USB2_GND_EXTA_F - @m42a_lib.M42A 42C2

USB2_GND_EXTB_F USB2_GND_EXTB_F - @m42a_lib.M42A 42B2

USB_A_N USB_A_N - @m42a_lib.M42A 6C1 22C2

=USB2_EXTA_N - @m42a_lib.M42A 6C2 42C5

USB2_EXTA_N - @m42a_lib.M42A 6C2

=USB2_EXTA_N - @m42a_lib.M42A 6C2 42C5

USB_A_OC_L USB_A_OC_L - @m42a_lib.M42A 6C1 22C4 22D8

=EXTAUSB_OC_L - @m42a_lib.M42A 6C2 42C8

EXTAUSB_OC_L - @m42a_lib.M42A 6C2

=EXTAUSB_OC_L - @m42a_lib.M42A 6C2 42C8

USB_A_P USB_A_P - @m42a_lib.M42A 6C1 22C2

=USB2_EXTA_P - @m42a_lib.M42A 6C2 42C5

USB2_EXTA_P - @m42a_lib.M42A 6C2

=USB2_EXTA_P - @m42a_lib.M42A 6C2 42C5

USB_B_N USB_B_N - @m42a_lib.M42A 6C1 22C2

=USB2_GEYSER_N - @m42a_lib.M42A 6C2 40C7

USB2_GEYSER_N - @m42a_lib.M42A 6C2

=USB2_GEYSER_N - @m42a_lib.M42A 6C2 40C7

USB_B_OC_L USB_B_OC_L - @m42a_lib.M42A 22C4 22D8

USB_B_P USB_B_P - @m42a_lib.M42A 6C1 22C2

=USB2_GEYSER_P - @m42a_lib.M42A 6C2 40C7

USB2_GEYSER_P - @m42a_lib.M42A 6C2

=USB2_GEYSER_P - @m42a_lib.M42A 6C2 40C7

USB_C_N USB_C_N - @m42a_lib.M42A 6C1 22C2

=USB2_EXTB_N - @m42a_lib.M42A 6C2 42B5

USB2_EXTB_N - @m42a_lib.M42A 6C2

=USB2_EXTB_N - @m42a_lib.M42A 6C2 42B5

USB_C_P USB_C_P - @m42a_lib.M42A 6C1 22C2

=USB2_EXTB_P - @m42a_lib.M42A 6C2 42B5

USB2_EXTB_P - @m42a_lib.M42A 6C2

=USB2_EXTB_P - @m42a_lib.M42A 6C2 42B5

USB_D_OC_L USB_D_OC_L - @m42a_lib.M42A 22C4 22D8

USB_E_N USB_E_N - @m42a_lib.M42A 6C1 22C2

TP_USBN_E - @m42a_lib.M42A 5C1 6C2

USB_E_OC_L USB_E_OC_L - @m42a_lib.M42A 22C4 22D8

USB_E_P USB_E_P - @m42a_lib.M42A 6C1 22C2

TP_USBP_E - @m42a_lib.M42A 5C1 6C2

USB_F_N USB_F_N - @m42a_lib.M42A 6C1 22C2

=USB2_IR_N - @m42a_lib.M42A 6C2 41C6

USB_IR_N - @m42a_lib.M42A 6C2

=USB2_IR_N - @m42a_lib.M42A 6C2 41C6

USB_F_P USB_F_P - @m42a_lib.M42A 6C1 22C2

=USB2_IR_P - @m42a_lib.M42A 6C2 41C6

USB_IR_P - @m42a_lib.M42A 6C2

=USB2_IR_P - @m42a_lib.M42A 6C2 41C6

USB_G_N USB_G_N - @m42a_lib.M42A 6B1 22C2

=USB2_BT_N - @m42a_lib.M42A 6B2 44C6

USB_BT_N - @m42a_lib.M42A 6B2

=USB2_BT_N - @m42a_lib.M42A 6B2 44C6

USB_G_P USB_G_P - @m42a_lib.M42A 6B1 22C2

=USB2_BT_P - @m42a_lib.M42A 6C2 44C6

USB_BT_P - @m42a_lib.M42A 6C2

=USB2_BT_P - @m42a_lib.M42A 6C2 44C6

USB_RBIAS_PN USB_RBIAS_PN - @m42a_lib.M42A 22C2

VGA_B VGA_B - @m42a_lib.M42A 69B4

VGA_G VGA_G - @m42a_lib.M42A 69B4

VGA_HSYNC VGA_HSYNC - @m42a_lib.M42A 69B4 69C1

VGA_R VGA_R - @m42a_lib.M42A 69A4

VGA_VSYNC VGA_VSYNC - @m42a_lib.M42A 69B4 69C1

VOL_DOWN VOL_DOWN - @m42a_lib.M42A 54B7 54C7

VOL_UP VOL_UP - @m42a_lib.M42A 54B7 54C7

VREG_FB VREG_FB - @m42a_lib.M42A 54A4

VR_PWRGD_CK410 VR_PWRGD_CK410 - @m42a_lib.M42A 23C5 26A8

VR_PWRGOOD_DELAY VR_PWRGOOD_DELAY - @m42a_lib.M42A 14B6 26B5 58C7

XDP_BPM_L<0> XDP_BPM_L<0> - @m42a_lib.M42A 7C6 11B2






XDP_DBRESET_L XDP_DBRESET_L - @m42a_lib.M42A 7C6 11B4 26C6

XDP_TCK XDP_TCK - @m42a_lib.M42A 7A8 7C6 11B2 11B3

XDP_TDI XDP_TDI - @m42a_lib.M42A 7B8 7C6 11B3

XDP_TDO XDP_TDO - @m42a_lib.M42A 7C6 11B5

XDP_TMS XDP_TMS - @m42a_lib.M42A 7B8 7C6 11B2

XDP_TRST_L XDP_TRST_L - @m42a_lib.M42A 7C6 11B3

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1

105

Title: Cref Part Report

Design: m42a

Date: Aug 5 16:01:17 2006

C0607 CAP_402 m42a[6C7]

C0608 CAP_402 m42a[6C7]

C0610 CAP_402 m42a[6C7]

C0611 CAP_402 m42a[6C7]

C0612 CAP_402 m42a[6A8]

C0613 CAP_402 m42a[6A8]

C0614 CAP_402 m42a[6B7]

C0615 CAP_402 m42a[6B7]

C0616 CAP_402 m42a[6B7]

C0617 CAP_402 m42a[6B7]

C0618 CAP_402 m42a[6A8]

C0619 CAP_402 m42a[6A7]

C0630 CAP_402 m42a[6C7]

C0900 CAP_805 m42a[9B5]

C0901 CAP_805 m42a[9B6]

C0902 CAP_805 m42a[9A5]

C0904 CAP_805 m42a[9A6]

C0907 CAP_805 m42a[9B4]

C0908 CAP_805 m42a[9B6]

C0909 CAP_805 m42a[9B5]

C0910 CAP_805 m42a[9B7]

C0911 CAP_805 m42a[9B7]

C0912 CAP_805 m42a[9A6]

C0913 CAP_805 m42a[9A7]

C0918 CAP_805 m42a[9A7]

C0920 CAP_805 m42a[9A4]

C0923 CAP_805 m42a[9B7]

C0924 CAP_805 m42a[9A7]

C0926 CAP_402 m42a[9B7]

C0928 CAP_805 m42a[9B5]

C0929 CAP_805 m42a[9B4]

C0930 CAP_805 m42a[9A5]

C0931 CAP_805 m42a[9A5]

C0934 CAP_402 m42a[9B7]

C0935 CAP_402 m42a[9B7]

C0936 CAP_402 m42a[9B6]

C0937 CAP_402 m42a[9B6]

C0938 CAP_402 m42a[9B5]

C0939 CAP_805 m42a[9A4]

C0940 CAP_P_3P_D2T m42a[9B5]

C0941 CAP_P_3P_D2T m42a[9A7]

C0942 CAP_P_3P_D2T m42a[9A7]

C0943 CAP_P_3P_D2T m42a[9A6]

C0944 CAP_P_3P_D2T m42a[9A6]

C0946 CAP_P_3P_D2T m42a[9A5]

C0950 CAP_402 m42a[9D7]

C0951 CAP_603 m42a[9D7]

C1001 CAP_402 m42a[10B5]

C1002 CAP_402 m42a[10C4]

C1100 CAP_402 m42a[11B3]

C1211 CAP_402 m42a[12C3]

C1226 CAP_402 m42a[12B6]

C1236 CAP_402 m42a[12A6]

C1415 CAP_402 m42a[14C3]

C1416 CAP_402 m42a[14C2]

C1610 CAP_402 m42a[16B5]

C1611 CAP_402 m42a[16B4]

C1612 CAP_402 m42a[16B4]

C1613 CAP_402 m42a[16B8]

C1614 CAP_402 m42a[16B8]

C1615 CAP_402 m42a[16B6]

C1620 CAP_603 m42a[16B5]

C1621 CAP_603 m42a[16B5]

C1711 CAP_402 m42a[17A3]

C1712 CAP_402 m42a[17A3]

C1713 CAP_402 m42a[17B3]

C1900 CAP_P_3P_D2T m42a[19B8]

C1902 CAP_603 m42a[19B7]

C1903 CAP_603 m42a[19B7]

C1904 CAP_402 m42a[19B6]

C1905 CAP_402 m42a[19B6]

C1906 CAP_402 m42a[19B6]

C1907 CAP_402 m42a[19B5]

C1910 CAP_603 m42a[19B8]

C1911 CAP_402 m42a[19B7]

C1912 CAP_603 m42a[19B8]

C1913 CAP_402 m42a[19B7]

C1914 CAP_603 m42a[19B6]

C1915 CAP_402 m42a[19B6]

C1916 CAP_402 m42a[19B6]

C1917 CAP_402 m42a[19B5]

C1918 CAP_402 m42a[19B5]

C1920 CAP_402 m42a[19A6]

C1921 FILTER_3P_A_NFM18 m42a[19A6]

C1922 CAP_402 m42a[19A6]


C1934 CAP_805 m42a[19C5]

C1935 CAP_402 m42a[19C5]

C1936 CAP_805 m42a[19C5]

C1937 CAP_402 m42a[19C5]

C1940 CAP_402 m42a[19C4]

C1941 CAP_402 m42a[19C3]

C1942 CAP_402 m42a[19C3]

C1950 CAP_402 m42a[19D6]

C1951 CAP_402 m42a[19D5]

C1952 CAP_603 m42a[19D5]

C1953 CAP_402 m42a[19D4]

C1954 CAP_402 m42a[19C4]

C1965 CAP_603 m42a[19B4]

C1966 CAP_603 m42a[19B4]

C1967 CAP_402 m42a[19B4]

C1970 CAP_P_SMB2 m42a[19A4]

C1971 CAP_603 m42a[19A3]

C1972 CAP_603 m42a[19A3]

C1975 CAP_603 m42a[19A3]

C1976 CAP_402 m42a[19A3]

C1980 CAP_402 m42a[19D2]

C1981 CAP_402 m42a[19D2]

C1985 CAP_402 m42a[19C2]

C1986 FILTER_3P_A_NFM18 m42a[19D2]

C1990 CAP_603 m42a[19C2]

C1991 CAP_402 m42a[19C2]

C1992 FILTER_3P_A_NFM18 m42a[19C2]

C1993 CAP_402 m42a[19B2]

C1994 FILTER_3P_A_NFM18 m42a[19B2]

C1995 CAP_402 m42a[19B2]

C1996 FILTER_3P_A_NFM18 m42a[19B2]

C1997 CAP_402 m42a[19A2]


C2500 CAP_P_SMB2 m42a[25B8]

C2501 CAP_402 m42a[25A6]

C2502 CAP_402 m42a[25D4]

C2503 CAP_402 m42a[25D8]

C2504 CAP_402 m42a[25C8]

C2505 CAP_402 m42a[25B7]

C2506 CAP_402 m42a[25B7]

C2507 CAP_402 m42a[25B7]

C2508 CAP_603 m42a[25A6]

C2509 CAP_402 m42a[25B8]

C2510 CAP_402 m42a[25C1]

C2511 CAP_402 m42a[25D6]

C2512 CAP_402 m42a[25B1]

C2513 CAP_402 m42a[25C6]

C2514 CAP_402 m42a[25C6]

C2515 CAP_402 m42a[25B6]

C2516 CAP_P_CASE-C2 m42a[25D3]

C2517 CAP_402 m42a[25D6]

C2518 CAP_402 m42a[25D4]

C2519 CAP_402 m42a[25D3]

C2520 CAP_402 m42a[25B6]

C2521 CAP_402 m42a[25C3]

C2522 CAP_402 m42a[25B3]

C2523 CAP_402 m42a[25B4]

C2524 CAP_603 m42a[25B3]

C2525 CAP_402 m42a[25B3]

C2526 CAP_402 m42a[25A4]

C2527 CAP_402 m42a[25A3]

C2528 CAP_402 m42a[25A3]

C2529 CAP_402 m42a[25A3]

C2530 CAP_402 m42a[25A3]

C2531 CAP_402 m42a[25D1]

C2532 CAP_402 m42a[25C1]

C2533 CAP_402 m42a[25C1]

C2534 CAP_402 m42a[25D1]

C2605 CAP_402 m42a[26D4]

C2607 CAP_402 m42a[26B5]

C2608 CAP_402 m42a[26C7]

C2609 CAP_402 m42a[26C7]

C2610 CAP_402 m42a[26D4]

C2611 CAP_402 m42a[26B8]

C2680 CAP_402 m42a[26B3]

C2800 CAP_402 m42a[28D7]

C2809 CAP_603 m42a[28B2]

C2810 CAP_402 m42a[28B2]

C2811 CAP_402 m42a[28B2]

C2812 CAP_402 m42a[28B1]

C2813 CAP_402 m42a[28B1]

C2814 CAP_402 m42a[28B2]

C2815 CAP_402 m42a[28B2]

C2816 CAP_402 m42a[28B1]

C2817 CAP_402 m42a[28B1]

C2820 CAP_402 m42a[28D7]

C2821 CAP_402 m42a[28A7]

C2822 CAP_402 m42a[28A7]

C2830 CAP_402 m42a[28B2]

C2831 CAP_402 m42a[28B2]

C2832 CAP_402 m42a[28B1]

C2900 CAP_402 m42a[29D7]

C2909 CAP_603 m42a[29B2]

C2910 CAP_402 m42a[29B2]

C2911 CAP_402 m42a[29B2]

C2912 CAP_402 m42a[29B1]

C2913 CAP_402 m42a[29B1]

C2914 CAP_402 m42a[29B2]

C2915 CAP_402 m42a[29B2]

C2916 CAP_402 m42a[29B1]

C2917 CAP_402 m42a[29B1]

C2920 CAP_402 m42a[29D7]

C2921 CAP_402 m42a[29A7]

C2922 CAP_402 m42a[29A7]

C2930 CAP_402 m42a[29B2]

C2931 CAP_402 m42a[29B2]

C2932 CAP_402 m42a[29B1]

C3000 CAP_402 m42a[30D4]

C3001 CAP_402 m42a[30D3]

C3002 CAP_402 m42a[30D4]

C3003 CAP_402 m42a[30D3]

C3004 CAP_402 m42a[30D4]

C3005 CAP_402 m42a[30D3]

C3006 CAP_402 m42a[30C4]

C3007 CAP_402 m42a[30C3]

C3008 CAP_402 m42a[30C4]

C3009 CAP_402 m42a[30C3]

C3010 CAP_402 m42a[30C4]

C3011 CAP_402 m42a[30C3]

C3012 CAP_402 m42a[30B4]

C3013 CAP_402 m42a[30B3]

C3014 CAP_402 m42a[30B4]

C3015 CAP_402 m42a[30B3]

C3016 CAP_402 m42a[30B4]

C3017 CAP_402 m42a[30B3]

C3018 CAP_402 m42a[30B4]

C3019 CAP_402 m42a[30B3]

C3020 CAP_402 m42a[30A4]

C3021 CAP_402 m42a[30A3]

C3022 CAP_402 m42a[30A4]

C3023 CAP_402 m42a[30A3]

C3024 CAP_402 m42a[30A4]

C3025 CAP_402 m42a[30A3]

C3100 CAP_402 m42a[31C4]

C3101 CAP_603 m42a[31B5]

C3102 CAP_603 m42a[31B3]

C3103 CAP_402 m42a[31B5]

C3104 CAP_603 m42a[31C4]

C3105 CAP_P_SMC-LF m42a[31B4]

C3301 CAP_402 m42a[32D6]

C3302 CAP_402 m42a[32D6]

C3303 CAP_402 m42a[32D6]

C3304 CAP_402 m42a[32D6]

C3305 CAP_402 m42a[32D4]

C3306 CAP_402 m42a[32D4]

C3307 CAP_402 m42a[32C4]

C3308 CAP_402 m42a[32D4]

C3309 CAP_603 m42a[32D4]

C3310 CAP_402 m42a[32D3]

C3311 CAP_402 m42a[32C6]

C3312 CAP_603 m42a[32C6]

C3314 CAP_402 m42a[32D8]

C3315 CAP_402 m42a[32D7]

C3316 CAP_603 m42a[32D7]

C3317 CAP_603 m42a[32D4]

C3389 CAP_402 m42a[32C7]

C3390 CAP_402 m42a[32C7]

C3804 CAP_402 m42a[34B5]

C3805 CAP_402 m42a[34B3]

C3806 CAP_603 m42a[34B3]

C3875 CAP_402 m42a[34C7]

C3876 CAP_402 m42a[34C5]

C3900 CAP_402 m42a[35D6]

C3901 CAP_402 m42a[35D5]

C3902 CAP_402 m42a[35C6]

C3903 CAP_402 m42a[35D5]

C3920 CAP_402 m42a[35C7]

C3921 CAP_603 m42a[35C6]

C3922 CAP_402 m42a[35C5]

C3923 CAP_402 m42a[35C6]

C3950 CAP_603 m42a[35B8]

C4100 CAP_402 m42a[36D6]

C4101 CAP_402 m42a[36D6]

C4102 CAP_402 m42a[36D5]

C4103 CAP_402 m42a[36D5]

C4104 CAP_402 m42a[36D5]

C4105 CAP_402 m42a[36D5]

C4106 CAP_402 m42a[36D4]

C4107 CAP_402 m42a[36D4]

C4110 CAP_402 m42a[36D5]

C4111 CAP_402 m42a[36D5]

C4112 CAP_402 m42a[36C5]

C4113 CAP_402 m42a[36C5]

C4115 CAP_402 m42a[36B4]

C4116 CAP_402 m42a[36B4]

C4117 CAP_402 m42a[36B3]

C4118 CAP_402 m42a[36B3]

C4126 CAP_402 m42a[36A8]

C4127 CAP_402 m42a[36A8]

C4128 CAP_402 m42a[36A7]

C4129 CAP_402 m42a[36A7]

C4130 CAP_402 m42a[36A7]

C4131 CAP_402 m42a[36A6]

C4132 CAP_402 m42a[36A6]

C4133 CAP_402 m42a[36A6]

C4134 CAP_402 m42a[36A6]

C4135 CAP_402 m42a[36A5]

C4136 CAP_402 m42a[36A5]

C4137 CAP_402 m42a[36A4]

C4138 CAP_402 m42a[36A4]

C4139 CAP_402 m42a[36A4]

C4140 CAP_402 m42a[36B3]

C4150 CAP_402 m42a[36B6]

C4151 CAP_402 m42a[36B6]

C4200 CAP_402 m42a[37C7]

C4201 CAP_402 m42a[37C6]

C4202 CAP_402 m42a[37C6]

C4203 CAP_402 m42a[37C6]

C4204 CAP_402 m42a[37C7]

C4205 CAP_402 m42a[37C6]

C4206 CAP_402 m42a[37C6]

C4207 CAP_402 m42a[37C6]

C4210 CAP_1808 m42a[37A6]

C4211 CAP_402 m42a[37A6]

C4212 CAP_402 m42a[37A5]

C4411 CAP_402 m42a[38C2]

C4412 CAP_402 m42a[38C2]

C4416 CAP_603 m42a[38D4]

C4417 CAP_402 m42a[38D4]

C4418 CAP_402 m42a[38D4]

C4420 CAP_402 m42a[38C3]

C4422 CAP_402 m42a[38D4]

C4424 CAP_603 m42a[38D5]

C4425 CAP_402 m42a[38D3]

C4426 CAP_402 m42a[38D4]

C4428 CAP_402 m42a[38D3]

C4429 CAP_402 m42a[38D3]

C4430 CAP_402 m42a[38D3]

C4432 CAP_402 m42a[38D3]

C4500 CAP_402 m42a[39B5]

C4501 CAP_402 m42a[39A5]

C4510 CAP_402 m42a[39C3]

C4520 CAP_402 m42a[39B4]

C4521 CAP_402 m42a[39B3]

C4522 CAP_402 m42a[39A4]

C4523 CAP_402 m42a[39A3]

C4524 CAP_603-1 m42a[39A2]

C4525 CAP_402 m42a[39A2]

C4551 CAP_402 m42a[39A7]

C4552 CAP_402 m42a[39A7]

C4590 CAP_402 m42a[39C5]

C4900 CAP_402 m42a[40C4]

C4910 CAP_402 m42a[40C6]

C5100 CAP_402 m42a[41D6]

C5101 CAP_402 m42a[41D6]

C5102 CAP_402 m42a[41B5]

C5202 CAP_402 m42a[42C2]

C5203 CAP_402 m42a[42C2]

C5206 CAP_402 m42a[42B2]

C5207 CAP_402 m42a[42B2]

C5208 CAP_402 m42a[42C6]

C5209 CAP_402 m42a[42B6]

C5210 CAP_P_B2 m42a[42C6]

C5211 CAP_P_B2 m42a[42B6]

C5212 CAP_402 m42a[42C8]

C5213 CAP_603 m42a[42C8]

C5250 CAP_402 m42a[42C8]

C5251 CAP_402 m42a[42B8]

C5300 CAP_402 m42a[43B6]

C5301 CAP_402 m42a[43B6]

C5304 CAP_402 m42a[43D4]

C5305 CAP_402 m42a[43D4]

C5306 CAP_402 m42a[43D4]

C5307 CAP_402 m42a[43C4]

C5308 CAP_402 m42a[43C4]

C5309 CAP_603 m42a[43C3]

C5310 CAP_402 m42a[43C3]

C5498 CAP_402 m42a[44C5]

C5499 CAP_603 m42a[44C5]

C5802 CAP_805 m42a[45D3]

C5803 CAP_402 m42a[45D2]

C5804 CAP_402 m42a[45D2]

C5805 CAP_402 m42a[45D2]

C5806 CAP_402 m42a[45D1]

C5807 CAP_402 m42a[45D2]

C5820 CAP_402 m42a[45C3]

C5900 CAP_402 m42a[46D8]

C5901 CAP_402 m42a[46D8]

C5910 CAP_603 m42a[46A7]

C5911 CAP_402 m42a[46A7]

C5920 CAP_402 m42a[46C6]

C5921 CAP_402 m42a[46C6]

C5951 CAP_402 m42a[46A4]

C5965 CAP_402 m42a[46B8]

C5966 CAP_603 m42a[46B7]

C5967 CAP_402 m42a[46B7]

C5977 CAP_402 m42a[46C2]

C6100 CAP_402 m42a[48D3]

C6101 CAP_402 m42a[48C3]

C6102 CAP_402 m42a[48C2]

C6103 CAP_402 m42a[48C3]

C6104 CAP_402 m42a[48D4]

C6105 CAP_402 m42a[48C4]

C6112 CAP_402 m42a[48B2]

C6150 CAP_402 m42a[48C6]

C6200 CAP_402 m42a[49C5]

C6201 CAP_402 m42a[49C5]

C6202 CAP_402 m42a[49D4]

C6250 CAP_402 m42a[49B5]

C6251 CAP_402 m42a[49A5]

C6252 CAP_402 m42a[49B4]

C6301 CAP_402 m42a[50C2]

C6308 CAP_402 m42a[50C5]

C6309 CAP_402 m42a[50C6]

C6311 CAP_402 m42a[50C2]

C6312 CAP_402 m42a[50D3]

C6604 CAP_402 m42a[52B4]

C6605 CAP_402 m42a[52B4]

C6606 CAP_402 m42a[52B4]

C6620 CAP_402 m42a[52C4]

C6700 CAP_402 m42a[53C4]

C6701 CAP_402 m42a[53C4]

C6702 CAP_402 m42a[53C3]

C6703 CAP_402 m42a[53C3]

C6795 CAP_402 m42a[53C6]

C6796 CAP_402 m42a[53B6]

C6800 CAP_603 m42a[54D6]

C6801 CAP_402 m42a[54D6]

C6802 CAP_P_CASE-B3-LF m42a[54D4]

C6803 CAP_P_CASE-B3-LF m42a[54D3]

C6804 CAP_P_SMA-LF m42a[54B4]

C6805 CAP_603 m42a[54B4]

C6806 CAP_603 m42a[54B3]



C6812 CAP_402 m42a[54B4]

C6813 CAP_402 m42a[54B3]

C6821 CAP_402 m42a[54C6]

C6822 CAP_603 m42a[54A5]

C6823 CAP_402 m42a[54A5]

C6825 CAP_402 m42a[54A4]

C6830 CAP_402 m42a[54D4]

C6833 CAP_402 m42a[54B2]

C6835 CAP_402 m42a[54D6]

C6836 CAP_402 m42a[54D3]

C6853 CAP_402 m42a[54B4]

C7200 CAP_P_SMC-LF m42a[55D6]

C7201 CAP_P_CASE-B3-LF m42a[55C4]

C7202 CAP_603 m42a[55C4]

C7203 CAP_P_CASE-B3-LF m42a[55B4]

C7204 CAP_603 m42a[55B4]

C7205 CAP_P_CASE-B2 m42a[55B4]

C7206 CAP_603 m42a[55B4]

C7207 CAP_402 m42a[55C5]

C7208 CAP_402 m42a[55B5]

C7209 CAP_402 m42a[55A5]

C7210 CAP_402 m42a[55C6]

C7211 CAP_402 m42a[55C5]

C7220 CAP_402 m42a[55B6]

C7221 CAP_402 m42a[55B5]

C7230 CAP_402 m42a[55A6]

C7231 CAP_402 m42a[55A5]

C7260 CAP_402 m42a[55D2]

C7261 CAP_402 m42a[55C2]

C7270 CAP_402 m42a[55C2]

C7271 CAP_402 m42a[55B2]

C7280 CAP_402 m42a[55B2]

C7281 CAP_402 m42a[55B2]

C7300 CAP_402 m42a[56C7]

C7301 CAP_402 m42a[56C5]

C7302 CAP_402 m42a[56C5]

C7303 CAP_402 m42a[56C5]

C7304 CAP_402 m42a[56C5]

C7305 CAP_402 m42a[56C5]

C7306 CAP_402 m42a[56C8]

C7307 CAP_402 m42a[56C6]

C7308 CAP_402 m42a[56C6]

C7350 CAP_402 m42a[56A7]

C7351 CAP_603 m42a[56A7]

C7352 CAP_402 m42a[56A5]

C7353 CAP_402 m42a[56A5]

C7354 CAP_402 m42a[56A5]

C7355 CAP_402 m42a[56A5]

C7356 CAP_402 m42a[56A5]

C7357 CAP_402 m42a[56A8]

C7370 CAP_402 m42a[56A2]

C7371 CAP_402 m42a[56A2]

C7372 CAP_402 m42a[56A1]

C7400 CAP_402 m42a[57B4]

C7401 CAP_402 m42a[57D7]

C7402 CAP_402 m42a[57C7]

C7404 CAP_402 m42a[57C4]

C7411 CAP_402 m42a[57B7]

C7412 CAP_402 m42a[57B6]

C7414 CAP_402 m42a[57C4]

C7430 CAP_P_B2 m42a[57D2]

C7431 CAP_P_B2 m42a[57C2]

C7432 CAP_805-1 m42a[57B2]

C7433 CAP_805-1 m42a[57A2]

C7435 CAP_402 m42a[57B1]

C7440 CAP_402 m42a[57A4]

C7441 CAP_402 m42a[57A4]

C7445 CAP_402 m42a[57A3]

C7446 CAP_402 m42a[57A3]

C7447 CAP_402 m42a[57A3]

C7450 CAP_402 m42a[57A6]

C7451 CAP_402 m42a[57A7]

C7452 CAP_402 m42a[57A6]

C7500 CAP_402 m42a[58C4]

C7501 CAP_P_CASED2E-SM m42a[58C3]

C7502 CAP_402 m42a[58B4]

C7503 CAP_402 m42a[58C2]

C7504 CAP_402 m42a[58B2]

C7505 CAP_402 m42a[58C8]

C7506 CAP_402 m42a[58B8]

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1

106

C7507 CAP_402 m42a[58B7]


C7509 CAP_P_CASED2E-SM m42a[58D3]

C7510 CAP_402 m42a[58C8]

C7511 CAP_402 m42a[58B3]

C7512 CAP_402 m42a[58C3]

C7513 CAP_402 m42a[58B7]

C7514 CAP_402 m42a[58B8]

C7515 CAP_402 m42a[58C5]

C7516 CAP_402 m42a[58B4]


C7518 CAP_603 m42a[58D2]

C7521 CAP_402 m42a[58A6]

C7526 CAP_603 m42a[58D7]

C7527 CAP_402 m42a[58C5]

C7528 CAP_402 m42a[58B5]

C7529 CAP_402 m42a[58B5]

C7530 CAP_402 m42a[58C7]

C7531 CAP_402 m42a[58B5]

C7532 CAP_402 m42a[58B6]

C7533 CAP_402 m42a[58B6]

C7534 CAP_402 m42a[58B5]

C7535 CAP_603 m42a[58D6]

C7590 CAP_402 m42a[58C3]

C7592 CAP_402 m42a[58B3]

C7596 CAP_402 m42a[58D7]

C7599 CAP_603 m42a[58C2]

C7600 CAP_603 m42a[59C4]

C7601 CAP_603 m42a[59A4]

C7602 CAP_402 m42a[59A4]

C7604 CAP_402 m42a[59A2]

C7605 CAP_402 m42a[59A5]

C7607 CAP_402 m42a[59A3]

C7608 CAP_402 m42a[59D2]

C7609 CAP_402 m42a[59D7]

C7621 CAP_402 m42a[59B6]

C7622 CAP_402 m42a[59C5]

C7624 CAP_402 m42a[59C6]

C7625 CAP_402 m42a[59B6]

C7626 CAP_402 m42a[59B6]

C7628 CAP_402 m42a[59B7]

C7629 CAP_402 m42a[59B7]

C7630 CAP_402 m42a[59B5]

C7631 CAP_402 m42a[59C7]

C7632 CAP_402 m42a[59C2]


C7641 CAP_603 m42a[59D6]

C7650 CAP_805 m42a[59B7]

C7651 CAP_805 m42a[59B8]


C7661 CAP_402 m42a[59B3]

C7662 CAP_402 m42a[59C4]

C7664 CAP_402 m42a[59C3]

C7665 CAP_402 m42a[59B4]

C7666 CAP_402 m42a[59B3]

C7668 CAP_402 m42a[59B2]

C7669 CAP_402 m42a[59B2]

C7670 CAP_402 m42a[59B4]


C7681 CAP_603 m42a[59D4]

C7689 CAP_402 m42a[59B4]

C7690 CAP_805 m42a[59B2]

C7691 CAP_805 m42a[59B1]


C7700 CAP_603 m42a[60C4]

C7701 CAP_402 m42a[60C3]

C7702 CAP_603 m42a[60C3]

C7703 CAP_603 m42a[60C4]

C7704 CAP_402 m42a[60C3]

C7705 CAP_603 m42a[60C3]

C7720 CAP_402 m42a[60B4]

C7721 CAP_603 m42a[60B3]

C7750 CAP_402 m42a[60C6]

C7800 CAP_603 m42a[61C5]

C7801 CAP_603 m42a[61C6]

C7802 CAP_603 m42a[61C5]

C7803 CAP_402 m42a[61B2]

C7804 CAP_402 m42a[61C2]

C7805 CAP_402 m42a[61C2]

C7806 CAP_402 m42a[61B7]

C7807 CAP_402 m42a[61B6]

C7808 CAP_402 m42a[61B6]

C7809 CAP_402 m42a[61C4]

C7810 CAP_402 m42a[61B4]


C7831 CAP_603 m42a[61C4]

C7840 CAP_805 m42a[61B3]

C7841 CAP_805 m42a[61B3]

C7842 CAP_P_CASE-D2E-LF m42a[61B3]


C7864 CAP_402 m42a[61C2]

C7900 CAP_603 m42a[62C4]

C7901 CAP_603 m42a[62A4]

C7902 CAP_402 m42a[62A4]

C7903 CAP_402 m42a[62A6]

C7904 CAP_402 m42a[62A2]

C7905 CAP_402 m42a[62A5]

C7906 CAP_402 m42a[62A6]

C7907 CAP_402 m42a[62A3]

C7908 CAP_402 m42a[62D2]

C7909 CAP_402 m42a[62C7]

C7921 CAP_402 m42a[62B6]

C7922 CAP_402 m42a[62C5]

C7924 CAP_402 m42a[62C6]

C7925 CAP_402 m42a[62B6]

C7926 CAP_402 m42a[62B6]

C7928 CAP_402 m42a[62B7]

C7929 CAP_402 m42a[62B7]

C7930 CAP_402 m42a[62B5]

C7931 CAP_402 m42a[62C7]

C7932 CAP_402 m42a[62C2]


C7941 CAP_603 m42a[62C6]

C7950 CAP_805 m42a[62B8]


C7961 CAP_402 m42a[62B3]

C7962 CAP_402 m42a[62C4]

C7964 CAP_402 m42a[62C3]

C7965 CAP_402 m42a[62B3]

C7966 CAP_402 m42a[62B3]

C7968 CAP_402 m42a[62B2]

C7969 CAP_402 m42a[62B2]

C7970 CAP_402 m42a[62B4]


C7981 CAP_603 m42a[62C4]

C7989 CAP_402 m42a[62B4]

C7990 CAP_805 m42a[62A7]

C7991 CAP_805 m42a[62A7]


C7999 CAP_402 m42a[62A6]

C8000 CAP_402 m42a[63D4]

C8005 CAP_402 m42a[63C4]

C8010 CAP_402 m42a[63C4]

C8015 CAP_402 m42a[63B4]

C8025 CAP_402 m42a[63A4]

C8060 CAP_402 m42a[63B3]

C8061 CAP_402 m42a[63B2]

C8062 CAP_402 m42a[63B2]

C8090 CAP_1206-1 m42a[63C3]

C8091 CAP_402 m42a[63D2]

C8092 CAP_402 m42a[63D1]

C8093 CAP_805 m42a[63D1]

C8202 CAP_402 m42a[65D7]

C8203 CAP_402 m42a[65C7]

C8205 CAP_402 m42a[65A5]

C8206 CAP_402 m42a[65A4]

C8209 CAP_402 m42a[65A5]

C8211 CAP_402 m42a[65A5]

C8215 CAP_402 m42a[65A4]

C8217 CAP_603 m42a[65C2]

C8218 CAP_402 m42a[65C4]

C8220 CAP_402 m42a[65A7]

C8221 CAP_402 m42a[65A7]

C8230 CAP_402 m42a[65C6]

C8300 CAP_402 m42a[66C7]

C8301 CAP_402 m42a[66C7]

C8302 CAP_402 m42a[66C7]

C8303 CAP_402 m42a[66C4]

C8304 CAP_402 m42a[66C5]

C8305 CAP_1206-1 m42a[66C4]

C8306 CAP_1206-1 m42a[66C3]

C8307 CAP_1206-1 m42a[66C3]

C8308 CAP_P_CASED2E-SM m42a[66B4]

C8309 CAP_P_6.3X5.5SM1 m42a[66B3]

C8310 CAP_P_CASED2E-SM m42a[66B3]

C8311 CAP_402 m42a[66C7]

C8312 CAP_402 m42a[66C5]

C8313 CAP_402 m42a[66C6]

C8316 CAP_402 m42a[66B4]

C8317 CAP_402 m42a[66B5]

C8318 CAP_402 m42a[66B4]

C8320 CAP_402 m42a[66B5]

C8321 CAP_402 m42a[66B5]

C8322 CAP_402 m42a[66B4]

C8323 CAP_402 m42a[66A5]

C8324 CAP_402 m42a[66A4]

C8325 CAP_402 m42a[66C7]

C8326 CAP_402 m42a[66C7]

C8327 CAP_402 m42a[66D7]

C8328 CAP_402 m42a[66B6]

C8340 CAP_402 m42a[66C7]

C8341 CAP_402 m42a[66B8]

C8370 CAP_402 m42a[66C3]

C8371 CAP_402 m42a[66C2]

C8372 CAP_402 m42a[66B1]

C8375 CAP_402 m42a[66B3]

C8381 CAP_603 m42a[66B3]

C9400 CAP_402 m42a[67C3]

C9401 CAP_402 m42a[67C3]

C9402 CAP_402 m42a[67C3]

C9403 CAP_402 m42a[67C3]

C9408 CAP_402 m42a[67A3]

C9409 CAP_402 m42a[67B2]

C9410 CAP_402 m42a[67A3]

C9411 CAP_402 m42a[67B5]

C9412 CAP_603 m42a[67B5]

C9413 CAP_402 m42a[67B6]

C9414 CAP_402 m42a[67D5]

C9415 CAP_402 m42a[67A3]

C9416 CAP_402 m42a[67A4]

C9459 CAP_402 m42a[67C5]

C9500 CAP_402 m42a[68D5]

C9501 CAP_402 m42a[68D4]

C9502 CAP_402 m42a[68D4]

C9503 CAP_402 m42a[68D4]

C9504 CAP_603 m42a[68D4]

C9505 CAP_603 m42a[68B2]

C9506 CAP_402 m42a[68C7]

C9507 CAP_402 m42a[68D5]

C9508 CAP_402 m42a[68D5]

C9509 CAP_402 m42a[68D4]

C9510 CAP_402 m42a[68D4]

C9511 CAP_402 m42a[68D4]

C9512 CAP_402 m42a[68D3]

C9513 CAP_603 m42a[68D3]

C9514 CAP_402 m42a[68D7]

C9519 CAP_402 m42a[68B6]

C9520 CAP_402 m42a[68B6]

C9521 CAP_402 m42a[68B3]

C9522 CAP_402 m42a[68D2]

C9523 CAP_402 m42a[68D2]

C9524 CAP_402 m42a[68C2]

C9525 CAP_402 m42a[68C2]

C9526 CAP_402 m42a[68C3]

C9527 CAP_402 m42a[68C1]

C9530 CAP_402 m42a[68D7]

C9531 CAP_402 m42a[68D7]

C9532 CAP_402 m42a[68C7]

C9533 CAP_402 m42a[68C7]

C9534 CAP_402 m42a[68C7]

C9535 CAP_402 m42a[68C7]

C9536 CAP_402 m42a[68D7]

C9537 CAP_402 m42a[68D7]

C9538 CAP_402 m42a[68D7]

C9539 CAP_402 m42a[68D7]

C9540 CAP_603 m42a[68D6]

C9541 CAP_402 m42a[68B5]

C9542 CAP_402 m42a[68B5]

C9543 CAP_402 m42a[68B5]

C9544 CAP_402 m42a[68B5]

C9545 CAP_402 m42a[68B5]

C9546 CAP_402 m42a[68B4]

C9547 CAP_402 m42a[68B4]

C9548 CAP_402 m42a[68B4]

C9804 CAP_402 m42a[69C4]

C9808 CAP_402 m42a[69C5]

C9809 CAP_402 m42a[69B5]

C9812 CAP_402 m42a[69B5]

C9820 CAP_402 m42a[69A4]

C9821 CAP_402 m42a[69A3]

C9824 CAP_402 m42a[69B5]

C9834 CAP_402 m42a[69A4]

C9839 CAP_402 m42a[69B7]

C9842 CAP_402 m42a[69C1]

C9843 CAP_402 m42a[69C1]

C9860 CAP_402 m42a[69C2]

D1986 DIODE_SCHOT_6PB_SOT- m42a[19C2 19D2]

363

D2502 DIODE_SCHOT_6PB_SOT- m42a[25C8 25D8]

363

D2600 DIODE_SCHOT_6PB_SOT- m42a[26D5 26D5]

363

D4520 DIODE_DUAL_6P_SOT-36 m42a[39B4 39B3]

3

D4521 DIODE_DUAL_6P_SOT-36 m42a[39A4 39A3]

3

D4550 ZENER_SOT23 m42a[39A6]

D4590 DIODE_SCHOT_SMB m42a[39D4]

D4591 DPAK3P_SOT-363 m42a[39C5 39C5 39C5]

D4900 DIODE_SCHOT_3P_A_SC- m42a[40C6]

75


75

D5201 DIODE_SCHOT_3P_A_SC- m42a[42A3]

75

D7500 DIODE_SCHOT_SMB m42a[58C3]

D7501 DIODE_SCHOT_SMB m42a[58B3]

D7624 DIODE_SCHOT_SOD-323 m42a[59C6]


D7820 DIODE_SCHOT_SMB m42a[61B4]

D7921 DIODE_SMB m42a[62B7]


D7961 DIODE_SMB m42a[62B2]



75

D8201 DPAK3P_SOT-363 m42a[65D4]

D8201 DPAK3P_SOT-363 m42a[66B3]


D8322 DPAK3P_SOT-363 m42a[66C8 66A5 66A6]

D9500 DIODE_DUAL_6P_SOT-36 m42a[68A7 68B7]

3

DZ7300 SUPPR_TRANSIENT_4P1_ m42a[56C6]

0405

DZ7301 SUPPR_TRANSIENT_4P1_ m42a[56C6]

0405

DZ7350 SUPPR_TRANSIENT_4P1_ m42a[56A6]

0405

DZ7351 SUPPR_TRANSIENT_4P1_ m42a[56A6]

0405

F8200 FUSE_1206 m42a[65D6]

F8300 FUSE_1206 m42a[66C3]

F9804 FUSE_SM-LF m42a[69C5]

FL4520 FILTER_4P_2012 m42a[39B3]

FL4521 FILTER_4P_2012 m42a[39B3]

FL4590 FUSE_MINISMDC m42a[39D5]

FL9800 FILTER_LC_SM-220MHZ- m42a[69B5]

LF

FL9801 FILTER_LC_SM-220MHZ- m42a[69A5]

LF

FL9802 FILTER_LC_SM-220MHZ- m42a[69A5]

LF

GV3901 HOLE_VIA m42a[35C2]




GV3905 HOLE_VIA m42a[35B2]




J1102 CON_F30STSM_5047_SM1 m42a[11B2]

J2600 CON_F2RT_S2MT_SM_F-R m42a[26D6]

T-SM

J2801 CON_F200RT_DDR2DIMM_ m42a[28D6]

TH1_F-RT-TH2

J2901 CON_F200RT_DDR2DIMM_ m42a[29D5]

TH1_F-RT-TH2

J3801 CON_M50ST_D2MT_SM_M- m42a[34C4]

ST-SM

J3901 CON_F19ST_S2MT_SM_F- m42a[35D8]

ST-SM

J4200 CON_RJ45_8RT_S2MT_SM m42a[37C2]

_F-RT-SM

J4500 CON_F6RT_S2MT_TH_F-R m42a[39B2]

T-TH1

J4900 CON_F10ST_D_SMA_F-ST m42a[40C4]

-SM

J5200 CON_F4RT_USB_S2MT_TH m42a[42D1]

_F-RT-TH-M42

J5201 CON_F4RT_USB_S2MT_TH m42a[42B1]

_F-RT-TH-M42

J5300 CON_F52RT_D2MT_SM_F- m42a[43C5]

ST-SM

J5400 CON_F4ST_S2MT_SM_F-S m42a[44C4]

T-SM

J6000 CON_F30STSM_5047_SM1 m42a[47C6]


T-SM

J6251 CON_F2ST_S2MT_SM_F-S m42a[49A6]

T-SM


T-SM

J7300 CON_F8RT_2MT_AUDIOOU m42a[56C8]

T_TH_F-RT-TH

J7301 CON_M3RT_S2MT_SM_M-R m42a[56D1]

T-SM1

J7302 CON_F2ST_S2MT_SM_F-S m42a[56D1]

T-SM


T-SM

J7350 CON_F8RT_2MT_AUDIOIN m42a[56B8]

_TH_F-RT-TH

J8200 CON_M5RT_S_SM_M-RT-S m42a[65D7]

M

J8250 CON_F20ST_D_SM_F-ST- m42a[65B6]

SM1

J9400 CON_F4ST_S2MT_SM_F-S m42a[67D2]

T-SM

J9401 CON_F22RT_S4MT_SM_F- m42a[67B1]

RT-SM

J9801 CON_DVI_30RT_Q4MT_TH m42a[69B4]

1_RT-TH

L1922 IND_0603 m42a[19A7]

L1934 IND_0603 m42a[19C5]

L1936 IND_0603 m42a[19C5]

L1970 IND_1210 m42a[19B4]

L1975 IND_0805 m42a[19A4]

L1985 IND_0603 m42a[19D3]

L1990 IND_0603 m42a[19C3]

L2500 IND_SM-3 m42a[25B8]

L2507 IND_1206 m42a[25A7]

L3301 IND_0402-LF m42a[32D7]

L3302 IND_0402-LF m42a[32D3]

L3901 FILTER_4P_2012H m42a[35D6]

L3902 FILTER_4P_2012H m42a[35D5]

L3912 IND_0402 m42a[35C6]

L4100 IND_0402-LF m42a[36D3]

L4250 IND_0402-LF m42a[37D7]

L4400 IND_0402 m42a[38D4]

L4510 IND_SM m42a[39C3]

L4550 IND_SM-1 m42a[39A7]

L4900 IND_0402 m42a[40D5]

L4901 FILTER_4P_SM m42a[40C6]

L4902 IND_0402 m42a[40C5]

L5200 FILTER_4P_SM m42a[42C4]

L5201 FILTER_4P_SM m42a[42B4]

L5202 IND_0402-LF m42a[42D4]

L5203 IND_0402-LF m42a[42C4]

L5204 IND_0402-LF m42a[42C3]

L5205 IND_0402-LF m42a[42A3]

L5400 FILTER_4P_SM m42a[44B5]

L5410 IND_0402-LF m42a[44C5]

L5411 IND_0402-LF m42a[44B5]

L5910 IND_0603 m42a[46A7]

L6800 IND_0402 m42a[54A5]

L6801 IND_0402 m42a[54D6]

L7200 IND_0402 m42a[55C7]

L7210 IND_0402 m42a[55C7]

L7211 IND_0402 m42a[55A7]

L7220 IND_0402 m42a[55B7]

L7230 IND_0402 m42a[55A7]

L7300 IND_0402-LF m42a[56D6]

L7301 IND_0402-LF m42a[56D4]

L7302 IND_0402 m42a[56D6]

L7303 IND_0402 m42a[56C6]

L7304 IND_0402 m42a[56C4]

L7305 IND_0402 m42a[56C6]

L7306 IND_0402 m42a[56C4]

L7307 IND_0402 m42a[56C6]

L7350 IND_0402 m42a[56B6]

L7351 IND_0402 m42a[56B4]

L7352 IND_0402 m42a[56B6]

L7353 IND_0402 m42a[56B6]

L7354 IND_0402 m42a[56B4]

L7355 IND_0402 m42a[56B6]

L7356 IND_0402 m42a[56B4]

L7357 IND_0402 m42a[56A6]

L7370 IND_0402 m42a[56B2]

L7371 IND_0402 m42a[56B1]

L7372 IND_0402 m42a[56B2]

L7373 IND_0402 m42a[56B1]

L7374 IND_0402 m42a[56B2]

L7375 IND_0402 m42a[56B1]

L7390 IND_0402 m42a[56D8]

L7400 IND_0402 m42a[57B4]

L7500 IND_SM m42a[58D2]

L7501 IND_SM m42a[58B2]

L7620 IND_L812HW m42a[59B7]

L7680 IND_SM m42a[59B2]

L7820 IND_3P_SM m42a[61B3]

L7920 IND_SM m42a[62B7]

L7960 IND_3P_SM m42a[62B2]

L8090 IND_CDPH4D19F-SM m42a[63D1]

L8201 IND_SM-LF m42a[65A3]

L8202 IND_0402-LF m42a[65A3]

L8203 IND_0402-LF m42a[65A3]

L8204 IND_0402-LF m42a[65A3]

L8205 IND_SM-LF m42a[65A3]

L8207 IND_0402 m42a[65A7]

L8208 IND_0402 m42a[65A7]

L8209 IND_0402 m42a[65A7]

L8300 IND_3P_SM m42a[66C4]

L9400 IND_0402-LF m42a[67D4]

L9401 IND_0402-LF m42a[67C4]

L9402 IND_0402-LF m42a[67D4]

L9403 IND_0402-LF m42a[67D4]

L9404 IND_0402-LF m42a[67B4]

L9405 IND_0402-LF m42a[67A4]

L9407 FILTER_4P_SM m42a[67A4]

L9408 IND_0402-LF m42a[67B4]

L9500 IND_0402-LF m42a[68D5]

L9501 IND_0402-LF m42a[68D5]

L9503 IND_0402-LF m42a[68D8]

L9504 IND_0402-LF m42a[68C8]

L9505 IND_0402-LF m42a[68C8]

L9506 IND_0402-LF m42a[68D8]

L9804 FILTER_4P_SM1 m42a[69A2]

L9805 FILTER_4P_2012H m42a[69B2]

L9806 FILTER_4P_2012H m42a[69B2]

L9807 FILTER_4P_2012H m42a[69B2]

L9844 IND_SM-1 m42a[69C4]

Q2680 TRA_SINGLE_MOSFET_NC m42a[26A3]

HN_SOT23

Q3810 TRA_FDC638P_SM-LF m42a[34C5]

Q3875 TRA_2N7002DW_SOT-363 m42a[34C6 34C7]

Q4590 TRA_FDC638P_SM-LF m42a[39D5]

Q4591 TRA_2N7002_SOT23-LF m42a[39C5]

Q5901 TRA_2N7002DW_SOT-363 m42a[46B4 46B5]

Q5950 TRA_2N3906_SOT23-LF m42a[46A3]

Q5952 TRA_2N7002_SOT23-LF m42a[46A3]

Q6100 TRA_SI3446DV_TSOP-LF m42a[48A5]

Q6101 TRA_2N7002DW_SOT-363 m42a[48A6 48A7]

Q6150 TRA_TP0610_S0T23-3 m42a[48C6]

Q6151 TRA_2N7002_SOT23-LF m42a[48C7]

Q6152 TRA_TP0610_S0T23-3 m42a[48C7]

Q6153 TRA_TP0610_S0T23-3 m42a[48C8]

Q6200 TRA_BC846BM3T5G_NPN_ m42a[49B6]

SOT732-3

Q6560 TRA_2N7002_SOT23-LF m42a[51B3]

Q6650 TRA_2N7002_SOT23-LF m42a[52B6]

Q6651 TRA_TP0610_S0T23-3 m42a[52B6]

Q7400 TRA_2N7002DW_SOT-363 m42a[57C7 57D7]

Q7401 TRA_2N7002DW_SOT-363 m42a[57D5 57D6]

Q7402 TRA_2N7002DW_SOT-363 m42a[57B7 57C5]

Q7500 TRA_HAT2168H_LFPAK m42a[58D3]


A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1

R7202 RES_402 m42a[55A4]

R7201 RES_402 m42a[55C4]

R6854 RES_402 m42a[54B4]

R6853 RES_402 m42a[54A7]

R6852 RES_402 m42a[54B7]

R6851 RES_402 m42a[54B7]

R6850 RES_402 m42a[54B7]

R6811 RES_402 m42a[54A4]

R6810 RES_402 m42a[54A4]

R6809 RES_402 m42a[54C3]

R6808 RES_402 m42a[54D3]

R6807 RES_402 m42a[54D7]

R6802 RES_402 m42a[54A5]

R6801 RES_402 m42a[54B5]

R6800 RES_402 m42a[54C6]

R6799 RES_402 m42a[53B6]

R6798 RES_402 m42a[53B6]

R6705 RES_805 m42a[53C3]

R6704 RES_805 m42a[53C2]

R6703 RES_402 m42a[53C4]

R6702 RES_402 m42a[53C4]

R6700 RES_402 m42a[53C7]

R6652 RES_402 m42a[52B7]

R6650 RES_402 m42a[52B6]

R6621 RES_402 m42a[52A5]

R6565 RES_402 m42a[51C3]

R6561 RES_402 m42a[51B4]

R6560 RES_402 m42a[51C3]

R6309 RES_402 m42a[50C5]

R6308 RES_402 m42a[50D3]

R6307 RES_402 m42a[50C5]

R6306 RES_402 m42a[50C2]

R6303 RES_402 m42a[50C3]

R6302 RES_402 m42a[50D4]

R6301 RES_402 m42a[50D4]

R6252 RES_402 m42a[49B3]

R6251 RES_402 m42a[49A5]

R6203 RES_402 m42a[49D3]

R6201 RES_402 m42a[49C5]

R6200 RES_402 m42a[49C5]

R6153 RES_402 m42a[48B7]

R6152 RES_402 m42a[48C7]

R6151 RES_402 m42a[48B6]

R6150 RES_402 m42a[48C6]

R6144 RES_402 m42a[48A6]

R6143 RES_1206 m42a[48A4]

R6142 RES_402 m42a[48A6]

R6141 RES_402 m42a[48A7]

R6140 RES_402 m42a[48A7]

R6112 RES_402 m42a[48B2]

R6108 RES_402 m42a[48C4]

R6107 RES_402 m42a[48D4]

R6106 RES_402 m42a[48C4]

R6105 RES_402 m42a[48D4]

R6103 RES_402 m42a[48C3]

R6102 RES_402 m42a[48C2]

R6100 RES_402 m42a[48D3]

R5999 RES_402 m42a[46C4]

R5998 RES_402 m42a[46C4]

R5997 RES_402 m42a[46B4]

R5996 RES_402 m42a[46B4]

R5995 RES_402 m42a[46D5]

R5994 RES_402 m42a[46D5]

R5993 RES_402 m42a[46B2]

R5992 RES_402 m42a[46B2]

R5991 RES_402 m42a[46B2]

R5990 RES_402 m42a[46B2]

R5989 RES_402 m42a[46D5]

R5988 RES_402 m42a[46B5]

R5987 RES_402 m42a[46C5]

R5986 RES_402 m42a[46C5]

R5985 RES_402 m42a[46C5]

R5984 RES_402 m42a[46C5]

R5983 RES_402 m42a[46C5]

R5982 RES_402 m42a[46D5]

R5981 RES_402 m42a[46D5]

R5980 RES_402 m42a[46D5]

R5977 RES_402 m42a[46C1]

R5976 RES_402 m42a[46D1]

R5973 RES_402 m42a[46C5]

R5972 RES_402 m42a[46C7]

R5971 RES_402 m42a[46D3]

R5970 RES_402 m42a[46D3]

R5955 RES_402 m42a[46B5]

R5954 RES_402 m42a[46B5]

R5953 RES_402 m42a[46D5]

R5952 RES_402 m42a[46A3]

R5951 RES_402 m42a[46A3]

R5950 RES_402 m42a[46A3]

R5949 RES_402 m42a[46C4]

R5948 RES_402 m42a[46C5]

R5947 RES_402 m42a[46B4]

R5946 RES_402 m42a[46C4]

R5945 RES_402 m42a[46C4]

R5944 RES_402 m42a[46B4]

R5943 RES_402 m42a[46B4]

R5942 RES_402 m42a[46C5]

R5941 RES_402 m42a[46C4]

R5940 RES_402 m42a[46C5]

R5939 RES_402 m42a[46C4]

R5938 RES_402 m42a[46C5]

R5937 RES_402 m42a[46C4]

R5936 RES_402 m42a[46C5]

R5935 RES_402 m42a[46C4]

R5934 RES_402 m42a[46C5]

R5933 RES_402 m42a[46C4]

R5932 RES_402 m42a[46C4]

R5931 RES_402 m42a[46C4]

R5930 RES_402 m42a[46C5]

R5929 RES_402 m42a[46C5]

R5928 RES_402 m42a[46D4]

R5927 RES_402 m42a[46C5]

R5926 RES_402 m42a[46C4]

R5925 RES_402 m42a[46C5]

R5924 RES_402 m42a[46C4]

R5923 RES_402 m42a[46C5]

R5922 RES_402 m42a[46C5]

R5920 RES_402 m42a[46C5]

R5919 RES_402 m42a[46C5]

R5918 RES_402 m42a[46C5]

R5911 RES_402 m42a[46A6]

R5910 RES_603 m42a[46C8]

R5906 RES_402 m42a[46D4]

R5905 RES_402 m42a[46D4]

R5901 RES_603 m42a[46D8]

R5900 RES_402 m42a[46D7]

R5899 RES_402 m42a[45D3]

R5898 RES_402 m42a[45C2]

R5809 RES_402 m42a[45D2]

R5803 RES_402 m42a[45C1]

R5802 RES_402 m42a[45C1]

R5801 RES_402 m42a[45D1]

R5303 RES_402 m42a[43C4]

R5302 RES_402 m42a[43B4]

R5301 RES_402 m42a[43B4]

R5251 RES_402 m42a[42C8]

R5250 RES_402 m42a[42C8]

R5100 RES_402 m42a[41C6]

R4910 RES_402 m42a[40C6]

R4595 RES_402 m42a[39C5]

R4594 RES_402 m42a[39C6]

R4593 RES_402 m42a[39C6]

R4591 RES_402 m42a[39C5]

R4590 RES_402 m42a[39C5]

R4550 RES_402 m42a[39A7]

R4504 RES_402 m42a[39A5]

R4503 RES_402 m42a[39B5]

R4502 RES_402 m42a[39B5]

R4501 RES_402 m42a[39B6]

R4500 RES_402 m42a[39B6]

R4452 RES_402 m42a[38C3]

R4432 RES_402 m42a[38A6]

R4431 RES_402 m42a[38A6]

R4420 RES_402 m42a[38C2]

R4400 RES_402 m42a[38C3]

R4203 RES_402 m42a[37A5]

R4202 RES_402 m42a[37A5]

R4201 RES_402 m42a[37A5]

R4200 RES_402 m42a[37A6]

R4131 RES_402 m42a[36B6]

R4130 RES_402 m42a[36B6]

R4124 RES_402 m42a[36A2]

R4123 RES_402 m42a[36A2]

R4122 RES_402 m42a[36A3]

R4120 RES_402 m42a[36B4]

R4119 RES_402 m42a[36B3]

R4118 RES_402 m42a[36B3]

R4117 RES_402 m42a[36B3]

R4107 RES_402 m42a[36D8]

R4106 RES_402 m42a[36B5]

R4105 RES_402 m42a[36B4]

R4104 RES_402 m42a[36B4]

R4103 RES_402 m42a[36B4]

R4102 RES_402 m42a[36C8]

R4101 RES_402 m42a[36D8]

R3950 RES_402 m42a[35B7]

R3901 RES_402 m42a[35C3]

R3900 RES_402 m42a[35D3]

R3877 RES_402 m42a[34C6]

R3876 RES_402 m42a[34C7]

R3865 RES_402 m42a[34C6]

R3859 RES_402 m42a[34B4]

R3858 RES_402 m42a[34B5]

R3853 RES_402 m42a[34C3]

R3851 RES_402 m42a[34C4]

R3825 RES_402 m42a[34C5]

R3824 RES_402 m42a[34C4]

R3490 RES_402 m42a[33A4]

R3482 RES_402 m42a[33B1]

R3481 RES_402 m42a[33B1]

R3480 RES_402 m42a[33C7]

R3478 RES_402 m42a[33B4]

R3477 RES_402 m42a[33B4]

R3476 RES_402 m42a[33A7]

R3475 RES_402 m42a[33B7]

R3474 RES_402 m42a[33B8]

R3473 RES_402 m42a[33B7]

R3472 RES_402 m42a[33B7]

R3471 RES_402 m42a[33B7]

R3470 RES_402 m42a[33C7]

R3469 RES_402 m42a[33C7]

R3468 RES_402 m42a[33C7]

R3467 RES_402 m42a[33A7]

R3466 RES_402 m42a[33A7]

R3465 RES_402 m42a[33C4]

R3463 RES_402 m42a[33D7]

R3454 RES_402 m42a[33B7]

R3453 RES_402 m42a[33B7]

R3452 RES_402 m42a[33B7]

R3451 RES_402 m42a[33B7]

R3450 RES_402 m42a[33C7]

R3442 RES_402 m42a[33C1]

R3441 RES_402 m42a[33D1]

R3440 RES_402 m42a[33D1]

R3439 RES_402 m42a[33D1]

R3438 RES_402 m42a[33D1]

R3437 RES_402 m42a[33B1]

R3436 RES_402 m42a[33B1]

R3435 RES_402 m42a[33C4]

R3434 RES_402 m42a[33D4]

R3433 RES_402 m42a[33D8]

R3432 RES_402 m42a[33D7]

R3431 RES_402 m42a[33B1]

R3430 RES_402 m42a[33D7]

R3429 RES_402 m42a[33D8]

R3428 RES_402 m42a[33C4]

R3427 RES_402 m42a[33C4]

R3426 RES_402 m42a[33C4]

R3423 RES_402 m42a[33C4]

R3422 RES_402 m42a[33C4]

R3421 RES_402 m42a[33A4]

R3420 RES_402 m42a[33A4]

R3419 RES_402 m42a[33B4]

R3418 RES_402 m42a[33B4]

R3417 RES_402 m42a[33C7]

R3416 RES_402 m42a[33D4]

R3415 RES_402 m42a[33D4]

R3414 RES_402 m42a[33D4]

R3413 RES_402 m42a[33D4]

R3412 RES_402 m42a[33D4]

R3411 RES_402 m42a[33D4]

R3410 RES_402 m42a[33C1]

R3409 RES_402 m42a[33C1]

R3408 RES_402 m42a[33C1]

R3407 RES_402 m42a[33B1]

R3406 RES_402 m42a[33B1]

R3405 RES_402 m42a[33C1]

R3404 RES_402 m42a[33D1]

R3403 RES_402 m42a[33C1]

R3402 RES_402 m42a[33C1]

R3401 RES_402 m42a[33C7]

R3400 RES_402 m42a[33C1]

R3304 RES_402 m42a[32C7]

R3303 RES_402 m42a[32C4]

R3302 RES_402 m42a[32D4]

R3301 RES_402 m42a[32B7]

R3300 RES_402 m42a[32B6]

R3104 RES_402 m42a[31C5]

R3100 RES_402 m42a[31C5]

R3035 RES_402 m42a[30B4]

R3025 RES_402 m42a[30C4]

R3011 RES_402 m42a[30C4]

R3009 RES_402 m42a[30D4]

R3001 RES_402 m42a[30D4]

R2902 RES_402 m42a[29D2]

R2901 RES_402 m42a[29D2]

R2900 RES_402 m42a[29A4]

R2801 RES_402 m42a[28D2]

R2800 RES_402 m42a[28D2]

R2783 RES_402 m42a[27B2]

R2782 RES_402 m42a[27B2]

R2781 RES_402 m42a[27C2]

R2780 RES_402 m42a[27C2]

R2771 RES_402 m42a[27D2]

R2770 RES_402 m42a[27D2]

R2761 RES_402 m42a[27C4]

R2760 RES_402 m42a[27C4]

R2751 RES_402 m42a[27D4]

R2750 RES_402 m42a[27D4]

R2701 RES_402 m42a[27D7]

R2700 RES_402 m42a[27D7]

R2698 RES_402 m42a[26C5]

R2697 RES_402 m42a[26C5]

R2696 RES_402 m42a[26C6]

R2689 RES_402 m42a[26A2]

R2688 RES_402 m42a[26A3]

R2687 RES_402 m42a[26B2]

R2685 RES_402 m42a[26B2]

R2684 RES_402 m42a[26B2]

R2683 RES_402 m42a[26B2]

R2682 RES_402 m42a[26A2]

R2681 RES_402 m42a[26B2]

R2680 RES_402 m42a[26B3]

R2643 RES_402 m42a[26C2]

R2642 RES_402 m42a[26C2]

R2641 RES_402 m42a[26C2]

R2640 RES_402 m42a[26C2]

R2639 RES_402 m42a[26C2]

R2638 RES_402 m42a[26C2]

R2637 RES_402 m42a[26C2]

R2636 RES_402 m42a[26C2]

R2622 RES_402 m42a[26A5]

R2612 RES_402 m42a[26A5]

R2611 RES_402 m42a[26B5]

R2610 RES_402 m42a[26C7]

R2609 RES_402 m42a[26C7]

R2607 RES_402 m42a[26D5]

R2606 RES_402 m42a[26D5]

R2600 RES_402 m42a[26D4]

R2502 RES_402 m42a[25D8]

R2501 RES_402 m42a[25C8]

R2500 RES_603 m42a[25A8]

R2399 RES_402 m42a[23C1]

R2398 RES_402 m42a[23D8]

R2397 RES_402 m42a[23D6]

R2396 RES_402 m42a[23D6]

R2395 RES_402 m42a[23D7]

R2390 RES_402 m42a[23B3]

R2389 RES_402 m42a[23A4]

R2388 RES_402 m42a[23B2]

R2343 RES_402 m42a[23D1]

R2327 RES_402 m42a[23D6]

R2326 RES_402 m42a[23D6]

R2323 RES_402 m42a[23D5]

R2320 RES_402 m42a[23D7]

R2319 RES_402 m42a[23D2]

R2318 RES_402 m42a[23D7]

R2317 RES_402 m42a[23D7]

R2316 RES_402 m42a[23D7]

R2315 RES_402 m42a[23A3]

R2314 RES_402 m42a[23A7]

R2313 RES_402 m42a[23A7]

R2312 RES_402 m42a[23A3]

R2311 RES_402 m42a[23A7]

R2310 RES_402 m42a[23A7]

R2309 RES_402 m42a[23A7]

R2308 RES_402 m42a[23B7]

R2307 RES_402 m42a[23A7]

R2306 RES_402 m42a[23B7]

R2305 RES_402 m42a[23D3]

R2303 RES_402 m42a[23D3]

R2302 RES_402 m42a[23D3]

R2300 RES_402 m42a[23C7]

R2299 RES_402 m42a[22B5]

R2255 RES_402 m42a[22D7]

R2251 RES_402 m42a[22D6]

R2250 RES_402 m42a[22D7]

R2226 RES_402 m42a[22D5]

R2225 RES_402 m42a[22D7]

R2223 RES_402 m42a[22D6]

R2211 RES_402 m42a[22B3]

R2208 RES_402 m42a[22D5]

R2207 RES_402 m42a[22C5]

R2206 RES_402 m42a[22C5]

R2205 RES_402 m42a[22C6]

R2204 RES_402 m42a[22C2]

R2203 RES_402 m42a[22C2]

R2200 RES_402 m42a[22D7]

R2199 RES_402 m42a[21C3]

R2198 RES_402 m42a[21C6]

R2197 RES_402 m42a[21C6]

R2196 RES_402 m42a[21C6]

R2195 RES_402 m42a[21C6]

R2194 RES_402 m42a[21D4]

R2110 RES_402 m42a[21C2]

R2108 RES_402 m42a[21C2]

R2107 RES_402 m42a[21C2]

R2105 RES_402 m42a[21D6]

R2101 RES_402 m42a[21C4]

R2100 RES_402 m42a[21C3]

R2085 RES_402 m42a[20C4]

R2079 RES_402 m42a[20B7]

R2077 RES_402 m42a[20B7]

R2075 RES_402 m42a[20C7]

R2060 RES_402 m42a[20A4]

R2059 RES_402 m42a[20B4]

R2058 RES_402 m42a[20B4]

R1990 RES_402 m42a[19C3]

R1989 RES_402 m42a[19C7]

R1988 RES_402 m42a[19C7]

R1987 RES_402 m42a[19C6]

R1986 RES_402 m42a[19C6]

R1985 RES_402 m42a[19D3]

R1975 RES_402 m42a[19A4]

R1951 RES_402 m42a[19D5]

R1950 RES_402 m42a[19D5]

R1441 RES_402 m42a[14D6]

R1440 RES_402 m42a[14D6]

R1430 RES_402 m42a[14B6]

R1422 RES_402 m42a[14B6]

R1421 RES_402 m42a[14C6]

R1420 RES_402 m42a[14C6]

R1411 RES_402 m42a[14C2]

R1410 RES_402 m42a[14C2]

R1310 RES_402 m42a[13D3]

R1236 RES_402 m42a[12A7]

R1235 RES_402 m42a[12A7]

R1231 RES_402 m42a[12A7]

R1230 RES_402 m42a[12A7]

R1226 RES_402 m42a[12B7]

R1225 RES_402 m42a[12B7]

R1221 RES_402 m42a[12B7]

R1220 RES_402 m42a[12B7]

R1211 RES_402 m42a[12C3]

R1210 RES_402 m42a[12C3]

R1106 RES_402 m42a[11A3]

R1104 RES_402 m42a[11B5]

R1103 RES_402 m42a[11C5]

R1102 RES_402 m42a[11B4]

R1101 RES_402 m42a[11C5]

R1100 RES_402 m42a[11B5]

R1006 RES_402 m42a[10C3]

R1005 RES_402 m42a[10C4]

R1002 RES_402 m42a[10B6]

R1001 RES_402 m42a[10B6]

R0927 RES_402 m42a[9C2]

R0926 RES_402 m42a[9C2]

R0925 RES_402 m42a[9C2]

R0924 RES_402 m42a[9C2]

R0923 RES_402 m42a[9C2]

R0922 RES_402 m42a[9D2]

R0921 RES_402 m42a[9D2]

R0803 RES_402 m42a[8A7]

R0802 RES_402 m42a[8B6]

R0730 RES_402 m42a[7A4]

R0722 RES_402 m42a[7A7]

R0721 RES_402 m42a[7B7]

R0720 RES_402 m42a[7B7]

R0719 RES_402 m42a[7B2]

R0718 RES_402 m42a[7B2]

R0717 RES_402 m42a[7B2]

R0716 RES_402 m42a[7B2]

R0712 RES_402 m42a[7A4]

R0707 RES_402 m42a[7A4]

R0706 RES_402 m42a[7B4]

R0705 RES_402 m42a[7B4]

R0704 RES_402 m42a[7C5]

R0703 RES_402 m42a[7C5]

R0702 RES_402 m42a[7D5]

R0621 RES_402 m42a[6A7]

R0612 RES_402 m42a[6A8]

R0611 RES_402 m42a[6A8]

R0610 RES_402 m42a[6A7]

Q9801 TRA_2N7002DW_SOT-363 m42a[69D6 69D6]

Q9406 TRA_2N7002_SOT23-LF m42a[67D6]

Q9405 TRA_TP0610_S0T23-3 m42a[67D5]

Q9404 TRA_2N7002_SOT23-LF m42a[67B7]

Q9403 TRA_FDC638P_SM-LF m42a[67B6]

Q8350 TRA_2N7002_SOT23-LF m42a[66A6]

Q8340 TRA_IRLML5203_SM m42a[66C8]

Q8324 TRA_2N7002DW_SOT-363 m42a[66A3 66A4]

Q8322 TRA_2N7002DW_SOT-363 m42a[66A4 66A4]

Q8321 TRA_SI4405DY_SO-8 m42a[66B3]

Q8320 TRA_SI4405DY_SO-8 m42a[66B3]

Q8302 TRA_HAT2165H_LFPAK m42a[66B4]

Q8301 TRA_HAT2168H_LFPAK m42a[66C4]

Q8300 TRA_SI4405DY_SO-8 m42a[66D5]

Q8299 TRA_2N7002_SOT23-LF m42a[65C7]

Q8298 TRA_TP0610_S0T23-3 m42a[65C7]

Q8250 TRA_SI4405DY_SO-8 m42a[65D2]

Q8240 TRA_TP0610_S0T23-3 m42a[65C5]

Q8220 TRA_2N7002DW_SOT-363 m42a[65C7 65C6]

Q8210 TRA_2N7002DW_SOT-363 m42a[65C6 65C3]

Q8063 TRA_2N7002_SOT23-LF m42a[63B4]

Q8062 TRA_2N7002_SOT23-LF m42a[63B8]

Q8061 TRA_2N7002DW_SOT-363 m42a[63B7 63B7]

Q8060 TRA_2N7002_SOT23-LF m42a[63C8]

Q8059 TRA_2N7002DW_SOT-363 m42a[63C7 63C7]

Q8031 TRA_2N7002DW_SOT-363 m42a[63D6 63A6]

Q8030 TRA_2N7002DW_SOT-363 m42a[63A6 63B6]

Q8025 TRA_SI3447BDV_SOT-6 m42a[63A4]

PWRFLT-3P3X3P3

Q8015 TRA_STL8NH3LL_COMBO_ m42a[63C4]


PWRFLT-3P3X3P3



Q7961 TRA_IRF7832_SO-8 m42a[62B3]

Q7960 TRA_IRF7821_SO-8 m42a[62C3]

Q7921 TRA_IRF7832_SO-8 m42a[62B6]

Q7920 TRA_IRF7821_SO-8 m42a[62C6]

Q7821 TRA_IRF7832_SO-8 m42a[61B4]

Q7820 TRA_IRF7821_SO-8 m42a[61C4]

Q7750 TRA_2N7002DW_SOT-363 m42a[60C6 60C7]

PWRFLT-3P3X3P3

Q7661 TRA_STL8NH3LL_COMBO_ m42a[59B3]

PWRFLT-3P3X3P3


PWRFLT-3P3X3P3

Q7621 TRA_STL8NH3LL_COMBO_ m42a[59B7]

PWRFLT-3P3X3P3





Q7502 TRA_HAT2168H_LFPAK m42a[58C3]

107

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1

108

R7210 RES_402 m42a[55A7]

R7260 RES_402 m42a[55D2]

R7261 RES_402 m42a[55C2]

R7270 RES_402 m42a[55C2]

R7271 RES_402 m42a[55C2]

R7280 RES_402 m42a[55B2]

R7281 RES_402 m42a[55B2]

R7300 RES_402 m42a[56C4]

R7301 RES_402 m42a[56C4]

R7320 RES_402 m42a[56B5]

R7321 RES_402 m42a[56D7]

R7322 RES_402 m42a[56B7]

R7349 RES_402 m42a[56B7]

R7350 RES_402 m42a[56A4]

R7351 RES_402 m42a[56A4]

R7380 RES_402 m42a[56C2]

R7382 RES_402 m42a[56B2]

R7391 RES_402 m42a[56C7]

R7401 RES_402 m42a[57D8]

R7402 RES_402 m42a[57D7]

R7403 RES_402 m42a[57C7]

R7404 RES_402 m42a[57C4]

R7405 RES_402 m42a[57D5]

R7406 RES_402 m42a[57D6]

R7411 RES_402 m42a[57C8]

R7412 RES_402 m42a[57B7]

R7413 RES_402 m42a[57C6]

R7414 RES_402 m42a[57C4]

R7415 RES_402 m42a[57C5]

R7430 RES_603 m42a[57C3]

R7431 RES_603 m42a[57B3]

R7432 RES_402 m42a[57B3]

R7433 RES_402 m42a[57A3]

R7434 RES_402 m42a[57C2]

R7435 RES_402 m42a[57C2]

R7436 RES_402 m42a[57B2]

R7437 RES_402 m42a[57B2]

R7438 RES_402 m42a[57C2]

R7439 RES_402 m42a[57B2]

R7440 RES_402 m42a[57A5]

R7450 RES_402 m42a[57A7]

R7451 RES_402 m42a[57A7]

R7452 RES_402 m42a[57A7]

R7453 RES_402 m42a[57A7]

R7454 RES_402 m42a[57A7]

R7460 RES_402 m42a[57C6]

R7461 RES_402 m42a[57C7]

R7500 RES_402 m42a[58C2]

R7501 RES_402 m42a[58C2]

R7502 RES_805 m42a[58B3]

R7503 RES_805 m42a[58D3]

R7504 RES_402 m42a[58C1]

R7505 RES_402 m42a[58B2]

R7506 RES_402 m42a[58C7]

R7507 RES_402 m42a[58B1]

R7508 RES_402 m42a[58B8]

R7509 RES_402 m42a[58B8]

R7510 RES_402 m42a[58B6]

R7511 RES_402 m42a[58B8]

R7512 RES_402 m42a[58D7]

R7513 RES_402 m42a[58B7]

R7514 RES_402 m42a[58B8]

R7515 RES_402 m42a[58B5]

R7516 RES_402 m42a[58B4]

R7517 RES_402 m42a[58B5]

R7518 RES_402 m42a[58B5]

R7519 RES_402 m42a[58C7]

R7520 RES_402 m42a[58D7]

R7521 RES_402 m42a[58D8]

R7522 RES_402 m42a[58A5]

R7523 RES_402 m42a[58A6]

R7524 RES_402 m42a[58D5]

R7525 RES_402 m42a[58C5]

R7526 THERMISTER_402 m42a[58C7]

R7527 RES_402 m42a[58C8]

R7530 RES_402 m42a[58B4]

R7531 THERMISTER_0603-LF m42a[58B4]

R7543 RES_402 m42a[58B2]

R7545 RES_402 m42a[58C7]

R7600 RES_402 m42a[59C5]

R7603 RES_402 m42a[59A3]

R7604 RES_402 m42a[59A3]

R7606 RES_402 m42a[59A3]

R7607 RES_402 m42a[59A3]

R7621 RES_402 m42a[59C7]

R7624 RES_402 m42a[59C6]

R7625 RES_402 m42a[59B6]

R7626 RES_402 m42a[59C7]

R7627 RES_402 m42a[59B7]

R7628 RES_402 m42a[59B7]

R7629 RES_402 m42a[59C7]

R7630 RES_402 m42a[59C5]

R7661 RES_402 m42a[59C2]

R7664 RES_402 m42a[59C3]

R7665 RES_402 m42a[59B4]

R7666 RES_402 m42a[59C2]

R7667 RES_402 m42a[59B2]

R7668 RES_402 m42a[59B2]

R7669 RES_402 m42a[59C2]

R7670 RES_402 m42a[59C4]

R7720 RES_402 m42a[60B3]

R7721 RES_402 m42a[60A3]

R7750 RES_402 m42a[60C6]

R7751 RES_402 m42a[60C7]

R7752 RES_402 m42a[60C7]

R7753 RES_402 m42a[60B7]

R7800 RES_402 m42a[61C4]

R7801 RES_402 m42a[61B2]

R7802 RES_1206 m42a[61C3]

R7803 RES_402 m42a[61C2]

R7804 RES_402 m42a[61C7]

R7805 RES_402 m42a[61B7]

R7806 RES_402 m42a[61B7]

R7807 RES_402 m42a[61C5]

R7808 RES_402 m42a[61B6]

R7810 RES_402 m42a[61B4]

R7821 RES_402 m42a[61B2]

R7822 RES_402 m42a[61B2]

R7860 RES_603 m42a[61C3]

R7861 RES_402 m42a[61C2]

R7863 RES_402 m42a[61C2]

R7900 RES_402 m42a[62C5]

R7901 RES_402 m42a[62B1]

R7902 RES_1206 m42a[62A7]

R7903 RES_402 m42a[62A3]

R7904 RES_402 m42a[62A3]

R7905 RES_402 m42a[62A6]

R7906 RES_402 m42a[62A3]

R7907 RES_402 m42a[62A3]

R7921 RES_402 m42a[62C7]

R7924 RES_402 m42a[62C6]

R7925 RES_402 m42a[62B6]

R7926 RES_402 m42a[62C7]

R7927 RES_402 m42a[62B8]

R7928 RES_402 m42a[62B8]

R7929 RES_402 m42a[62C7]

R7930 RES_402 m42a[62C5]

R7961 RES_402 m42a[62C2]

R7964 RES_402 m42a[62C3]

R7965 RES_402 m42a[62B3]

R7966 RES_402 m42a[62C2]

R7967 RES_402 m42a[62B2]

R7968 RES_402 m42a[62B2]

R7969 RES_402 m42a[62C2]

R7970 RES_402 m42a[62C4]

R7990 RES_402 m42a[62A6]

R7991 RES_402 m42a[62A6]

R7992 RES_603 m42a[62A7]

R8000 RES_402 m42a[63D5]

R8005 RES_402 m42a[63C5]

R8010 RES_402 m42a[63C5]

R8015 RES_402 m42a[63B5]

R8025 RES_402 m42a[63A5]

R8030 RES_402 m42a[63B6]

R8031 RES_402 m42a[63B6]

R8032 RES_402 m42a[63D6]

R8033 RES_402 m42a[63D6]

R8050 RES_402 m42a[63A6]

R8056 RES_402 m42a[63C8]

R8057 RES_402 m42a[63C8]

R8058 RES_402 m42a[63B8]

R8059 RES_402 m42a[63B8]

R8061 RES_402 m42a[63B1]

R8062 RES_402 m42a[63B1]

R8063 RES_402 m42a[63A1]

R8064 RES_402 m42a[63A1]

R8065 RES_402 m42a[63B2]

R8091 RES_402 m42a[63D1]

R8092 RES_402 m42a[63C1]

R8200 RES_402 m42a[65B7]

R8201 RES_402 m42a[65C5]

R8202 RES_402 m42a[65C5]

R8203 RES_402 m42a[65C6]

R8204 RES_402 m42a[65C6]

R8205 RES_805 m42a[65D4]

R8206 RES_402 m42a[65C4]

R8207 RES_402 m42a[65C4]

R8208 RES_402 m42a[65C4]

R8209 RES_402 m42a[65C4]

R8210 RES_402 m42a[65C4]

R8211 RES_402 m42a[65C6]

R8213 RES_402 m42a[65C2]

R8214 RES_402 m42a[65C2]

R8231 RES_402 m42a[65C5]

R8232 RES_402 m42a[65C6]

R8233 RES_402 m42a[65C5]

R8296 RES_402 m42a[65B7]

R8297 RES_402 m42a[65C3]

R8298 RES_402 m42a[65C8]

R8299 RES_402 m42a[65C7]

R8300 RES_402 m42a[66C6]

R8301 RES_402 m42a[66C7]

R8302 RES_402 m42a[66C5]

R8303 RES_402 m42a[66C5]

R8304 RES_805 m42a[66B2]

R8305 RES_402 m42a[66C5]

R8306 RES_402 m42a[66C7]

R8308 RES_0612 m42a[66C3]

R8309 RES_402 m42a[66B6]

R8310 RES_402 m42a[66C5]

R8311 RES_402 m42a[66B7]

R8312 RES_402 m42a[66C7]

R8320 RES_2525 m42a[66B3]

R8322 RES_402 m42a[66A3]

R8323 RES_402 m42a[66A3]

R8324 RES_402 m42a[66A4]

R8325 RES_402 m42a[66A5]

R8330 RES_402 m42a[66B4]

R8331 RES_402 m42a[66A4]

R8340 RES_402 m42a[66C8]

R8341 RES_402 m42a[66B8]

R8342 RES_402 m42a[66C8]

R8343 RES_402 m42a[66B8]

R8344 RES_402 m42a[66B8]

R8350 RES_402 m42a[66B5]

R8351 RES_402 m42a[66B6]

R8352 RES_402 m42a[66B5]

R8360 RES_402 m42a[66D7]

R8361 RES_402 m42a[66C7]

R8362 RES_402 m42a[66B7]

R8363 RES_402 m42a[66B6]

R8364 RES_402 m42a[66B6]

R8365 RES_402 m42a[66B6]

R8367 RES_402 m42a[66C6]

R8370 RES_402 m42a[66C2]

R8371 RES_402 m42a[66B2]

R8381 RES_603 m42a[66B4]

R8397 RES_0612 m42a[66C4]

R9400 RES_402 m42a[67D6]

R9401 RES_402 m42a[67D6]

R9402 RES_402 m42a[67C7]

R9408 RES_402 m42a[67B5]

R9409 RES_402 m42a[67B5]

R9413 RES_402 m42a[67A6]

R9414 RES_402 m42a[67B7]

R9415 RES_402 m42a[67B7]

R9416 RES_402 m42a[67B7]

R9423 RES_402 m42a[67B6]

R9428 RES_402 m42a[67C5]

R9500 RES_402 m42a[68A7]

R9501 RES_402 m42a[68B6]

R9502 RES_402 m42a[68B6]

R9503 RES_402 m42a[68A4]

R9504 RES_402 m42a[68B2]

R9505 RES_402 m42a[68B2]

R9506 RES_402 m42a[68B1]

R9507 RES_402 m42a[68D2]

R9508 RES_402 m42a[68D2]

R9509 RES_402 m42a[68C2]

R9510 RES_402 m42a[68C2]

R9537 RES_402 m42a[68D1]

R9538 RES_402 m42a[68D1]

R9539 RES_402 m42a[68C1]

R9540 RES_402 m42a[68C1]

R9821 RES_402 m42a[69D7]

R9822 RES_402 m42a[69D6]

R9850 RES_402 m42a[69B8]

R9851 RES_402 m42a[69B8]

R9852 RES_402 m42a[69A8]

R9853 RES_402 m42a[69A8]

R9854 RES_402 m42a[69A8]

R9855 RES_402 m42a[69A8]

R9856 RES_402 m42a[69B6]

R9859 RES_402 m42a[69A6]

R9860 RES_402 m42a[69C3]

R9861 RES_402 m42a[69C3]

R9862 RES_402 m42a[69C5]

R9863 RES_402 m42a[69C5]

R9864 RES_402 m42a[69A6]

R9868 RES_402 m42a[69C8]

R9869 RES_402 m42a[69C8]

R9870 RES_402 m42a[69C1]

R9871 RES_402 m42a[69C1]

RP2300 RPAK4P_SM-LF m42a[23D5]



RP2602 RPAK4P_SM-LF m42a[26C2]

RP3000 RPAK4P_SM-LF m42a[30B4 30C4 30D4 30D4]

RP3001 RPAK4P_SM-LF m42a[30C4 30A4 30A4 30D4]

RP3002 RPAK4P_SM-LF m42a[30A4 30A4 30A4 30D4]

RP3003 RPAK4P_SM-LF m42a[30C4 30C4 30C4 30D4]

RP3004 RPAK4P_SM-LF m42a[30C4 30C4 30D4]

RP3005 RPAK4P_SM-LF m42a[30B4 30A4 30A4 30D4]

RP3006 RPAK4P_SM-LF m42a[30B4 30B4 30A4 30D4]

RP3007 RPAK4P_SM-LF m42a[30C4 30C4 30C4 30C4]

RP3008 RPAK4P_SM-LF m42a[30C4 30C4 30C4 30C4]

RP3009 RPAK4P_SM-LF m42a[30B4 30B4 30C4 30C4]

RP3010 RPAK4P_SM-LF m42a[30B4 30B4 30B4 30B4]

RP3011 RPAK4P_SM-LF m42a[30B4 30A4 30B4 30B4]

T4201 XFR_1000BT_82400275_ m42a[37C6]

XFR-SM

T4202 XFR_1000BT_82400275_ m42a[37B6]

XFR-SM

U0700 CPU_YONAH_BGA m42a[7C3 7D7]

U0700 CPU_YONAH_BGA m42a[8D8 8D4]

U1001 ADT7461_MSOP m42a[10C5]

U1200 NB_945GM_BGA m42a[12D5]

U1200 NB_945GM_BGA m42a[13D4]

U1200 NB_945GM_BGA m42a[14D5]

U1200 NB_945GM_BGA m42a[15D3 15D7]

U1200 NB_945GM_BGA m42a[16D2 16C8]

U1200 NB_945GM_BGA m42a[17D5]

U1200 NB_945GM_BGA m42a[18D4 18D7]

U1900 LREG_TPS73115_SOT23- m42a[19D6]

5

U1901 MM157_SOT23-5-LF m42a[19C4]

U2100 SB_ICH7M_BGA m42a[21D6]

U2100 SB_ICH7M_BGA m42a[22B7 22D3]

U2100 SB_ICH7M_BGA m42a[23D4]

U2100 SB_ICH7M_BGA m42a[24D4 24D7]

U2601 MC74VHC1G08_SC70 m42a[26A5]

U2603 MC74VHC1G00_SC70-5 m42a[26A7]

U2680 MC74VHC1G08_SC70 m42a[26B3]

U3100 LREG_BD3533FVM_MSOP- m42a[31C4]

8

U3301 CLK_SYN_SLG8LP436_QF m42a[32C5]

N

U4101 88E8053_QFN m42a[36D6]

U4102 EEPROM_M24C08_SO8 m42a[36A3]

U4400 FW32306_BGA_BGA m42a[38C5]

U5100 CY8C24794_MLF m42a[41C5]

U5200 SWI_TPS2042B_MSOP m42a[42C7]

U5800 SMC_H8S2116_BGA m42a[45A8 45C3 45C7 45D7]

U5900 VDET_RN5VD_SOT23-5 m42a[46D7]

U5910 OSC_12P_SG-3040LC-SM m42a[46A7]

U5977 COMPARATOR_LMC7211_S m42a[46C2]

M-LF

U6100 OPAMP_LMV2011_SOT23- m42a[48C3]

5

U6200 MAX6695_UMAX m42a[49D4]

U6250 MAX6695_UMAX m42a[49B4]

U6301 FLASH_SST25VF016B_SO m42a[50D3]

I_SOI

U6620 KXM52_QFN m42a[52C5]

U6650 LIS3L02AL_LGA m42a[52B5]

U6700 TPM_TSSOP m42a[53C5]

U6800 AUDIO_STAC92204XR_LQ m42a[54D5]

FP

U7210 MAX9705_TDFN1 m42a[55C5]

U7220 MAX9705_TDFN1 m42a[55B5]

U7230 MAX9705_TDFN1 m42a[55A5]

U7400 MAX9890_UCSP1 m42a[57C2]

U7500 ISL6262_QFN m42a[58C6]

U7600 LTC3728L_QFN m42a[59C5]

U7700 MAX8887_SOT23-5 m42a[60D4]

U7701 MAX8887_SOT23-5 m42a[60C4]

U7720 LREG_MAX8516_SOP m42a[60B3]

U7800 ISL6269_QFN m42a[61C5]

U7801 AMP_INA326_MSOP m42a[61C2]

U7900 LTC3728L_QFN m42a[62C5]

U7901 AMP_INA326_MSOP m42a[62A6]

U8070 LTC2908_LLP m42a[63B2]

U8080 MC74VHC1G08_SC70 m42a[63B1]

U8090 LT3470_TSOT23-8 m42a[63D3]

U8200 COMPARATOR_LMC7211_S m42a[65C4]

M-LF

U8250 MC74VHC1G08_SC70 m42a[65C3]

U8290 COMPARATOR_LM397_SOT m42a[65C5]

23-5

U8300 ISL6255_QFN m42a[66C6]

U8370 INA193_SOT23-5 m42a[66C3]

U8375 INA193_SOT23-5 m42a[66B2]

U9453 MC74VHC1G08_SC70 m42a[67C5]

U9500 SIL1362_LQFP m42a[68B4]

U9801 VIDEO_TS3V330_SOP m42a[69B7]

U9804 SN74LVC2G125_US m42a[69C2 69C2]

VR5965 VREF_ISL6000233_SOT2 m42a[46C7]

3-3

VR6800 LREG_TPS79501_SOT223 m42a[54A5]

-6

XW5800 SHORT_SM m42a[45C3]

XW7200 SHORT_SM m42a[55A5]


XW7301 SHORT_SM m42a[56B4]








XW7620 JUMPER_OPEN-SAWTOOTH m42a[59B8]








Y2600 CRYSTAL_4PIN_SM-LF m42a[26C7]

Y3301 CRYSTAL_5X3.2-SM m42a[32C7]

Y4101 CRYSTAL_4PIN_SM-3.2X m42a[36B6]

2.5MM

Y4403 CRYSTAL_4PIN_SM-3.2X m42a[38C2]

2.5MM

Y5920 CRYSTAL_5X3.2-SM m42a[46C7]

Y6795 CRYSTAL_4PIN_SM-LF m42a[53B6]

Z0601 MTGHOLE m42a[6B8]

Z0602 MTGHOLE m42a[6C6]

Z0603 PCB_STANDOFF m42a[6A8]



Z0606 MTGHOLE m42a[6D6]









ZS0620 SPRING_CLIP_1P_EMI_C m42a[6D7]

LIP-SM-M42

ZS0621 CLIP_SM m42a[6D6]

8 7 6 5 4 3 2 1 051-7173 mlb , m42c · 2011-04-17 · 051-7173 mlb , m42c dk dk rx es dk rx rx mk...

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