8085 micro processor architecture

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8085 architecture Dr Vinita Kumari

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Page 1: 8085 micro processor architecture

8085 architectureDr Vinita Kumari

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Signals and I/O Pins

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Microprocessor-Initiated Operations

It is important to note that the microprocessor treats memory and I/O devices the

same way.

Input and output devices simply look like memory locations to the microprocessor.

For example, the keyboard may look like memory address A3F2H. To get what key is being

pressed, the microprocessor simply reads the data at location A3F2H.

The communication process between the microprocessor and peripheral devices consist

of the following three steps:

Identify the address.

Transfer the binary information.

Provide the right timing signals.

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MPU Communication and Bus Timing

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Figure 3: Moving data form memory to MPU using instruction MOV C, A

(code machine 4FH = 0100 1111)

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MPU Communication and Bus Timing

17Figure 4: 8085 timing diagram for Opcode fetch cycle for MOV C, A .

Terms

• Instruction Cycle

• Machine Cycle

• T-state

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