8086 architecture
TRANSCRIPT
8086 Architecture
Introduction
• Intel First 16 bit microprocessors• 40 pin IC• Made up n-channel depletion mode silicon
gate technology.• It has two stage pipelining implementation in
instruction execution.• The CPU logic are divided into Execution
Unit(EU) & Bus Interface Unit (BIU).
• BIU provides interface with external bus, and executes all bus operations.
• EU takes the instruction from object code queue of BIU and executes it.
• It has two mode of operations.- Minimum mode : single processor environment. - Maximum mode : Multi-processor environment.
Architecture
8086 Pin Diagram
Bus Interface Unit
• BIU contains Bus interface logic, Segment Registers, Memory addressing logic, and a 6-byte instruction object code queue.
• If the EU executes an instruction, then BIU- resets the queue- fetches the instruction from the new address
- passes the instructions to the EU- begins refilling the queue from new location
Execution Unit
• EU contains instruction decoder, ALU,General purpose registers, pointers and index registers,flag registers and control circuitry.
• EU responsible for,– The execution of all instructions– Providing address to the BIU for fetching
data/instruction– Manipulating various registers as well as flag
registers.
Register Set
• It has fourteen 16 bit registers.- Data register Group- Segment Register Group- Pointer- Index Register Group- Program Counter - Flag register
Data registers
• Four 16 bit registers ,– AX,BX,CX,DX– AX reg serves as a primary accumlator– BX reg serves as a base reg while computing the data
memory address.– CX reg serves to hold count in multi iteration instructions
or repetitions.– DX reg to used in I/O instructions.
Segment Registers
• Code segment Register• Data segment Register• Stack segment Register• Extra segment Register• It s 16 bit register whose have 16 KB memory
space each.
Pointer & Index registers
• Stack pointer• Base pointer• Source Index• Destination Index• Instruction Index• Instruction Pointer
Flag Register
• Carry Flag : its used in some shift & rotate operations.
• Parity Flag: it is set if result of the word operation contains an even number of 1s
• Auxiliary carry flag: its used in BCD operations• Zero Flag: if the result of operation is zero• Sign flag: set if after ALU operations ,the result
of MSB is 1.
• Overflow Flag: set if MSB bit is overflow as carry or borrow. It has 3 control flags ,
• Direction Flag : used string operations ,set if instructions to auto decrement or from right to left.
• Interrupt Enable Flag : set if 8086 to recognize the external interrupt request.
• Trap Flag : set to put the processor into single step mode for debugging.