8086 instructionencoding session

8
byte 7 6 5 4 3 2 1 0 1 opcode d w 2 mod reg r/m 3 [optional] 4 [optional] 5 [optional] 6 [optional] Encoding of 8086 Instructions 8086 Instructions are represented as binary numbers Instructions require between 1 and 6 bytes . Opcode byte Addressing mode byte low disp high disp low data high data This is the general instruction format used by the majority of 2-operand instructions but some instructions have short form e.g. pop (special cases has no mod byte and reg. is with opcode byte) some instruction can have more than form due to short form bec. it is used so much and accumulator operand. Note that bytes 1 and 2 are divided up into 6 fields: opcode d direction (or s = sign extension) w word/byte mod mode reg register r/m register/memory Details on Fields Opcode Byte Opcode field specifies the operation performed (mov, xchg, etc). d (direction) field specifies the direction of data movement: d = 1 data moves from operand specified by R/M field to operand specified by REG field d = 0 data moves from operand specified by REG field to operand specified by R/M field

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  • byte

    7

    6

    5

    4

    3

    2

    1

    0

    1

    opcode

    d

    w

    2

    mod

    reg

    r/m

    3

    [optional]

    4

    [optional]

    5

    [optional]

    6

    [optional]

    Encoding of 8086 Instructions

    8086 Instructions are represented as binary numbers Instructions require between 1 and 6 bytes.

    Opcode byte

    Addressing mode byte

    low disp

    high disp

    low data

    high data

    This is the general instruction format used by the majority of 2-operand instructions but some instructions have short form e.g. pop (special cases has no mod byte and reg. is with opcode byte) some instruction can have more than form due to short form bec. it is used so much and accumulator operand.

    Note that bytes 1 and 2 are divided up into 6 fields:

    opcode

    d direction (or s = sign extension)

    w word/byte

    mod mode

    reg register

    r/m register/memory

    Details on Fields

    Opcode Byte

    Opcode field specifies the operation performed (mov, xchg, etc).

    d (direction) field specifies the direction of data movement:

    d = 1 data moves from operand specified by R/M

    field to operand specified by REG field

    d = 0 data moves from operand specified by REG

    field to operand specified by R/M field

  • d position MAY be replaced by "s" bit

    s = 1 one byte of immediate data is present which must be sign-

    extended to produce a 16-bit operand

    s = 0 two bytes of immediate are present

    w (word/byte) specifies operand size

    W = 1 data is word

    W = 0 data is byte

    Addressing Mode Byte (Byte 2)

    Contains three fields

    Mod Bits 6-7 (mode; determines how R/M field is

    interpreted

    Reg Bits 3-5 (register) or SREG (Seg register)

    R/M Bits 0-2 (register/memory)

    Byte 2 Specifies details about operands

    R/M

  • MOD

    At second line this is direct addressing mod = 00 & r/m = 110 and it must be followed by two address bytes.

    At mod = 01 disp is 8 bit signed (max ve is -128), at mod = 10 disp 16 bit unsigned.

    Reg:

    At reg = 011 & w =1 register is BX not BP

    SREG (Not exist in manual)

    000 ES 001 CS 010 SS 011 DS

    [BP]

    Doesnt this cause a problem?

    What about MOV DL, [BP]?

    No displacement, Mode 00

    [BP] addressing mode, R/M 110 (used for direct addressing)

    This actually assembles as MOV DL, [BP+0]

    8-bit displacement, Mode 01

    [BP] addressing mode, R/M 110

  • Note that this makes [BP] move instructions at least three bytes long.

    Addressing Mode Byte

    In general is not present if instruction has no operands (i.e. no registers and memory locations only disp or nothing e.g. JMP)

    For one-operand instructions the R/M field indicates where the operand is to be found

    (e.g. DIV instruction r/m indicates register/mem word or byte)

    For two-operand instructions (except those with an immediate operand) one is a register

    determined by REG (SREG) field and the other may be register or memory and is

    determined by R/M field.

    Direction bit has meaning only in two-operand instructions Indicates whether "destination" is

    specified by REG or by R/M Note that this allows many instructions to be encoded in two

    different ways.

  • SREG 000 ES 001 CS 010 SS 011 DS

  • Examples

    MOV instruction has seven possible formats. We will not discuss them all.

    MOV reg/mem,reg/mem

    This instruction has the structure:

    100010dw MOD REG R/M Disp1 Disp2 where displacements are optional depending on the MOD bits

    EX: 1

    MOV AX,BX

    - w = 1 because we are dealing with words

    - MOD = 11 because it is register-register

    - if d = 0 then REG = source (BX) 011 and R/M = dest (AX) 000

    = 1000 1001 1101 1000 (89 D8)

    - if d = 1 then REG = dest (AX) 000 and R/M = source (BX) 011

    = 1000 1011 1100 0011 (8B C3) EX: 2

    MOV [BX+10h],CL

    - w = 0 because we are dealing with a byte

    - d = 0 because we need R/M Table to encode [BX+10h] therefore first byte is (1000

    1000) = 88H

    - Since 10H can be encoded as an 8-bit displacement, we can use MOD=01

    REG=001(CL) and R/M=111(BX+Disp), so the second byte= 0100 1111 = 4FH and the

    last byte is 10H

    Result = 88 4F 10

    Note: MOV [BX+10H],CX Result = 89 4F 10

    - w = 1 because we are dealing with a byte

    - d = 0 because we need R/M Table to encode [BX+10h] therefore first byte is (1000

  • 1001) = 89H

    - Since 10H can be encoded as an 8-bit displacement, we can use MOD=01

    REG=001(CX) and R/M=111 (BX+Disp), so the second byte= 0100 1111 = 4FH and the

    last byte is 10H

    MOV immediate to reg/mem

    This instruction has the structure:

    1100 011w MOD 000 R/M disp1 disp2

    Where displacement bytes optional depending on value of MOD EX: 3

    MOV BYTE PTR [0100H],10H

    - w = 0 because we have byte operand so first byte 1100 0110 = C6

    - MOD = 00 and R/M = 110 (Displacement) For Direct addressing so second byte 0000

    0110 = 06

    - bytes 3 and 4 are address; byte 5 immediate data

    Result = C6 06 00 01 10

    MOV mem to accumulator

    This instruction has the structure:

    1010 000w disp1 disp2 EX: 4

    MOV AX,[0100h]

    - w = 1 because we have word operand

    So first byte 1010 0001

    Result = A1 00 01

    Note special form for accumulator. Many other instructions have a short form for AX register.

    Could also be assembled as: move memory to register

    100010dw MOD REG R/M Disp1 Disp2

  • - w = 1 because we have word operand

    - d = 1 because we need Reg to be dest so first byte 1000 1011 = 8B

    - MOD = 00 and R/M = 110 (Displacement) For Direct addressing, REG = 000 (AX) so

    second byte 0000 0110 = 06

    - byte 3 and byte 4 are address

    1000 1011 0000 0110 0000 0000 0000 0001

    Result = 8B 06 00 01

    For Encoding you will use table D-2 in manual for different instruction format for each instruction. For Decoding: use table D-3 in manual for instruction decoding For clock cycles taken for each instruction, it will be found in table D-2 in manual.