a cost effective method of reducing total harmonic distortion in single phase boost rectifier

7/30/2019 A Cost Effective Method of Reducing Total Harmonic Distortion in Single Phase Boost Rectifier

1/52

A Cost Effective Method of Reducing Total

Harmonic Distortion (THD) in Single-Phase

Boost Rectifier


2/52

CHAPTER 1

INTRODUCTION

1.1.Introduction:

Because of a large number of high harmonics are injected into power with more and more

of the nonlinear semiconductor devices were widely used Harmonic can cause the distortion in

current in a power system and worsen the power quality. Rectifier circuit is the biggest harmonic

sources. At present,research on the PFC of rectifier devices has an important practical

significance, especially based on the average current control single-phase Boost type APFC

circuit.

PFC is used as a positive method for improving the power quality. Essentially PFC can

eliminate harmonic source of rectifier devices, through input current waveform automatically

with input voltage waveform of the grid, and get the former waveform as sine waveform and

have the same waveform with voltage waveform on phase. PFC is mainly included reactive

power factor correction and active power factor correction (short for APFC).Because there is no

source power factor correction technique in be used actually has certain limitation, and power

factor is not high, only can make the power factor improvement to 0.7 ~ 0.8, and APFC can

make the power factor, so close to one currently used more APFC technology. APFC can be

converted to the input current power input and utility in phase with the sine wave, so as to

improve the power factor of electrical equipment, and to reduce the grid harmonic pollution.

Converters operated in discontinuous-conduction- mode (DCM) and in continuous-conduction-

mode (CCM) are suitable for lighter and higher loads, respectively. A new, constant switching

frequency based single-phase rectifier system is proposed, which operates in DCM and in CCM

for outputs less than and greater than 50% rated load, respectively, covering a wide range of load

variation. The power circuit and the control circuit of the proposed rectifier are easily

configurable for DCM and CCM operations. The measured load current is used to select the

desired operating mode. The peak device current under DCM is limited to rated device current

under CCM without using a device of higher current rating. The input current shaping under


3/52

CCM and DCM are based on the comparison of measured input current with linear and nonlinear

carriers, respectively. A load current feed forward scheme is presented to improve the system

dynamic performance and also to ensure a smooth transition between the two operating modes.

Single-Phase diode bridge rectifiers are gradually being replaced by pulsewidth modulation

(PWM) rectifiers tomaintain a sinusoidal input current at near unity power factorand to satisfy

the necessary harmonic standards . Asingle-phase, single-switch boost rectifier (Fig. 1) is a well-

establishedtopology in the field of acdc power conversion to comply with the above harmonic

standards. The rectifier systemmay be operated in the continuous conduction mode (CCM), orin

the discontinuous conduction mode (DCM) . TheCCMis preferred overDCMbecause of

continuous inputcurrent and low conducted electromagnetic interference (EMI). However, it is

reported to have high input current distortionat light load . For a particular switching frequency

andboost inductance, the amount of current distortion increases as the load decreases . A high

valued boost inductor is necessary at light load to limit the input current distortion . This

increases the size, weight, and cost of the converter and resultsin poor system dynamic response.

Hence, CCM is preferred athigher loads.The above issues are not seen, when the converter is

operated in DCM. However, DCM is always associated with high device current stress and

conducted EMI. Therefore, a high currentrated device and a costly EMI filter are necessary at

higher loads.Thus, DCM is preferred for light loads. The present work deals with a constant

output voltage application,where the load current varies over a wide range (10%

to 110% of rated load current) and the converter is required to comply with the necessary

harmonic standards. It can be seen from the above discussion that neither of the operating modes

(CCM and DCM) alone is suitable and economical for the above application. Therefore, the

optimum choice is to operate the converter in DCM during light loads and in CCM for higher

loads . The load boundary between DCM and CCM operations can be set at a suitable level (say

50%) to limit the peak device current stress under DCM up to the rated device current under

CCM without using a higher current rated device. Similarly, the minimum load under CCM, for

which the converter is required to comply is 50% rated load. This permits us to use a low valued

boost inductor compared to the entire CCM case without any degradation in the performance of

the converter. The main challenge associated with such a mixed-mode operation is to realize the

two distinct operating modes (DCM and CCM) into a single converter system without

introducing any appreciable dynamics during transition between the two operating modes. There


4/52

are two possible ways to achieve this. The first method suggests a single-valued boost inductor

with constant but two different switching frequencies (a low switching frequency for DCM and a

high switching frequency for CCM) for the above operation. The second method requires two

different boost inductors (a high valued inductor for CCM and a low valued inductor for DCM)

with a constant switching frequency for above application. The first method is simpler than

the second method, as it only requires the switching frequency of the converter to be changed.

However, the second method requires the physical inductors to be changed. A converter system,

using two different switching frequencies (2.56 kHz for DCM and 25.6 kHz for CCM) and a

single valued boost inductor has been reported . The use of two different switching frequencies

introduces difficulties in designing the EMI filter. The controller works in the principle of

voltage mode control without using any input current sensor. A current sensor is however

required for over-current protection of the converter. The input current distortion under DCM is

high as there is no lowpass filter connected at the input to the converter. The implementation of

the above control scheme involves complex mathematic operations, such as multiplications,

divisions and square root operations. It also requires the peak value and the zero crossing instants

of the input voltage to compute the unit vectors ( and ). These increase the

complexity and cost of the controller. Addressing the above-mentioned issues and using two

different boost inductors (a high valued inductor for CCM and a low valued inductor for DCM) a

new, constant-switching-frequency based rectifier system is proposed in this paper. The power

circuit of the proposed converter system can be configured either for CCM or for DCM by

performing a simple on-off control of an auxiliary switch. A DCM power topology, with an input

side lowpass filter is obtained, when the auxiliary switch is on. Again, a CCM power topology

(without any input filter) is realized, when the auxiliary switch is off. A simple, input voltage

sensorless, current-mode controller is proposed for the above rectifier system. The controller

works in the principle of one-cycle control or the nonlinear carrier control , without using any of

the above-mentioned complex mathematical operations. The required gating pulses for the

converter switch are generated by comparing the measured input current with one of the two

periodic carriers in a modulator. A linear carrier is used under CCM, while a nonlinear carrier is

selected under DCM. The measured load current is used to select the desired operating mode

(CCM or DCM). A simple load current feedforward scheme is used to improve the dynamic


5/52

response of the converter system, which also ensures a smooth transition from one operating

mode to the other. The proposed concept has been simulated onMATLAB/SIMULINK platform.

A single-phase, single-switch boost rectifier is shown in Fig. 1, where Fig. 1(a) and (b) represent

the DCM and the CCM boost rectifier topologies, respectively. A lowpass filter is used in the

DCM topology for filtering the switching current harmonics, which is absent in the CCM

topology. Further, it can be shown that for the same switching frequency, the value of boost

inductor is much lower than . Thus, for the same switching frequency, the DCM topology is not

suitable for CCM operation and vice versa. Similarly, it can be shown that the control scheme,

suitable for CCM application may not be useful in DCM operation and vice versa. Therefore, a

common rectifier system (power circuit topology and control scheme) is required to be

developed, which is suitable for both CCM and DCM. Such a rectifier system is developed

in this section.


6/52


7/52

that no isolated gate drive is required to drive the switch . Now, it is required to develop a

suitable controller for controlling the proposed power topology, which is suitable for both

CCM and DCM operations.

1.1 An Efficient Quasi-Active Power Factor Correction Scheme:

The ac/dc rectifier consisting of a diode bridge rectifier followed by a filter capacitor is

simple, economic and robust in construction, but produces a harmonic-rich ac line current with

poor power factor. To overcome the problem, passive and active power factor correction (PFC)

circuits have been proposed. In general, active circuit methods are more efficient, lighter in

weight, and less expensive than passive circuit methods . Recent international regulations

governing the harmonic content of the input current drawn by electrical equipment have inspired

the development of many new active PFC circuits employing switched mode DC-DC converters.

Active PFC, classified by the system configuration, can be categorized into two-stage and single-

stage (S2) schemes. A two-stage scheme results in high power factor and fast response output

voltage regulation by using two independent controllers and optimized power stages, as shown in


8/52

Fig. 1 (a). The main drawbacks of this scheme are its relatively higher cost and larger size

resulted from its complicated power stage topology and control circuits,

particularly in low power applications. An S2 scheme combines the PFC cell and the dc/dc

power conversion cell into one stage, and typically uses only one controller and shares power

switches, as shown in Fig.1 (b). Usually, in the S2 scheme the high power factor is guaranteed by

operating the PFC boost cell in discontinuous current mode (DCM), while the fast response

output regulation is achieved by the dc/dc cell. Many S2 converters have been reported in the

literature in recent years . Although the single-stage scheme is quite attractive in low cost and

low power applications due to its simplified power stage and control circuit, major issues, such

as low efficiency and difficulty to move to higher power level, and high as well as widerange

intermediate dc bus voltage stress.

To overcome the disadvantages of the single-stage PFC converter, a new concept of quasi-

active PFC has been proposed . In most off-line dc/dc converters, the input current is made up of

a series of discontinuous current pluses. It is this discontinuous current that allows the quasi-

active PFC to function. The concept is based on using standard dc/dc topologies with minor

changes to obtain fast response at a low cost. In this case the main objective is to obtain an input

current with a permitted amount of harmonic content as per the regulation at a low cost and high

efficiency. The quasiactive PFC circuit shown in Fig.1.2 improves the efficiency of a single-

stage converter by preventing the input current from the ac mains from being added to the active

switch . As the circuit uses resonance of circuit parameters to achieve PFC, the control of the

power factor will be very sensitive to the variation of components values.

In this paper a new quasi-active PFC circuit is presented. This PFC circuit is based on

adding two auxiliary windings coupled to the transformer of a cascade dc/dc DCM flyback

converter. The PFC circuit is placed between the input rectifier and the low-frequency filter

capacitor used in conventional power converter. Since the dc/dc converter is operated at high

frequency, the auxiliary windings produce high frequency pulsating source such that the input

current conduction angle is significantly lengthened and the input current harmonics is reduced.

The input inductor can be designed to operate in DCM or CCM. The single-stage PFC circuit has

a slightly higher efficiency when it operates in CCM. However, DCM operation gives a

lowharmonic content compared to that of the CCM operation. Hence, by properly designing the


9/52

converter components, a good trade-off between efficiency and harmonic content can be

achieved.


10/52

Fig. 1 Functional block diagram of PFC converters: (a) two-stages, (b) single stage.

Fig. 1.2 The quasi-active PFC circuit

CHAPTER 2

LITERATURE REVIEW

PROPOSED QUASI-ACTIVE PFC CIRCUIT:

The proposed quasi-active PFC circuit is discussed in this section. As shown in Fig.2.1, the

circuit consists of a bridge rectifier, a boost inductorL4, a capacitorC3, an intermediate dc bus

capacitor C1, and a discontinuous input current power load, such as DCM flyback converter.

Two auxiliary windings L3 & L5 are added to the primary side of the transformer in order to

shape the input current and improve the efficiency. In the proposed quasi-active PFC scheme, the

dc/dc converter section is not directly involved in the PFC; it simply offers a driving power by

applying a series of discontinuous current pulses. The quasi-active PFC network can be

considered as one power stage without an active switch.


11/52

Fig.2.1. The proposed quasi-active PFC circuit diagram

To simplify the analysis, the following assumptions are made:

All semiconductors components are ideal. According to this assumption, the primary

switch and the rectifiers do not have parasitic capacitances and represent ideal short and

open circuits in their on and off states, respectively

The power transformer does not have the leakage inductances because of the ideal

coupling

The values of all capacitors are sufficiently high so that the voltages across them are

considered constant.

Finally, the input voltage of the converter is considered constant during a switching

cycle because the switching frequency is much higher than the line frequency

A. Operation stages of the proposed method:

In the proposed circuit, properly designing the inductorL4 and the turns ratio n1, n3, and

n5 the input inductor current iL4 can be made to operate either in DCM or CCM for a line


12/52

current period. Operating in DCM gives low THD and high power factor while in CCM the

circuit gives better efficiency and lower power factor. Therefore the design objective is to obtain

an input current with a harmonic content which meets the regulations. Cost and efficiency are of

primary concern. A typical CCM input inductor current produced by the proposed circuit is

shown in Fig. 2.2. It can be seen, that during one half of period of the supply the waveform of the

input inductor current iL4 waveform always has two parts, the DCM part and the CCM part.

When the instantaneous input voltage vin is less than the capacitor voltage vc3 the inductor

current is also low and therefore the input inductor current is in DCM. With the increase of

instantaneous input voltage vin vc3 the inductor current increases and becomes continuous.

In steady state operation the topology can be divided into three operating stages, as shown in

Fig. 2.3. The converter waveforms for both CCM and DCM parts are shown in Fig. 2.4 and Fig.

2.5 respectively.

Stage 1(to-t1): At t= to the switch (SW) is off and diode D1 is also off due to VC1 (which is

always higher than the rectified input voltage). The inductorL4 absorbs the input energy, and the

inductor current iL4 is increased linearly. The current i3 through the windingL3 is equal to (iL4)

at this stage. The capacitorC3 gets charged during this stage. At this time, the output diodeD2 is

forward biased and the stored energy on the transformer primary winding is transferred through

the transformer secondary winding to the output load, so the transformer secondary current i2 is

decreasing. AsL1,L2,L3 andL5 are windings of an ideal transformer, based on Amperes law,

it has

n1i1+n3i3-iD1n5-i2n2 = 0 (1)

Where, n1, n2, n3 and n5 are the no. of turns of the transformers primary, secondary and the two

auxiliary windings respectively. Without loss of generality, n2 is assumed to be equal to one.

Since i1= im, iL4= i3 and iD1= 0 in this stage

i2=n1im+n3iL4 (2)

As it can be seen from (2), the load absorbs energy not only from the magnetizing inductor but

also from the input source through the auxiliary winding n3. Therefore,there is a direct power


13/52

transfer from the input source to the load during this period. As a result, the efficiency is

improved. This stage ends when the secondary current i2 becomes zero at (t= t1).

Fig. 2.2 Input inductor current IL4 illustrating its conduction modes during half line current

period

Stage 2(t1-t2) (current source stage): During this stage the switch SWand both diodesD1,D2are turned-off. The input current continues to flow through the resonant circuit formed by Vin,

L4,L3, C3. The capacitorC3 continues to get charged by Vin at this stage. The current iL4(=i3)

slightly decreases when Vc3>Vin (for DCM) and is constant when Vc3=Vin (for CCM part). This

stage ends when the switch (SW) is turned-on at t= t2.

Stage 3(At t= t2): This stage can be explained into two partsFor the DCM part (where vin < vc3): when the switch is turned on, the bulk capacitor C1

discharges through the transformer primary and hence the primary winding current i1 increases.

Once the voltage across C1 drops, diode D1 starts also conducting, then inductors L4, L3 and

capacitorC3 release their energy to the primary windings L1 andL5, so more energy is stored in


14/52

the primary side windings of the transformer. This means that the transformer magnetizing stored

energy is not only from C1 but also from the input. Therefore, C1 is in the discharging mode.

Note that because vin is low the current iL4 will decrease to zero (DCM) before the switch is

turned off. Once iL4=0 the inductor current i3 continues to supply the energy to the primary

winding of the transformer. At t= t4, the switch is off again, and i1 decreases to zero, therefore

D1-off and D2 is on. The current i3 reverse its direction again where it equals to iL4 and the

switching cycle repeats again.


15/52

Fig. 2.3 Equivalent circuits for the three stages of operation of the proposed PFC circuit


16/52

Fig. 2.4 Key switching waveforms of the proposed PFC with CCM operation


17/52

Fig. 2.5 Key switching waveforms of the proposed PFC with DCM operation

Based on Amperes Law

n1i1+n3i3-n5iD1-n2i2 = 0 (3)

At this stage i2 = 0 and substituting foriD1=i3+iL4 therefore:

Since the magnetizing inductance Lm >> L1, therefore the switch current through the main

switch (SW) is approximately isw -i1. From Fig. 5 (stage 3) the switch current is given by:

isw =-i1 = iD1+ic = iL4+ i3 + ic (5)


18/52

2.1 A New Hybrid Active Power Filter for Harmonic Suppression and Reactive Power

Compensation:

Harmonic currents generated by power electronicsrelated appliances in industry are

causing more and more attention. Harmonics can not only influence the normal work state of

electric equipments, but also interfere communication equipments. To improve the power

quality, some methods for harmonic suppression have been used in power systems. Active power

filters (APF) have been an effective way since they can compensate harmonics dynamically .

However, due to the high cost of high-speed and high-power switching devices such as power

IGBTs, IGCTs etc, APF can not be widely applied in industry.

In order to reduce the cost and capacity of APF, some hybrid active power filters (HAPF),

combining passive power filters and active power filters connected in series or parallel, have

attracted widespread concernt. In 1990, Fujit.H proposed a typical topology of the shunt hybrid

active power filter, combined of passive filters and a small-rated active filter connected in series

with each other. The passive filters remove load harmonics, and the active filter plays a role in

improving the filtering characteristics of the passive filter. It results in a great reduction of the

required rating of the active However, in order to further reduce the capacity of active power

filter leading to a practical and economical system. power filter, passive power filters are

designed as a high fundamental impendence, there is little fundamental current flowing through

active filter, so the structure is only used to suppress harmonic currents of the grid usually. In

case that harmonic suppression and high capacity reactive power compensation are both needed,

the filter can not satisfy the requirement.

The harmonic current detection process, current control for active power filter is another

important aspect. Because the reference current of the system is periodic, traditional

PIcalgorithm is not suitable Control methods based on neural network or fuzzy controllers are

commonly used. However, when they are applied to eliminate the harmonic currents, the method

based on neural network is too complex to realize and the method based on fuzzy controllers is

difficult to achieve the ideal precision.A method having both high precision and fast

dynamicresponsecharacteristic is desired. In this paper, a new type hybrid active power filter,


19/52

containing a high capacity passive power filter and an active power filter, is proposed. Prediction

method is proposed to detect the harmonics to decrease the delay caused by sampling and

calculation, and a recursive integral PI algorithm is proposed to control the harmonic currents in

order to improve the control precision and dynamic response characteristic. Simulations and

industrial application results have shown that the proposed hybrid active power filter has good

performance in both reactive power compensation and harmonic suppression.

2.2 PRINCIPLES OF OPERATION:

The system configuration of the proposed hybrid power filter is shown in Fig.2.6. It consists of

an active power filter and passive power filters. In this system, passive power filters are tuned at

the 100Hzand 250Hzto suppress part of harmonic currents and improve the power factor. Theactive power filter generates harmonic currents opposite to the harmonic currents caused by non-

linear loads and improves the performance of passive power filters. The compensating current is

injected to the power grid through coupling transformer and capacitor CF. The active power

filter shown in the fig.2.6 focuses on suppressing harmonic currents and improving the

performance of passive power filters, it is not necessary to compensate reactive power.


20/52

Fig.2.6 Topology ofthe proposed hybrid active filter.


21/52

2.3 Design and Analysis of Passive Power Filter:

The single-phase equivalent circuit of the proposed passive power filter is shown in fig. 2.7

(

Fig.2 .7 The single-phase equivalent circuit of passive power filters with coupling transformer

L] and C] are tuned at fundamental frequency. V] will be a low voltage, it makes the active

power filter realize easily by semiconductor switching device. CH C] and L] are tuned at 100Hz

and CFis mainly used to compensate reactive power. The impendence ofLo is so big that the

influence ofLo to the passive filters can be neglected. C2 and L2 are tuned at 250Hzto suppress

the fifth order harmonic and compensate reactive power. So the values of CH Cj, Lj, C2 andL2

should satisfy the following equations:

W0L1=1/w0C1 (1)

2w0L1 = cF+c1/2w0(c1. cF) (2)

5w0L2 = 1/5w0C2 (3)

wo is fundamental frequency.


22/52

The equivalent circuit of active power filter is shown in Fig.2.8.

Fig.2.8 The single-phase equivalent circuits of injecting branch.

When the system works, part of the compensating currents generated by APF will flow through

fundamental series resonance circuits. If APF produces the fifth order harmonic current, it will

mostly flow into the fifth resonance branch, so APF is used to produce the seventh order and

higher order harmonics. The equivalent impedance ofLj, C] at 350Hzcan be obtained from the

following equation (4), and the equivalent impedance ofCFat 350Hzcan be obtained through

the equation (5). Thus, the proportion of the current between CFand the auxiliary winding of the

transformer can be calculated by equation (6)

The ratio will increase as the harmonic frequency increases; therefore, mostly harmonic currents

produced by active power filter can be injected into power grid. As a result, the proposed active

power filter in fig.2.6 can inject plentiful harmonic current and compensate high-capacity

reactive power at the same time.


23/52

2.4 RECURSIVE INTEGRAL PI CONTROL ALGORITHM APF:

The proposed recursive integral PI controller is composed of recursive integral PI and

fuzzy control as shown in Fig.2.9, where e stands for the input of the controller, De is for

variational rate of e; (x represents the x phase's compensating current; vde and v;e are the de side

voltage of PWM inverter and its reference value, respectively, while isx and is! respectively

denote the source current and source fundamental current obtained from ip ' iq theory; iREF

represents the reference signal.

Fig.2.9.structure of proposed controller

The input of the controller is periodic and its period is 20ms. It is composed of a series of

sinusoid whose periods are multiple of 20ms. Adopted is traditional PI algorithm, it will integrate

every sampling point. The output ofthe controller is


24/52

u and e respectively denote the output and input of the controller; , andK; respectively stand

for process gain and integral constant, andKis sample time.

Recursive integral PI algorithm is proposed on the basis of the traditional PI algorithm, it

integrates e in every period, which is equivalent to n PI controllers work together, thus a fast zero

steady-state error adjusting is realized(n is an integer).

2.5.Study of a single-phase series active power filter with hysteresis control:

Active power filters (APF) are promising tools to improve the quality of the electrical

energy . Series active power filters are applied meanly to remove distortions from the good

quality form of the AC grid voltage . The most widely used power circuit topology of the single-

phase filter is the fullbridge shown in Fig.2.10. The operation of APF is based on adding the

produced instantaneous value of the voltage UFto the voltage of the grid US(adding means also

subtraction of those voltages when required) in order to produce a good sinusoidal waveform of

the voltage UL that supplies the load. The filterLF, CFis added to eliminate the high frequency

harmonics due to the switching. The transformer ratio of Tr depends on the value of the DC

supply (storage) voltage. The control implementations may be of different nature: pulsewidth

modulation, predictive control, sliding mode control, etc. . Some implementations maintain a

constant switching frequency , and some apply varying switching frequency, e.g. the hysteresis

control (which may be limiting the maximum switching frequency). This last method allows

minimizing the power losses in the switches, simplifying the design of the filterLF , CF , and

thus improving the electromagnetic compatibility of the APF.

The aim of this study is to investigate the operation of the series APF shown in Fig.2.10 when its

control is based on hysteresis, both with and without limitation of the maximum switching

frequency.


25/52

Fig.2.10 Power stage of a single-phase full-bridge series active power filter

2.5 OPERATION:

The hysteresis operation of this APF is based on the comparing the instantaneous value of a

reference sine wave UREF(synthesized in phase with the grid voltage US) to the load voltage

UL . The comparison is performed within the defined hysteresis voltage interval H . If the

instantaneous value of the load voltage is lower than that of the reference ( UREF H ), the

transistors VS1,VS3 turn on. In case it is higher than the value UREF+ H , then the transistors

VS2,VS4 turn on. The reference sinusoid is generated by measuring the instantaneous voltage atthe point of common coupling (PCC) US. If the reference sinusoid value would be kept equal to

that of the first harmonic of the USthen only a filtering will be performed. When the reference

sinusoid has


26/52

Fig 2.11. Building blocks and time diagrams illustrating the tracking down of the reference curve

at a not limited maximum switching frequency


27/52

2.6 Hysteresis control at limited maximum switching frequency:

Fig.2.12 illustrates the concept of the implementation of the hysteresis control with an imposed

limitation of the maximum switching frequency. The turning on of the power switches is not

allowed immediately at reaching the value UREFHforVS1,VS3 and the value UREF+Hfor

VS2,VS4 . The turning on is performed after arriving at the corresponding values and delayed

synchronously by the length of a clock signal. The frequency MAX Fof that signal will limit the

maximum switching frequency of the power switches.


28/52

Figure 2.12. Building blocks and time diagrams illustrating the tracking down of the reference

curve at a not limited maximum switching frequenc


29/52

CHAPTER 3

PROPOSED CONVERTER

3.1The fundamental principle of APFC:

In fact,APFC is meaning that the rectifier voltage which the input alter-current (short

for AC) signal is converted direct-current (short for DC) voltage through the bridge diode is

changed into the current signal by DC/DC converter and the proper control methods. The current

wave which can auto track the DC voltage wave is changed with a sine wave, and get a steady dc

output voltage.

The fundamental principle frame of APFC is shown in Figure3. 1

.

Fig 3.1. The fundamental principle frame of APFC

Figure 3.1 input by rectifier after rectifying, alternating current will get sinusoidal voltage waveform signal as

the input current IC simplifies PFC reference waveform and then by simulation on time-multiplier operations, will

get as the result of current waveform reference, and the value of the current value and the actual sampling

comparison, then after driving circuit to control signal generated driver circuit DC/DC current output and output

voltage.


30/52

3.2The main circuit topology of APFC:

The main circuit topology is usually brought out with DC/DC converter. The main circuit

topology is consisted of buck, boost/buck, flyback and boost circuit.

Buck circuit is rarely used as the big noise and the bad filtering. Boost buck circuit has a

complexity circuit. Flyback circuit is usually used in low power application. The last one is a

simple current control circuit because of the high PF value, the low total harmonic distortion and

the high efficiency. The peak current of boost APFC is nearly equal to the input current. The

amplitude of the peak voltage of boost APFC is higher than the grid-side voltage.

The advantages of boost APFC are as follows.

the continuous input current and easy filtering.

Can contain a higher PF in the range of all input voltage

output DC voltage than input DC voltage peak.

3.3.The control methods of input current: At present, the strong practicality control method is CCM which is brought out with

multiplier. CCM mode is included directly and indirectly control. Directly control methods is

consisted of Average Current Mode Control (short for ACMC), Peak Current Mode Control

(short for PCMC), lag current control and current tracking control. The advantages of ACMC

mode are frequency stability, CCM mode. Low switching current and so on. The four control

methods, CCM is most frequently used, especially in the boost APFC.

The frame of CCM of boost APFC is shown in Figure 3.2.


31/52

Figure 3. 2. The frame of CCM of boost APFC

Figure 3.2 APFC circuit average current pressor type control circuit principle diagram the

average current control type pressor type of active power factor correction simulation In order to

validate the circuit topology average current control type pressor type of active power factor

correction effect, based on MATLAB simulation software was founded on the circuit topology

simulation, and the simulation results circuit to carry on the detailed analysis and research.

3.4 APFC BASED ON THE CIRCUIT TOPOLOGY AVERAGE CURRENT CONTROL:

In order to validate the circuit topology average current control type of active power factor

correction effect, based on MATLAB simulation software was founded on the circuit topology

simulation, and the simulation results circuit to carry on the detailed analysis and research. In

this paper the design of index parameters: the AC voltage source for standard sinusoidal RMS is

220V voltage, frequency f = 50Hz ac inductance, L = 0.5 mH, C = 960, R = 2. Control circuit of

the main average current control. Standard sine signal from power signals, modulation signal is

for the triangle 5kHz frequency wave, output voltage given value for 400V.


32/52

Proposed Circuit:

An ac to dc converter consisting of a line frequencydiode bridge rectifier with a

large output filter capacitor is cheap and robust, but demands a harmonic rich ac

line current. As a result, the input power factor is poor. Due to problems associated

with low power factor and harmonics, harmonic standards and guidelines, which

will limit the amount of current distortion allowed into the utility, is introduced.

Thus the simple diode rectifiers may not in use. To correct the poor power factor

and reduce high harmonic current contents, passive and active circuits can be used.

In general, active methods are more efficient, lighter in weight, and less expensive

than passive circuit methods. In active power factor correction techniquesapproach, switched mode power supply (SMPS) technique is used to shape the

input current in phase with the input voltage. Basically in this technique power

factor correcting cell makes the load behave like a resistor leading to near unity

power factor. Fig. 1 shows the circuit diagram of basic active power correction

technique. There are different topologies for implementing active power factor

correction techniques including the boost converter and the buck converter. For

reasons of simplicity and its popularity, the boost converter is used to improve the

power factor. In boost circuit, the switching device handles only a portion of the

output power and this property can be used to increase the efficiency of the

converter. The boost converter may be designed to operate either in the continuous

conduction mode (CCM) or in the discontinuous conduction mode (DCM).

Compared with the CCM approach, a converter operating in DCM provides a

simpler control scheme, which requires only one (voltage) control loop to

modulate the on-time, Fig 2. Furthermore, operating a boost converter in

discontinuous mode avoids the output diode reverse recovery problem and

alleviates the high switching loss in continuous mode operation. One drawback of

DCM PFC approach is that its input current waveform is not always purely


33/52

sinusoidal. The input current will contain certain distortion due to the modulation

of inductor current discharging time. This waveform distortion is found to be a

function of the ratio of the peak line voltage to the output voltage of the PFC

circuit.

Generally, to reduce the harmonic current contents of DCM boost converter, the

duty cycle of the rectifier switch needs to be properly modulated during a rectified

line period instead of being kept constant. Recently, a number of duty cycle

modulation techniques for the DCM boost rectifier have been introduced to reduce

the total harmonic distortion (THD) of the input current for singlephase

and three-phase systems. Specifically, the approach based on variable switching

frequency control was presented and analyzed. However, since the switching

frequency directly depends on the input voltage and output power variations, the

variable switching frequency method suffers from very wide frequency range

which decreases the efficiency and makes the rectifier design and control circuit

more complex. To improve the performance of the DCM boost converter at

constant switching frequency, harmonic injection methods have been introduced,


34/52

which gives high quality input current at the cost of complicating the control

circuitry. The purpose of this paper is to propose a new simple,

low cost harmonic reduction method, which has the simplicity of voltage follower

technique. In the proposed method a periodic signal proportional to the rectified ac

line voltage is injected into the control circuit to modulate the duty cycle of the

power switch, S, such that the amplitude of third-order harmonic of the line current

is reduced and THD is improved. The generation of the injected signal with unity

amplitude is simplified by sensing the output voltage of the bridge rectifier Vg

(Fig.1). As a result, the additional circuit required to generate and synchronize the

second-order harmonic signal, Fig. 2, proposed in is eliminated. Experimental and

simulated results show the effectiveness of the proposed method.

ANALYSIS OF THiE CURRENT WAVEFORM DISTORTION BOOST

RECTIFIER:


35/52

The voltage follower (DCM) boost converter is shown in Fig. 3, assuming that the

converter operates in DCM with a constant switching frequency, fs. The diode

bridge rectifier is used to rectify the ac line voltage, and the semiconductor power

switch S, the inductor L, and the output diode Do operate as a boost chopper. The

Power switch, S, is operated at high switching frequency and the output voltage is

regulated by varying the duty cycle of the switch, S. A capacitor C0 is used to

reduce the ripple in the output voltage. The EMI input filter is used to filter out the

high frequency components in the input current.

In voltage-follower PFC circuit, the on-time, Ton, is designed to change slowly

and is almost constant over an ac line cycle. In general, the input current in

constant switching frequency boost converter is composed of a charging

component and discharging component, as shown in Fig. 4. Assuming sinusoidal

input voltage (Vs=V1sinwt), the peak inductor current, Ipk, is determined as


36/52

Where T is the period of a switching cycle, D is the duty cycle. The peak inductorcurrent follows an envelope of the input voltage. At the end of on-time, the

inductor current is discharged to the output and is reset by a voltage of VO - Vs,

where VO is the output voltage of the boost converter. The discharging time Td, is:

The ac line, in effect, sees an average inductor current waveform due to the

presence of the input filter capacitor and the stray line inductance.

Where I1(avg) is the line current, I,, (avg) is the average of inductor current during

the on-time, and Id(avg) is the average of inductor current during discharge

time.


37/52


38/52

Using Fourier analysis, Iin can be shown to contain several low-order harmonics.

The significant lower-order harmonics are the third, fifth, and the seventh. Among

the three lower-order harmonics, the third harmonic component has the largest

amplitude and has to be attenuated using PWM.

NEWLOW COST INJECTION SIGNAL IMPLEMENTAION:

In the proposed circuit as shown in Fig. 6, a signal d(t) proportional to the rectifiedac line voltage is injected into the control circuit to modulate the duty cycle of the

power switch, S, such that the amplitude of third-order harmonic of the line current

is reduced and THD is improved. In this paper, the generation of the injected signal

with unity amplitude is simplified by eliminating the additional circuit required to

generate the second-order harmonic signal proposed , Fig 2. It also eliminates the

need to employ phase detecting and phase-locking circuits to properly synchronize

the injected signal with rectifier input current. The proposed harmonic injection

technique uses a voltage signal which is proportional to the rectified ac input

voltage. As a result, the injected signal is naturally synchronized with the input

voltage. Therefore, to modulate the duty cycle of the power switch, we can employ


39/52

the output of the diode bridge rectifier of the power stage, which contains a

second-order harmonic and higher-order components such as 4th, 6th 8 ,...etc.

Therefore the injected signal can be expressed as:


40/52

Where 0 < m < 1 is the modulation index, and M is the input frequency. A filter

capacitor, Cin, is placed between the bridge rectifier and the boost inductor L, in

order to reduce the high frequency ripple of the injected signal. Cin can also reduce

the peak inductor current as well as the power switch peak current due the DCM

operation. Therefore, using the modulated duty cycle, which optimizes the time-on

of the power switch, and the capacitor Cin, the switching loss of the power switch,

can be reduced. It is Possible to get the optimal values of modulation index m and

the capacitor Cin , which make the total harmonic distortion THD as small as

possible for a given values of input and output voltages. The optimal values of m

and Ci, that result in a THD of less than 400 are found out through the simulation

and later implemented in the experimental converter. The modulation of the duty

ratio during a line cycle can be expressed as:

Dmod (t) = D[1 + d(t)]

Where Dmod is the modulated duty cycle, and D is duty cycle in the absence of the

modulation,with the modified duty cycle Dmod defined in the average input

current in the presence of the signal injection can be described as

Where [d(t)]2 term is neglected, since it is much smaller than the unity. Since the

third-order harmonic is the dominant harmonic with constant switching frequency

PWM control, the input current can be approximately expresses as


41/52

Where I, and I3 are constant values. Substituting for D with the modified duty

cycle Dmod , and by setting n=2 for the second-order harmonic, since it has the

highest magnitude, the input current can be rewritten as

Furthermore, if we consider the fifth-order harmonic in input current, the term [-

mI3 sin(5ay)] can reduce the amplitude of this harmonic component by small

amount of (-m13). Therefore, the total harmonic distortion (THD) of the input

current with the modulated duty cycle is given by

Obviously THD with injection is much smaller than THD I3 without injection.


42/52

CHAPTER 4

SIMULATION RESULTS

MATLAB is a high-performance language for technical computing. It integrates computation,

visualization, and programming in an easy-to-use environment where problems and solutions are

expressed in familiar mathematical notation. Typical uses include-

Math and computation

Algorithm development

Data acquisition

Modeling, simulation, and prototyping

Data analysis, exploration, and visualization

Scientific and engineering graphics

MATLAB is an interactive system whose basic data element is an array that does not require

dimensioning. This allows solving many technical computing problems, especially those with

matrix and vector formulations, in a fraction of the time it would take to write a program in a

scalar non-interactive language such as C or FORTRAN.


43/52

The MATLAB system consists of six main parts:

(a) Development Environment

This is the set of tools and facilities that help to use MATLAB functions and files. Many of these

tools are graphical user interfaces. It includes the MATLAB desktop and Command Window, a

command history, an editor and debugger, and browsers for viewing help, the workspace, files,

and the search path.

(b) The MATLAB Mathematical Function Library

This is a vast collection of computational algorithms ranging from elementary functions, like

sum, sine, cosine, and complex arithmetic, to more sophisticated functions like matrix inverse,

matrix Eigen values, Bessel functions, and fast Fourier transforms.

(c)The MATLAB Language

This is a high-level matrix/array language with control flow statements, functions, data

structures, input/output, and object-oriented programming features. It allows both "programming

in the small" to rapidly create quick and dirty throw-away programs, and "programming in the

large" to create large and complex application programs.

(d) Graphics

MATLAB has extensive facilities for displaying vectors and matrices as graphs, as well as

annotating and printing these graphs. It includes high-level functions for two-dimensional and

three-dimensional data visualization, image processing, animation, and presentation graphics. It

also includes low-level functions that allow to fully customize the appearance of graphics as well

as to build complete graphical user interfaces on MATLAB applications.

(e)The MATLAB Application Program Interface (API)


44/52

This is a library that allows writing in C and FORTRAN programs that interact with MATLAB.

It includes facilities for calling routines from MATLAB (dynamic linking), calling MATLAB as

a computational engine, and for reading and writing MAT-files.

(f) MATLAB Documentation

MATLAB provides extensive documentation, in both printed and online format, to help to learn

about and use all of its features. It covers all the primary MATLAB features at a high level,

including many examples. The MATLAB online help provides task-oriented and reference

information about MATLAB features. MATLAB documentation is also available in printed form

and in PDF format.

(g) Mat lab tools

(i) Three phase source block

The Three-Phase Source block implements a balanced three-phase voltage source with internal

R-L impedance. The three voltage sources are connected in Y with a neutral connection that can

be internally ground.

(ii) VI measurement block

The Three-Phase V-I Measurement block is used to measure three-phase voltages and currents in

a circuit. When connected in series with three-phase elements, it returns the three phase-to-

ground or phase-to-phase voltages and the three line currents


45/52

(iii) Scope

Display signals generated during a simulation. The Scope block displays its input with respect to

simulation time. The Scope block can have multiple axes (one per port); all axes have a common

time range with independent y-axes. The Scope allows you to adjust the amount of time and the

range of input values displayed. You can move and resize the Scope window and you can modify

the Scope's parameter values during the simulation

(iv). Three-Phase Series RLC Load

The Three-Phase Series RLC Load block implements a three-phase balanced load as a series

combination of RLC elements. At the specified frequency, the load exhibits constant impedance.

The active and reactive powers absorbed by the load are proportional to the square of the applied

voltage.


46/52

Three-Phase Series RLC Load

(v) Three-Phase Breaker block

The Three-Phase Breaker block implements a three-phase circuit breaker where the opening and

closing times can be controlled either from an external Simulink signal or from an internal

control signal.

Three-Phase Breaker block

(vi) Gain block

Gain block


47/52

The Gain block multiplies the input by a constant value (gain). The input and the gain can each

be a scalar, vector, or matrix.


48/52

Discrete,

s = 5e-007 s.

powergui

V o l t a g A n d C u r r e n t P f

Vac

v+-

V3

v+-

V2

v+-

V1

S c o p e 5

S c o p e 4

S c o p e 3

S c o p e 2

P r o d u c t 2

P r o d u c t 1

P r o d u c t

O u t p u t V o l t a g e

g

m

D

S

Mosfet

L2L1

L

1s

I n t e g r a t o r 1

1

s

I n t e g r a t o r

I n p u t C u r r e n t

i+

-

Imes1

i+

-

Imes

1 / 4

G a i n 3

1 / 2

G a i n 2

- K -

G a i n 1

1 / 2

G a i n

ma

k

D5

m

a

k

D4m

a

k

D3

m

a

k

D2

m

a

k

D1

2

C o n s t a n t 2

1 / 1 0 0

C o n s t a n t 17 0 0

C o n s t a n t


49/52

Fig.4.1 voltage and current power factor output

Fig.4.2 input current wave form


50/52

Fig 4.3 output voltage wave form

Fig 4.5 total harmonic distortion wave form


51/52

CHAPTER 5

CONCLUSION

Active power factor correction circuit is analyzed and studied in this paper. The simulation

model is built in MATLAB. The results show that the grids-side input current wave is changed

with a sine wave, has the same phase with the grid-side input voltage wave. In some way , the

power factor is improved. In addition, the structure of this circuit is very simply, easy to bring

out and widely used in the big power Occasion.


52/52

REFERENCES

[1] Wang Zhaoan,Yang Jun,Liu Jinjun,Wang Yue,harmonics suppression and reactive power

compensation , the Second Edition , [M] , China Machine Press (CMP),2009.

[2] Athab , H.S. , Lu, D.D.-C. , An efficient quasi-active power factor correction scheme Power

ElectronicsIEEE Transactions on Volume:25 ,pp 1103-1109,2010.

[3] Chen Zhe, Boost APFC device design[J], Electrical Technology, 1:pp 45-50,2010.

[4] Qi Lei , Xi ZiqiangXin Zhanqiang, Huang Wencong, Research on single phase APFC with

method of hysteresis control[J] , Editorial Department of Hubei University of Technology, 25(1):

pp 52-54, 2010.

[5] Jovanovic,M.M.,Jang, Y..State-of-the-art, single-phase, active powerfactor- correction

techniques for high-power applications - an overview. Industrial Electronics.IEEE Transactions

on Volume: 52 , pp :701 - 708 ,2005.

[6] Lin Fei , Du Xin. The MATLAB simulation of power electronics application

technology[M].China Electric Power Press,2009.

a cost effective method of reducing total harmonic distortion in single phase boost rectifier

Documents