a low-mass tracking system for the new di-electron spectrometer @ gsi gsi darmstadt, lhe/jinr dubna,...
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A Low-mass Tracking System for
the new Di-Electron Spectrometer @ GSIthe new Di-Electron Spectrometer @ GSIGSI Darmstadt, LHE/JINR Dubna, GSI Darmstadt, LHE/JINR Dubna,
IKF Frankfurt, MEPhI Moscow, IPN Orsay, FZ RossendorfIKF Frankfurt, MEPhI Moscow, IPN Orsay, FZ Rossendorf
WCC 98, Vienna
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Concept of the HADES Spectrometer
Lepton IdentificationLepton Identification RICH
Radiator: C2F6 Spherical mirror, CaF2 window Photon detector: CsI photo cathode
META TOF plastic scintillators Shower detector (lead converter)
TrackingTracking Super-conducting Toroid (6 coils)
Bmax = 0.7 T, Bending power 0.34 Tm
Multi-wire Drift Chambers (MDC) four planes, six layers each small cell (0.5 - 1.4 cm) 1 m e te r
Ta rg e t
Be a m
RIC H
M DC s
C o il
Sho w e r
TO F
TO FM DC s
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Artists views
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Tasks of the Tracking System
General Event Characterisation
Invariant Mass of Dileptons
(M1%)
Background Rejection
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Requirements on the MDCs
Mass resolution better than 1 % () Low mass material Position resolution < 140 m ( in one module )
Survive in high multiplicity environment 200 charged hadrons, 20 photons sufficient granularity, and redundancy
Minimisation of hadronic and electromagnetic background Low Z materials Identification of low mass Dalitz and conversion pairs Good position resolution of the inner two planes
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MDC DesignMDC Design
Geometry of the Tracking SystemA B C a R d
[mm] [mm] [mm] [mm] [degree] [mm] [mm]I 139,21 767,38 839,19 5 21,98 543,83 5II 205,00 905,00 1049,27 6 19,49 705,19 5III 310,43 1804,80 2139,05 12 20,44 1347,69 8IV 345,46 2224,05 2689,04 14 20,44 1641,68 10
24 conceptually identical modulesin 4 different geometries
6 drift cell layers redundancy for hit recognition orientation optimised with respect to
resolution in direction of the kick angle 190 cells per layer
sufficient granularity (max multiplicity = 0.6 hits/cm along y) 26 200 cells in total
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MDC DesignMDC Design
Summary of Design Parameters
Number of channels
Total size
Number of modules
Drift-cell layers per module
Maximum drift path
Cathode wires
Potential wires
Sense wires
Counting gas
26200 33 m2
24 in four different geometries 6 with stereo angles of
+ 40, - 20, 0, 0, + 20, + 40 degree 5 up to 14 mm 80 m bare Aluminium 80 and 100 m bare Aluminium 20 m Au/Tungsten He / i-C4H10
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Frame Design Frame Design
Concept I: Power Frames
Used for plane I forces of the wires are
counter-balanced by a pre-stressed frame glued to the wire frame
power frame produced at low cost and sufficient precision by laser cutting
sense/field and cathode wires glued to the same gfc-frame
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Frame DesignFrame Design
Concept II: controlled sag
Used for plane II
Individual layers are
allowed to bend in partly
Frames are pre-stressed
with the calculated (FEM)
force of the wire plane
before gluing.
Cathode and sense layer
glued to a super-layer for
practical reasons
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MDC DesignMDC Design
Radiation thickness
Taken steps He-based counting gas Aluminium potential wires He bag
Relative Contributions in the Module
field12%
cathode35%
sense19%
window15%
cover2%
noble gas1%
quencher16%
Total radiation thickness (x/XTotal radiation thickness (x/X00))
1st tracking plane 0.56 10-3
Air 0.16 - 0.72 10-3
2nd tracking plane 0.53 10-3
He bag 0.17 - 0.26 10-3
3rd tracking plane 0.48 10-3
Air 0.85 - 1.31 10-3
4th tracking plane 0.46 10-3
Total 3.2 - 4.2 10-3
Anticipated mass resolution (0.4 < M < 1.5) < 1 %
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FEM calculationsFEM calculations
Deformation of a Super-layer
Calculated deformation introduced to power frame before gluing
inside outside 00 layer
x: 3,0 mm 3,0 mmy: 0,1 mm 1,3 mm
200 layer x: 4,3 mm 1,2 mm y: 0,7 mm 2,1 mm
400 layer x: 4,6 mm 0,7 mm x: 1,3 mm 2,3 mm
400 layer + cathode plane x: 2,2 mm 1,1 mm y: 1,4 mm 1,8 mm
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SEM of wiresSEM of wires
Problems with the Quality of Wire
100 100 m, Elisenhm, Elisenhüütte, Germanytte, Germany bare aluminium (5056) not available in 80 mm
80 80 mm, California Fine Wire, USCalifornia Fine Wire, US bare Aluminium (5056) ultra finish, annealed
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R&D with prototypesR&D with prototypes
Choice of the Quencher
Advantage of I-butane long drift time plateau
Increased concentration higher primary yield stable operation
Various quenchersVarious quenchers
efficiency
60
80
100
1.5 1.7 1.9 2.1
Ucathode [kV]
[%
]
I-butaneethaneDME
time resolution
4
8
12
16
20
1.5 1.7 1.9 2.1
Ucathode [kV]
t [
ns]
60
70
80
90
100
110
1.4 1.6 1.8 2 2.2
Ucathode [kV]
[%
]
80:2070:3060:4050:50
efficiency time resolution
4
8
12
16
20
1.4 1.6 1.8 2 2.2
Ucathode [kV]
t [ns]
Quencher concentrationQuencher concentration
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R&D with prototypesR&D with prototypes
Simulation with GARFIELD
Intrinsic Resolution dominated by Primary Statistics
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R&D with PrototypesR&D with Prototypes
Test of different read-out versionsGas mixture: Helium/i-butane (60:40)Gas mixture: Helium/i-butane (60:40)
4,0
4,5
5,0
5,5
6,0
6,5
7,0
7,5
8,0
8,5
1,7 1,8 1,9 2,0 2,1
HV [kV]
t [
ns]
ELEX
MEPhI
LeCroy
drift time resolution
75
80
85
90
95
100
105
1,7 1,8 1,9 2,0 2,1
HV [kV]
efficiency
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R&D with prototypesR&D with prototypes
Effect of quencher concentration
4
6
8
10
12
14
16
1,4 1,6 1,8 2 2,2
HV [kV]
t [
ns]
80:20
70:30
60:40
50:50
60
65
70
75
80
85
90
95
100
105
110
1,4 1,6 1,8 2 2,2
HV [kV]
[ %
]
efficiencydrift time resolution
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Beam tests with PrototypesBeam tests with Prototypes
External tracking of 2.1 GeV protons
Chamber equipped with ASD-8 prototype board
Standard CAMAC TDC
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drift-time correlation of subsequent cellsdrift-time correlation of subsequent cells
Self tracking of 2.1 GeV protonsSelf tracking of 2.1 GeV protons
Intrinsic Resolution of the Chamber
Intrinsic resolution along drift path Intrinsic resolution along drift path
compared to Garfield simulation compared to Garfield simulation
Chamber behaviour quantitatively understood
Offset attributed to electronic noise
He-iC4H10 [60-40]
0
1
2
3
4
5
6
0 0.5 1 1.5 2 2.5 3
drift distance (mm)
t (
ns)
Measured
Simulated
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External tracking of 2.1 GeV protonsExternal tracking of 2.1 GeV protons
Constancy of the drift-time Fit with two straights Slight curvature disregarded
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People involved in the MDC project
R. Badura, H.Daues, W. Koenig, J. Hehner, J.Hoffmann, F. Schäfer, H.Stelzer, P.Zumbruch
GSI Darmstadt, Germany
S.Chernenko, O.Fateev, Yu.Gusakov, L.Smykov , Yu.Zanevsky
LHE of JINR Dubna, Russia
K.Bethge, C. Garabatos, W.Karig, Ch. Müntz, J.Stroth, J.Wüstenfeld
Univ. of Frankfurt, Germany
E.Atkin, Yu.Mishin, Yu.Volkov
MEPI Moscow, Russia
J-L. Boyard, Th. Hennino, A. Maroni, J. Peyre, J. Pouthas, V. Poux
IPN Orsay, France
W. Enghardt, F. Dohrmann, E. Grosse, M. Sobiella
FZ Rossendorf, Germany
D.Schall
TH Worms, Germany
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Read-out concept
mother board mother board
x 12
x 10
LV L 2 - local
LVL 2 -transferDT-bus
3U-VME
read-out controller
DMA unit
DTR
mother board
LVL 1 data LVL 3 dataLVL 2 data
mother board mother board
mother board
DTR
read-out controller
DMA unit
LV L 1
LV L 2
1.7G b/s
LV L1 differential bus
1.4 Mb/s
14 Mb/s
17 Mb/s 2.2 Mb/s
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R&D with prototypesR&D with prototypes
Ageing with X-rays (55Fe)
Expected charge doseExpected charge dose 10 mC/year no gain degradation within an equivalent of 2 years runningno gain degradation within an equivalent of 2 years running
0
0.2
0.4
0.6
0.8
1
1.2
0 10 20 30 40
Time (days)
rela
tive g
ain
.
rel_tst
rel_mon0.6
0.7
0.8
0.9
1
1.1
1.2
0 5 10 15 20 25
mC/cm
rela
tive g
ain
.
i = 6 nA/cm
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Read-out SystemRead-out System
Read-out and digitising of 2 Gbyte/sec
8 channel TDC-ASIC8 channel TDC-ASIC Working principle (TDC2001a)
Ring oscillator 220 ps binning, 14 bit range Zero conversion time Multi-hit (leading/leading,
leading/trailing edge) Customised read-out interface
Token driven Zero suppression on chip 22 bit parallel, 25 MHz
Technology NEC CMOS-8 (0.6 )
a Geiges et al. IEEE Trans. Nucl. Sci. 41 (94) 232
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Read-out SystemRead-out System
Placement of the front-end boards
Motherboard - daughterboard Motherboard - daughterboard combination mounted on frames.combination mounted on frames.
Daughterboard 16 channel preamp/shaper/discriminator Based on ASD-8
Motherboard 64, 96 channel version (8, 12 TDCs) Fully memory mapped to slow control Thresholds for ASD-8 Common or
Interface to ROC Differential (LVDS) Up to 20 Mbyte/sec
low power < 50 mW / channellow power < 50 mW / channel