a low power cmos bandgap voltage reference with enhanced...

A Low Power CMOS Bandgap Voltage Referencewith Enhanced Power Supply Rejection

Wenguan Li, Ruohe Yao * , and Lifang Guo

Fig. 1. (a) Circuits of conventional CMOS bandgap voltage reference. (b)PSR small signal analysis model of conventional CMOS bandgap voltagereference.

II. PSR ANALYSIS OF BANDGAP VOLTAGE REFERENCE

The base-emitter junction voltage of bipolar transistor, ingenerally the forward voltage of a pn-junction, exhibitsnegatives temperature-coefficient, which is about -1.5mVlaC[6], [7]. The difference between the base-emitter junctionvoltages of two bipolar transistors operating at differentcurrent density is directly proportional to the absolutetemperature, which exhibits positive temperature-coefficient[7]. A temperature stable bandgap voltage reference can beachieved by summing this two voltages having oppositetemperature-coefficients with proper weighting.

(b)(a)

The conventional opamp based CMOS bandgap voltagereference is shown in Fig.l. (a). PSR analysis of conventionalCMOS bandgap voltage reference can be performed based onits PSR analysis small signal model indicated in Fig. 1. (b).The output resistance of M1,2 is omitted to neglect the channellength modulation of the current mirror pairs in order to gainmore insight of the PSR performance. We can get the belowequations from Fig.l. (b).

Vg = A (132 Vb - 131vrej ) + AddVdd (1)

gml,2 (Vdd -vg )rQI = 13IVrej (2)

gml,2 (Vdd - vg )(rQ2 + RI ) = 132Vb (3)

Abstract - A low power low temperature-coefficientbandgap voltage reference features high power supplyrejection (PSR) for low dropout regulators (LDOs) ispresented in this paper. An optimized PSR enhance stage isinserted in opamp based CMOS bandgap voltage reference,which introduces supply spurious into the bandgap loop so asto maintain a constant gate-source voltage in the uppercurrent mirror; this improves the PSR performance about38dB. A prototype of the bandgap voltage reference isimplemented in TSMC 0.6J1m double poly, double metal,CMOS technology, occupying 0.07mm2 active silicon areas.The measured PSR are -82.8dB@ 50 kHz and -70 dB@100kHz, respectively; and, the supply current is 9J1A, thetemperature-coefficient is l Sppm/i'C at 2'"'-'5 V supply voltage,the line regulation is 54J1 V/V 1

I. INTRODUCTION

Since supply voltage is scaling down with the reducingthickness of gate oxide in modem CMOS technology and theincreasing demand for low power portable devices, thedynamic range of system is becoming much smaller. Spuriouscoming from the noisily power supply without adequatelyrejected will seriously degrade system performances,especially in RF applications [1]-[3]. So, LDOs with highaccuracy low temperature-coefficient have been used widelyin noise sensitive wireless transceivers [4] and ADCs [5]. Thepower supply rejection (PSR), which is a merit of LDOs'immunity against power spurious, is most important. Themaximum achievable PSR of LDOs is mostly limited by thePSR of voltage reference. Thus, the design of low-power lowtemperature-coefficient high PSR bandgap voltage referenceis becoming more and more important [2].

In this paper, the PSR of bandgap voltage reference isanalyzed in detail based on the corresponding PSR smallsignal model in section II. A low power, low temperaturecoefficient bandgap voltage reference features high powersupply rejection capability for LDOs application isdemonstrated in sectionIII. The experiment results andconclusion are given in sectionN and section V, respectively.

Index Terms - Bandgap voltage reference; Low power; Highpower supply rejection.

(5)

(4)Wenguan Li was with the School of Electronic and InformationEngineering, South China University of Technology, Guangzhou 510640China. And now is with Runxin IT Co., Ltd. Guangzhou, 510663 China.

Ruohe Yao is with the School of Electronic and Information Engineering,South China University of Technology, Guangzhou 510640 China.

Lifang Guo was with the School of Electronic and InformationEngineering, South China University of Technology, Guangzhou 510640China. And now is with Fremont Micro Devices Inc. Shenzhen 518057, China.

rQ1{31=-

rQ1 +R3

r0 2 +R1132 =-----

rQ2 +R1 +R2

Where, A=vg/vdifFGmdroub Add=vg/vdd=Gmddroutare the gain and

978-1-4244-3870-9/09/$25.00 ©2009 IEEE300

Authorized licensed use limited to: MIT Libraries. Downloaded on March 12,2010 at 18:00:23 EST from IEEE Xplore. Restrictions apply.

(6)

(8)

(7)

(9)

A. Temperature Compensation

The bandgap core consist of QI, Q2, MI, M2 and Rr-,R3. QI,Q2 are parasitic vertical PNP, the emitter size of Q2 is 8 timesthat of QI. R2 equals R3, MI and M2 form a current mirror.M3---M9, Rc and Cc form a conventional two-stage opamp,whose bias current is directly mirrored from bandgap core.The high gain opamp forces the nodes A and B to have thesame potential. Since QI and Q2, which have unequal sizes butequal emitter current, are biased at different current density.So a PTAT loop is formed in QI, Q2 and RI. The PTATcurrent IRI is given as

I = ~el - ~e2 = VT In(8)RI ~ R

1 1

Where, VT=kT/q is the thermal voltage. This current flowsthrough RI and R3, and, the bandgap reference voltage isgiven by

~ = ~el + IRlR2 = ~el + R2 ~,ln(8)R1

This reference voltage equals to the silicon energy-gap voltageI.2V [7]. In order to generate a suitable reference output forLDO application, which is capable of down to 1V outputvoltage, a resistance divider consist of R, and R, is added, CIis also added to reduce the noise of the reference, ~, R7, C2are used to balance the two branches in bandgap core. Theoutput reference after potential divider is given by

v;.e/ = R4 [~el + R2 VT In(8)]~4 +Rs ~l

Temperature compensation is achieved by appropriatechoosing RI, R2, R3 resistances ratio, which give:

a~ef = R4 [a~ell + IS In(8) aVT ] =0 (10)et R4 + Rs et T=T

rRI et T=T

r

In this design, RI---Rs are implemented in high poly resistor(HpolyR), the resistor ratio in (10) is temperature independent.So the negative temperature-coefficient of HpolyR has noeffect on the temperature-coefficient of the output referencevoltage, if they are appropriately sizing in design andmatching in layout.

B. PSR Enhance Mechanism

The PSR of the bandgap voltage reference is improved withthe PSR enhance stage [1], [8] consist of MIOand Mll . ThePSR enhance stage not only increase loop gain, but alsoeffectively feed the supply ripple into the PTAT loop, whichbenefits for PSR improvement as it has been stated insection II. Conventional PMOS input two-stage opampexhibits an excellent positive PSR [7]. So the ripple at theoutput of the opamp can be neglected, thus the PSR at nodeVg in mainly depends on the "diode-connected" PSR enhancestage, the "diode-connected" MIl has a low impedance ofI/gmll, where gmll is the transconductance of Mll . The PSR atnode vg is given by

VDD~------I

T I I

I II II I

M1 1104 M2 I'" M7 M I I

,1 I It- II- II- I II I

Vc Vg LM11

! M14~t- f-~~ M15-- ~ I

4J v,

IR5 R3 R2 R7 M3 M4

I

I~ ~I >---

~;:Vb If- ~I IVa

Vref M16 C310---<""'- .....-

Rc Cc M10If-

R1 I~ v«

C1 (2 M5rr1M II-

R4 Q~2(8)R6 I IM12I I

I I

± IPSR

I

Bancfgap I I

coreOpamp

~:~h!~:e_JStart up

Fig. 2. High PSR bandgap reference circuit implementation

PSR of the opamp, respectively. gml,2 is the transconductanceof MI,2. And, rQI, rQ2 are the small signal on resistance of QIand Q2, respectively. The PSR of the bandgap voltage can bederived from (1) - (5), and it's given by (6).

vref () 1- Add-- = gml,2 rQ1 + R3 ( )V dd 1+ gml,2 rQ2 +R1 A - gml,2 rQ1A

( )I-A'" r.i-vR dd

'" gml,2 QI 3 1 R A+gml,2 1

In (6), we note that the PSR of the reference voltage mainlydepends on the gain and PSR of the opamp. Increasingopamp's gain can improves the PSR of reference, which mayalso causes stability issues. As the gain of opamp decreaseswith the operating frequency, the PSR performance degradesin high frequency. So it's essential to increase opamp' s gainband width product (GBW) in order to get a wide band highPSR capability. We also note from (6), if the PSR of opamp is1 (eg. OdB), the second term in (6) is zero; the reference willhave a high PSR capability. That is to say, if the output ofopamp vg follows the ripple in the power supply, the gatesource voltages of Mj, M2maintain constant, since MI and M2is designed to have a long channel length in order to make thechannel length modulation effect small enough to be neglected,which is usually the case in current mirror based CMOSbandgap voltage reference, thus, the drain current of MI, M2remains constant even with supply ripple, so the bandgapvoltage reference has a high PSR performance. In conclusion,it's desirable that vg tracks the fluctuation in the supplyvoltage. The bandgap voltage reference shown in section II,which features high PSR, follows the above principles.

III. HIGH PSR BANDGAP VOLTAGE REFERENCE

The circuit implementation of the low power, lowtemperature-coefficient bandgap voltage reference withenhanced PSR is illustrated in Fig.2. The bandgap voltagereference consist of four sub-building blocks, including thebandgap core, opamp, PSR enhance stage and startup circuit.

301


below the supply voltage, both MI4 and MI5 are cutoff, thus,the power consumption of the startup circuits is zero afterstartup. MI6 is inserted to discharge C3 when supply is turneddown, in order to make sure properly startup next time.

IV. EXPERIMENTAL RESULT

A prototype of the bandgap voltage reference is fabricatedin TSMC 0.6flm, double poly, double metal CMOS process.The N/PMOS threshold voltage in this technology is 0.78Vand -0.98V, respectively. The microchip is illustrated in Fig. 4.The active silicon area is 0.07mm2

. The prototype is measuredwith HP4155A semiconductor parameter analyzer.

1111 11111 1I11111\

1'-- - - Conventional BG /'

-------f-- ---PSR ehanced BG -fII' ,~

'I'fII' /11,

- - ~~

V "/

~~

iD~ -80

n::~ -100

-20

-120

-40

Add = Vg = rd510 ~l=OdB (11)

Vdd l/gml l +rdsl O

As indicated in (11) that the ripple from the positive supplycan injected in node vg without being attenuated, so, vg

follows the supply ripple, the gate-source voltage of M I andM2 maintain constant although there is noisily ripple in thesupply. As it's mentioned in section II, this can improve thePSR of reference voltage. The simulated PSR of the bandgapvoltage reference comparing with conventional one are shownin Fig. 3. The PSR enhance stage improve PSR about -38dB.

o

-60

Fig. 4. Microchip of the bandgap voltage reference

Fig. 5. Output characteristic of the bandgap reference

389.6

1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0Vee (V)

--&-30 deg C

--e-60 deg C

~90degC

389.7

389.8

390.1

390.2

390.3

5' 390.0

5~ 389.9>

The temperature dependence of the bandgap reference isshown in Fig. 6. The output voltage variation in 0----100°Ctemperature range at different supply is less than 0.71mV. Thetemperature-coefficients at 2, 3, 4, 5V supply voltage arel Sppm/X', 14.3ppm/oC, 13.4ppm/oC and l-l.Oppm/X',respecti vely.

The output characteristic of the bandgap voltage referenceat different temperature is shown in Fig. 5. The resultindicated that the reference output regulates at supply voltagedown to 2V. The output voltage is 389.8mV at roomtemperature; and, the operating current at 100°C is 9flA,corresponds to 18flW power consumption at 2V supplyvoltage. The variation of output voltage for the supply voltagechange from 2 to 5V is 0.16mV; the corresponding lineregulation is 54flVIV.

C. Frequency Compensation

Opamp based current mirror which has both positive andnegative loops is used in PTAT loop, frequency compensationis required to make sure loop stability. As the outputimpendence of the PSR enhance stage is low, the pole at nodevg locate at high frequency which far beyond the unite gainfrequency (UGF) of the feedback loop. C, is utilized toachieve stability. The dominant pole locate at the output of thefirst stage, a nulling resistor R, is utilized to move the RHPzero to LHP and locate it just beyond the UGF to improvephase margin [7]. The pole at the output of opamp becomesthe first no-dominant pole. With the introduction of the PSRenhance stage, a smaller value of Cc is sufficient for stability,comparing the conventional one, due to the fact that thecapacitor at opamp's output is much smaller comparing to thecapacitor at node vs- A smaller Cc is desirable respect to fastline transient response and startup time. The simulated loopgain is 84dB; GBW and phase margin are 5.62 MHz, 69 0,

respectively.

D. Startup Circuits

A startup circuit is needed to driver the circuits to thedesired operating condition during power on [7]. The startupcircuit features zero power consumption is shown in Fig. 2.During power on, a current start to charge C3, current mirrorof MI4 charges the gate of Ml3 , and turned Ml3 on to pulldown node vg, injecting current into the bandgap core toguarantee successfully startup. After startup, MI2 is turned onthen Ml3 cutoff. When C3 is charged to a threshold voltage

Fig. 3. Simulated PSR of the bandgap voltage reference

-140

1.E+0 1.E+1 1.E+2 1.E+3 1.E+4 1.E+5 1.E+6 1.E+7

Frequency (Hz)

302


MPos: O.OOOs

Supply ripple @50klh

.J1.. eStop+

lOOXoU1putripple -- -82.8dB@50klh

TekMPos: O.OOOs.J1.. eStop+

Supply ripple @lOOklh

Tek

CMOS technology, occupying 0.07mm2 active silicon areas.The maximum supply current is 91lA; temperature-coefficientis 15ppm/°C at 2-5V supply voltage; line regulation is54IlV/V, PSR are -70 dB@100 kHz and -82.8dB@ 50 kHz,respectively. The bandgap voltage reference is suitable forlow power high PSR LDOs application.

--e--Vcc=2V---e--- Vcc=3V-A-Vcc=4V

-+-Vcc=5V

390.2

390.1

390.0

389.9

>5 389.8'+-

~

> 389.7

389.6

389.5

389.4

0 10 20 30 40 50 60 70 80 90 100

Temperture (deg C)

Fig. 6. Temperature dependence of the bandgap referenceM10.0ps M10.0ps

Fig. 8. Measured PSR at 100 kHz and 50 kHz

The distribution of output reference voltage by measuring25 samples without trimming @ O°C, 30°C, 100°Ctemperature and @ 2V, 3V, 4V, 5V supply voltagerespectively is shown in Fig. 7. The maximum, rrurnmum,mean and standard deviation value of output reference voltageare 398.4mV, 378.0mV, 388.4mV and 4.1mV, respectively.

35

REFERENCES

TABLE IPERFORMANCE SUMMARY OF THE BANDGAP REFERENCE

Measured Result

TSMC 0.6um DPDM CMOS2~5V

9~A

389.8mV15ppm/°C54~/V

[email protected]@100kHz

0.07mm2

Symbol

PSR

v.,Iddv.:

~Vref/~T

~Vref/~Vdd

Parameters

technologysupply voltagesupply currentoutput voltageTC@(O~100°C)Iine regulationpower supplyrejectionactive silicon area

VI. ACKNOWLEDGMENT

The authors would like to thank Fremont Micro Devices Inc.for the support in test chip fabrication. The authors would alsolike to thank Matthew.Ku and Richard.Tam for fruitfuldiscussions and encouragement.

[J mean Vref =388.4mV

sigma=4.1 mV

o

25

5

30

~~

~ 20oc0):::J 15c-O)

u: 10

V. CONCLUSION

A low power, low temperature-coefficient, high power PSRbandgap voltage reference is presented in this paper. It hasbeen implanted in TSMC 0.61lm double poly double metal

The PSR measurement result at room temperature isillustrated in Fig. 8. The upper tracks are 1V pick-to-pick sinesupply ripple appending on a 4V DC power supply with thefrequency of 100 kHz and 50 kHz, respectively; the lowertracks are the corresponded output reference ripple, which hasbeen amplified by a 40dB low noise amplifier. The pick-pickripple referred to the reference output is 3041lV@ 100 kHzand 721lV@ 50 kHz, the corresponding PSR are -70.3dB @100 kHz and -82.8dB@ 50 kHz, respectively.

Summary performances of the bandgap voltage referenceare tabulated in Table. 1.

-4 -3 -2 -1 0 1 2

Delta Vref I Average Vref (%)

Fig. 7. Bandgap output voltage distribution

3

[1] S. K. Hoon, S. Chen, F. Maloberti, 1. Chen, B. Aravind. "A Low Noise,High Power Supply Rejection Low Dropout Regulator for WirelessSystem-on-Chip Applications," IEEE Custom Integrated CircuitsConference, San Jose, pp. 759-762, September 2005.

[2] K. Tham and K. Nagaraj, "A low supply voltage high PSRR voltagereference in CMOS process," IEEE Journal of Solid-State Circuits, vol.30, pp. 586 - 590, May 1995.

[3] G. Giustolisi and G. Palumbo, "A detailed analysis of power-supplynoise attenuation in bandgap voltage references," IEEE Trans. CircuitsSys.- I, vol. 50, pp. 185-197, Feb. 2003.

[4] Jirou He ,Xiaoping Gao, Weilun Shen, Xiaofeng Yi, Yumei Huang,Zhiliang Hong, "A 2.4-GHz Fully CMOS Integrated Transmitter for802.11b Wireless LAN," IEEE proceedings of 6th InternationalConference on ASIC, pp. 381-384, October. 2005.

[5] Jian Li, Xiaoyang Zeng, Lei Xie, Jun Chen, Jianyun Zhang, and YaweiGuo, "A 1.8-V 22-mW 10-bit 30-MS/s Pipelined CMOS ADC for LowPower Subsampling Applications", IEEE Journal of Solid-State Circuits,vol. 43, pp.321-329, February 2008.

[6] Y. P. Tsividis, "Accurate analysis of temperature effects in Ic-VBEcharacteristics with application to bandgap reference sources," IEEEJournal of Solid-State Circuits, vol. 15, pp. 1076 - 1084, December 1980.

[7] P. R. Gray, P. 1. Hurst, S. H. Lewis, R. G. Meyer, "Analysis and DesignofAnalog Integrated Circuits (4th Edition)," New York: Wiley, 2001.

303


[8] S.K. Hoon, 1. Chen, F. Maloberti, "An Improved Bandgap Referencewith High Power Supply Rejection," IEEE Int. Symposium on Circuitsand Systems, Scottsdale, Vol. 5, pp. 833-837, May 2002.

304


a low power cmos bandgap voltage reference with enhanced...

Documents