ad9979_icx655aq schematics
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AD9979_ICX655AQ Schematics. - PowerPoint PPT PresentationTRANSCRIPT
AD9979_ICX655AQ Schematics
D5
H1A
D6
MCLK
C1322uF
D7
+1.8V_AVDD
MSHUT
C110.1uF
HL
C610.1uF
Note 1: D2 only use for 2-line addition mode. 2. All Power supply pins should have atleast one decoupling cap and placement should as close to the power pin as possible.There should NOT have any vias in between. 3. Used SINGLE ground with VDriver.
V2A
H1B
C400.1uF
C410.1uF
R111.2K
C51
1uF/35V
V2C
H2B
R5
0
R64.7K
U8
AD9979
31
35
73024
4344
36
4039
161720
28
38
46
18 64529
19 26
22
2123
25
474812345891011121314
32
3334
4142
27
37
15
CCDINP
REFT
DR
VD
D
AVD
D
RG
VD
D
VDHD
REFB
SCKSDI
H1H2H3
CLI
SL
DV
DD
HV
SS
DR
VS
S
DV
SS
AVS
S
HV
DD
IOV
DD
RG
VS
S
H4HL
RG
D0D1D2D3D4D5D6D7D8D9
D10D11D12D13
CCDINM
AVS
SAV
DD
GOP1GOP2
LDO
OU
T
LDOEN
NC
C570.1uF
VSUB
HL
VSUB_IN
D12
C604.7uF
Vdrver[0..7]
H2A
LDOEN
V3A
+15V
RN433
123
4
D3
C370.1uF
C560.01uF
D1
C230.1uF
+3.6VHVDD
C270.1uF
D1MA111
<Doc> V1.24
AD9979_ICX655AQ schematics
C
1 1Thursday, April 08, 2010
Title
S ize Document Number Rev
Date: Sheet of
C243.3uF
Q52SC4250
C580.1uF
SDI
V2B
C39
0.1uF
VD
RN333
12345 6
78910
R733
+15V
V3D
D4
H1B
SCK
R1312K
CLOCK[0..2]
D8
H2B
L2
FB
SL
R31M
U9
ICX655AQ
10987654321
23
22
20
21
15
171116 27
13
18
12
28
26
25
19
24
14
V1V2AV2BV2CV2DV3AV3BV3CV3DV4
H1B
H2B
H1A
H2A
VOUT
VD
D1VL
GN
D
GN
D
NC
RG
SUB
NC
VD
D2
NC
LH1A
NC
NC
H2A
HD
Q22SC4250
H1A
C20
0.1uF
+3.0V_VDD
R25
10K
-8.0V
Control[0..3]
SUBCK
D13
STROBE
RN133
12345678
161514131211109
V2D
C100.1uF
C434.7uF/6V
C210.1uF
C250.1uFD9
V3C
D2
C54
2200PF
C30.1uF
C550.1uF
D0
D2MA111
L1FB (800 Ohm@100MHz)
+15VC263.3uF
RN2331
234
8765
D11
V3B
C220.1uF
D[0..13]
SUBCK_IN
C10, C14 & C21 as closeto pin 30, pin 34, andpin 27 as possible(without vias)
C594.7uF
L3FB
D10
C340.1uF
C350.1uF
V4
V1
R4100K