advanced rf frontend technology using micromachined sige

Information Society Technologies (IST)

Programme

Shared Cost RTD Contract

"Advanced RF Frontend Technology using Micromachined SiGe"

(ARTEMIS)

Public Final Report

Prepared by Participant Date

Hermann Schumacher University of Ulm 30 December 2005

Jürgen Berntgen Atmel Germany GmbH

Katja Grenier CNRS-LAAS

Anders Rydberg University of Uppsala

Jaakko Lenkkeri VTT Electronics

Kjell Wallin SensysTraffic AB

Status Release

Final Public

Table of Contents

1.Executive Summary........................................................................ ......................3

2.Introduction...........................................................................................................5Global Project Goals....................................................................................................5The Consortium...........................................................................................................6

3.Specific Project Targets.......................................................................................7Technology Development............................................................................................7Demonstrators.............................................................................................................7

4.Project Results.................................................................................... ..................9Si/SiGe HBT Technology.............................................................................................9Post-Foundry Micromachined Components...............................................................10Packaging..................................................................................................................16Demonstrators...........................................................................................................23

5.Exploitation..........................................................................................................31

6.Conclusion and Outlook.....................................................................................33

7.References...........................................................................................................34

8.Acknowledgments..............................................................................................38

IST Project ARTEMIS (Contract No. 31065) Public Final Report

1.Executive SummaryARTEMIS – Advanced RF Frontend Technologies using Micromachined Si/SiGe – set out to demonstrate that inexpensive microwave modules, in this case for the 24 GHz ISM frequency band, can be fabricated using cost-efficient Si/SiGe technologies, com-bined with thick organic dielectrics and micromachining techniques. System considera-tions as well as packaging issues were to be included in the investigations.

The project reached the following major objectives:

• A Si/SiGe heterostructure bipolar transistor technology was optimized for applica-tions in the upper microwave and lower millimeter-wave range, reaching transit frequencies fT=50 GHz (BVceo=4 V) and fT=80 GHz (BVceo=2.5 V), with a maxi-mum frequency of oscillation fmax=80 GHz in both cases, despite relaxed lateral scaling rules. The demonstrated performance makes the technology particularly attractive for low-cost high-volume microwave products. This process (SiGe2RF) provided the technological platform for ARTEMIS.

• A backend micromachining process using benzo-cyclo-buthene (BCB) mem-branes was developed. It proved to be fully compatible with the SiGe2RF pro-cess. Design rules were developed for the combination of micromachined com-ponents with the SiGe HBT technology.

• Two promising applications were identified for the demonstrator – a short-range communications device using on-chip antenna structures, and radar modules for coupling to external higher-gain antenna structures. Following reviewers' sugges-tions, not only a pseudo-random bit sequence (PRBS) radar demonstrator for traffic control was targeted, but also an inexpensive Doppler radar module for speed measurements, motion detection, etc., with significant mass-market poten-tial.

As the PRBS radar system posed the most stringent performance requirements, it was used to guide architecture and specifications.

• The potential to realize highly complex integrated circuits for 24 GHz operation using SiGe HBTs was clearly demonstrated. Compact layout techniques (lumped-element reactances) further reduce chip cost. The importance of para-sitic coupling effects between tightly placed transistors (as well integrated bias decoupling networks for multi-functional ICs) was recognized and suitable design techniques were developed.

• In compliance with the different targeted application areas, several packaging techniques were investigated:

- LTCC ceramics for the traffic control radar demonstrator

- wafer-level packaging using a micromachined Si host wafer as an alternative to monolithic antenna integration

- glob-top encapsulation for chip-on-board mounting techniques

LTCC ceramics proved to be well suitable at 24 GHz, as was wafer-level packag-ing. The glob-top encapsulation was applicable even for chips containing large BCB membranes, but early failures during thermal cycling deserve further investi-gation.

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• Major functionality was demonstrated for the individual demonstrators:

- A Doppler RADAR demonstrator was demonstrated at the IST Event 2004 in Den Haag, including a microcontroller read-out unit.

- A fully integrated T/R module was tested on-chip, including on-chip antennas on a 1000 Ωcm substrate and was fully functional. It allows a chip-to-chip data communication at 66 Mbit/s over 2 m, using no external antennas – ideally suited for emerging ambient intelligence scenarios. The demonstrator using advanced on-chip antennas by backside micromachining had late problems with the metalization and will be finalized after the project.

ARTEMIS demonstrated the huge potential of highly complex Si-based MMICs for mass-market applications at 24 GHz and beyond. The consortium has positioned itself as a globally recognized leader in Si MMIC realization, as evidenced by many publica-tions, conference contributions and invited papers, such as at ISSCC 2005.

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2.Introduction

Global Project Goals

The proliferation of wireless systems in communications and sensing is a major charac-teristic of technological development over the last decades. With its increasing use in consumer products (mobile phones, WiFi, car safety systems), this trend is likely to con-tinue for many years to come. The concept of Ambient Intelligence, a major research goal of the 6th framework program, is likely to provide an additional thrust to short-range communication devices.

Yet, spectral over-crowding is already a problem in the lower frequency range (below 6 GHz) – presently most pronounced at 2.4 GHz, but already predictable in the 5-6 GHz frequency band. The move to higher frequencies is an obvious solution. An attractive band is the 250 MHz wide 24 GHz ISM1 band, which is available globally without specif-ic licenses.

Bringing systems utilizing the upper microwave range into consumer applications is pri-marily a question of reducing cost. Traditional hybrid construction techniques, using GaAs-based semiconductor technologies as well as special high-performance packag-ing and assembly techniques are too expensive.

Project ARTEMIS addressed the issue of reducing cost through the following measures:

• the use of an inexpensive Si-based technology, with relaxed lateral scaling, which can be produced very inexpensively in large quantities;

• micromachining techniques to combine specific microwave elements such as in-ductors with high quality factor and on-chip antenna structures with the Si-based semiconductor technology;

• design approaches for highly integrated front-end ICs operating at 24 GHz, with specific layout techniques substantially reducing the chip size vs. traditional MMIC solutions;

• suitable packaging techniques able to produce tightly integrated microwave sub-systems which can be implemented into systems without specific microwave knowledge.

While systems operating in the 24 GHz ISM band were used as the motivation for the project and such demonstrators guided the the technology development and evaluation, it has to be noted that the developed approaches are suitable for other applications in the upper microwave and well into the millimeter-wave range, such as emerging appli-cations for short-range vehicular radars at 76-81 GHz.

1 A band for Industrial, Scientific, Medical applications on a shared basis without guaranteed protection from interference

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The Consortium

The consortium consisted of the following partners:

The University of Ulm (Dept. of Electron Devices and Circuits), Ger-many, acted as the consortium coordinator and was engaged in semi-conductor device characterization, model development, and microwave circuit design for the demonstrators. An additional activity was in wafer-level packaging.

Atmel Germany GmbH, Germany, developed an advanced Si/SiGe HBT process with 0.8 µm minimum feature size and acted as the technology provider for the demonstrators. Atmel further collaborated on the mass-production compatibility of the micromachining process-es.

The Laboratoire d'Analyse et d'Application des Systèmes (LAAS) of CNRS, France investigated primarily the post-foundry micromachining of Si/SiGe wafers and the impact of these micromachining pro-cesses on critical device parameters.

The University of Uppsala (Dept. of Signals and Systems), Sweden, was responsible for the demonstrator architecture and IC design, as well as for the theoretical and experimental evaluation of micromachined pas-sive microwave structures.

VTT Electronics, Finland, was the responsible party for developing LTCC packaging solutions for multi-chip mod-ules at 24 GHz.

Sensys Traffic AB provided the background and implementa-tion expertise for the main demonstrator, a highly integrated PRBS RADAR for traffic telematics applications.

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3.Specific Project Targets

Technology Development

Atmel Germany GmbH, in 1998, introduced the world's first commercially available Si/SiGe heterojunction bipolar transistor technology. The devices feature a high Germa-nium mole fraction in the base which allows a high base doping concentration and as a result relaxed lateral scaling rules due to the very low base sheet resistance. It is the lat-ter property which makes the technology ideally suited as the base line for the ARTEMIS technology development, because it implies a superior cost efficiency even for devices capable of operating at millimeter-wave frequencies.

From early experiments performed by the University of Ulm group at 24 GHz with the Atmel SiGe1 technology (fT=fmax=50 GHz), it was concluded that for competitive perfor-mance the transistors for ARTEMIS should have at least a transit frequency (fT) and a maximum frequency of oscillation (fmax) of 80 GHz. Further, the technology should have three metalization layers and possess high-quality inductors and MIM capacitors. A spe-cial varactor module was considered highly desirable.

To reduce substrate losses in critical inductors, but especially in on-chip antenna ele-ments, a micromachining technology was to be developed capable of producing reliable passive components on free-standing dielectric membranes. As cost was the major is-sue, it was deemed important that such a micromachining process was applied fully af-ter the foundry process, without any modifications to the latter.

The effect of post-foundry micromachining on critical transistor parameters was to be evaluated. Special design rules had to be developed for the combination of microma-chined and conventional electronic components on one chip. A CAD component library describing both the traditional IC elements and the co-integrated micromachined struc-tures had to be developed.

As implementors of consumer-oriented products rarely want to deal with microwave components directly, including multifunctional ICs, suitable packaging strategies had to be developed and evaluated.

Demonstrators

Two overall applications were selected to guide the technology development:

• A short-range communication device capable of medium-bitrate data transmis-sion over at least 30 m. As one of the possible applications was seen in Smart-Card-like lightweight terminals, cost was the overruling factor here, favoring an-tenna structures either on-chip or on another very inexpensive substrate.

• A RADAR front-end using a pseudo-random bit sequence (PRBS) principle for use in vehicle classification and other traffic telematics applications. This demon-strator could use a more complex multi-chip package and high-gain antenna structures.

The short-range communication device was assumed to have relatively broad antenna patterns to facilitate alignment of receiver and transmitter, leading to an antenna gain of 5 dB over an isotropic radiator (5 dBi). The RADAR system, by contrast, needs a nar-

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row beam to provide the necessary angular resolution, leading to an antenna gain of at least 20 dBi.

Other boundary conditions were the limited bandwidth (250 MHz) of the 24 GHz ISM al-location, and the maximum effective isotropically radiated power (EIRP) of 100 mW (20 dBm).

This led to the following guiding specifications: the developed ICs should be capable of a system noise figure of 7.5 dB and a minimum output power of 4 mW (6 dBm). Higher output powers would be helpful for the short-range communication devices, but not ben-eficial to the RADAR demonstrator due to the inherent antenna gain and the EIRP limit.

A more detailed set of specifications were later defined in the project as part of archi-tectural considerations.

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4.Project Results

Si/SiGe HBT Technology

The critical improvements over the SiGe1 process, which led to the SiGe2RF process used within ARTEMIS, are as follows:

• The recessed LOCOS isolation technique used in SiGe1 was replaced by shal-low trench isolation (STI).

• The metal pitch was reduced from 5µm to 3µm.

• The lateral dimensions in the layout were substantially reduced, leading to an overall area reduction in the minimum-size npn transistor of 50%.

• The SiGe base layer was optimized for a lower base transit time τB to increase the overall transit frequency fT.

• The thickness of the epitaxial collector was reduced to improve the transit fre-quency fT (reduction of the collector transit time WC).

• The emitter structure was improved by using L-spacers (reduction of the effec-tive emitter width).

• Parasitics were substantially reduced to improve fmax to 80 GHz.

• Two bipolar transistor types were made available simultaneously on a single chip using selective collector implants – a high-voltage version with BVCE0 = 4 V and 50 GHz fT and a high-fT version with 2.5 V BVCE0 and 80 GHz fT.

Compared to SiGe1, three new types of devices (a high ohmic resistor made of Poly 2, a varactor diode and a MIM capacitor) have been implemented into SiGe2RF.

The MIM capacitor has a specific capacitance of 0.93 fF/µm², a slight reduction over the previous nitride capacitor with 1.1 fF/µm², but a substantially reduced series resistance.

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Fig. 1:Photographs of laser cut SiGe2-RF multi-project wafers (resized from 6“ to 4“ includ-ing flat) provided for LAAS.


The varactor provides a capacitance ratio C(0)/C(3 V)=2.3.

A complete design manual was issued for the SiGe2RF process, including a chapter on the inclusion of micromachined components, provided by partner CNRS-LAAS. Models are available for the CADENCE, ADS, and ELDO design platforms.

As an interesting side note, the 6” production wafers had to be reduced to 4” for the mi-cromachining experiments. This was successfully done using a laser cutting technique, see Figure 1.

Post-Foundry Micromachined Components

The purpose of the post-foundry micromachining process is the generation of compo-nents on thin dielectric membranes within the ICs, thus removing the substrate losses for critical components such as inductors and antennas. Another important effect is the reduction of the effective dielectric constant, thus increasing the parallel resonant fre-quency of inductors and improving bandwidth and radiation properties of on-chip anten-na structures.

One option is the use of an in-process dielectric (here, SiO2). This has been performed at LAAS on wafers received from the standard Atmel foundry process. As the wafers did not contain any special alignment marks for backside alignment, first a BCB pattern was aligned to the frontside features and then used for backside alignment. The cavity fea-tures were the defined on the back using thick photoresist and the Si substrate was se-lectively removed using deep reactive ion etching (DRIE).

Figure 2shows micrographs of micromachined inductor test structures.

The inductors demonstrated the expected improvement in quality factor, see Figure 3. The Inductance is also more constant over frequency, which is a result of the increase in the self-resonant frequency.

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Figure 2: Pictures of two integrated inductors after micromachining and a back side view


To create add-on dielectric membranes, e.g. to form larger free-standing membranes for antenna structures, several options were initially investigated. They will have to provide a low loss tangent, sufficient mechanical strength, and enough tensile strength after cur-ing to avoid drooping of the membrane. At the same time, the curing temperature must be sufficiently low not to deteriorate the performance of the electronic components, es-pecially the Si/SiGe HBTs with their highly strained SiGe base layer.

Benzocyclobuthene (BCB) was finally selected as the membrane material of choice be-cause it fulfills all of the above requirements. Especially, the curing temperature of 250°C is fully compatible with the preceding Si/SiGe IC process. Further, BCB is easy to apply and, in its photosensitive form, easy to pattern.

Figure 4 shows the principal steps of the process developed at LAAS.

The metalization on top of the BCB membrane are created using Au electroplating on top of a Ti/Au seed layer.

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Figure 4: Post-foundry backside micromachining process used to create membrane compo-nents

Figure 3: Inductance and quality factors of standard and micromachined Atmel inductors (L=0.6 nH)

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In Figure 5, a post-processed wafer with membrane structures is shown from the rear, while Figure 6 demonstrates some micromachined on-chip antenna structures.

At the University of Uppsala, several types of on-chip antennas have been evaluated both theoretically and experimentally. Figure 7 shows an overview. The emphasis of the work was to obtain physically small antenna structures with the highest possible radia-tion efficiency. The results are summarized in the following table.

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Figure 6: Pictures of various micromachined antennas: (left) a shortened dipole with meandered elements; (center) a slot-loop antenna; (right) a wire-loop antenna

Figure 5: Picture of a post processed wafer: back side with micromachined antennas, filters, and coplanar lines


Slot loop antenna

Wire loop antenna

Meanderdipole

Inverted-Fantenna

Patch antenna

Size (24 GHz) Trenches – die size 3.3x3.3 mm

Trenches -die size 3.6x3.6 mm

Membrane size

3.3x0.76 mm

Membrane size

2.6x0.9 mm

Thick BCB on Si

3.8x1.9 mm

Feed type

Impedance

Single-ended

100-200 Ω

Differential

75-100 Ω

Differential

75-100 Ω

Single-ended

50 Ω

Differential

50 Ω

Gain (dBi) 0-1 1-2 0 0 <7

Notes Circuits can be placed inside of footprint.

Circuits can be placed inside of footprint.

Sensitive to size of on-chip ground

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Figure 7: Investigated micromachined antennas. a: slot-loop antenna, b: wire-loop anten-na, c: halfwave-dipole, d: meander antenna, e: inverted F-antenna with cross-section (e*), f: patch antenna with cross-section (f*).


It can be seen that even at 24 GHz, the on-chip antenna structures may consume a chip area which is too large for some applications or technologies. The combination of anten-nas with circuits using wafer-level integration has hence also been evaluated and will be described in the next chapter, Packaging.

Another interesting finding was that for the full-wave slot and wire-loop antennas, the circuitry can be placed inside of the antenna footprint. If this is done, it is important that the channel stopper implant is connected to the antenna ground. The antenna ground-plane in conjunction with the p+-channel stopper forms a parallel-plate waveguide as shown in Figure 8. However if the p+-channel stopper layer in the active circuit can be connected with the finite ground plane of the antenna using via holes through the BCB dielectric it will restores a solid ground-plane in the center of the antenna and forces the normal component of the H-field at the semiconductor surface to be zero. This will sig-nificantly reduce the coupling at the current and voltage maxima by about 30 dB.

An important issue is the potential deterioration of the active devices by the microma-chining process. Of particular concern is the the deep reactive ion etching (DRIE) pro-cess. Potential effects of the mechanical strain induced by the added thick BCB mem-brane could also not be excluded a priori.

The investigations showed that no deterioration was observed provided that the spacing between the micromachined areas and the active transistor structures is 50 µm or more. As low-frequency noise is a parameter particularly sensitive to radiation damage and the creation of lattice faults, it was used to assess the micromachining-related damages, see Figure 9. Virtually no increase in the low-frequency noise spectral density is visible.

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Figure 8: Excitation of parallel-plate modes. b: E- and H-field configuration, with the an-tenna ground-plane connected to p+ circuit ground.


Static measurements (output I-V and Gummel plot) also showed no significant deterio-ration.

The BCB membranes also are very robust. A mechanical test has been performed at the University of Ulm on full-wave loop antennas on a BCB membrane for 24 GHz. The membranes were mechanically deflected and the necessary force recorded.

Figure shows the result of this experiment. Even after 1 million deflection, the mem-branes show no sign of mechanical fatigue – quite to the contrary, the membranes stiff-ness actually increases. The reason for this behavior is currently unknown.

The maximum deflection distance before membrane breakage was 1.5 mm – more twice the thickness of the substrate.

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Figure 9: Low frequency noise measurement of a test transistor on a pre-fabric-ated SiGe wafer with passive micromachined components on an add-on BCB membrane


It was hence concluded that the developed BCB and micromachining processes are ful-ly compatible with post-foundry processing. The BCB membranes are mechanically ro-bust and provide an interesting option especially for the integration of efficient on-chip radiators, especially in the millimeter-wave regime.

Packaging

In line with the two different intended demonstrators, two alternatives for packaging were investigated:

the possibility to use simple glob-top packaging even for chips containing mem-brane components, for cheap communications devices in smart-card-like applica-tions, and

low-temperature co-fired ceramic (LTCC) packaging for higher-value applica-tions, such as the traffic control radar frontend.

Additionally, a simple wafer-level packaging technique was evaluated as a low-cost al-ternative to the fully monolithic integration of antennas on chip

Several LTCC materials were investigated as to their performance potential at 24 GHz as well as cost. The Ferro A6S material was finally selected for the demonstrator.

The ICs of the demonstrators predominantly use differential port and circuit topologies to facilitate packaging, see below. A fully differential design creates an on-chip virtual ground and hence makes the in-package circuit performance very insensitive to com-

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Figure 10:Mechanical deflection experiment for a 24 GHz membrane loop antenna:nec-essary force vs. deflection distance


mon-node inductances in ground and power supply connections. However, as some of the antenna configurations considered have single-ended feed point configurations, a balun structure in LTCC was successfully designed and evaluated.

The design is shown in Figure 11. The LTCC material used in the design was Ferro A6S. The optimum frequency of operation was shifted from 24 GHz to 26 GHz in the ex-periment. The measured attenuation is 1,66 dB at 26 GHz, which means as low as 0,83 dB for each balun2. The impedance match is also good. The reflection attenuation is larger than 16 dB for both ports. The reason for frequency shift is probably in slight deviations of the actual dimensions from the dimensions used in simulations as well as in inaccuracy in the dielectric constants of the materials.

Because the radar application will use a planar antenna array with high gain fabricated on a PTFE-based printed circuit board (PCB), the transition between the LTCC package and the PCB is also critical.

Test structures were designed and manufactured to do RF testing for the signal path from PCB-LTCC interconnection point to the flip-chip joint pads. The test structure shown in Figure 12 includes pads to access directly the pads on the bottom surface of

2 Two baluns back to back were used in the characterization, which had to use a single-ended vector network analyzer.

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Figure 11: Balun structure in LTCC technology


the LTCC with coplanar wafer probes. Short microstrip through-lines are used in GSSG-configuration to emulate the LNA input of the RX-chip, but the testing can be done in back-to-back configuration.

This way the effect of the transitions can be defined as well as the insertion loss. The ef-fects of the Teflon based PCB substrate was taken into account by placing the test structure during measurements onto a 1.5 mm thick PTFE plate.

In simulation, the matching is better than -20 dB up to 34 GHz. Experimentally, match-ing is better than -20 dB up to 25 GHz and the insertion loss is better than -1.5 dB.

The thermal management of multi-chip modules also deserves attention. Here, a combi-nation of Si MMICs, LTCC package and PTFE PCB has to be considered. Figure 13 shows schematically the simulated arrangement and the LTCC module pad layout.

In the simulations, the MMIC was assumed to dissipate 758 mW of power. It has to be noted that the Si substrate as a drastically higher thermal conductivity (148 W/(m·K) at 300 K) than the Ferro A6S LTCC material (2 W/(m·K)) and the PTFE PCB (0.24 W/(m·K)). Because of the low thermal conductivity of the LTCC material, the em-bedded interconnect lines and the vias have a non-negligible effect on the heat flow. In the simulations, it was assumed that 5% of the LTCC volume are filled with metalization.

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Figure 12: Test structure used for signal path testing


It was shown that the thermal management can be significantly improved using LTCC vias immediately under the MMIC, instead of vias distributed around the edges. The dif-ferent layouts are shown in Figure 14.

Figure 15 shows the simulated temperature distribution. The significant improvement using “thermal” vias under the MMIC is clearly visible (the left picture). The maximum overtemperature in this case is 64 K, while it increases to 100 K for the version with pe-ripheral vias only.

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Figure 13: Cross section of the structure used in thermal simulations (left) and pad layout of the LTCC module (right).

Fixed T = 25 oC

SiGe MMIC

Teflon substrate

LTCC

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Figure 14: Two versions of interconnection structures with different via designs studied for thermal management of the LTCC modules.

L2:

L2:

Version 1:

Version 2:


The effects of underfill material were simulated for the case where there were no vias in the LTCC substrate. It was found that underfill material decreased the chip temperature by 34 oC when thermal conductivity of the underfill was assumed to be 1 W/mK. In the more realistic case with vias, however, the cooling effect of underfill materials is less pronounced.

Thermomechanical studies of completed test modules by thermal cycling revealed early failures of LTCC-to-PCB connections after approximately 400 cycles over the tempera-ture range -40 to +125 °C. The failures were located in the copper interconnects on the PTFE PCB, not in the solder joints themselves. The most likely reason for this behavior, which had not been predicted by simulation, is the thermal expansion coefficient mis-match between the LTCC modules and the PCB. By choosing a different PCB laminate, it is predicted that the connection can be stable for LTCC modules up to 10 mm in side length.

A simple glob-top encapsulation experiment was performed using a chip with a mem-brane-supported loop antenna, on top of a printed circuit board. The chip was then cov-ered with BCB by a simple pouring process. The membrane proved to be robust enough for this encapsulation process and the microwave properties of the BCB are adequate (albeit the antenna will be detuned by encapsulation, which has to be taken into account in the design), but thermal cycling revealed that again the thermal expansion mismatch is too large.

The temperature range for the cycling was between 30°C and 130°C. With the setup used values of resistance and the temperature can be measured simultaneously. In this case the measured resistance is the series resistance of the lines on the printed circuit board, the bond wires to the chip, and the metalization loop on the BCB membrane.

The results show that there is no degradation of the bond contact coming from the tem-perature induced stress between the cycles. However after 210 temperature cycles the

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Vias distributedon edges

Vias straightunder the chip

Figure 15: Results of thermal simulations with two different via designs. The heat distribution is shown for the plane at the bottom of the cavity in the LTCC module. The design in the left has the interconnection vias distributed on the edge areas (version 1 in Figure ) while the design in the right has straight connections from the bumps of the chip to the central pad under the mod-ule (version 2 in Figure ). Note that the maximum temperature of the plane is larger for the left picture compared to the right picture.


series resistance became infinite due to a burst of the membrane. Figure 16 shows the sample after the burst.

Besides the broken membrane, cracks starting at the edge of the chip can be seen. Compared to the color of the BCB before the temperature cycles the BCB got darker in-dicating oxidation of the BCB.

Despite the good electrical and mechanical properties of BCB it is not suitable for en-capsulations used in a harsh environment where temperatures up to 130°C occur. This is required for automotive applications. For smart card applications this is not an issue.

Finally, a wafer-level packaging process was developed at the University of Ulm, to combine compact SiGe ICs with membrane-based components. The technology used is very similar to the one described in the previous chapter in that it combines Silicon mi-cromachining using a DRIE process, BCB membranes for antenna structures and thick BCB on top of Silicon for low-loss interconnects.

The principal steps are shown in Figure 17. The host substrate is a standard Silicon wafer. First, a cavity is etched using an inductively coupled plasma (ICP) and a time-di-vision multiplexed etching technique. The depth and lateral geometries are matched to the chip to be embedded. In the next step, the IC is inserted and fixed using an epoxy adhesive. A BCB layer is spun on which planarizes the surface and acts as the interme-diate dielectric for the subsequent metalization step. Vias are formed in the BCB over the IC's contact pads. An aluminum metalization is sputtered on and structured by etch-ing, forming the interconnects and, in this case, also the antenna structure. A second BCB layer is applied for protection and to add mechanical stability; vias are formed in the second BCB layer over the contact pads.

This packaging method was validated through the construction of a small transmit mod-ule consisting of a SiGe HBT oscillator/buffer amplifier IC combined with a full-wave cir-cular loop antenna. Two versions were constructed for 24 GHz and 33 GHz.

A photograph is shown in Figure18.

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Figure 16: Broken BCB encapsulation over membrane antenna after 210 temperature cycles


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Figure 17: Wafer-level integration process

Figure 18: Micrograph of a microwave transmit module assembled by wafer-level inte-gration. The membrane diameter DM is 4.4 mm, the loop diameter DL is 3.3 mm for the 24 GHz version and 2.4 mm for the 33 GHz version.


Demonstrators

Aside from the technological goals, a major target of ARTEMIS was to demonstrate multifunctional ICs using Si/SiGe HBTs at 24 GHz, integrating the major functions of wireless transceivers on one or two chips.

The work started with investigations of individual function blocks:

a three-stage low-noise amplifier with 21 dB gain, a noise figure of 5.8 dB, and a reverse isolation in excess of 60 dB (Figure 19(a));

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(a) (b)

(c) (d)

Figure 19: Si/SiGe HBT MMIC functional blocks for the 24 GHz ISM band:

(a) three-stage low-noise amplifier

(b) quadrature downconverter with on-chip quadrature signal generation

(c) differential VCO

(d) 16:1 static frequency divider


a quadrature downconverter mixer with on-chip quadrature generation in a polyphase network, which has 3.6 dB of gain3 at a local oscillator power of +4 dBm and a -1 dB input-referred 1-dB compression point (Figure 19(b));

a fully differential voltage controlled oscillator with 8 dBm output power, tunable from 22.35 GHz to 24.75 GHz, with a single-sideband phase noise of -81 dBc at 1 MHz offset (Figure 19(c));

a static 16:1 frequency divider with an input sensitivity of -2 dBm at 24 GHz (Fig-ure 19(d)).

All of these test structures were successfully realized in the Atmel SiGe2RF technology and tested on-wafer.

Fully integrated 24 GHz receiver

After successful evaluation of the functional blocks, they were then combined into a fully integrated downconverter, whose chip micrograph is shown in Figure 20.

3 When measured single-endedly

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Figure 20: Fully integrated 24 GHz superheterodyne receiver IC


At a constant intermediate frequency of fIF = 200 MHz the receiver's conversion gain is 33 dB with a ±1dB gain variation over an RF range of 2.4 GHz (22.5 GHz-24.9 GHz). The conversion gain is well in accordance with the expected performance derived from the characteristics of the individual function blocks4.

The receivers conversion gain characteristics for a fixed LO frequency of fLO = 23.9 GHz shows a pronounced dependence on the IF frequency, which is caused by the on-chip IF low-pass filter characteristics. The 3 dB IF bandwidth of the conversion gain is 500 MHz, which corresponds well to the IF low-pass filters corner frequency of 470 MHz.

The receivers input-referred and output-referred -1 dB compression points have been determined to be -27.0 dBm and +5.6 dBm, respectively.

The IC consumes a DC power of 1 W from a 4 V supply.

Multifunctional ICs including micromachined structures

For the realization of demonstrator ICs including micromachined elements, the process flow depicted in Figure 21 was used. It is identical with the technology described earlier in this document, with the exception of an added electroplated via process before the top-layer BCB deposition.

This process has been used to fabricate e.g. the fully integrated transceiver structure shown in Figure 26. While all process steps have been validated, the final IC was not functional due to a problem with the BCB stripping and modifications in the foundry met-alization process. This will need further investigation.

4 Note that this gain also includes the gain of the IF buffer amplifier.

25

Figure 21: Post-foundry fabrication flow used in the final demonstrators including micro-machined components.

Si

SiGeSi

SiGe

SiSiGe

BCB

SiSiGe

BCB

Si

SiGeBCB

Thick photoresist

Si

SiGeBCB

DRIE

1. Back-side: substrate thining

5. Back side: Deposition of a thick

photoresist mask

6. Back side: DRIE

4. Front side: Electroplating

2. Front side: Via electroplating

3. Front side: Polymer lithography

Si

SiGe

Si

SiGeSi

SiGe

Si

SiGe

SiSiGe

BCB

SiSiGe

BCB

SiSiGe

BCB

SiSiGe

BCB

Si

SiGeBCB

Thick photoresist

Si

SiGeBCB

Si

SiGeBCB

Thick photoresist

Si

SiGeBCB

DRIE

Si

SiGeBCB

Si

SiGeBCB

DRIE

1. Back-side: substrate thining

5. Back side: Deposition of a thick

photoresist mask

6. Back side: DRIE

4. Front side: Electroplating

2. Front side: Via electroplating

3. Front side: Polymer lithography


As a backup solution for the fully integrated transceiver, a version had been derived from the monolithic superheterodyne receiver shown earlier in Figure 20, by adding an

26

Figure 23: Layout of the fully integrated 24 GHz transceiver IC including on-chip antennas (without micromachining – backup solution)

Figure 22: Fully integrated transceiver IC for 24 GHz with integrated antenna structures – left: frontside, right: backside view


additional buffer amplifier and transmit output terminals. This structure was combined with angled dipole antennas designed to operate above the standard Si substrate, with-out micromachining. The layout of the IC is shown in Figure 23 and was fully functional.

The backup transceiver solution has a power consumption of 1.24 W, the transmitter output power is 3.5 dBm at 1 dB compression. The antennas are simulated to have a loss of 1 dB over an isotropic radiator.

The circuit including antennas was tested by the University of Uppsala. To test the re-ceiver, the IC was irradiated by a 24 GHz source with a 0 dBm effective isotropically ra-diated power (EIRP) at a distance of 2 m and the signal-to-noise ratio was measured using a spectrum analyzer at the IF port.

A SNR = 28 dB was obtained for a 1 MHz resolution bandwidth (RBW), thus equivalent to a signal to noise power spectral density ratio S/N0 of 88 [dB Hz], where N0 = noise power for a 1 Hz unit bandwidth.

Assuming binary phase shift keying (BPSK) modulation and maximum allowed bit error rate BER = 10-5 as the reference case, the maximum noise limited bit rate for digital communication can be assessed.

Using Eb = energy per bit, T = duration of one bit and Rb = bit rate, the detected signal power can be expressed as:

S=Eb/T=Eb⋅Rb

Thus, the measured ratio between the received signal and the noise floor power spec-tral density can be rewritten as:

S /N 0=Eb⋅Rb/N 0=Eb/N 0⋅Rb=88dB Hz=1088/10=6.3⋅108HZ

For a uncoded bit error rate BER = 10-5 a minimum Eb/N0 = 9.5 is required if Gaussian noise can be assumed. Given the measured S/N0 a maximum noise limited bit rate of Rb = 66 Mbit/s can be calculated for the evaluated setup.

Since the received power, and thus also S/N0 and Rb, decreases with the square of the distance between transmitter and receiver the maximum noise limited bitrate supported by the link can be calculated for longer distances. At a distance of 32 m the received signal has decreased by 24 dB compared to the the evaluated setup. At this distance the maximum bitrate is 250 kbit/s for a 0 dBm EIRP transmitter. If a transmitter with the maximum allowed radiated power EIRP = 20 dBm is available a communication rate of 22.5 Mbit can be obtained at this distance.

This experiment clearly establishes the possibility of using fully integrated SiGe transceiver solutions in short-range communications applications at 24 GHz.

PRBS radar demonstrator

The work on the pseudo-random bit sequence demonstrator involved the design of the SiGe ICs and the design of the packaging, which includes IC to LTCC and LTCC inter-connects.

Major achievements have been as follows:

• A low-loss high-frequency LTCC balun has been designed to interface between sin-gle-ended RF connections on the printed circuit board (PCB) and the fully differential SiGe ICs.

27


• A low-loss AC-coupled LTCC-to-PCB transition was created.

• The design of subcomponents in IC form for a zero-IF receiver and transmitter archi-tecture demonstrates the feasibility of active sub-harmonic up- and down-conversion at 24 GHz.

• Receiver and transmitter have been fully monolithically integrated, with flip-chip pad placement for compatibility with both on- and off-chip antenna connections.

Multifunctional ICs for the PRBS radar receiver

For the higher performance requirements of the traffic control radar, a two-chip IC solu-tion for the 24 GHz was selected. The receiver and transmitter ICs are shown in Fig-ure 24 and Figure 25, respectively. Both ICs are fully differential and have an image-suppression I/Q architecture suitable for low-IF systems.

The ICs have demonstrated principal functionality. The receiver's optimum frequency range is too high, and the transmitter IC has poor performance due to an LO power which is too low. These issues will be addressed in a redesign.

28

Figure 24: Micrograph of the receiver IC for the PRBS demonstrator


Figure 25: Micrograph of the PRBS radar transmitter IC

An evaluation printed circuit board (Taconic TLC-30 with 0.5 mm thickness) has been fabricated by MultiCAD.

The complete LTCC module has been manufactured by VTT. The monolithically inte-grated receiver was flip-chip mounted on the LTCC, and then the LTCC module onto the PCB evaluation board. Additional SMD components have been added.

The PCB board with LTCC assembly attached is shown in Figure 26.

29

Figure 26: Finished evaluation board for the PRBS radar receiver


Demonstrator module concept

The demonstrator for the radar application was designed to have two LTCC modules, one for the transmitter and one for receiver circuitry. These were designed to be at-tached onto a PTFE (Duroid) substrate. The antennas (transmit and receive antennas) were placed on another substrate. The PTFE substrates (0.5 mm thick) were designed to be attached onto faces of a 5 mm thick aluminum plate and the antennas to be con-nected to the driver circuits on the other substrate by coaxial transmission lines passing through the aluminum block. Figure 27 shows the packaging concept of the demonstra-tor.

Each of the LTCC modules includes one RFIC-chip designed for flip chip joining onto the pads on LTCC substrate. The modules also contain balun components designed into the LTCC substrate.

30

Figure 27: Packaging concept of the radar demonstrator

T r a n s m i t A n t e n n a R e c e i v e A n t e n n a

T e f l o n s u b s t r a t e

0 . 5 m m

0 . 5 m m

L T C CT x R F I C

5 m m

T e f l o n s u b s t r a t e

A l u m i n i u m

B a l u n R x R F I C

O n - s u b s t r a t e c o m p o n e n t s( e g . p o w e r r e g u l a t o r )

C o a x i a l T L

M i c r o s t r i p T L

P r e s e n tS e n s y ss e n s o r


5.ExploitationThe Atmel SiGe2 process, whose development has been finalized within ARTEMIS, is commercially available through the Atmel Germany foundry service. The project provid-ed Atmel with valuable reference designs for the emerging 24 GHz market.

The combination of Si/SiGe HBT technology and micromachining, which has been demonstrated in the project for the first time, is being exploited by several partners after the end of the project, most notably LAAS, the University of Ulm, and the University of Uppsala. These three groups are part of the European Network of Excellence AMICOM, which targets RF MEMS and RF Microsystems (see www.amicom.info). The issues left open at the end of ARTEMIS are being actively pursued within AMICOM.

ARTEMIS was also an important foundation for the new European project RF PLAT-FORM, which is led by VTT and incorporates, among others, Atmel Germany, the Uni-versity of Ulm, the University of Uppsala, and Sensys Traffic. RF PLATFORM starts on January 1, 2006 and will provide a common European technology platform for RF mi-crosystems, including the technologies developed within ARTEMIS.

For Sensys Traffic, the project provided important input on how modern micromachining and assembly techniques can be used to make radar front-ends more compact and less expensive. This will significantly influence further system designs.

An important outcome of any research project involving academic institutions are stu-dent theses and doctoral dissertations. ARTEMIS substantially supported the following work::

• University of Ulm: Ertugrul Sönmez, doctoral thesis, “24 GHz Multi-Functional MMICs using SiGe HBTs”

• University of Ulm: Peter Abele, doctoral thesis, “Wafer-level integration technology using BCB as a dielectric and membrane” (

• VTT Electronics/University of Oulu: Eveliina Juntunen, master thesis, “Thermal Management and Thermomechanical Reliability of LTCC Package for 24 GHz band”

• University of Uppsala: Erik Öjefors, licentiate thesis, “Micromachined Antennas for Integration with Silicon Based Active Devices”

• University of Uppsala: Peter Lindberg, licentiate thesis

• CNRS-LAAS/University of Toulouse: Fouad Bouchriha, doctoral thesis, “Develop-ment of technological process for the integration of millimeter-wave microsys-tems”

The ARTEMIS project was presenting some of their results at the IST EVENT 2004 in The Hague.

Besides two posters explaining the topics of the ARTEMIS project a Doppler sensor and some samples of packaged on-chip antennas were exhibited, see Figure 28. The visitor of our booth coming from Universities, institutions, and industry were very interested in the scientific aspect of our work and the practical results. Especially visitors from the au-tomotive industry were interested in the SiGe-technology at 24 GHz but also the set up and packaging developed within the ARTEMIS project.

31

http://www.amicom.info/


32

Figure 28: Presenting ARTEMIS at the IST Event 2005 in The Hague: Ertugrul Sön-mez (left) and Peter Abele (right), both from the University of Ulm.


6.Conclusion and OutlookARTEMIS demonstrated the feasibility of microwave modules using a Si/SiGe HBT tech-nology, back-of-process micromachining techniques, wafer-level and LTCC packaging. While primarily automotive and traffic-control applications have been targeted within the project, the technologies developed can be applied in other areas as well.

Because recent European legislation on 24 GHz automotive radars makes this market smaller than expected and relatively short-lived, it is important now to explore the viability of the ARTEMIS approach in the 77-80 GHz band. Here, very advanced SiGe HBTs can still be used for most circuit functions (first results have been published), most likely with the exception of power amplification, which is hampered by the low breakdown voltages of high-fT Si/SiGe HBTs. Simple wafer-level integration technology, as demonstrated within ARTEMIS, could be a solution by allowing to embed a GaAs power amplifier into a SiGe transmit/receive module.

However, the lack of components commercially available at low cost will likely prevent a rapid transition to 77-77 GHz, and hence the market volume at 24 GHz for automotive ap-plications can be expected to grow over the next year.

It is already visible that future functionalized environments which can make the Ambient In-telligence vision a reality will be high decentralized, with exclusively wireless data ex-change between simple autonomous network nodes integrating sensor, communications and relatively simple data processing functionality, such as in the UC Berkeley "smart dust" concept.

Due to the emphasis on low-cost, manufacturable technologies, the ARTEMIS approaches are well suited to such an environment: they allow for low-cost RF front-ends with tightly integrated antenna structures, at microwave and millimeter-wave frequencies. Further, the packaging concepts (LTCC and especially wafer-level integration) allow the combination of different materials in a small volume and with well-controlled parasitics. For example, the combination of a DNA-sensing and data-processing CMOS chip with a mm-wave RF front-end and an antenna can be readily performed with the technology developed.

From a packaging point of view, system-on-package concepts in the microwave regime using LTCC will have performance benefits, but will compete with plastic packaging con-cepts, especially in the lower GHz range. There is also a need for very inexpensive pack-aging techniques on flexible substrates and using glob-top encapsulation, but this will be restricted to simple (mostly single-chip) systems.

The consortium is hence confident that within ARTEMIS, a truly enabling technology has been developed which will be put to good use in future research projects as well as indus-trial applications.

33


7.ReferencesThe following papers and conference contributions resulted from the project during its duration:

1. P. Abele, E. Sönmez, K.-B. Schad, U. König, and H. Schumacher, “A Wafer Level Integration Technology for On-Wafer Antennas and Microwave Components”, Int. Solid State Circuits Conference, San Francisco, CA, Feb. 6-10, 2005 (invited, spe-cial evening presentation)

2. H. Schumacher, P. Abele, E. Sönmez, K.-B. Schad, and A. Trasser, “Low-cost Cir-cuit Solutions for Micro- and Millimeter-Wave Systems using Commercially Avail-able SiGe Technologies”; 1st International SiGe Technology and Device Meeting (ISTDM), Nagoya, Japan, 14.-17. January, 2003 (invited)

3. P. Abele, J. Konle, D. Behammer, E. Sönmez, K.-B. Schad, A. Trasser, and H. Schumacher, “Wafer Level Integration of a 24GHz and 34GHz Differential SiGe-MMIC Oscillator with a Loop Antenna on a BCB Membrane”, Proc. International Mi-crowave Symposium (IMS), Philadelphia, Pennsylvania, USA, June 8-13 2003

4. P. Abele, A. Trasser, K.-B. Schad, E. Sönmez, and H. Schumacher, “A 32GHz SiGe-MMIC Single Chip Oscillator and Mixer for use in a Doppler Sensor”, 3rd ESA Workshop on Millimetre Wave Technology and Application, Espoo, Finland, May 21-32 2003

5. P. Abele, K.-B. Schad, E. Sönmez, A. Trasser, U. König, and H. Schumacher, “On Wafer Antennas and Lines for a Wafer Level Integration Technology”, MEM-SWAVE, Toulouse, France, July 2003

6. P. Abele, E. Öjefors, K.-B. Schad, E. Sönmez, A. Trasser, J. Konle, and H. Schu-macher, “Wafer Level Integration of a 24GHz Differential SiGe-MMIC Oscillator with a Patch Antenna using BCB as a Dielectric Layer”, Proc. European Microwave Con-ference (EuMC/EMW), Munich, Germany, pp. 293-296, 6.-10. October 2003

7. P. Abele, A. Trasser, K.-B. Schad, E. Sönmez, and H. Schumacher, “Compact SiGe-MMIC Doppler sensor operating at 31-32GHz, International Radar Sympo-sium (IRS), Dresden, Germany, 2003

8. Hermann Schumacher, Peter Abele, Ingmar Kallfass, Kai-Boris Schad, and Ertugrul Sönmez, “Microwave and Millimeter-Wave Circuits using Si/SiGe HBTs and HFETs”; International Workshop on the Physics of Semiconductor Devices (IWPSD 2003), Chennai, India, Dec. 16-20, 2003 (invited)

9. H. Schumacher, P. Abele, J. Berntgen, K. Grenier, J. Lenkkeri, P. Lindberg, E. Öje-fors, R. Plana, W.-J. Rabe, A. Rydberg, E. Sönmez, and K. Wallin, “Compact, low-cost 24 GHz modules using micromachined Si/SiGe HBT technology”; 13th IST Mo-bile and Wireless Communications Summit, 27-30 June 2004, Lyon, France

10.H. Schumacher, K.-B. Schad, E. Sönmez, P. Abele and A. Trasser, “SiGe HBT Components for Cost-Efficient T/R Modules”, International Microwave Symposium, Ft. Worth, TX, June 7-11, 2004, Workshop on Active Antennas (invited)

11.P. Abele and H. Schumacher, “On-Wafer Loop and Patch-Antennas for a Wafer Level Integration Technology”, MEMSWAVE, Uppsala, Sweden, 2004

34


12.P. Abele, A. Trasser, K.-B. Schad, E. Sönmez, and H. Schumacher, “Compact Doppler sensor operating at 31-32GHz using a SiGe HBT MMIC and patch anten-nas”, Proc. SiRF Meeting (IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems), Atlanta, GA, USA, September 2004

13.P. Abele, A. Trasser, E. Sönmez, K.-B. Schad, A. Munding, and H. Schumacher, “A Compact Low-Cost Doppler Sensor MMIC in SiGe Technology for the ISM Band at 24GHz”, Proc. European Microwave Conference (EuMC/EMW), Amsterdam, Netherlands, October 2004

14.E. Sönmez, A. Trasser, K.-B. Schad, P. Abele, and H. Schumacher, „A single -chip 24GHz receiver front-end using a commercially available SiGe HBT foundry pro-cess, Proc. of Radio Frequency Integrated Circuits (RFIC) Conference, Seattle, USA, pp. 159-162, 2.-4. June 2002

15.E. Sönmez, P. Abele, K.-B. Schad, A. Trasser and H. Schumacher, „Prospects for MEMS-like technologies in microwave and millimeter wave systems,“ Microma-chined Circuits for Microwave and Millimeter Wave Applications (MEMSWAVE), Heraklion, Greece, 26.-28. June 2002

16.E. Sönmez, A. Trasser, P. Abele, F . Gruson, K.-B. Schad, and H. Schumacher, „24GHz High Sensitivity Downconverter using a commercial SiGe HBT MMIC Foundry Technology,“ Proc. of SiRF Meeting (IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems), Grainau , Germany, pp. 68-71, 9-11 April 2003

17.F. Gruson, P. Abele, K.-B. Schad, E. Sönmez, and H. Schumacher, „24GHz Differ-ential SiGe-MMIC Oscillator with Integrated Mixer,“ IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, Grainau, Germany, pp. 60-63, April 9-11 2003

18.E. Sönmez A. Trasser, P. Abele, K.-B. Schad, and H. Schumacher, „Integrated re-ceiver components for low-cost 26GHz LMDS applications using an 0.8μm SiGe HBT technology,“ Proc. of European Microwave Conference (EUMC/EMW), Mu-nich, Germany, pp. 399-402, 6-10 October 2003

19.Sebastien Chartier, Ertugrul Sönmez, and Hermann Schumacher, „24 and 36GHz SiGe HBT Power Amplifiers,“ Proc. SiRF Meeting (IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems), Atlanta, Georgia, USA, pp. 251-254, 8-10 September 2004

20.Ertugrul Sönmez, Sébastien Chartier, Peter Abele, Andreas Trasser and Hermann Schumacher, “Sensitivity Matched Static Frequency Divider Using A 0.8 mm SiGe HBT Technology,” German Microwave Conference, Ulm, Germany, 5-7 April 2005

21.Ertugrul Sönmez, Sébastien Chartier, Andreas Trasser and Hermann Schumacher, “Isolation Issues in multifunctional Si/SiGe ICs at 24 GHz”, International Microwave symposium (IMS) 2005 , Long Beach, California, USA, 12-17 June 2005

22.E. Öjefors, A. Rydberg, M. Lindeberg, K. Hjort, On the integration of a compact 24 GHz antenna into a commercial SiGe process”; 3rd Workshop on MEMS for mil-limeterwave communications (MEMSWAVE), Heraklion, Greece, 26-29 June, 2003

23.E. Öjefors and A. Rydberg, Integration of a 24 GHz slot loop antenna in a commer-cial SiGe process; Antenna 03, 13-15 May 2003, Kalmar, Sweden

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24.E. Öjefors, F. Bouchriha, K. Grenier, and A. Rydberg, Millimeterwave antennas for integration into a commercial SiGe process; European Conference on Wireless Technology 2003, Munich, Germany, 6-10 October, 2003

25.F. Bouchriha, K. Grenier, D. Dubuc, P.Pons, and J.Graffeuil, Coplanar passive cir-cuits on Silicon surface machined and thick polymer layers for millimeterwave appli-cations; European Microwave Conference, Munich, Germany, October 6-10, 2003

26.26. K. Grenier, F. Bouchriha, D.Dubuc, P.Pons, R.Plana, and J. Graffeuil, Minimiza-tion of passive circuit losses realized on low resistivity Silicon using micromachining techniques and thick polymer layers; International Microwave Symposium, Philadel-phia, PA, June 2003

27.F.Bouchriha, K.Grenier, D.Dubuc, P.Pons, J.Graffeuil, R.Plana, Novel technological solution to improve both Q factor and losses of passive circuits on low resistivity sili-con, IV Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, Garmisch, Germany, April 9-11, 2003

28.K. Grenier, Polymers for high frequency electronics, invited paper at the Devices and applications session at the12th European Workshop on Heterostructure Tech-nology, San Rafael, Segovia, Spain, October 12-15, 2003

29.29. K.Grenier, V.Lubecke, F.Bouchriha, L.Rabbia, D.Dubuc, P.Pons, R.Plana, Poly-mers in RF and millimeterwave applications, invited paper at the RF/Integrated Cir-cuits session at the 1st Symposium on Microtechnologies for the New Millenium 2003, Conference 'Smart Sensors, Actuators, and MEMS', Maspalomas, Gran Ca-naria, Spain, May 19-21, 2003

30.V. Dudek, J. Berntgen, P. Maier, M. Tortschanoff, W. Kraus, DC- and RF-perfor-mance of a cost-effective SiGe technology; 1st International SiGe Technology and Device Meeting, Nagoya, Japan, January 15-17, 2003 (invited) – also appeared in Applied Surface Science

31.J. Lenkkeri, T. Jaakola, K. Kautio, M. Lahti (VTT Electronics), P. Collander (Digipo-lis, Kemi, Finland), Prospects and limits of LTCC technology, IMAPS Nordic, September 26-28, 2004, pp. 108-114

32.R.Valois, D. Baillargeat, S. Verdeyme, M. Lahti, T. Jaakola, High Performances of Shielded LTCC Vertical Transitions from DC Up to 50 GHz, European Microwave Conference, October 11-15, 2004, Amsterdam, The Netherlands, pp. 537-540

33.V. Kondratyev, M. Lahti, T. Jaakola, LTCC Band-Pass Filter for Transmitter / Re-ceiver Modules, European Microwave Conference, October 11-15, 2004, Amster-dam, The Netherlands, pp. 401-404

34.K. Grenier, L. Mazenq, E. Ojefors, P. Lindberg, A. Rydberg, J. Berntgen, W.-J. Rabe, E. Sönmez, P. Abele, H. Schumacher, R.Plana, MEMS above IC Technology applied to a compact RF module, invited paper to the SPIE Microtechnologies for the New Millennium 2005 conference, Sevilla, Spain, 9-11 May 2005

35.K. Grenier, D.Dubuc, L. Mazenq, J-P. Busquère, B. Ducarouge, F.Bouchriha, A. Rennane, V. Lubecke, P.Pons, P. Ancey, R.Plana, Polymer based technologies for microwave and millimeterwave applications, invited paper to the 50th IEEE Interna-tional Electron Devices Meeting, San Francisco, USA, 13-15 December 2004

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36.D.Dubuc, K. Grenier, M.N. Do, J-P. Busquère, A. Coustou, B. Ducarouge, S. Melle, L. Mazenq, F.Bouchriha, P.Pons, R.Plana, 3D MEMS circuits integration for RF and millimeter-wave communications, invited paper to the CAS International Semicon-ductor Conference, Sinaia, Romania, 4-6 October 2004

37.K. Grenier, D.Dubuc, J-P. Busquère, F.Bouchriha, A. Rennane, P.Pons, R.Plana, Interests of polymers in RF MEMS applications, invited paper to the 5th Workshop on MEMS for Millimeter Wave communications, Memswave 2004, Uppsala, Swe-den, 30 June - 2 July 2004, G2 – G5

38.JP Busquère, N. Do, F.Bouchriha, P.Pons, K. Grenier, D.Dubuc, A. Boukabache, H.Schumacher, P. Abele, A. Rydberg, E; Ojefors, P. Ancey, G; Bouche, R.Plana, MEMS SiGe Technologies for Advanced Wireless Communications, IEEE Radio Frequency Integrated Circuits Symposium, RFIC’04, USA, June 2004, MO4D-1, pp. 247-250

39.E. Öjefors and A. Rydberg, "Design and cross--talk simulations of on-chip antennas for integration in a SiGe process", 4th Workshop on MEMS for Millimeterwave Com-munications (MEMSWAVE), 2 - 4 July 2003, Toulouse, France

40.E. Öjefors, F. Bouchriha, K. Grenier, A. Rydberg, "24 GHz ISM-band antennas on surface micromachined substrates for integration with a commercial SiGe process," European Conference on Wireless Technology 2003, Munich, Germany, 6-10 Octo-ber, 2003

41.E. Öjefors and A. Rydberg "LTCC and glob and glob top packaging for 24 GHz MMIC with integrated antennas," GigaHertz2003, Linköping, Sweden, 4-5 Novem-ber, 2003

42.P. Lindberg, E. Öjefors and A. Rydberg, "A SiGe 24 GHz zero-IF downconverter," GigaHertz2003, Linköping, Sweden, 4-5 November, 2003

43.E. Öjefors and A. Rydberg, "Micromachined 24 GHz Antennas on Low Resistivity Silicon, 5th Workshop on MEMS for Millimeterwave Communications (MEM-SWAVE), 30 June – 2 July 2004, Uppsala, Sweden

44.P. Lindberg, E. Öjefors, E. Sönmez and A. Rydberg, "A SiGe HBT 24 GHz Sub-Harmonic", IEEE Topical Meeting on Si Monolithic ICs in RF Systems, Atlanta, Georgia, USA, 2004

45.E. Öjefors, F. Bouchriha , K. Grenier, A. Rydberg and R. Plana, "Compact Microma-chined Dipole Antenna for 24 GHz Differential SiGe Integrated Circuits", European Microwave Conference 2004, Amsterdam, Holland, 11-15 October, 2004

46.A. Rydberg, "Towards MEMS-based radar", presented at the AMICOM workshop at the European Microwave Conference 2004, Amsterdam, Holland, 11-15 October, 2004

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8.AcknowledgmentsThe project participants gratefully acknowledge the support of the European Commis-sion for the financial support which made ARTEMIS possible.

The project monitoring by the project officer, Mr. Thomas Reibe, and the expert review-ers by Professor Thomas Brazil and Dr. Jean-Louis Cazaux has been exceptionally supportive. Their critique and suggestions have had a tremendous impact on ARTEMIS and its success.

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advanced rf frontend technology using micromachined sige

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