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Second Level

Third Level

– Fourth Level

Fifth Level

June 6, 2016

AFDX

From Component to Application

2

Overview

Technology background

MEN products

Sample applicationsEngines

Cabin

Fuel&LG

Energy

Flight

Control

AESU1

EEC1

EEC2

FCSC1 FCSC2FCGC2

FCGC3

SFCC2SFCC1

FCGC1

FW2FCDC2

FW1FCDC1

AESU2

ACR2

SCIELMCBMSB24

Fuel FuelLG,TP&BS

CIDS CIDS

LG,TP&BS

SCI

CPIOM-A-1&2

PESC

SPDB

IPCU

SPDB

VSCPWCU

DSMC1&2DSMC3

ext lights ctrl

IPCU

ECB

HSMAIC?

HSMAIC?

FCSC3

CDAM

ATC2

EEC3

EEC4

ADIRU1 ADIRU1FM1 FM1

FM3

ELMCBMSB24

CPIOM-B-1&2 CPIOM-A-3&4 CPIOM-B-3&4

COM MON

COM MON COM MON

COM MON COM MON

COM MON COM MON

COM MON

S_1_2

IOM

S_1_1

S_1_3

BA

AB

C1 R1R2

opt

IOM

ADIRU3

L1 L2

L3

Cockpit

AB

BA

ACR1 ATC1

S_2_1

IOM IOM

S_3_1

COM MONCOM MON

IRDO

S_3_2

COM MONCOM MON

IRDO

S_4_1 S_4_2

C2 R3

S_2_2

AFDX and its Role in Avionics

AFDX Switch

Sub SystemSender

AFDX

End System

Sub SystemRecipent

AFDX

End System

Sub SystemRecipent

AFDX

End System

Sub SystemRecipent

AFDX

End System

Avionic Full Duplex Switched Ethernet (Airbus patent)

Communication backbone of modern aircraft

Based on IEEE 802.3 standard (Ethernet technology)

Virtual Link communication

Deterministic timing

Guaranteed bandwidth

Physical redundancy

Standardized as

ARINC664 Part7

Virtual Links Replace ARINC-429

AFDX

End System

AFDX

End System

AFDX

End System

Rx

Buffer

AFDX Switch

Rx

Buffer

Tx

Buffer

Tx

Buffer

Rx

Buffer

Tx

Buffer

Processing

Unit

Configuration Forwarding Table

VL Bandwidth Policy

Rx

Buffer

AFDX Switch

Rx

Buffer

Tx

Buffer

Tx

Buffer

Rx

Buffer

Tx

Buffer

Processing

Unit

Configuration Forwarding Table

VL Bandwidth Policy

506.06.2016

AFDX – Avionic Full-Duplex Switched Ethernet

Avionic Full Duplex Switched

Ethernet (ARINC664 Part7)

Virtual Link communication

Physical redundancy

E/S

A

VLs

B

VLs

A

B

E/S

Network

A

Network

B

606.06.2016

AFDX – Avionic Full-Duplex Switched Ethernet

sent frame delayed by bandwidth limitation delayed by determinism

Bandwidth

Allocation Gap

BAG BAG BAG

End System

Application VL

AFDX VL

Traffic Shaping

Avionic Full Duplex Switched

Ethernet (ARINC664 Part7)

Guaranteed bandwidth (BAG)

Deterministic timing (jitter)

MEN CS1 – AFDX Functions in FPGA

7

AFDX functionality integrated in a Flash

based FPGA

SEU (Single Event Upset) resistant

Onboard AFDX protocol stack

implementation

Certifiable up to DAL-A

Host driver with ARINC-653 compliant

port API

Integrated SNMP/ICMP support

CS1

06.06.2016

CS1 – Software Support

8

Read File Parse ContentWrite to buffer

Generate Bin file

XML BINMemory offsets

Sample Device Driver

Linux

ARINC 653 API

AFDX Configuration Tool

Support

Convert AFDX Network

Configuration to binary

Sample

Device Driver

Source Code, Linux

CS1 – Safety Measures

9

Systematic Capability

Development Process DAL-A

Soft Error Protection

Flash based FPGA

Tripled Registers(DAL-A)

RAM ECCPCI Transfer

Protection

HW Error Detection

POST

Voltage, Temperature,

Clock Supervision (On

Board)

Undetected

Erroneous Behavior

at End System Level

3.03 ·10-9F/H

(3.03 FIT)

10

MEN P522 – Evaluation Platform

On PMC for VME and

CompactPCI Systems

Two full duplex AFDX networks

Onboard AFDX End System

protocol stack implementation

Interoperable with Airbus and

Boeing

DAL-D certifiable FPGA

implementation

Onboard CPU for SNMP and ICMP

traffic

Host driver with ARINC-653

compliant port API

-40 to +85°C with qualified

components

1106.06.2016

AFDX End System Component Overview

Avionics Computer (LRU)

Host

ComputerHNI

Digital Inputs:

DI

MEN CS1:

AFDX Protocol Engine

MEN P522: AFDX End System PMC

MEN CS1:

AFDX Protocol Engine

TX Buffer

Memory:

SSRAM

RX Buffer

Memory:

SSRAM

AFDX

Configuration

Flash: SPI

Ethernet

Phy A

Ethernet

Phy B

Trans-

former A

Trans-

former B

Local PSU, Clock

Generation and

Board Monitoring

AFDX

Ethernet B

Host

Interface:

PCI32

AFDX

Ethernet A

1206.06.2016

AFDX End System Protocol Overview

PCB

LRU End

System

UDP

IP-Layer

MAC-Layer

FPGA

Physical Layer

HNIOS

P522

Applications

SW

CS1

HW/FPGA implemented Protocols

UDP (FPGA logic), CS1

IP layer (FPGA logic), CS1

MAC layer (FPGA logic), CS1

Physical layer (PCB), P522

SW Support

SNMP (FPGA ARM M3)

ICMP (FPGA ARM M3)

Host Node Interface (Linux

example)

Low-level driver

API (ARINC 653)

13

A380 Sample AFDX Network

Engines

Cabin

Fuel&LG

Energy

Flight

Control

AESU1

EEC1

EEC2

FCSC1 FCSC2FCGC2

FCGC3

SFCC2SFCC1

FCGC1

FW2FCDC2

FW1FCDC1

AESU2

ACR2

SCIELMCBMSB24

Fuel FuelLG,TP&BS

CIDS CIDS

LG,TP&BS

SCI

CPIOM-A-1&2

PESC

SPDB

IPCU

SPDB

VSCPWCU

DSMC1&2DSMC3

ext lights ctrl

IPCU

ECB

HSMAIC?

HSMAIC?

FCSC3

CDAM

ATC2

EEC3

EEC4

ADIRU1 ADIRU1FM1 FM1

FM3

ELMCBMSB24

CPIOM-B-1&2 CPIOM-A-3&4 CPIOM-B-3&4

COM MON

COM MON COM MON

COM MON COM MON

COM MON COM MON

COM MON

S_1_2

IOM

S_1_1

S_1_3

BA

AB

C1 R1R2

opt

IOM

ADIRU3

L1 L2

L3

Cockpit

AB

BA

ACR1 ATC1

S_2_1

IOM IOM

S_3_1

COM MONCOM MON

IRDO

S_3_2

COM MONCOM MON

IRDO

S_4_1 S_4_2

C2 R3

S_2_2

14

AFDX Application – Aircraft Control

A400M cargo load control

Load Master Workstation

electronics (LME)

Panel electronics

Developed according to DO-254 &

DO-178

Design Assurance Level DAL-B

AFDX PMC integrated on triple-

redundant safe CompactPCI

board-level computer D602

15

AFDX Application – Cockpit System

EFIS display system

Flight-critical display for small to medium commercial aircraft

Computer-On-Module (COM) used in various types of displays

Custom QorIQ development with on-board FPGA

Developed according to DO-254 &

DO-178

Prepared for DAL-B certification

AFDX integrated in FPGA on customized COM

16

AFDX Application – Cockpit Control Panel

Flight deck panel system with

light dimming unit

Panel control with COM Express

on custom carrier board with

FPGA

Integrated Human Machine

Interface (HMI) on customized

multi-display control SBC

AFDX integrated in FPGA on standard COM with customized carrier and customized SBC

17

AFDX Application – Aircraft to Ground Connection

ACARS system

On-board ACARS end system

routing messages through air-

ground subnetwork

Connected to cockpit network via

AFDX

Based on modular 19” industry

standard CompactPCI Serial

Standard AFDX PMC on

CompactPCI Serial carrier board

AFDX IP core integrated on P522 in CompactPCI Serial system

18

AFDX Application – IFEC System

Wireless in-flight entertainment

Movies are streamed from a server

installed on the aircraft

Scalable architecture for e.g. in-seat

power distribution, LED lighting,

wireless IFE, dimmable windows

Standard ARINC 600 network

server MP70S

Qualified according to DO-160G

IP-core interface to AFDX on

CompactPCI Serial card

AFDX FPGA on customized carrier added to COTS system MP70S

19

AFDX Application – Cabin Management

Flight attendance panel

Full-custom Human Machine

Interface (HMI)

Internal PowerPC based SBC

Offers multiple fieldbus connectivity

in FPGA

CAN bus, ARINC-429, and AFDX

According to RTCA DO-160D

AFDX and other fieldbuses integrated in FPGA in full-custom HMI

20

AFDX Application – Communication Bridging

Data concentrator/converter

Full-custom Machine-to-Machine

Interface (MMI)

Internal PowerPC based SBC

Offers multiple fieldbus

connectivity in FPGA

CAN bus, ARINC-429, and AFDX

According to RTCA DO-160D

AFDX and other fieldbuses integrated in FPGA in full-custom MMI

296/6/2016

Ready for Take-Off with MEN‘s AFDX Solution

Future-Proof:FPGA

Simplified Host Software: ICMP/SNMP Service on Chip

Safe:DAL-D, prepared for DAL-A

Radiation Hardened

PCI Transfers Protected

Robust:Up to -50..+125°C

Customizable:Different Host Interfaces

Hostless Operation