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Date Code 20061214 SEL Application Guide 2004-08

Application Guide Volume IV AG2004-08

Ungrounded Shunt Capacitor Bank Protection

Scheme Using the SEL-451 Relay

Jacob Reidt

INTRODUCTION

As outlined in SEL Application Guide AG2000-18 , Grounded Shunt Capacitor Bank ProtectionScheme Using SEL-287V and SEL-352 Relays, shunt capacitor banks connected to a power

system can reduce electrical power transmission costs, reduce system losses, and provide betteruse of the electrical network. As economical generators of reactive power, these banks provide

power factor correction and control the required voltage level on transmission and distributionnetworks.

You can program an SEL-451 Relay to implement a voltage differential scheme using the neutralvoltage unbalance method, which by nature is immune to system unbalance. Combined with theavailable nondirectional overcurrent elements, the SEL-451 can provide complete protection for

ungrounded shunt capacitor banks, as shown in Figure 1.

High Voltage Bus

Shunt

Capacitor

Bank

SEL-451 Relay

(partial)

CLOSE

TRIP

IA

IBIC

VAY VBY

52 52 52

87V

51G

50P

50G

51P

51Q 50Q

VCY VAZ

Figure 1 Complete Protection for Ungrounded-Wye Shunt Capacitor Bank

PROTECTION SCHEME FOR UNGROUNDED SHUNT CAPACITOR BANKS

The generally accepted method for protecting single-wye ungrounded shunt capacitor banks is theneutral voltage unbalance protection method. This scheme removes system unbalance andcompensates for inherent capacitor unbalance. The system unbalance appears as a zero-sequencevoltage both at the bank terminal and at the bank neutral. By calculating a difference voltage,

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The voltage differential, dV, can be programmed to have three independent threshold settings:

• 87HP for catastrophic failure detection —These failures can include such events as a

whole group arcing over or ground faults caused by a fault to the capacitor rack.

• 87TP for bank failure detection —Such failures place dangerous stress on remaining

units.

• 87AP for alarm functions —These alarms serve as an alert for scheduling maintenance

of the capacitor bank.

Method

Analog registers store filtered voltage measurements taken from the SEL-451 VY and VZ

potential inputs. Automation math variables hold setting values. Driven by the free-form logicsettings, the SEL-451 produces logic results through math manipulations and comparisons of the

measured analog signals to settings. The relay uses these logic results in intermediate logic and

timers. Math comparisons, manipulations, and logic development occur in the SEL-451 free-form

logic setting area. The SEL-451 uses the logic results generated in this free-form area to operate

the trip equation, output contacts, front-panel targets, and front-panel LEDs. The followingsections explain how to implement this application.

Analog Inputs

VAYM, VBYM, VCYM, VAZM—Instantaneous Voltage Magnitudes

These signals are the measured secondary quantities on the VY and VZ inputs.

VAYA, VBYA, VCYA, VAZA—Instantaneous Voltage Angles

These signals are the measured reference angles on the VY and VZ inputs. These angles are not

fixed to a reference signal and should not be used with any other analog quantity angles.

Input Contact Allocation

The programmable SEL-451 input contacts are available for use as circuit-breaker status inputs.

Output Contact Allocation

The programmable SEL-451 output contacts are available for use as trip and alarm outputs.

Table 1 Output Contact Allocation

Output Function (Application Specific)

OUT101 87HP (High Set Differential O/V) 87TP (Time O/V)

OUT102 87AP (Alarm O/V)

ALARM Relay Self Monitoring

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SEL Application Guide 2004-08 Date Code 20061214

Pushbutton LED Allocation

For this application, the SEL-451 front-panel LEDs are set in order to visually assist the setting

and resetting of the compensation vector, Comp.

Table 2 SEL-451 Relay Front-Panel Functional Allocation

LED Implemented Function Equation UsedPB1_LED Set Comp ASV001

Settings

Enter settings directly into both the SEL-451 free-form logic equation area and the normal setting

area in the SEL-451. Following are the various settings, grouped according to category, and the

steps to enter these settings. The ACSELERATOR ® SEL-5030 software provides an easy way to

view this process.

Global Settings

• Use suitable identification names where possible.

• Disable all SEL-451 options not used.

• Select the single circuit-breaker option.

• Select nominal frequency and phase rotation.

• Set setting selection logic SS1 = 1 and SS2–SS6 = 0 to lock the active group setting to

Group 1.

• Set ESS := N to disable current and voltage source selection.

Breaker Monitor Settings

The SEL-451 can use circuit-breaker status and provide additional functionality according to this

status. Where possible, include the circuit breaker status. You can use an input contact to indicate

circuit breaker status.

If the SEL-451 is not monitoring actual circuit-breaker status, set the Breaker 1 status setting to

logical 1 to force the relay to always see the circuit-breaker status as closed.

Group 1 Settings

• Disable fault location.

• Disable distance protection, communications-assisted tripping, breaker failure, reclosing,

loss-of-potential, and miscellaneous settings.

• Leave settings for Directional and Pole Open Detection areas at default. These settings do

not affect this application.

• At the Trip Logic and ER Trigger settings, set unused logic to N/A.

• Disable unused features, and leave other settings at default.

• Set the TR Trip Logic, ULTR, TULO, TDUR3D, and ER as required (see Table 3).

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Table 3 Summary of Significant SEL-451-1 Relay Settings

Setting

Category Setting Name Settings

General Options Disable all options and distance protection

NUMBK 1

NFREQ User selected

PHROT User selected

FAULT PCT01Q OR PCT02Q OR PCT03Q

SS1 1

SS2 to SS6 0

Global

ESS N

EB1MON N

BK1TYP 3

Breaker

Monitor

52AA1 1 (or use input contact to directly monitor circuit breakerstatus)

Group 1 EFLOC N

Relay Configuration Set all to N or leave as default except the Trip Logic Area.

Trip Logic Area Set all logic to NA except that described below:

TR Trip (PCT02Q OR PCT03Q) AND 52AA1

ULTR TRGTR (application specific)

ULMTR1 NA

TULO 4 (disabled)

TDUR3D Set as required, default of 12 cycles.E3PT 1

E3PT1 1

ER R_TRIG PCT01Q OR R_TRIG PCT02Q OR

R_TRIG PCT03Q OR R_TRIG PSV05 OR

R_TRIG PSV06 OR R_TRIG PSV07 OR

F_TRIG 52AA1

Protection and Automation Free-Form Logic Settings

This is where the SEL-451 uses the set free-form logic to implement differential voltage

calculation, voltage comparisons, and logic operation. Automation free-form logic stores usersettings to customize this scheme for a particular configuration. The fixed logic of this scheme is

detailed in the scheme logic figures and supplemental tables found at the end of this ApplicationGuide.

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Table 4 Summary of Significant User-Entered Free-Form Logic Settings

Setting

Category Setting Name Description

AMV001 Nominal system voltage (kVl-l primary)

AMV002 87AP setting (V secondary)

AMV003 87AP time-delay setting (seconds)

AMV004 87TP setting (V secondary)

AMV005 87TP time-delay setting (seconds)

AMV006 87HP setting (V secondary)

AMV007 87HP time-delay setting (seconds)

AMV008 Comp Magnitude (as determined in Setting Comp)

Automation

AMV009 Comp Angle (as determined in Setting Comp)

Output SettingsThe SEL-451 outputs are programmed to close Trip or Alarm circuits.

No interface board settings or MIRRORED BITS® communications settings are made or used.

Front-Panel Settings

For this application, a SEL-451 front-panel LED is set to visually assist the setting and re-setting

of the compensation vector, Comp.

Report Settings

To customize Event reporting for this application, edit the Event Reporting Digital Elements.Table 9, Table 10, Table 13, Table 14, and Table 15 list the related protection and automation

logic elements that should be monitored for this application.

DNP Map Settings (if optioned)

This application does not use any DNP Map Settings.

Communications Ports

In this application, the communications ports are set at the default. Consider increasing the

communications port speed to shorten the time necessary for transmitting and receiving settings,

reports, and other relay information.

Variable Assignment Within the SEL-451 Relay

See Table 5 through Table 16 for detailed listings of the variable allocation used for this

application.

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Setting Comp

Differential voltage protection requires that the difference voltage, Vdiff, be accurately

compensated for any capacitor unbalance attributed to manufacturer tolerances. To accomplish

this, a system phase voltage, Vph, is scaled by a vector constant, Comp.

Set the compensation vector Comp at commissioning. The compensation vector is calculated

constantly, but is entered into the differential protection scheme through an automatic processinitiated by an operator pushbutton, {PB1}. The actual pushbuttons and security time durations

used for this process are programmable and can be modified to meet your individual security

requirements.

Step 1. Press and hold pushbutton {PB1} for three seconds. You should see the pushbutton

LED slowly blink three times. This signifies that the Comp setting process has

been initiated. The LED will then begin to rapidly blink signifying that thesmoothing calculation is being performed, after which the LED stays solidly

asserted. This signifies that the Comp vector has been set. A steady-state system

condition should exist for at least two minutes before this process is initiated.

Should the process need repeating, you can clear and reset the value stored in

Comp in the next step.Step 2. Press and hold pushbutton {PB1} for three seconds. Now you should see the

pushbutton LED briefly extinguish three times and remain unlit. This signifies that

Comp has been reset. After allowing a settled steady-state system condition, you

can set the Comp vector again.

Using the automatic process outlined above will not write the values to nonvolatile memory. If

the relay were to lose power, switch groups, or experience changed settings, the equations

populating the math variables would reinitialize and the LED indication would extinguish. The

setting process outlined above would need to be repeated after such an occurrence.

Therefore, we strongly recommend an additional step to provide settings ride-through for relayrestarts. By metering the math variables that have calculated the smooth Comp magnitude and

angle (PMV54 and PMV55 using the MET PMV command), you can directly enter the observedvalues as constants into the automation math variables AMV008 and AMV009, which are then

used in the dV calculation (PMV56 and PMV57 using the SET L command). Using this manual

process to enter the Comp values ensures operational security and retention of the values innonvolatile memory. It also provides a system benchmark, allowing for system condition and

capacitor tolerance changes over time to be analyzed.

FILTERING

The SEL-451 provides advanced filtering. This application uses the available fundamental

voltage quantities with all harmonics removed.

CONFIGURABLE FRONT-PANEL LABELS

The SEL-451 features a versatile front panel that you can customize for your needs. Use slide-in

configurable front-panel labels to change the identification of target LEDs and operator control

pushbuttons and LEDs. There are four options for producing custom labels for the SEL-451 front

panel:

• Use factory default labels.

• Use handwritten labels on factory default labels.

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• Use handwritten labels on blank labels.

• Print on the perforated paper labels provided with the SEL-451.

INTEGRATED PROTECTION AND CONTROL S YSTEMS

You can upgrade the SEL-451 to include Ethernet or DNP3 Level 2 protocol options. These

protocols provide relay interfaces with different Integrated Protection and Control Systems

including, for example, DNP3 Level 2 Masters such as the Harris D20 or D200.

CONCLUSION

Through use of the programmable free-form logic area, the SEL-451 provides the functionality of

a neutral voltage unbalance protective relay. The SEL-451 uses math variable comparison,

manipulation, and logic equations to implement protection functions.

The extensive monitoring and recording features of the SEL-451 provide improved performance

monitoring and use of substation equipment.

SCHEME LOGIC

The following figures illustrate the operation of the voltage differential scheme. Initially, a

difference voltage is calculated between the system unbalance (3V0) and the bank neutral signal

(Vng). This difference voltage is the Vdiff vector.

(PMV43 + jPMV44)

(PMV45 + jPMV46)(PMV42)

Vng

3V0

+

–V

ph∑ Vdiff (PMV47 + jPMV48)3 • PTRZ

PTRY

(AMV011)

V0

Figure 3 Calculation of Vdiff Vector

The logic above assumes the following conditions:

• 3V0 and V ph are obtained from SEL-451 VY voltage inputs.

• Vng is obtained from the SEL-451 VAZ voltage input.

• Vdiff is calculated in real-time.

During commissioning, the Vdiff vector is effectively removed. A compensation vector (Comp)

is calculated during steady-state conditions.

(PMV47 + jPMV48)Vdiff

(PMV40 ∠ jPMV41)

Comp

(PMV52 ∠ jPMV53)Vph

1 Smoothing

Filter Comp(PMV54 ∠ jPMV55)

PB1

Figure 4 Calculation of Comp Vector

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The logic above assumes the following conditions:

• Comp smoothing is initiated by an operator pushbutton {PB1}.

• After Comp is smoothed, it should be stored in nonvolatile memory

(AMV008 ∠ AMV009, the input for PMV56 ∠ PMV57).

At this point, the magnitude of the voltage differential calculation (dV) is equal to zero. Thedegradation or loss of individual capacitor units will change the magnitude of the bank neutralsignal (Vng) and dV would no longer equal zero. This real-time protection calculation is shown

below.

(PMV47 + jPMV48)

(PMV40 ∠ jPMV41) (PMV62 + jPMV63) (PMV64)

Vdiff

Vph

+

– dVComp

(PMV56∠ jPMV57)

∑

Figure 5 Calculation of Voltage Differential Magnitude

The magnitude of the voltage differential calculation (dV) is then compared to alarming and

tripping thresholds. After exceeding the pickup for a set time interval, a conditioning timer output

asserts. These timer outputs are used for alarming and tripping output and indication functions.

_

+

_

+

_

+

dV

dV

dV

(PMV64)

(PMV64)

(PMV64)

87APP

87TPP

87HPP

(AMV002)

(AMV004)

(AMV006)

0

AMV014

PCT01

(PCT01Q)87AP

0

0

AMV013

AMV015

PCT02

PCT03

87TP

87HP

(PCT02Q)

(PCT03Q)

Figure 6 Voltage Differential Pickup and Time-Delay Logic

SUPPLEMENTAL TABLES

Table 5 Protection Free-Form Logic Settings

Line # Protection Code Comments

1 PMV40 := VCFIM Vph Magnitude

2 PMV41 := VCFIA Vph Angle

3 PMV42 := PMV40 / AMV012 Normalized Vph

4 PMV43 := VAZM * COS(VAZA) Cap bank neutral signal RE

5 PMV44 := VAZM * SIN(VAZA) Cap bank neutral signal IM

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6 PMV45 := VAYM * COS(VAYA) + VBYM *

COS(VBYA) + VCYM * COS(VCYA)

3V0 RE

7 PMV46 := VAYM * SIN(VAYA) + VBYM *

SIN(VBYA) + VCYM * SIN(VCYA)

3V0 IM

8 PMV47 := PMV42 * (PMV43 - PMV45 *

AMV011)

Vdiff RE

9 PMV48 := PMV42 * (PMV44 - PMV46 *

AMV011)

Vdiff IM

10 PMV49 := SQRT((PMV47 * PMV47) + (PMV48

* PMV48))

Vdiff Magnitude

11 PMV50 := ACOS(PMV47 / PMV49) Vdiff Angle

12 PSV01 := PMV47 > 0 AND PMV48 > 0 Quadrant I Selection

13 PSV02 := PMV47 < 0 AND PMV48 > 0 Quadrant II Selection

14 PSV03 := PMV47 < 0 AND PMV48 < 0 Quadrant III Selection

15 PSV04 := PMV47 > 0 AND PMV48 < 0 Quadrant IV Selection

16 PMV51 := PMV50 * PSV01 + PMV50 * PSV02 -

PMV50 * PSV03 - PMV50 * PSV04

Corrected Vdiff Angle

17 PMV52 := PMV49 / PMV40 Comp magnitude

18 PMV53 := PMV51 - PMV41 Comp angle

19 PMV54 := (AMV016 * PMV54 + (1.0 -

AMV016) * PMV52) * ALT01

Comp magnitude smoothing calculation

20 PMV55 := (AMV016 * PMV55 + (1.0 -

AMV016) * PMV53) * ALT01

Comp angle smoothing calculation

21a∗ PMV56 := PMV54 Comp magnitude (before Setting Comp)

21b∗ PMV56 := AMV008 Constant Comp magnitude (after Setting

Comp)

22a∗ PMV57 := PMV55 Comp angle (before Setting Comp)

22b∗ PMV57 := AMV009 Constant Comp angle (after Setting

Comp)

23 PMV58 := PMV40 * PMV56 (Vph • Comp) Magnitude

24 PMV59 := PMV41 + PMV57 (Vph • Comp) Angle

25 PMV60 := PMV58 * COS(PMV59) (Vph • Comp) RE

26 PMV61 := PMV58 * SIN(PMV59) (Vph • Comp) IM

27 PMV62 := PMV47 - PMV60 dV RE

28 PMV63 := PMV48 - PMV61 dV IM

∗ For Protection Logic Lines 21 and 22, use “21a” and “22a” before Setting Comp, or use “21b” and “22b”

after Setting Comp.

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29 PMV64 := SQRT((PMV62 * PMV62) + (PMV63

* PMV63))

dV magnitude

30 PSV05 := PMV64 > AMV002 87AP

31 PSV06 := PMV64 > AMV004 87TP32 PSV07 := PMV64 > AMV006 87HP

33 PCT01PU := AMV013 87AP time delay

34 PCT01IN := PSV05 87AP timer input

35 PCT02PU := AMV014 87TP time delay

36 PCT02IN := PSV06 87TP timer input

37 PCT03PU := AMV015 87HP time delay

38 PCT03IN := PSV07 87HP timer input

Table 6 Automation 1 Free-Form Logic Settings

Line # Automation Code Comments

1 AMV001 := [user entered] Nominal system voltage

(kVl-l primary)

2 AMV002 := [user entered] 87AP setting (V secondary)

3 AMV003 := [user entered] 87AP time-delay setting (seconds)

4 AMV004 := [user entered] 87TP setting (V secondary)

5 AMV005 := [user entered] 87TP time-delay setting (seconds)

6 AMV006 := [user entered] 87HP setting (V secondary)

7 AMV007 := [user entered] 87HP time-delay setting (seconds)

8 AMV008 := [user entered] Comp Magnitude (as determined in

Setting Comp)

9 AMV009 := [user entered] Comp Angle (as determined in Setting

Comp)

Table 7 Automation 2 Free-Form Logic Settings


1 AMV011 := (PTRY / 3) / PTRZ Scaling ratio (V0)

2 AMV012 := (AMV001 / SQRT(3)) / PTRY Scaled V NOM (Vl-n secondary)

3 AMV013 := AMV003 * 60 87AP time delay (cycles—60 Hz)

4 AMV014 := AMV005 * 60 87TP time delay (cycles—60 Hz)

5 AMV015 := AMV007 * 60 87HP time delay (cycles—60 Hz)

6 AMV016 := 0.99 + 0.01 * ACN02Q Math variable for smoothing

calculation

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7 ACN01PV := 3 Counter to initiate Set Comp

8 ACN01R := NOT PB1 Reset counter

9 ACN01IN := AST01Q Counter input

10 AST01IN := NOT (AST01Q) AND PB1 Sequencing timer driven by PB1

11 AST01PT := 1.0 One-second timer

12 AST01R := AST01Q Timer resets after one second

13 ALT01S := R_TRIG ACN01Q AND NOT

ALT01

Latch set while reset and one-second

timer has 3 counts

14 ALT01R := (R_TRIG ACN01Q AND ALT01)

OR ASV002

Latch reset while set and one-second

timer has 3 counts or Comp is reset

by relay initialization

15 ACN02PV := 40 Counter to calculate Comp

16 ACN02R := NOT ALT01 Reset counter

17 ACN02IN := AST02Q Counter input

18 AST02IN := NOT (ACN02Q) AND ALT01 Sequencing timer driven by ALT01

19 AST02PT := 0.25 Quarter-second timer

20 AST02R := AST02Q Timer resets after quarter-second

21 ALT02S := R_TRIG ACN02Q AND NOT

ALT02

Latch set while reset and quarter-

second timer has 40 counts

22 ALT02R := NOT ALT01 Latch reset when ALT01 resets

23 ASV001 := ALT02 AND NOT (AST01Q AND

PB1 AND NOT ACN01Q) OR NOT

ALT02 AND (AST01Q AND PB1AND NOT ACN01Q OR AST02Q

AND ALT01 AND NOT ACN02Q)

Variable used for LED indication of

latch condition

24 ASV002 := PMV56 = 0 AND ALT02 Variable used for LED clear if Comp

is reset by relay initialization

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Table 8 SER Points and Aliases

Relay Word Bit Alias Set Alias Clr Alias

ALT02 COMP VECTOR COMP SET COMP RESET

PSV05 87AP 87AP (PSV05) ON 87AP (PSV05) OFF

PSV06 87TP 87TP (PSV06) ON 87TP (PSV06) OFF

PSV07 87HP 87HP (PSV07) ON 87HP (PSV07) OFF

PCT01Q 87AP TIMER 87APT (PCT01Q) ON 87APT (PCT01Q) OFF

PCT02Q 87TP TIMER 87TPT (PCT02Q) ON 87TPT (PCT02Q) OFF

PCT03Q 87HP TIMER 87HPT (PCT03Q) ON 87HPT (PCT03Q) OFF

OUT101 87TP / 87HP OUTPUT TRIP (OUT101) ON TRIP (OUT101) OFF

OUT102 87AP OUTPUT ALARM (OUT102) ON ALARM (OUT102) OFF

Table 9 Protection SEL Variables

Variable Application Use

PSV01 Quadrant I detection, Vdiff angle

PSV02 Quadrant II detection, Vdiff angle

PSV03 Quadrant III detection, Vdiff angle

PSV04 Quadrant IV detection, Vdiff angle

PSV05 87AP pickup

PSV06 87TP pickup

PSV07 87HP pickup

Table 10 Automation SEL Variables


ASV001 Variable for pushbutton LED indication

ASV002 Variable for pushbutton LED clear for relay initialization

Table 11 Protection Math Variables


PMV40 Vph magnitude

PMV41 Vph angle

PMV42 Normalized Vph

PMV43 Real component of Cap bank neutral signal

PMV44 Imaginary component of Cap bank neutral signal

PMV45 Real component of 3V0

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PMV46 Imaginary component of 3V0

PMV47 Real component of Vdiff

PMV48 Imaginary component of Vdiff

PMV49 Vdiff magnitude

PMV50 Vdiff angle

PMV51 Corrected Vdiff angle

PMV52 Comp magnitude

PMV53 Comp angle

PMV54 Smooth Comp magnitude calculation

PMV55 Smooth Comp angle calculation

PMV56 Constant Comp magnitude

PMV57 Constant Comp anglePMV58 (Vph • Comp) magnitude

PMV59 (Vph • Comp) angle

PMV60 Real component of (Vph • Comp)

PMV61 Imaginary component of (Vph • Comp)

PMV62 Real component of dV

PMV63 Imaginary component of dV

PMV64 dV magnitude

Table 12 Automation Math Variables


AMV001 Nominal system voltage (kVl-l primary)

AMV002 87AP setting (V secondary)

AMV003 87AP time-delay setting (seconds)

AMV004 87TP setting (V secondary)

AMV005 87TP time-delay setting (seconds)

AMV006 87HP setting (V secondary)

AMV007 87HP time-delay setting (seconds)

AMV008 Comp Magnitude (as determined in Setting Comp)

AMV009 Comp Angle (as determined in Setting Comp)

AMV011 Scaling ratio to convert VY to VZ base

AMV012 Nominal system voltage (Vl-n secondary)

AMV013 Convert 87AP time-delay setting to cycles

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AMV014 Convert 87TP time-delay setting to cycles

AMV015 Convert 87HP time-delay setting to cycles

AMV016 Math variable for Comp smoothing calculation

Table 13 Protection Conditioning Timers

Timer Application Use

PCT01Q Time-delayed differential overvoltage alarm

PCT02Q Time-delayed differential overvoltage trip

PCT03Q High-set time-delayed differential overvoltage trip

Table 14 Automation Sequencing Timers

Timer Application Use

AST01Q One-second pulse used for initiating Comp set and reset

AST02Q Quarter-second pulse used for timing Comp vector calculation

Table 15 Automation Counters

Counter Application Use

ACN01Q 3 counted one-second pulses used for initiating Comp set and reset

ACN02Q 40 counted quarter-second pulses used for calculating Comp vector

Table 16 Automation Latches

Latch Application Use

ALT01 Latch used for initiating Comp set and reset

ALT02 Latch used for calculating Comp vector

FACTORY ASSISTANCE

We appreciate your interest in SEL products and services. If you have questions or comments,

please contact us at:

Schweitzer Engineering Laboratories, Inc.

2350 NE Hopkins CourtPullman, WA USA 99163-5603

Telephone: (509) 332-1890Fax: (509) 332-7990

www.selinc.com • [email protected]

mailto:[email protected]



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© 2004–2006 by Schweitzer Engineering Laboratories, Inc. All rights reserved.

All brand or product names appearing in this document arethe trademark or registered trademark of their respectiveholders. No SEL trademarks may be used without writtenpermission.

SEL products appearing in this document may be covered byUS and Foreign patents. *AG2004-08*

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