Agilent IrDA Data Link Design Guide

IntroductionWelcome to the World of InfraredData Communications! This guideis designed to provide you withthe background necessary todesign and implement your veryown IrDA compatible data link.Within these pages, you will finddetailed information on all phasesof the design process, fromarchitectural considerationsthrough board layout. You willalso learn about the Infrared DataAssociation (IrDA) — about it’spurpose, and about the IrDAspecification for IR data transfer.

In addition, a selection guide ofAgilent’s infrared components hasbeen included. More informationis available from the sources listedin the References. In particular, besure to check the Agilent IRwebsite where you will find themost recent data sheets andapplication notes.

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References

Agilent Technologies, http://www.agilent.com/view/irSemiconductor Products Group

Sales Offices and Authorized Distributors,Product Data Sheets,Application Notes

HP JetSend Information http://www.jetsend.hp.com/

Infrared Data Association (IrDA) http:www.irda.org/

Support Hardware and Software

Actisys Corp. http: //www.actisys.com/

Extended Systems, Inc. http: //www.extendsys.com/

inSilicon Corporation http://www.insilicon.com

Link Evolution Corporation http://www.linkevolution.com

Motorola, Inc. http: //www.motorola.com/

National Semiconductor http: //www.nsc.com/

Okaya SystemWare Co., Ltd. http: //www.okaya-system.co.jp/(Japanese)

http://www.osw.co.jp/index-e.htm(English)

Parallax Systems http://www.parallax-research.com/

Phoenix Technologies, Inc. http://www.phoenix.comhttp://www.ptltd.com

Puma Technology, Inc. http://www.pumatech.com/

Standard Microsystems http://www.smc.com/

VLSI Technology http://www.vlsi.com/

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Table of Contents

References .......................................................................................................... 2

1. Introduction ................................................................................................... 5HP/Agilent IR History.......................................................................... 5About This Guide ................................................................................. 6

2. IrDA Applications in the Market ................................................................. 72.1 Computing Segment ...................................................................... 7 PDAs/HandHeld Computers ...................................................... 72.2 Telecom .......................................................................................... 72.3 Consumer Electronics .................................................................. 8 Digital Cameras ........................................................................... 8 Scanners ....................................................................................... 8 Toys and Games .......................................................................... 82.4 Peripherals ..................................................................................... 8 Printers ........................................................................................ 8 Infrared Keyboards and Mouse ................................................ 9 Dongle .......................................................................................... 9 Port Replicator/LAN Access ..................................................... 9

3. IrDA Standards ............................................................................................ 113.1 Background .................................................................................. 113.2 Hewlett-Packard Patent Agreement ......................................... 113.3 The IrDA Specifications ............................................................. 11 Overview ...................................................................................... 11 The IrDA Datalink Protocols .................................................... 11

3.4 IrPHY - IrDA Physical Layer ...................................................... 12 Overview ...................................................................................... 12 1.152 kbps and 576 Mbps Data Rate ........................................ 13 4 Mbps Data Rate ....................................................................... 13 Key Physical Layer Parameters ................................................ 15 Optical Requirements ................................................................ 15 Low Power Option ..................................................................... 15 Half Duplex and Latency ........................................................... 17 Ambient Light .............................................................................. 173.5 IrLAP - Link Access Protocol ..................................................... 173.6 IrLMP Protocol ............................................................................ 173.7 IrCOMM Protocol ........................................................................ 193.8 IrTRANP ....................................................................................... 203.9 IrMC ............................................................................................... 213.10 IrOBEX (IrDA Object Exchange Protocol) ............................ 223.11 Software Support ....................................................................... 22

4. IrDA Future Directions .............................................................................. 234.1 Very Fast IR (VFIR) ..................................................................... 23

(continues)

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Table of Contents (continued)

5. Agilent Products ......................................................................................... 255.1 Introduction ................................................................................ 255.2 Integrated Transceiver Modules .............................................. 255.3 Endecs (Encoders / Decoders) ................................................. 275.4 Discrete Emitters and Detectors .............................................. 28

6. Architecture Options for IrDA Data ......................................................... 296.1 Typical Architecture .................................................................. 296.2 2.4 kbps to 115.2 kbps Super I/O .............................................. 306.3 2.4 kbps to 4 Mbps Super I/O .................................................... 316.4 16550-type UART, Microcontroller or Embedded I/O with 16x Clock............................................... 316.5 UART, Microcontroller or Embedded I/O without Clock ..... 326.6 Interface to RS-232 Port ........................................................... 336.7 I/OVCC Interfacing with Low Voltage ASICs........................... 336.8 Interfacing for Adaptive Power Management ........................ 336.9 Serial Transceiver Control ........................................................ 356.10 Command Format .................................................................... 356.11 Bus Timing................................................................................. 38

7. Design Guidelines7.1 Mechanical Considerations ....................................................... 397.2 Electrical Considerations .......................................................... 477.3 Optical Port Design .................................................................... 517.4 Eye Safety .................................................................................... 53

8. Evaluation and Developer Kits ................................................................. 55Evaluation Boards to interface to Super I/O, UARTs or Serial Port

9. Beyond IrDA ................................................................................................ 579.1 Extending Transmission Distance ........................................... 579.2 Remote Control Application ..................................................... 59

10. Companion Circuits ................................................................................... 6110.1 LED Driver Circuits .................................................................. 6110.2 Receiver Circuits ...................................................................... 6110.3 Echo Cancellation Circuit ....................................................... 63

Appendix ........................................................................................................... 65

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1. Introduction

HP/Agilent IR HistoryHewlett-Packard has beenoffering infrared wirelessconnectivity in its products since1979. The infrared discretes onceembedded in the HP-41C pocketcalculator and HP-48SX calculatorhave evolved into transceiverscommonly found in HP’s PDAs,Omnibooks, Printers and manyother non-HP products. HP hasbeen incessantly investing inresearch and development in theinfrared technologies to enablemobile products to communicatein a seamless manner.

In 1993, the first HP transceivermodule was introduced. TheHSDL-1000 enabled Infrared datatransmission and reception in asingle integrated module.Adhering to the IrDA 1.0 industrystandards, the HSDL-1000 is alsoknown as a Serial Infrared (SIR)transceiver. The IrDA 1.0 standardwas designed around a “point andshoot” environment for shortdistance (1m) tether-lesscommunication.

In 1995, the HSDL-1001 andHSDL-1100 were introduced. Theformer, a direct replacement forthe HSDL-1000, enables a widerscope of IR implementation, e.g.input voltage of 3 - 5 V.

The HSDL-1100 provides 4 MbpsFast Infrared (FIR) capability (ascompared to the SIR 115 kbpsdata rate). This module enablesfaster communications in printersand notebooks, and is still a muchsought after module.

In 1997, the HSDL-2100 andHSDL-2300 were the answers forproducts facing size reductionpressures. Standing at 5.3 mm,these IR products operate at 5 V

and 3 V respectively. Both trans-ceivers are FIR capable,compliant with IrDA Version 1.1industry standards. The HSDL-2300 was one of the winners ofthe 1998 Wireless Design and De-velopment Technology Awards.Designed for data communica-tions applications, the HSDL-2300transceiver offers end users thebenefit of longer battery life inportable devices.

In 1998, a new platform of IRtransceivers was born. Using anew castellation technology andimproved electronics, Hewlett-Packard was able to bring thecost, power consumption and sizeof the transceivers to new “lows.”With lower cost, lower powerconsumption and even smallersize, this platform of modulesbrings wireless connectivity to thetelecom world, and the manyother products, where therequirements are small size andvery low power consumption.Hewlett-Packard was proud tooffer the HSDL-3201, HSDL-3600and HSDL-3610. These productsenable Infrared communication ineven smaller and slimmerproducts.

In 1999, HP grouped its test andmeasurement, semiconductorproducts, healthcare solutionsand chemical analysis businessestogether and spun it off as aseparate company, AgilentTechnologies, as part of acorporate re-alignment process.The IR business unit being a partof the semiconductor productsgroup, became part of AgilentTechnologies.

In 2000, under the new companyname, yet another world’s firstwas added to its record bookswith the release of HSDL-3202.The HSDL-3202 is the firsttransceiver to be able to interfacewith logic levels as low as 1.8 V.The HSDL-3210 extended the featof the HSDL-3202 to a higher datarate of 1.152 Mbps in theindustry’s smallest package,another world’s first. TheHSDL-3310 is the world’s first1.152 Mbps transceiver tointerface with 1.8 V logic levels.Agilent has also cooperativelyworked with inSilicon

Corporation to develop the firstsemiconductor intellectualproperty VFIR controller core.The controller supports the VFIRstandard of transmission data at16 Mbps. These developmentswere in response to theadvancements in mobile devices,which are heading towarddeveloping low voltage and highspeed applications.

As we enter the new millenium,Agilent continues to introducenew and exciting Infraredproducts for wirelesscommunications. Join us as welead in new highs in performance,and new lows for cost, size andpower consumption.

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About This GuideThis guide is designed to providethe information necessary todesign and implement an IrDAcompatible data link. Anintroduction to the IrDA and itsstandards is included for thosenew to the technology. This alsoserves as an update fordevelopers in the Infrared field.Within these pages you will finddetailed information for all phasesof the design process, rangingfrom architectural considerationsthrough board layouts to opticalconsiderations. You will also learnabout the IrDA, its standards andhow they relate to IRcommunication. In addition, aselection guide is accessible forall users to get acquainted withthe offerings of Agilent’s infraredcomponents.

For more information, check outthe Agilent IR website. Otherwebsites, services and contactsare listed in the References

section.

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2. IrDA Applications inthe MarketNetworking, interoperability andcable-less technology have gradu-ated from just being buzzwords toreality. Following this evolution incable-less communications, infra-red has experienced enormousgrowth in the past half-decade dueto ease of use and low implemen-tation cost. The Infrared DataAssociation (IrDA) has projecteda total shipment of 1.3 billionunits by the year 2003. This highIR adoption rate reflects the pres-ence of more IR applications inthe marketplace than ever before,with penetration rate for somesegments reaching 100%. Listedbelow are some of the many pos-sible applications where IR hassuccessfully embedded itself.

2.1 COMPUTING SEGMENTTwo main markets that make upthis segment are the Portable/Desktop computing and Handheldmarkets.

Portable and Desktop ComputingThis market segment, comprisedof notebooks and sub-notebooks,boasts of having the highest infra-red data link penetration rate.Most portable computers in thiscategory have infrared links andthe vast majority of them areequipped with 4 Mbps transceiv-ers. With a penetration rateapproaching 100%, further marketgrowth of IR will most likely trackthe growth of the notebook mar-ket. Market analysts forecastedthat the notebook sector wouldhave a unit growth of over 18%over the next five years. Factorscontributing to the wide accep-tance and success includelow-cost, small size, inter-operability with super I/O control-lers, ease of use and full OSsupport (from Microsoft).

Due to architectural constraints,the adoption of IR in the desktopsegment has been relatively low.Current desktop designs in themarketplace are more appropriatefor placing the desktop in a cabi-net or on the floor. However, sucha layout is not conducive for anytype of point and shoot applica-tion profile. To overcome thisconstraint, IR dongles are avail-able which can be connected tothe serial port. Utilizing IRdongles improves user mobilityand also allows further upgradesof existing ports.

Success in this market will there-fore be determined by theavailability of IR adapters and themaximum data rate supported.Currently, the data rate of IRadapters is limited to the maxi-mum data rate of the serial port.With the emergence of UniversalSerial Bus (USB) ports, higherspeed of 4 Mbps (supported byinfrared) could be exploited.

Handheld DevicesThe demand for handheld devices,comprised of PDAs (PersonalDigital Assistants) and handlheldPCs, has grown significantly since1997. Triggered by the need formobile access for personal andprofessional data, most handhelddevices today utilize Infrared(IrDA) connectivity to performdata transfer.

Using Infrared connectivity allowsPDAs to perform several tasks.Some of the existing IR applica-tions include data exchange witha desktop or notebook PC, elec-tronic business card exchangewith another handheld device,and data printing to an IR printer,just to name a few.

The trend toward smallerhandheld devices loaded with

multimedia applications requiringhigher data rates necessitates aneed for faster infrared (4 Mbpsand above) transceivers withlower power consumption andsmaller form factor. Industry ana-lysts predict that the IR adoptionrate in this segment will continueto grow in the next few years.

2.2 TELECOMThe telecommunications marketfor IrDA applications refers to themobile phone sector. The IRadoption rate has surged since1997, when the first mobile phoneequipped with IR functionalitywas launched.

The future of IR in mobile phonesis more promising as the liberal-ization of the globaltelecommunication industry con-tinues. Industry analysts believethat future mobile phones willhave more functions and services,and can potentially overtake fixedline phones. IR plays a vital partin realizing this digital conver-gence by enabling the phone to“talk” to other network devicessuch as notebooks, PCs, PDAsand printers.

Two factors governing the suc-cess of IR in this market are lowpower consumption and high datatransfer rate. Traditional SIR (Se-rial Infrared, 115 Kb/s)transceivers are deemed slow incoping with mobile phone ser-vices such as imaging applicationsand internet through Wireless Ap-plication Protocol (WAP) orMobile Media Mode (MMM).Higher infrared speeds of 1 Mbps(Medium Infrared, MIR), 4 Mbps(Fast Infrared, FIR) and 16 Mbps(Very Fast Infrared, VFIR) under-development) will be able to copewith such market needs.

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Two crucial factors that mobilephone makers consider whenimplementing IR into their phonesare power consumption and size.The current trend is towardsmaller phones, which could im-prove user portability. The IRtransceivers used will thereforeneed to be small. Smaller trans-ceivers imply lower power usageand indirectly shorter link dis-tances.

Some new developments in thismarket include the incorporationof features of personal digitalassistants (PDAs) into the mobiledevice. The resulting need forhigher speeds from this marriagebetween data and voice will beaddressed by future 16 Mbpstransceivers.

2.3 CONSUMER ELECTRONICSThis sector is comprised of digitalcameras, scanners, toys andgames.

Digital CamerasThis market has evolved from thetraditional film-based photogra-phy to digital photography.According to Info Trends Re-search Group, Inc., a leadingmarket research firm, the digitalcamera market is predicted to ex-pand to 5 million units in 2002from 1.3 million units in 1998.Rapidly moving toward higherresolution image sensors, the digi-tal cameras in today's market areequipped with 3.5 million pixels.

A market research analyst withInfoTrends commented that thehuge growth of the digital cameramarket is attributed to increasingpenetration of personal comput-ers, Internet connectivity, massmarket awareness and digitalphoto retail and online services.

Factors that will affect IR adop-tion rate in this market include IRtransceiver size, speed and powerconsumption. The Current Infra-red speed of 4 Mbps is sufficientto allow fast transmission of filesvia the IR port to desktops. Futurespeed of 16 Mbps will be able toaddress the needs of digitalcameras with higher resolution.

ScannersInfrared adoption rate in portablescanners is faster and higher incomparison to office scanners.Portable scanners utilizing IR al-low the user to transfer and printscanned images to other comput-ing peripherals such as desktopsand printers. This requires a mini-mum infrared speed of 4 Mbps(FIR). Faster infrared speed of16 Mbps, currently under develop-ment, will be able to addressfuture needs for faster data trans-mission.

The key factors of portable scan-ners are portability and powerwhich are indirectly determinedby the size and power consump-tion. The IR transceiver usedtherefore needs to be small insize, consume low power and beable to transmit data at a fast rate.

Toys and GamesAnother application of IR is in thegame arena where a device beamsacross trading items, custom char-acters and configurations toanother device. One such exampleis the Nintendo Game BoyColor™. Another application isknown as the intelligent toywhere games, programs, songsand stories can be downloadedfrom a desktop through an IRdongle. Infrared speed of 115 Kb/s(SIR) is sufficient to allow suchdata transfer since the file size isrelatively small.

Toy manufacturers have also de-signed toys that allow children tobeam messages to each other us-ing IR. Examples ofmanufacturers include RadicaGames™ and Tiger Electronics™.

2.4 PERIPHERALSInfrared technology also ad-dresses the need for wirelesscommunication of the peripheralsmarket such as the printers, key-board and mouse, dongle and portreplicator/LAN access.

PrintersThe printer market is largelydriven by the growth of personalcomputers and printers.

Hewlett-Packard, the leader in theprinter market, has also been aleader in adopting IR in its print-ers. Introducing IR links in its 5Pseries of personal laser printers in1997, HP has also adopted IR inits portable inkjet printers in 1997.

IR port can be implemented ontoa printer either by embeddingonto the printer itself or via anexternal IR adapter. Theconnection for the IR adapter(dongle) can be done easilythrough a serial or parallel port,as it creates greater flexibility inthe placement of the IR port. Anyuser simply needs to perform the“point and shoot” action byaligning the handheld or datadevice to the printer IR port. Thisentire process, accomplishedwithin seconds in the absence ofwires, is time efficient andimproves user mobility.

The wide proliferation of IR inthis market has encouraged moreOEMs (Original Equipment Manu-facturers) to incorporate IR portinto their printers. Success factorsof IR in this market include speedand the angle at which beaming is

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possible. This is because higherdata rate for faster printing is re-quired for image printouts withmegabyte files, and a wider beam-ing angle improves user mobility.

Infrared Keyboards and MouseUsers enjoy greater mobility withthe convenience of locating andoperating their keyboard andmouse in the absence of wires.One application is in the set-topbox or interactive televisionwhere an infrared keyboard isaligned with a wireless keyboardreceiver. The receiver is con-nected to the television, allowingthe user to browse the web incomfort from any room in thehouse. The television could alsobe connected to a desktop,enabling the user to save anyinformation.

DongleAn IrDA PC dongle enables IR-capable portable devices such asnotebooks, digital cameras,handheld devices, and mobilephone users to conveniently trans-fer files back and forth to adesktop PC in the absence ofwires.

The recent release of an IrDAdongle that connects to the widelypopular Universal Serial Bus(USB) port and plug-n-play sup-port by Windows 2000 woulddramatically increase the IR adop-tion rate in desktop applications.According to In-Stat Group, a mar-ket research firm, 750 milliondesktop and notebook PCs will beUSB-equipped in 2004. The IrDA-USB dongle would allow users totransfer and synchronize filesconveniently between desktopand any portable device at FIRspeeds of 4 Mbps.

Port Replicator/ LAN AccessThe port replicator is a devicethat enables notebook andhandheld device users to instantlyaccess printer, mouse, keyboard,and network across a universalinfrared connection without theproblems of cable. Future IrDAstandard of 16 Mb/s will allowusers to experience the realthroughput of 10 Mbps Ethernetspeed when using the portreplicator to access a network.

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3. IrDA StandardsThis section presents an overview

of IrDA, and the features and

requirements of IrDA compliant

products.

3.1 IrDA BACKGROUNDThe IrDA is an independent orga-nization whose charter is to createinteroperable, low cost IR Datainterconnection standards thatsupport a walk up, point-to-pointuser model that is adaptable to abroad range of appliances, such ascomputing and communicatingdevices. The following are thefees associated with IrDA mem-bership.

IrDA Membership Fees:

• US $8,000 for executive mem-bership (same as affiliate, plusvoting rights)

• US $4,000 for affiliate member-ship, if applicant’s gross annualrevenue is equal to or greaterthan $250,000 (standards docu-ments, attend meetings, accessto e-mail reflector/mailing list)

• US $1,500 for affiliate member-ship, if applicant’s gross annualrevenue is equal to or greaterthan $250,000 (standards docu-ments, attend meetings, accessto e-mail reflector/mailing list)

IrDA Standards Document Fee:

• US $500 per company, for Stan-dards Documents

3.2 HEWLETT-PACKARDPATENT AGREEMENTHewlett-Packard has a patent onthe Serial IR (SIR) encode/decodecircuitry and IR receiver (minusthe PIN photodiode) (Figure 3.3).This is the basis of the HP SIRTechnology. Components or sub-system manufacturers whoprovide, or intend to provide,components that infringe on HP’spatent should consider acquiring apatent license from the licensingagent, IrDA. System manufactur-

ers or OEMs that purchase andimplement components utilizingthe technology do not need to ac-quire a Hewlett-Packard patentlicense. The system OEM is re-lieved of any license requirementas long as one of the componentsin the system is from a firm thatacquired a valid HP License fee of$5000. Hewlett-Packard’s patentonly applies to the 115.2 kbpsIrDA 1.0 standard. License agree-ments are not required for anyhigher speed versions, such as the1.15 Mbps and 4 Mbps standard.

3.3 THE IrDA SPECIFICATIONSThis section presents an overviewof the IrDA, and the features andrequirements of IrDA compliantproducts.

OverviewThe Infrared Data Association(IrDA) is an independent organi-zation whose charter is to createstandards for interoperable, lowcost IR data interconnection.Setting standards for IR communi-cation is key to effortlesscommunication between varioustypes and brands of equipment. Itis the goal of IrDA to set stan-dards and protocols, which can bereasonably and inexpensivelyimplemented in order to promotethe proliferation of IR communi-cation. The first version of theIrDA data link Physical LayerSpecification (IrPHY) 1.0, pro-vided for communication at datarates up to 115.2 kbps. Version 1.1extended the data rate to 4 Mbps,while maintaining backward com-patibility with Version 1.0products. Version 1.2 defined alow power option for data trans-mission speed up to 115.2 kbps.Version 1.3 extended the lowpower option operation to1.152 Mbps and 4 Mbps.

Without a communication proto-col, such as that provided byIrDA, a non-cabled link is inher-ently not robust. Unlike a cable,which is semi-permanently at-tached, the ends of an IR link maymove freely in and out of range.The link may even be broken inthe middle of a transmission.IrDA defines a set of specifica-tions, or protocol stack, thatprovides for the establishmentand maintenance of a link so thaterror free communication is pos-sible. The IrDA Standards includethree mandatory specifications:the Physical Layer, Link AccessProtocol (IrLAP), and Link Man-agement Protocol (IrLMP).

While the primary focus of thisguide is the implementation of thePhysical Layer, we will start witha brief overview of the softwareprotocols. Further informationabout IrDA, as well as the specifi-cations themselves, are availablefrom IrDA (see Contacts)

Note that each successive revi-sion supercedes the previous.Also, while a new revision pro-vides for additional options, itdoes not mean that the device hasto meet it. For example, whileIrPHY 1.3 supports 4 Mbps at lowpower, it does not mean that anIrPHY 1.3 compliant device has tosupport 4 Mbps at low power.

The IrDA Datalink ProtocolsThe IrDA Datalink Protocols areorganized as a series of layers,each built upon the one below it,with the lowest layer being thephysical layer. They may be visu-alized as a protocol stack. Thefunction of each layer is to offercertain services to the next upperlayer, shielding those layers fromthe details of how the offered ser-vices are actually beingimplemented. The three manda-

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tory layers as mentioned aboveare the Physical Layer (IrPHY),Link Access layer (IrLAP), and theLink Management layer (IrLMP).A typical implementation of theIrDA protocol stack within an op-erating system is shown in Figure3.1.

3.4 IrPHY – IrDA PHYSICAL LAYER

OverviewThe Physical Layer Specificationprovides guidelines for point-to-point communication betweenequipment using IR. The currentspecification (Version 1.3) sup-ports the standard power and lowpower option. The standardpower option ensures error freecommunication from a distance of0 to 100 cm, at an off axis angle of0 to at least 15° (Figure 3.2). Thelow power option, intended forhandheld devices and the tele-communication industry, ensureserror free transmission from 0 to20 cm, at an off angle of 0 to atleast 15°. Included are specifica-tions for modulation, viewingangle, optical power, data rate,and noise immunity in order toguarantee physical inter-connectivity between variousbrands and types of equipment.The specifications also ensuresuccessful communication in typi-cal environments where ambientlight or other IR noise sourcesmay be present, and minimize in-terference between IRparticipants.

The specifications for optical in-tensity for the transmitter andsensitivity for the receiver werechosen to guarantee that the linkwill work from 0 to 100 cm forstandard power devices, and 0 to20 cm for low power option de-vices. The receiver sensitivity waschosen so that a minimum inten-

Figure 3.1. Example of a Typical IrDA Implementation in an Operating System.

APPLICATION SOFTWARE

APPLICATION SOFTWARE

TINY TP

IrLMP

IrLAP

OS API

OS

TIMER

DEVICE DRIVERAPI

DEVICE DRIVER

PHYSICAL LAYER (ENDEC)

PHYSICAL LAYER(INFRARED TRANSCEIVER))

IrOBEX

IAS

IrLPT IrCOMM IrTRANP

Figure 3.2. IrDA Physical Layer Viewing Angle and Distance.

TRANSMITTER

DISTANCE FROM TRANSMITTER TO RECEIVER IS GUARANTEED FROM 0 TO 1 m, STANDARD POWER

RECEIVER

≥15°

15° TO 30°

sity emitter will guarantee theminimum link distance as speci-fied.

Figure 3.3 shows a block diagramof the physical layer for data ratesup to 115.2 kbps. This was con-ceived as a link that would workreadily with conventional UARTs,such as the NS 16550. Thus it is astraightforward extension of theserial port. Note in Figure 3.3,however, that the data is first en-

coded before being transmitted asIR pulses. This is required be-cause UARTs and serial ports useNRZ (non-return to zero) codingwhere the output is the same levelfor the entire bit period and canstay at one level for multiple bitperiods. This is seen in Figure 3.4as the data labeled “UART

frame.” This is not optimal for IRdata transfer since a continuousstring of bits could turn on theLED transmitter for an arbitrarily

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long time. Thus the power in theLED would need to be limited,which would then limit the work-ing distance. Instead, the IrDAstandard requires pulsing the LEDin a RZI (return to zero, inverted)modulation scheme so that thepeak to average power ratio canbe increased. The maximum pulsewidth is required to be 3/16 of thebit period. The minimum pulsewidth can be as little as 1.41 µs,which is derived from 3/16 of thehighest data rate of 115.2 kbps.The effect of the encoding can beseen in Figure 3.4 as the data la-beled “IR Frame.” A 16x clockis conveniently available on manyUARTs, so it is easy to count threeclock cycles to encode the trans-mitted data, and to stretch thereceived data with 16 clockcycles. Note that this scheme re-

quires an encoder/decoder(endec), either embedded in the I/O chip or as a discrete compo-nent. This will be discussedfurther in the following sections.

1.152 kbps and 576 Mbps Data RateThe IrDA Physical Layer Specifi-cations also support theintermediate data rates of576 kbps and 1.152 Mbps. Thesespeeds use an RZI modulationsimilar to the 3/16 modulationused at 115.2 kbps and slower, butuse a nominal 25% pulse width.

4 Mbps Data RateBeginning with Version 1.1 of theIrDA physical layer specification,a 4 Mbps data rate is supported.The IrLAP specification requiresall links to begin negotiation at9.6 kbps and then negotiate to

higher data rates, if supported atboth ends. Therefore all devicesthat support a 4 Mbps data ratewill have to be capable of support-ing a lower data rate of 9.6 kbpsat the minimum. Thus a 4 Mbpsdevice will be able to communi-cate with a device that onlysupports 9.6 kbps. This ensuresbackward compatibility.

A 4 Mbps IrDA link uses a modula-tion scheme known as 4 PPM(Pulse Position Modulation), in-stead of the 3/16 modulation usedfor slower data rates. With 4 PPM,information is conveyed by theposition of a pulse within a timeslot. In the 4 PPM scheme (Figure3.5) two data bits are combined toform a 500 ns “data bit pair”(DBP). This DBP is divided intofour 125 ns time slots or “chips”.The two bits to be encoded willhave one of four states 00, 01, 10,11. Depending upon which ofthese states is present, a singlepulse is placed in either the first,

Figure 3.3. IrDA Version 1.0 Physical Block Diagram.

UART

PARALLELTO SERIAL

SERIALTO

PARALLEL

ENCODE/DECODE CIRCUITRY

3/16 thPULSE WIDTHMODULATOR

EDGEDETECTOR ANDPULSE WIDTH

DE-MODULATOR

DIGITALINTERFACE

LED DRIVER/RECEIVER CKT

QUANTIZER

LED

PIN

PRE-AMPLIFIER

POSTAMPLIFIER

LED DRIVER

SOFTWAREBYTE

SERIAL I/OINTERFACE

Figure 3.4. IrDA 3/16 Data Modulation.

UARTFRAME

BITTIME

STARTBIT

0 1 10 0 1 0 110

3/16

IRFRAME

Figure 3.5 4 PPM Modulation.

500 nsPULSEPOSITION

BITPATTERN

00 1000

01 0100

10 0010

11 0001

14

Figure 3.6 IrDA Version 1.1 Physical Layer Block Diagram.

Table 3.1 Standard Power Key Physical Layer Parameters

ApplicableData Rates Minimum Maximum

ACTIVE OUTPUT (TRANSMITTER) SPECIFICATIONS)Peak Wavelength, µm All 0.85 0.90Maximum Intensity In Angular Range, mW/Sr All – 500Minimum Intensity In Angular Range, mW/Sr 115.2 kbps and below 40 –

Above 115.2 kbps 100 –Half-Angle, degrees All ± 15 ± 30Rise Time Tr & Fall Time Tf, 10 - 90% ns 115.2 kbps and below – 600

Above 115.2 kbps – 40Optical Over Shoot, % All – 25Signaling Rate and Pulse Duration See IrDA Spec See IrDA SpecEdge Jitter, % of nominal bit duration 115.2 kbps and below – ± 2.3Jitter Relative to Reference Clock, % of 0.576 and 1.152 Mbps – ± 2.9 nominal bit durationEdge Jitter, % of nominal chip duration 4.0 Mbps – ± 4.0ACTIVE INPUT (RECEIVER) SPECIFICATIONSMaximum Irradiance In Angular Range, mW/cm2 All – 500Minimum Irradiance In Angular Range, µW/cm2 115.2 kbps and below 4.0 –

Above 115.2 kbps 10.0 –Half-Angle, degrees All ± 15 –Receiver Latency Allowance, ms All – 10LINK INTERFACE SPECIFICATIONSMinimum Link Length, m All 0 0Maximum Link Length, m All 1 –Bit Error Ratio, BER All – 10-8

Receiver Latency Allowance, ms All – 10

4 PPM MODULATOR

3/16 ENCODER

MODULATION/DEMODULATION CIRCUITRY LED DRIVER/RECEIVER CIRCUIT

LED

PIN

PRE-AMPLIFIER

POSTAMPLIFIER

LEDDRIVER

SOFTWAREBYTE

INFRARED COMMUNICATION CONTROLLER

4 PPM DEMODULATOR

3/16 DECODER

POSTAMPLIFIER

15

second, third or forth 125 ns timeslot. Thus a demodulator, afterphase locking on the incoming bitstream, can determine the datapattern by the location of thepulse within the 500 ns period.The demodulator phase lockswith a string “preamble” field. Apreamble consists of 16 bits, andis transmitted 16 times.

The block diagram for the Version1.1 (4 Mbps) Physical Layer (Fig-ure 3.6) looks similar to theVersion 1.0 block diagram, exceptthat the UART and the Encode/Decode circuitry are replacedwith an I/O device that is designedfor 4 Mbps IrDA data communica-tion. This device performs theencoding and decoding of boththe 3/16 and the 4 PPM modula-tion.

Key Physical Layer ParametersThe IrDA physical layer specifica-tion defines the requirements fora serial, half-duplex IR link thatwill communicate with anotherIrDA device at distances from 0 to100 cm (standard power device).The key physical layer parametersare shown in Table 3.1.

Note: More information may beobtained from the IrDA SerialInfrared Physical Layer Specifica-tion (currently Version 1.3).

Optical RequirementsFigures 3.7 and 3.8 show the IrDArequirements for output intensityand input irradiance vs. angle.For the output (Figure 3.7), theintensity at any point within acone of half angle 15° with respectto the optical axis, must fall be-tween the minimum and themaximum values. The intensity atany point outside of a conegreater than 30° with respect tothe optical axis, must fall belowthe minimum value.

Figure 3.7 Acceptable Optical Output Intensity Range.

Figure 3.8 Optical High State Range.

500

MIN

30150-15-30

INTENSITY (mW/Sr)

UNACCEPTABLE RANGE

UNACCEPTABLE

ACCEPTABLE RANGE

(VERTICAL AXIS IS NOT DRAWN TO SCALE.)

ANGLE (DEGREES)

30150-15-30

ANGLE (DEGREES)

OPTICALHIGH

STATE

500

UNDEFINED REGION

MIN

UNDEFINED REGION

IRRADIANCE (mW/cm2)

(VERTICAL AXIS IS NOT DRAWN TO SCALE.)

For the optical input (Figure 3.8),the receiver must be able to rec-ognize a signal between theminimum irradiance (dependingupon data rate, per Table 3.2) andthe maximum of 500 mW/cm2, atany point within a cone of 15°with respect to the optical axis.

Low Power OptionThe low power option specifica-tion was added to the IrDA 1.2physical layer specification to ca-ter to Telecom applications,where low power operation ismore important than the link dis-tance. Under the low poweroption, the minimum link distancewhen two low power option de-vices communicate is 0 to 20 cm.However, when a standard powerdevice communicates with a low

power option device, the mini-mum link distance range isincreased to 0 to 30 cm. Note thatunder version 1.2, the maximumsupported data rate is 115 kbps.

Version 1.3 of the IrDA PhysicalLayer specification extends thelow power option to all data ratesup to the maximum of 4 Mbps.

Table 3.2 shows the key physicalparameters for the low poweroption.

Table 3.3 gives a quick compari-son of physical layerspecifications for standard power(IrPHY 1.1), SIR low power option(IrPHY 1.2) and FIR low poweroption (IrPHY 1.3).

16

SIR/FIR FIRStd Power Low Power(IrPHY 1.1) (IrPHY 1.3) Remarks

Link distance, cmLower limit 0 0Upper limit (low power to low power) – 20 Range per TelecomUpper limit (low power to std) – 30 SIG use modelUpper limit (std power to std power) 100 –

Data rate, bpsMinimum 9.6 K 9.6 KMaximum 4 M 4M

Intensity, mW/Sr IrPHY 1.2/1.3 uses < 10% ofMinimum ( ≤ 115 kbps) 40 3.6 std power LED drive current,Minimum ( > 115 kbps) 100 9 allows small eye safe devicesMaximum (all data rates)) 500 72

IrradianceMin, µW/cm2 ( ≤ 115 kbps) 4 9 IrPHY 1.2/1.3 allows use ofMin, µW/cm2 ( > 115 kbps) 10 22.5 less sensitive receiver,Max, mW/cm2) 500 500 hence higher minimum irradiance

Latency, ms 10 Lower latency required to preventvoice clipping

Table 3.3 Comparison of key parameters between IrPHY 1.1 and 1.3

ApplicableData Rates Min. Max.

ACTIVE OUTPUT (TRANSMITTER) SPECIFICATIONSIntensity in Angular Range, mW/Sr All – 72

115.2 kbps 3.6 –and belowAbove 9 –115.2 kbps

ACTIVE INPUT (RECEIVER) SPECIFICATIONSIrradiance in Angular Range, mW/cm2 All Speed – 500

115.2 kbps 0.009 –and belowAbove 0.0225 –115.2 kbps

Receiver Latency Allowance, ms All – 0.5

Table 3.2 Key Low Power Option Physical Parameters

17

Half Duplex and LatencyThe IrDA link is half-duplex, andthere is a time delay allowed fromthe time a link stops transmittingto the time when it must be readyto receive. The IrDA link cannotsend and receive at the same timebecause the transmitter and re-ceiver are not optically isolated,and the transmitted signal can in-terfere with the incoming signal.When the transmitter is emittinglight it may even saturate its ownreceiver, and disable it from re-ceiving data from another source.The IrDA specifications allow aperiod of 10 ms (Standard PowerOption) after transmitting, for thereceiver to regain its full sensitiv-ity. Shorter times may benegotiated when the link startsup. This delay, from the time thetransmitter stops sending lightpulses to the time the receiver isguaranteed to be ready to receivedata, is termed latency. Latency

is also known as receiver setup

time.

Ambient LightThere are requirements for ambi-ent light rejection to ensureproper working of the IrDAdatalink under a wide range ofenvironmental conditions. TheIrDA specification specifies thetest methods for measuring thedata integrity of the link underelectromagnetic fields, sunlight,incandescent lighting and fluores-cent lighting. An IrDA receivermust be able to reject up to 10Klux of sunlight, 1K lux of fluores-cent light and 1K lux ofincandescent light. These valueswere chosen as typical of whatmay be encountered under nor-mal use conditions. Please referto the IrDA Physical Layer TestSpecification for test methodolo-gies.

3.5 IrLAP - LINK ACCESS PROTOCOLThe IrLAP protocol specificationcorresponds to the OSI layer 2(Data Link Protocol), and is amandatory layer for IrDA proto-cols. IrLAP is based on thepre-existing HDLC and SDLC half-duplex protocols, with somemodifications to cater to theunique features and requirementsof infrared communications.IrLAP provides guidelines for thesoftware which looks for othermachines to connect to (sniff),discovers other machines (dis-cover), resolves addressingconflicts, initiates a connection,transfers data and cleanly discon-nects. IrLAP specifies the frameand byte structure of IR packetsas well as the error detectionmethodology for IR communica-tions. Figure 3.9 shows the blockdiagram for the IrDA IrLAP func-tion.

IrLAP defines three differentframing schemes correspondingto the three types of data rates(9.6 kbps - 115.2 kbps, 0.576 Mbpsand 1.152 Mbps, 4 Mbps). Thewrapper types for the three physi-cal layer schemes are:• Asynchronous (ASYNC) Fram-

ing (9.6 kbps - 115.2 kbps)• Synchronous (SYNC) HDLC

Framing (576 kbps and 1.152Mbps)

• Synchronous 4 PPM Framing(4 Mbps)

Figure 3.10 shows the three differ-ent types of frame structures. TheIrLAP Payload data includes theaddress, control field and infor-mation data. To implement theIrLAP layer, please refer to theIrDA IrLAP specification.

3.6 IrLMP PROTOCOLThe IrLMP (Link ManagementProtocol) is a layer that sits abovethe IrLAP layer. It provides ser-vices to both the Transport layerand directly to the applicationlayer. IrLMP consists of two com-ponents, LM-IAS (InformationAccess Service) and LM-MUX(Link Management Multiplexer).LM-IAS maintains a database ofIrDA devices discovered as wellas providing information on whatservices the IrDA compliant de-vices offer. LM-MUX providesservices to both the local LM-IASand also to the transport entitiesor applications that bind directlyto the LM-MUX layer. LM-MUXprovides a mechanism for linkingmultiple devices over IrLAP, aswell as sharing control of a singleIrLAP connection between a pairof stations.

18

Figure 3.9 IrLAP Block Diagram.

Figure 3.10 IrLAP Frame Structure.

SNIFF - OPEN

ADDRESSDISCOVERY CONNECT INFORMATION

TRANSFER

RESET

DISCONNECT

ADDRESSCONFLICT

RESOLUTION

XBOF's BOF

ADDRESS CONTROL INFORMATION

ASYCHRONOUS WRAPPER (9600 kbps TO 115.2 kbps)

BOFFCS

XBOF's n OCCURENCES OF 0xC0 OR 0xFF(10 IN NDM AND NEGOTIATED IN NRM)

BOF BEGINNING OF FRAME 0xC0

FCS 16 BIT FRAME CHECK SEQUENCE USINGCRC-CCITT PERFORMED ON IrLAP PAYLOAD DATA

EOF END OF FRAME 0xC1

IrLAP PAYLOAD

STA STA

ADDRESS CONTROL INFORMATION

SYNCHRONOUS WRAPPER (576 kbps TO 1.152 Mbps)

STOFCS

STA BEGIN FLAG WITH VALUE 0x7E

STO END FLAG WITH VALUE 0x7E

FCS 16 BIT FRAME CHECK SEQUENCE USINGCRC-CCITT PERFORMED ON IrLAP PAYLOAD

IrLAP PAYLOAD

16PA STA

ADDRESS CONTROL INFORMATION

4 PPM WRAPPER (4 Mbps)

STOFCS

PA PREAMBLE OF 4 CHIP EQUAL TO1000 0000 1010 1000

STA BEGIN FLAG 8 CHIPS EQUAL TO0000 1100 0000 1100 0110 0000 0110 0000

STO END FLAG 8 CHIPS EQUAL TO1100 0000 1100 0000 0110 0000 0110

FCS 32 BIT FRAME CHECK SEQUENCE USINGIEEE CRC 32 PERFORMED ON IrLAP PAYLOAD

IrLAP PAYLOAD

19

Figure 3.11 shows the Link Man-agement Architecture. IrLMP addsa two-byte header to the IrLAPframe, as shown in Figure 3.12.

3.7 IrCOMM PROTOCOLIrCOMM (Serial and Parallel portemulation over IR) allows existingcommunication applications thattalk to other devices via serial and

parallel ports to work over IRwithout any changes in their code.

Normal wired communicationmethods can send information inboth directions simultaneously(i.e., full duplex), as there aremultiple wires between them. Un-der the current specifications, IRis only able to send information

one way at a time (half duplex).Also, after sending data, there is aneed to wait for a short period oftime (latency or receiver setuptime, explained earlier) before itcan start receiving. IR uses a shortlatency of 10 ms to maximizetransmission speed. The minimum10 ms latency is imposed by thehardware. This puts a constraint

Figure 3.11 IrDA Link Management Architecture.

Figure 3.12 IrDA LMP Frame Structure.

BOF

DL SAPSEL SL SAPSEL

ADDR CMD INFORMATION FCS EOF

APPLICATIONS

LINKMANAGEMENTINFORMATION

ACCESSSERVICE(LM-IAS)

TRANSPORTENTITIES

LINK MANAGEMENT MULTIPLEXER (LM-MUX)

IrDA IrLAPLINK ACCESS PROTOCOL

LM-IAS SERVICES TRANSPORT SERVICES

LM-MUX SERVICES

IrLAP SERVICES

20

on critical timing applications viaserial and parallel ports. However,most communication tasks arenot time critical and should notpresent a problem.

IrCOMM provides four servicetypes or classes: 3-Wire raw, 3-Wire, 9 Wire and Centronics. Theservice type falls into two types,raw and cooked. Three wired rawprovides a data channel only, andutilizes the IrLAP flow control,while the cooked type supports acontrol channel and employstinyTP flow control. In the cookedmode, the control signals (CTSand RTS for example) are en-coded and transmitted serially ascommands. The IrCOMM layer inthe receiving device decodes thecommands and reports them tothe next higher layer. Figure 3.13shows a block diagram of howthis is done.

3.8 IrTRANPThe IrTran-P (Infrared TransferPicture) is a standard jointly de-fined by Casio, OkayaSystemware, NTT, Sharp, andSony, specifically targeted fordigital still camera picture trans-fer application. Its goal is totransfer a picture from a digitalcamera to other equipment overIrDA link and guarantee the samepicture quality after the transfer.The standard adds three new lay-ers on top of the existing IrDAprotocol stack (as illustrated inFigure 3.14):

• SCEP (Simple Command Ex-ecute Protocol): a session layerdesigned to work on the highlyreliable transport layer. It es-tablishes a session on top of theIrDA’s stack IrCOMM layer toprovide connection and com-

Figure 3.13 IrDA IrCOMM Architecture.

LEGACY APPLICATION

PORT EMULATION ENTITY

IrLMP

IrLAP

SIR

IrCOMM

TINY TP

READ/WRITE CONTROL

DATA (TX, RX)

GENERAL CONTROL PARAMETERS, PORT PARAMETER SETTINGS

PORT INTERFACE(EG VCOMM)

IrCOMM SERVICE INTERFACE

HINTING IASFIXED PORT NAME

INFRARED

Figure 3.14 IrDA TRANP Architecture.

UPF

IrCOMM

TINY TP

IrLMP

IrLAP

PHYSICAL

bFTP

SCEP

21

mand management services.The session will operate at thespeed determined by the under-lying stack and infraredhardware.

• bFTP (Binary File TransferProtocol): designed to workwith SCEP. It provides amechanism for exchangingbinary files by using the follow-ing services:

• F_Put: Transmit a data file to a responder.• F_Query: Request the processing ability of the application on the responder.

• UPF (Unified Picture Format):standardization of picture dataformat with base picture size ofVGA 640 x 480 pixels.

3.9 IrMCThe IrMC (Infrared Mobile Com-munications) standard,established by the IrMC WorkingGroup, is targeted at mobile com-munications devices, such asmobile phones, notebook PCs,PDAs, pagers, and even wrist-watches. The core members ofthe working group are Ericsson,Motorola, Nokia, NTT DoCoMo,and Puma. Phase 1 of the IrMCspecifications covers the follow-ing use models:

• Exchange of Objects betweenmobile devices by means of theOBEX (Object Exchange) pro-tocol. Examples of objectsinclude the Versit vCard, vCal,vMsg and vNote. Very small de-vices such as pagers andwatches can cut down theirIrMC code size significantly byimplementing the very tiny,connectionless, limited func-tionality Ultra protocol stack.

• Call Control commands trans-mitted between the mobileequipment and terminal equip-ment (car cradle or PC/PDA).

• Audio for real time voice andcontrol service data transmis-sion made possible by theRTCON (Real-time TransferControl) protocol. RTCON is afull duplex protocol that adoptsthe ITU-T G.726 32 kbpsADPCM as the common voicecodec (compression/decom-pression) method. To avoid anynoticeable clipping of sound, itrequires the use of IrDA trans-ceivers with latency of lessthan 500 µs.

The IrMC specification definesvarious levels of support for theabove applications. Some of the

support is mandatory, while mostothers are optional.

To meet the low power consump-tion requirements of mobileTelecom products, the Low

Power Option has been added inIrPHY version 1.3. This lighterphysical layer defines a muchshorter link distance of 20 cmfrom IrMC to IrMC devices, and30 cm from an IrMC to a standardpower device. The shorter linkdistance results in up to ten timessavings in LED drive current.

Figure 3.15 IrMC Architecture.

IASCLIENT

IASSERVER

IAS DB-P'n'P

CONNECTIONORIENTED

OBEX SERVER/OBEX CLIENT

CONNECTION-LESS

IrLMP

IrLAP

IrDA-SIR FIRCSD

IrDA PHYSICAL LAYERS

. . .

IrCOMM

TINYTP

OBEX DB

LITE ULTRA

22

3.10 IrOBEX (IrDA OBJECTEXCHANGE PROTOCOL)OBEX is an application layer pro-tocol that enables differentsystems to exchange a wide vari-ety of data and commands in astandardized fashion. OBEX isquite similar to HTTP, in that ob-jects carry information aboutthemselves in the form of head-ers. As such, it addresses one ofthe most common applications(file transfer) on either PCs orembedded systems, in that it cantake the objects from the host,and beam them over to the receiv-ing device using infrared. AsOBEX takes the task out of theapplications of dealing with thecommunication process, it en-ables easy implementation of anIrDA communication transactionand simplifies the development ofcommunications enabled applica-tions.

OBEX consists of the followingcomponents:

• Object Model: Provides a wayof classifying the objects. Theobject model contains informa-tion about the objects, as wellas the objects themselves.

• Session Model: The Session pro-tocol takes cares of thecommunication between twodevices. It make use of a binarypacket based request/responsemodel.

• IAS entry: It defines an IAS en-try for default OBEX server,and hint bits for the service.

Figure 3.16 shows where OBEXfits into the overall scheme of theIrDA protocols.

Figure 3.16 IrOBEX Architecture.

3.11 SOFTWARE SUPPORTThe following manufacturers pro-vide application software, driversand IrDA protocol stacks. The ad-dresses and phone numbers arelisted in the Appendix underReference List.• Microsoft - Operating System• Linux -Operating System (under development)• Geoworks• Extended System• CounterPoint Systems• Puma Technology• Actisys• Parallax Research• Okaya SystemWare• Phoenix• Open Interface

Microsoft Windows operating sys-tems support the IrDA protocolstack, and provide IR sockets asthe application programming in-terface for companies developingIrDA applications. CurrentlyMicrosoft provides IrDA supportfor the following operating sys-tems: Windows 95, Windows 98,Windows CE, and Windows 2000.

THE WIDE WORLD OF APPLICATIONS

OBEX PROTOCOL

IAS SERVICES

IrLMP LM-MUX

IrLAP

VARIOUS TRANSPORT(TINY TP, CONNECTIONLESS)

DEFAULT OBEXAPPLICATION

23

4. IrDA Future Directions

4.1 Very Fast IR (VFIR)Very Fast IR (VFIR) is the highspeed extension of IrDA Data 1.1,pushing the cost/performancecurve to a new level bringing endusers faster throughput withoutsubstantial increase in cost. Fullybackward compatible with previ-ous data rates, it represents thelowest cost and highest speedcordless technology available to-day. VFIR addresses the emergingcapabilities of, and user demandfor, digital cameras, scanners,portable storage devices and in-frared LAN access points as wellas for notebook and desktop PCs.The IrDA board has approvedchanges to the physical layer andlink access protocol specifica-tions that enable the 16 Mbpsextension.

The new standard is based on ajoint proposal from Hewlett-Packard Company, IBMCorporation, and Sharp Corpora-tion and has the followingfeatures.

• Data Rate - 16 Mbs• Fully backward compatible

with previous implementationsof IrDA

• Link Distance (same as previ-ous versions of IrDA) - 1 meterminimum and ±15° field ofview.

• Encoding - HHH(1, 13) withscrambling that optimizes en-coding efficiency, duty cycleand duty cycle variation

• Reduced receiver latency of100 µs for higher throughput.

• Minor changes in the IrDAIrLAP protocol, such as defin-ing a new data rate bit for16 Mbs and increased windowsize from 7 to 127 (optional).

24

25

5. Agilent Products

5.1 INTRODUCTIONHaving selected an architecture,

the IrDA system designer can

now select the proper components

and develop the circuit diagram.

Agilent manufactures a broad se-lection of products that may beused to implement a variety ofIrDA designs. Please refer to theAgilent Infrared Components Se-lection Guide for an overview ofthese products. This section willdescribe the characteristics ofthese various components. Pleasesee the Data Sheets or ProductCatalog for specific parametricinformation.

5.2 INTEGRATED TRANSCEIVERMODULESAgilent offers a wide range of SIR,MIR and FIR transceivers. VFIRtransceivers are currently in de-velopment. Agilent transceiversare designed to offer fully IrDAcompliant receive and transmitfunctions for the system. Thetransmitter converts the modu-lated pulses received from the I/Ochip or endec into IR light pulses.The receiver detects IR lightpulses and converts them to TTLor CMOS level compatible electri-cal pulses.

The integrated design of Agilenttransceivers enables ease ofimplementation and complianceto all IrDA physical layer specifi-cations. It includes the optics,LED with buffered LED driver,and PIN photodiode and receivercircuits in one package. The de-sign of the transmitter guaranteesthe intensity and viewing anglesrequired by IrDA, while the re-ceiver circuitry enables datatransfer at guaranteed link dis-tances from 0 cm (nose to nose)to at least 1 meter, even in thepresence of ambient electrical andoptical noise.

All Agilent transceivers areguaranteed to meet all IrDAspecifications over the operatingtemperature, supply voltage andlife of the part. All electricalspecifications are also guaranteedover temperature, voltage andlifetime. Supply voltage range isover the full range from 2.7 V and5.5 V.

Over the years Agilent’s trans-ceiver offering has evolved toincorporate more and more fea-tures enabling ease of use andfulfilling market needs for minia-ture packaging, low powerconsumption, improved opticaland electrical performance re-quired of higher data rates, andadded sophistication. Followingare some of the features that havebeen added:

Constant current: The currentgenerated from an external volt-age source using an externalresistor usually drives the LEDportion of the transceiver. How-ever, this is vulnerable to voltagefluctuations. An alternative wouldbe to drive the LED internally us-ing a constant current source.Besides being resistant to voltage

fluctuations, this has the addedadvantage of reduced componentcount by doing away with the ex-ternal resistor. This feature isfound in the HSDL-3201 and theHSDL-3202.

I/O VCC interface: Low powerconsumption and miniaturizationusually lead to development oflow-voltage applications.Handheld devices are currentlyheading toward voltages as low as1.8 V. This implies that transceiv-ers should be capable ofinterfacing with low logic levelASICs. The I/O VCC interface en-ables the transceiver to interfacewith such low voltage logic levels.This feature is currently found inthe HSDL-3202 and is expected tobe in all next generation trans-ceivers that fit such a low voltageapplication scenario. See the sec-tion on I/O VCC interface inArchitectural Options.

Power management: To operateover the entire link distancespecified by IrDA, the IrDA physi-cal layer specification requiresLED intensity ranging from40 mW/Sr to a maximum of500 mW/Sr. A long link distance

Figure 5.1 Agilent Integrated Transceiver Modules.

26

(1 m) would require a high inten-sity, but the same intensity atshorter link distances would beoverkill. Reducing the intensitydown to the required level willhave the LED operating at an opti-mal level and will also result inlower power consumption. Useradjustable optical power level ad-justment is provided via softwareor hardware controllable pins.This feature is found in the HSDL-2300. See the section onInterfacing for adaptive powermanagement under Architectural

Options.

Serial Interface for

Transceiver Control (STC):

Adding new features to transceiv-ers usually translates to increasedpin count for the user to accessand control these features. Toovercome this, IrDA specified theSerial Interface for TransceiverControl. STC is used to controland program the features of thetransceiver, which include datarate control, input/output controland optical power management.This feature is found in theHSDL-3210 and will be availablein Agilent’s next generation oftransceivers. See the section onSTC interface in Architectural

Options.

TransmitterThe transmitter uses a high speed,high efficiency TS AlGaAs LED,along with a high speed drive cir-cuit to produce high power IRpulses with minimal pulse widthdistortion. The transmitter fea-tures a buffered input to reduceinput current so it can be drivendirectly by CMOS logic. The effi-ciency of the LED and the opticaldesign of the package guaranteeIrDA specified minimum andmaximum light intensity. Thespeed of the LED and drive cir-

cuitry minimizes the rise and falltimes of the LED signal edges, im-proving the detection capability ofthe corresponding IR receiver.The transmitted radiant intensityallows for an additional guardband to accommodate for lossesdue to the cosmetic window andthus guarantees the required mini-mum and maximum intensitylevels as specified in the physicallayer specification of the IrDA,even outside the system. Thetransmitter uses fewer externalcomponents. These include powersupply filter capacitors and LEDcurrent limiting resistor. The re-sistor is not required when aconstant current source for LEDdrive is used such as in the caseof HSDL-3201/3202 options. Thechoice of components is furtherdiscussed in the section Layouts

and Schematics and can also befound in the respective datasheets.

ReceiverUnlike the transmitter portion, thereceiver must handle a large dy-namic range, multiple data ratesand line codes, making it moredifficult to design. The receiverdigitizes the incoming signal bycomparing it to a threshold value.The dynamic range required byIrDA of the receiver, for a onemeter link are 4 µW/cm2 to500 mW/cm2 for 2.4 to 115.2 kbpsand 10 µW/cm2 to 500 mW/cm2 for0.576 to 4 Mbps. This implies thatfor higher data rates the receiverthreshold should dynamically ad-just according to the incomingsignal amplitude. Since noise lev-els are higher at higher data rates,a fixed threshold level would missbits or give rise to extra bits in thepresence of noise. AGC (auto-matic gain control) circuitry canbe used in an IR receiver to obtaina wide dynamic range. However,

this does not guarantee compli-ance to IrDA specifications.Moreover, AGC circuitry has beenshown to have high bit error rate(BER) at large signal levels (shortlink distances). Alternatively, anadaptive threshold circuit can beused which quickly adapts to anincoming signal and sets thethreshold for the quantizer. Theadaptive threshold circuit in com-bination with a squelch circuitmakes the receiver robust and im-mune to spurious signals andprovides a wider dynamic rangeof operation that is required ofhigher data rates.

Power Supply and EMI NoiseAn IR transceiver implementationrequires special attention to EMIand power supply noise. The ana-log functions (IR detector andpre-amplifier) are very sensitive,and thus require more attention toEMI and power supply noise thantypical digital integrated circuits.Noise immunity is the maximumamount of noise that the receivercan sense before exceeding a 10-8

bit error rate. Noise levels abovethe noise immunity will effec-tively reduce the receiversensitivity and therefore the IRlink distance. All IR transceiversolutions require improvedground plane design and capaci-tive decoupling over standardpractices for digital integrated cir-cuits. See the section on Board

Layout Guidelines for low noisedesign techniques.

Ambient LightThe IrDA Physical LayerSpecifications require a receiverto operate correctly in thepresence of sunlight,incandescent light and fluorescentlight. Agilent’s IR transceivermodules are guaranteed by designto work under all of the above-

27

specified conditions. Theyincorporate a combination ofoptical and signal processingtechniques to achieve thisperformance. The package moldcompound is tinted with dye tofilter out visible wavelengths. Thelens of the detector is designed tobe sensitive to light only withinthe IrDA viewing angle andexclude light from outside of thatangle. The first stage amplifier ofthe receiver contains daylightcancellation circuitry to eliminatethe ambient light portion ofincoming signals, and theamplifier is bandwidth limited toreject signals out of the IrDAband. Using these techniques,Agilent ensures robustperformance under all IrDAspecified ambient lightconditions.

5.3 Endecs (Encoders/Decoders)The HSDL-7000 and HSDL-7001are endec chips that perform theIrDA 3/16 encode/decode functionfor data rates up to115.2 kbps, asdescribed in the section on IrDAphysical layer. These devicesfunction as the interface betweena standard UART and the IR trans-ceiver.

HSDL-7000

The HSDL-7000 performs the IrDA3/16 encoding and decoding of thepulses from and to the IR trans-ceiver, as specified by IrDA. It isthe interface chip between the IRtransceiver and a UART. Theendec requires a BAUDOUT sig-nal, which is 16 times the selectedbaud rate. This is either suppliedby the standard UART or by someexternal means. The HSDL-7000 ispackaged in an 8 pin SOIC pack-age. The HSDL-7000 interfacesdirectly to the HSDL-1001, with noexternal components.

HSDL-7001

Like the HSDL-7000, the HSDL-7001 performs the IrDA 3/16encoding and decoding of thepulses from and to the IR trans-ceiver. The HSDL-7001 is designedwith an internal programmableoscillator for applications wherethe 16x clock from the serial datasource may not be available. Thisoscillator requires only an exter-nal crystal, and uses three datainputs to program the clock.These inputs may be signals suchas RTS and DTR from the serialport which would otherwise beunused. If a BAUDOUT signal isavailable, it may be used insteadof the internally generated clock.For transmission, this endec addsthe versatility of a 1.6 µs pulse op-eration. This allows baud rateslower than 115.2 kbps to use1.6 µs pulses for lower powerconsumption. The HSDL-7001 op-erates on a supply voltage rangefrom 2.7 V to 5.5 V, and is pack-

aged in a 16 pin SOIC package.The HSDL-7001 interfaces directlyto the HSDL-1001, with no exter-nal components.

Endec Netlists

For system designers who preferto embed IrDA communicationswith an ASIC, Agilent will providethe netlist for the HSDL-7000 atno charge. The HSDL-7000 isabout 200 gates logic and theHSDL-7001 is about 1000 gates.This may be useful for system de-signers who do not require thefunctionality of a full I/O chip andwho do not wish to use a discreteUART. With the IR modulation/demodulation function incorpo-rated into the system ASIC, it canconnect directly to the IR trans-ceiver module. Please refer to theapplication note 1119, “IrDAPhysical Layer Implementationfor Agilent’s Infrared Products”,for further information.

Figure 5.2 Agilent Endec (Encoders/Decoder).

28

5.4 DISCRETE EMITTERS ANDDETECTORSAgilent makes a number of dis-crete IR emitters and detectorsfor supplementing an IrDA link orfor proprietary applications. Inmany cases, it may be desirablefor a designer to utilize the basicIrDA framework but make minormodifications for a particular re-quirement. For example, aparticular application may requiredata transfer over distancesgreater than 1 meter, or size andpower constraints may dictate alow power, short distance, sub-miniature solution.

For long distance applications,Agilent manufactures IR emittersin a variety of package styles.These emitters may be used tosupplement the IR output of thetransceiver modules by connect-ing the emitters in series, or byusing the HSDL-1001’s capability

to drive an external emitter. Fordetails on extended distance ap-plications, please see the sectionon Extended Transmission Dis-

tance - Beyond IrDA.

For lower power, space con-strained applications where a fullmeter distance is not required,Agilent manufactures IR emittersand detectors in subminiaturepackages. These products enabledevelopment of “IrDA compat-ible” short distance links. Anumber of support circuits areavailable, or the analog functionscan be incorporated into thesystem’s ASIC.

A complete description of theseproducts is available from theAgilent website.

Figure 5.3 Agilent Discrete Emitters and Detectors.

29

6. Architectural Options

IntroductionThis section presents a number

of system architectures and

typical products for which they

are appropriate. Choosing an

architecture is where an IrDA

design begins.

6.1 TYPICAL ARCHITECTURESInfrared transceivers have gainedwidespread acceptance and arebeing used in a wide variety of ap-plications. The applicationplatforms can be broadly classi-fied into personal computers,mobile phones, handheld (e.g.PDAs) and consumer electronics(e.g. MP3 players). Figures 6.1 -6.4 illustrate how an IR port fitsinto these different platforms.

As mentioned before, ver 1.0 IrDAarchitecture was intended to workwith a serial port on a conven-tional UART. To achieve this, anumber of design approaches arepossible, but will vary slightlybased on where the serial datacomes from and where the encod-ing is done. A number of vendorsnow offer I/O chips with the IrDAencoding and decoding built in.

Typical architectures will usuallyfall into one of the categories de-

Figure 6.1 PC Architecture.

Figure 6.2 Mobile Phone Architecture.

scribed below. The UART withendec (Figure 6.9) architecturedescribed below is similar to theblock diagram (Figure 3.3) de-scribed in section 3 on IrDAstandards, while the easiest toimplement in a system are the

“Super I/O” and 4 Mb I/O architec-tures (Figures 6.5 and 6.6). Forspecific device recommendations,please refer to the applicationnote, “IrDA Physical Layer imple-mentation for Agilent’s InfraredProducts”.

MAINMEMORY SOUND

CHIPSET

SYSTEMBIOS

SUPER IO

SOUTHBRIDGE

NORTHBRIDGE

AGPGRAPHICS

ACCELERATOR

CPU

MONITOR

IR

PCISLOTS

ISASLOTS

INTR

DSP CORE

AUDIO INTERFACE

IR

RF INTERFACE

SPEAKER

MICROPHONE

TRANSCEIVERMOD/DE-

MODULATOR

USERINTERFACE

MICROCONTROLLER

ASICCONTROLLER

30

Figure 6.3 PDA Architecture (handheld platform).

Figure 6.4 MP3 Architecture.

6.2 2.4 kbps TO 115 kbps SUPER I/O

Typical Applications:

Notebook and Desktop PCs

Most PC systems, which typicallyhave a broad range of I/O require-ments, can utilize a “Super I/O”chip. In addition to a UART withIrDA encoding and decoding builtin, these chips are also able tocontrol the floppy disk drive, harddisk drive, parallel port, keyboard,modem and more.

The serial IR output and input ofthese Super I/O chips connect di-rectly to the input and output ofAgilent’s 115.2 kbps IR transceiv-ers, with no support logicrequired. For any I/O chip, theconfiguration register bits must beset so that the I/O chip is set tooperate in the proper modes. Thesettings should be half-duplex,IrDA, SIR, transmit active highand receive active low, UART2 isusually enabled by the bit settings.

Some I/O chips require that thetransmit signal be AC coupled tothe transceiver module to preventsetting the output in a DC “on”state at power-up. Please refer tothe Application Note, “IrDA Physi-cal Layer Implementation forAgilent’s Infrared Products” fordetails.

Various semiconductor manufac-turers including NationalSemiconductor and StandardMicrosystems Corporation (SMC)

Figure 6.5 Super I/O Interface (2.4 kbps to115.2 kbps)

PCMCIACONTROLLER

CPU FOR EMBEDDEDAPPLICATION

TOUCHPANEL

ROM

RAM

LCDPANEL

RS232CDRIVER

COMPORT

IR

MICROCONTROLLER

DAC

LCDPANEL

FLASHMEMORY

AUDIODECODER

LCDCONTROLLER

IRCONTROLLER

SPEAKER

Ir Txd

Ir Rcd

IrXcvr

HSDL-1001

SUPER I/O

31

make these Super I/O chips.Please refer to Application Note,“IrDA Physical Layer Implementa-tion for Agilent’s InfraredProducts” for specific device rec-ommendations.

6.3 2.4 kbps TO 4 Mbps

Typical Applications:

Notebooks, Printers or others

with ISA or PCI Bus

Since a 115.2 kbps link, as definedby version 1.0 of the IrDA physicallayer specification, was designedto work with a conventionalUART, it was limited to the maxi-mum data rate supported by theUART, which is 115.2 kbps. Theversion 1.1 specification extendsthe data rate to 4 Mbps. Thismakes it necessary to have an I/Ointerface different from a conven-tional UART, and also requires adifferent modulation scheme.

The block diagram for a 4 MbpsPhysical Layer looks similar toFigure 6.6, except that the UARTand the encode/decode circuitryare replaced with an I/O devicethat is designed for 4 Mbps IrDAdata communication. Since allIrDA links are required to start upat 9.6 kbps (3/16 modulation), thisdevice does the encoding and de-coding for the 115.2 kbps (3/16modulation) channel as well asthe 4 Mbps (4PPM modulation)channel. A number of I/O chipsthat connect to the ISA bus aswell as the PCI bus are available.Please refer to the ApplicationNote, “IrDA Physical Layer Imple-mentation for Agilent’s InfraredProducts” for a listing of I/O de-

vices and recommendations forinterfacing with them.

Note: All of the following archi-tectures operate up to a maximumdata rate of 115.2 kbps.

6.4 16550-type UART,MICROCONTROLLER OR EMBEDDEDI/O WITH 16x CLOCK

Typical Applications: PDAs,

Industrial Controllers, and

Analytical Instruments

Many electronic devices such asPDAs, Industrial controllers andanalytical instruments may use a16550 or similar UART for the I/Ointerfaces, or have the UART em-bedded into an ASIC. As seen inFigure 6.7, the UART’s TXD out-put is NRZ (non-return to zero)signal that is 100% duty cycle (fullbit width). This signal must be

Figure 6.6 2.4 kbps to 4 Mbps

modulated before transmission,and demodulated (stretched)when received.

A discrete encoder/decoder(endec) chip, such as theHSDL-7000, is used to modulatethe data. Figure 6.7 shows howthe HSDL-7000 has an IrTXD out-put that is 3/16 of the bit period (3of 16 clock cycles). The 16x clockis typically available as a UARToutput, and is usually calledbaudout.

In Figure 6.8, the received pulse(IrRXD) is stretched by the endecto the width of 16 clock pulses, orthe original bit period. The clocksat both ends of the link do notneed to be synchronized, but doneed to be at the same frequency,as determined at link startup.

Figure 6.7 IR Transmit.

Figure 6.8 IR Receive.

16 CLOCKCYCLES

3 CLOCKCYCLES

16 x CLOCK

TxD

IrTxD

16 CLOCKCYCLES

3 CLOCKCYCLES

16x CLOCK

IrRxD

RxD

Ir Txd

Ir Rcd (0.5 TO 4 Mbps)

HSDL-1100

IRCONTROLLEROR SUPER I/O

Ir Rcd (2.4 TO 115.2 kbps)

32

For system designers who preferto embed IrDA communications inan ASIC, Agilent will provide theIrDA ver 1.0 endec netlists at nocharge. This may be useful for sys-tem designers who do not requirethe functionality of a full super I/Ochip, and who do not wish to usea discrete UART. With the IR en-code/decode functionincorporated into the systemASIC, it can then interface di-rectly with the IR transceivermodule. Please refer to the appli-cation note, “IrDA physical layerimplementation for Agilent’sInfrared Products”.

Note that the IrDA transceiversare designed specifically formodulated data and will not workin NRZ mode. This is due to thefact that the receiver generates anoutput pulse (RXD) for each in-coming IR pulse. The width of thereceiver’s RXD output pulse istypically not more than 20 µs, re-gardless of the width of the IRinput pulse. Thus, a continuousstring of “1” bits (in NRZ coding)would look like one single incom-ing bit, and thus would beerroneously translated to just onepulse at the transceiver’s output.

Figure 6.9 16550 UART or Microcontroller with 16x Clock.

6.5 UART, MICROCONTROLLER OREMBEDDED I/O WITHOUT CLOCK

Typical Applications:

Custom I/O, Portables, and

some Microcontrollers

In some systems, a 16x clock forthe endec may not be provided bythe system and must be gener-ated. As mentioned earlier, IrDAonly requires that a link operate at9.6 kbps. Thus, a clock for a sys-tem that runs only at 9.6 kbpsneed only provide a fixed fre-quency clock that runs at 16 times9600, or 153600 Hz. A system thatneeds to go faster will need ameans of changing the data rateand thus programming the clock.This can be done with either theHSDL-7000 and some external cir-cuitry, or with the HSDL-7001

Figure 6.10 UART, Microcontroller or Embedded I/O without Clock.

which has an internal program-mable oscillator. In either case,the oscillator is typically pro-grammed with RS232 lines thatare not used in an IR link, such asRTS and DTR, or others. Such asystem would need software driv-ers to correctly configure theprogramming signals to conveybaud rate information. Please seethe references for suppliers ofsoftware drivers.

Txd

RxD Ir_RxD

Ir_TxD

HSDL-1001HSDL-1000

16550 UART ORMICROCONTROLLER

WITH 16x CLOCKENDEC

16x CLOCK

HSDL-7000

Ir Xcvr

TxD

RxD Ir_RxD

Ir_TxD

HSDL-1001HSDL-1000

16550 UART ORMICROCONTROLLER

WITH 16x CLOCKENDEC

16x CLOCKGENERATOR

Ir Xcvr

33

6.6 INTERFACE TO RS-232 PORT

Typical Application: Add IR

functionality to RS232 port

Some IR ports may be designed towork with existing products andcommunicate through the RS232port, or designed as external IRadapters. In these cases, the archi-tecture is similar to Figure 6.10,where the data needs to be en-coded but no clock is available.As above, the clock will need tobe generated in the IR adapter,and to go faster than 9.6 kbps, willrequire a programmable clock.Also, the voltage levels need to beshifted to RS232 levels back tologic levels using one of the com-mercially available RS232interface circuits. Finally, suffi-cient power must be provided sothat the peak pulsed LED forwardcurrent is available to the trans-mitter while sending data. Theaverage current will be If (fromdata sheet) • 3/16 • (percentage of0s in the data stream). At datarates slower than 115.2 kbps, thepulse width may be fixed at 1.6 µsinstead of 3/16 of the data rate toreduce average current.

6.7 I/O VCC INTERFACING WITHLOW VOLTAGE ASICsAs designs for handheld devicesbecome more power efficient andto move toward low voltageASICs, it becomes essential toprovide a low voltage I/O inter-face. ASICs can operate atvoltages as low as 1.8 V, and inter-facing with current transceiverscan be through the use of levelshifters. Alternatively, transceiv-ers with a low voltage interfacingcapability, such as the HSDL-3202,can be used. The following circuitdiagram (Figure 6.12) shows atypical interfacing technique ofthe HSDL-3202 with a low voltageASIC logic controller. The ASIC isassumed to be running at a supplyvoltage as low as 1.8 V. It should

Figure 6.11 RS232 Adapter.

be noted that the ASIC is assumedto have a built-in IR controllercore. The above interfacing is re-quired since the IR controller isrunning at a 1.8 V supply, thesame as the ASIC. Essentially,I/O VCC enables interfacing withlow input-output logic circuits. Ifan external IR controller were tobe used, at a supply voltage thesame as that of the transceiver,the I/O VCC interface is not re-quired. I/O VCC can be shorted toVCC of the transceiver.

Figure 6.12 I/O VCC Interfacing.

6.8 INTERFACING FOR ADAPTIVEPOWER MANAGEMENTAgilent transceivers provide auser-controllable power manage-ment option in the form of twopins, which can be controlled viaa micro-controller. This feature iscurrently available in HSDL-2300,HSDL-3600 and HSDL-3610 op-tions. At close link distances it isnot necessary to transmit at fullpower. It would be more eco-nomical to transmit at therequired power levels. This powerconserving mechanism is madeavailable by selecting from the

TxD

RxD Ir_RxD

Ir_TxD

HSDL-1001

ENDEC

RS232LEVEL

SHIFTERBAUD DECODE/

16x CLOCKGENERATOR

CLOCKCONTROL

TxD

RxD

RS232PORT

CLOCKCONTROL

HSDL-7001 (WITH CLK GEN)HSDL-7000 (W/O CLK GEN)

Ir Xcvr

LEDCURRENTS

SOURCE

VLED

TxD

RxD

SD

AGND

GND

VCC

VCC I/O VCC

RX PULSESHAPER

8

TxD 7IR

CONTROLLER

ASIC VCC ASLOW AS 1.8 V

ASIC

C16.8 µF

C26.8 µF

RxD 6

SHUT DOWN 5

4

3

2

1

TxD

RxD

GPIO

VCC = 2.7 TO 3.6 V

SH

IELD

34

three different power level set-tings in the transceiver by settingthe two mode select pins via soft-ware control in a microcontroller.The mode select table is shown inTable 6.1.

The implementation can either bestatic or dynamic. In the staticcase, the user is required to selectand set the transmit power levelrequired according to the tablegiven above. In the dynamic case,power mode control is initiatedand managed by the primary de-vice. For example, in the case of aPDA (primary) communicatingwith the printer (secondary), thePDA would control the powermode. A sample session is men-tioned below. This is just one ofthe many possible ways of imple-menting adjustable power. Theuser is assumed to be using theJetBeam protocol stack.

1. On PDA power on, the JetBeamstack is initialized for adaptivepower mode.

2. The PDA’s startup code initial-izes a “threshold” value, whichis the number of bytes sent be-fore the power mode is cycledup or down. This in essencesets the frequency at which itadapts its power level.

3. The JetBeam stack programsthe mode pins of the trans-ceiver to the default high state.

Mode Mode Tx function0 1

1 0 Shutdown0 0 Full distance power0 1 2/3 distance power1 1 1/3 distance power

Table 6.1

4. The PDA then establishes anIrLAP connection.

5. Data is transmitted across andthe algorithm tracks the num-ber of bytes transmitted.

6. Once the “threshold” number ofdata has been transmitted suc-cessfully, the power level isstepped down one notch. The“threshold” counter is reset andsteps 5 and 6 are repeated untilthe power mode reaches thelowest level.

7. In the event that anacknowledgement is not re-ceived by the PDA from the

Figure 6.13 Power Management Interface.

SP

R1

Cx1

MC68328

24 5 1

Cx2

PK0

PK1

PK2

RxD

TxD

TxD

RxD

FIR_SEL

LEDA106, 7

GND

MD0MD1

VCC

25 26

52

51

50

HSDL-3600

8

3

9

VCC

printer, it is quite possible thatthe packet sent out was not re-ceived by the printer or wascorrupted. In this case, the PDAreceives a timeout. The algo-rithm responds by stepping upthe power level and re-transmit-ting the previous packet. Thisprocess is repeated until thecommunication session is re-established.

The hardware interfacing using aMotorola Dragonball MC68328and HSDL 3600 as an example isshown in Figure 6.13.

35

6.9 SERIAL TRANSCEIVER CONTROLSerial Transceiver Control (STC)is the latest way to interface tothe transceiver. This 3-wire busallows connection of up to 6 indi-vidually addressable devices andoffers a common electrical inter-face. Registers on board thetransceiver store operating modesand states, eliminating the needfor additional status/mode pins –this electrical interface can bestandardized across different ven-dors and transceivers. This allowsuse of a generic framer, andbrings plug and play down to thetransceiver level.

The first Agilent offering with STCis the HSDL-3210.

STC “transactions” are sent anddata received on data lines multi-plexed with the normal transmitand receive lines, while a clockline determines whether the trans-ceiver operates as a normal

Figure 6.14 STC Modes.

Figure 6.15 Addressing Scheme for Two Transceivers (short distance).

transceiver or in STC mode. Thetransactions may be WRITE only(change operating mode) orREAD (obtain operating mode orcondition). Typical operatingmodes are stored in the main con-trol registers, and include speed,power levels, receiver output en-able, and LED enable. There areextended index registers, whichare optional, except for two,ManufacturerID and DeviceID.

Figure 6.14 shows the multiplex-ing of SCLK write and read lineswith the normal IR transmit andreceive lines. Figure 6.15 showstwo transceivers connected to oneIR controller.

6.10 COMMAND FORMATThe command format consists ofa mandatory command phase andan optional response phase. Thecontroller always is the master,and initiates commands. The

transceiver is the slave and re-sponds to commands/readrequests. The command phase is asingle byte, with a bit indicatingwrite/read, a 3-bit address fieldand a 4-bit command index field.The response from the transceiveris carried in the 2nd byte. Thereare 3 byte commands which usethe extended index registers. Thecommand consists of the first 2bytes while the response is car-ried on the 3rd byte. Thecommands/responses are sent inlittle endian form, i.e., the leastsignificant bit of the first byte issent first, and the most significantbit of the 2nd byte (or 3rd byte inthe case of a 3 byte transaction) issent last.

Figure 6.16 shows the commandformat.

The address field is defined in thespecification, and can be used to

TRANSCEIVER

INFRAREDCONTROLLER

(MASTER)

SWDAT (WRITE COMMAND)

SRDAT (SEND RESPONSE)

SCLK (CLOCK COMMAND/RESPONSE)

TRANSCEIVER(SLAVE) (SLAVE)

INFRAREDCONTROLLER

(MASTER)

Txd

Rxd

SCLK (QUIESCENT)

STC - NORMAL MODE STC - COMMAND/RESPONSE MODE

INFRAREDCONTROLLER

TX/SWDAT

RX/SRDAT

SCLK

OPTICALTRANSCEIVER

OFE A

TX/SWDAT

RX/SRDAT

SCLK

OPTICALTRANSCEIVER

OFE B

IRTX/SWDAT

IRRX/SRDAT

SCLK1

SCLK2

VCC

36

differentiate between differenttransceivers on the bus.

The following figures show thewrite and read transaction for-mats.

Figure 6.17 shows the write com-mand. Note that the “C” bit is setto “1” to indicate a write transac-tion. The index field points to aparticular register to write to (orread from, in the case of a readtransaction).

Figure 6.16 Command Format.

Figure 6.17a. Write Transaction Bitstream Representation (normal write transaction).

Figure 6.17b. Write Transaction Bitstream Representation (extended write transaction).

Figure 6.18 shows both 2- and 3-byte read transactions. Note thatthe “C” bit is now set to “0”. Theresponse from the slave is the lastbyte of the transaction.

DATA (SLAVE RESPONSE) OR E_INDX (8)2nd BYTE (WRITE DATA, OR RESPONSE IN 2 BYTECOMMAND, OR EXTENDED INDEX IN 3 BYTE COMMAND)

7 0

DATA (SLAVE RESPONSE)3rd BYTE (RESPONSE FOR EXTENDED COMMAND)

7 0

ADDR (3) INDX (4) C (1) 1st BYTE (COMMAND)

7 0

7 0 7 0

C BIT = “1” (WRITE OPERATION)

LAST BIT TO BE TRANSMITTED

2nd BYTE (WRITE DATA) 1st BYTE (COMMAND)

DATA (WRITE DATA) ADDR INDX 1

FIRST BIT TO BE TRANSMITTED

C BIT = “1” (WRITE OPERATION)

3rd BYTE (WRITE DATA)

DATA (WRITE DATA) E_INDX ADDR 1 1 1 1 1

LAST BIT TO BETRANSMITTED

2nd BYTE (EXTENDED INDEX) 1st BYTE (COMMAND)

FIRST BIT TO BE TRANSMITTED

7 0 7 0 7 0

INDX = “1111”(ESC CODE FOR EXTENDED INDEXING)

37

Figure 6.18a. Read Transaction Bitstream Representation (normal read transaction)

Figure 6.18b. Read Transaction Bitstream Representation (extended read transaction).

LAST BIT TO BETRANSMITTED

ADDR INDX 0

FIRST BIT TO BETRANSMITTED

07

1st BYTE (COMMAND)

C BIT = “0” (READ OPERATION)

DATA (SLAVE RESPONSE)

LAST BIT TO BETRANSMITTED

2nd BYTE (SLAVE RESPONSE)

FIRST BIT TO BETRANSMITTED

07

3rd BYTE (SLAVE RESPONSE)

E_INDX ADDR 1 1 1 1 0

7 0 07

INDX = “1111”(ESC CODE FOR EXTENDED INDEXING)

C BIT = “0”(READ OPERATION)

LAST BIT TO BE TRANSMITTED FIRST BIT TO BE TRANSMITTED

2nd BYTE (EXTENDED INDEX) 1st BYTE (COMMAND)

DATA (SLAVE RESPONSE)

07

LAST BIT TO BETRANSMITTED

FIRST BIT TO BETRANSMITTED

38

6.11 BUS TIMINGThe bus timings are designed tobe simple and to minimize the ef-fects of timing skew. This sectiondiscusses some key points regard-ing the bus timings, thenillustrates with waveforms of typi-cal STC transactions.

Bus timing points to noteA. Data is transferred in Little

Endian order. That is, the LSBon the first byte is transmittedfirst, and the MSB of the 2nd or3rd byte is transmitted last.This is illustrated in Figures6.17 and 6.18.

B. There are no gaps betweenbytes in the command or re-sponse phases.

C. Each byte in the command andresponse phase is preceeded bya start bit on the SCLK line.

D. Data sampling and clocking:i. Input data is sampled on therising edge of SCLKii. Output data from the control-ler is clocked out on the fallingedge of SCLKiii. Output data from the slave isclocked out on the rising edgeof SCLK

E. The first low-to-high transitionof SCLK indicates that an STCtransaction is pending. On re-ceipt of his rising edge, theslave will disable the LED. Thenext SCLK low-to-high transi-tion indicates the start cycle,followed by the commandphase (which the controllerputs out on the SWDAT line).The LED needs to be disabledsince TXD and SWDAT are mul-tiplexed. If the LED were notdisabled, then the LED willpulse according to the SWDATbitstream.

F. The LED is re-enabled (by theslave) on the last SCLK of theSTC transaction bitstream.Normal infrared transmissioncan resume. No SCLK transi-tions should then take placeuntil the next STC transactionotherwise the LED will be dis-abled (see above, the firstlow-to-high SCLK transition willcause the slave to disable theLED in preparation for an STCtransaction).

G. The response from the slave iscarried on the SRDAT line,which is multiplexed with RXD.The detector is (internally) dis-abled by the slave during theresponse phase. This is to pre-vent stray IR transitions fromcorrupting the SRDATbitstream.

H. During a READ transaction, thecontroller holds the SWDATline low for 1 clock after send-ing the ADDR and INDX byte(or bytes, if using Extended In-dex addressing).

It then holds it high and lowagain 3 clocks before the end ofthe transaction. This is a sureway for the transceiver to moni-tor the impending end of atransaction, rather than bycounting pulses.

I. When powered up, the trans-ceiver is not ready to performIR transmissions yet. The con-troller has to initialize thetransceiver first. The power upsequence in brief:i. On power up, an internallygenerated signal in the trans-ceiver sets the 3 controlregisters:

a) Control register 0:• Bit 0: shutdown mode• Bit 1: RX disabled• Bit 2: LED disabled

b) Control register 1:• Bit 0-7: SIR mode

c) Control register 2:• Bit 0-7: Power at 100% level

d) At this point, the transceiveris not ready. Before issuingany commands, the controllerhas to initialize the transceiverby:

• Hold SWDAT low• Toggle SCLK for at least 30cycles.

• The transceiver is now in STCmode and ready to accept STCtransactions.

39

7. Design Guidelines

7.2 MECHANICAL CONSIDERATIONSAgilent transceivers are availablein various package mounting op-tions. They are also designed forautomatic placement. Differentproduct families may require dif-ferent handling and placementconsiderations due to the differ-ent packages used.

The HSDL-1xxx family supportsthrough-hole or SMT mounting infront or top-view options. Mount-ing locations may be on the PCBor at the edge.

The other families (HSDL-2xxx,HSDL-32xx, HSDL-36xx,) are SMTmountable. They use castellationsinstead of leads. Castellations canbe thought of as leads flush withthe package side, and are imple-mented by cutting through aplated through hole in an axialplane.

The following sections cover thevarious packaging options, stor-

age and assembly instructions.The information is also availablein the respective product datasheets.

Packaging Options

Lead Bend Options

The HSDL-1001 and HSDL-1100come in a variety of lead bend op-tions. These allow the optical axisto be perpendicular or parallel tothe board (top and front mountrespectively), or for the HSDL-1001 to straddle the middle of theboard. Figures 7.1 and 7.2 illus-trate the various lead bendoptions. The actual codes aregiven in the respective datasheets.

SMT Options

The SMT mountable transceiverscomprise two main families,HSDL-2xxx and HSDL-3xxx. TheHSDL-3xxx products use a tech-nology known as “sheetcast”, andare an alternative to leadframetechnology. The electronics aremounted on a miniature PCB. Theelectrical connections are broughtout by castellations. Thecastellations can be described asplated through holes (PTH) sawnalong the axis (refer to Figure7.4). When reflowed, solder fillsup the holes, and wicks up thevertical surfaces (land area beforePTH was sawn through) to form aproper fillet.

Figure 7.1 HSDL-1001 Mounting Options.

Figure 7.2 HSDL-1100 Mounting Options.

40

Sheetcast units can be identifiedby the PCB with a lens molded toform an integrated unit. The PCBwill only be visible at the bottomfor shielded options.

The HSDL-2xxx is a combinationof discrete and sheetcast prod-ucts. It can be treated as asheetcast product in terms ofmounting and reflow. These trans-ceivers have mainly twodirections of mounting, with theoptical axis perpendicular or par-allel to the PCB (top or frontmount respectively). Certainproducts are available only infront mount, others have an op-tion for guide pins (located at theside of the shield). Actual optionsare given in the respective prod-uct data sheets.

Figures 7.3 and 7.4 show frontmount versions of the HSDL-2xxxand HSDL-33xx, viewed from theunderside (i.e., viewed through animaginary PCB). The castellationsare at the front bottom of eachphotograph. Note that the relativesize of the photographs is not toscale.

The HSDL-36xx family is availablein top and front mount, with guidepins also available as a supple-mentary front mount option.These are illustrated in Figures7.5 – 7.7.

The sheetcast units have the ad-vantage of self-aligning duringreflow. This can self-correct for x,y and theta displacements duringmounting operations, thus open-ing up the SMT mounting processwindow.

Guide pins are provided as op-tions after customer feedback.However, the self-aligning featuregenerally makes these unneces-sary.

Figure 7.3 HSDL-2xxx Showing Guide Pins and Castellations.

Figure 7.4 HSDL-33xx Front Mount, showing shield foot and castellations. Currently theHSDL-33xx is not available with guide pins.

If the guide pin location holeshave a location offset error, theguide pins will provide a con-straint to the self-aligning process.The resulting misaligned unit maysuffer from problems such as pin-to-pin shorting, inter-padshorting/solder bridging,insufficient wetting/fillet dueto excessive x and/or y displace-ment, etc.

Due to the proximity of the guidepin to the extreme land pads forthe HSDL-3600, PCB designersshould use the guide pin only as amechanical guide, and not solder

it. Given the typical tolerancestack up, there is a risk that sol-der bridging may occur betweenthe guide pin land (if included)and the land for pins 1 or 10.

Tape and ReelAgilent transceivers are shippedin tape and reel packaging. Thereel increment is specified by aparticular option (refer to actualproduct data sheet or selectionguide). Larger sized transceivers,e.g. HSDL-1xxx and HSDL-2xxx,have increments of 10 and 200.The smaller sized transceivers,e.g. HSDL-32xx and HSDL-36xx,

41

have increments of 10, 300, 400,500 and 2500 units (not all prod-ucts are available in all 5increments). The increment sizeof 10 is shipped in strips of tapeand reel.

Front mount units will have theflat shield top surface facing upand the lenses facing the right,assuming that the reel is unwoundin a left to right direction. Topmount units will have the lensesfacing up and the shield tab facingthe right, again assuming that thereel is unwound in a left to rightdirection.

The cover tape is designed to holdthe units securely within, yet peeloff cleanly with a force of 10-70 gat 165-180 degrees along the longi-tudinal axis of the carrier tape, ata peel speed of 300 ± 10 mm/min.

Packaging and Mounting Options forEncoder/Decoder (endec) ICsThe HSDL-7000 and HSDL-7001endecs are packaged as 8 and 16-pin SOICs respectively. Thesecan be mounted and reflowed us-ing standard SMT processes. Bothproducts are presented in tapeand reel. Reel increments arespecified by options, currently at2500 and 100 units.

Storage RecommendationsAgilent transceivers are encapsu-lated in standard industry moldcompounds. These compoundsare hygroscopic and the transceiv-ers need to be kept in a dryenvironment prior to use. Recom-mended storage conditions are<25°C storage temperature and<60% relative humidity.

The transceivers are shipped inmoisture barrier bags. Whenopened, moisture absorption be-gins. If the units are exposed to

Figure 7.5 HSDL-36xx Front Mount Option.

Figure 7.6 HSDL-36xx Top Mount Option.

Figure 7.7 HSDL-36xx Front Mount Option with Guide Pins.

42

the environment beyond48 hours, the units need to bebaked to drive out moisture, andsubsequently stored in a dry envi-ronment (with desiccant) if notmounted and reflowed.

The transceivers are baked as partof the assembly process. They arethen sealed in moisture barrierbags, together with desiccant anda humidity indicator strip, prior toshipping. The humidity indicatorstrip will turn from blue to pink ifthe barrier bag has been breachedand moisture has entered.

Delay opening the moisture bar-rier bags until just before reels areto be loaded onto the pick andplace machine. Ensure that theplacement and reflow operation iscarried out within 48 hours fromopening the bags.

The bake time/temperature set-tings are derived fromexperiments based on the IPC/EIAJ J-Std-020A joint industrystandard, and are tabulated inTable 7.1.

Mechanism of Humidity-inducedFailureAs mentioned before, the moldingcompound (encapsulant) is mois-ture permeable, by naturehygroscopic. SMT reflow is ther-mally more stressful on the deviceas soldering takes place on thesame side of the PCB, unlikethrough hole devices where thesoldering occurs on the other sideof the PCB, thus the PCB offerssome thermal shielding. In gen-eral, the SMT device also has athinner layer of encapsulant be-tween the (internal) chipmounting surface and the externalmounting pad interface to the out-side package surface.

Table 7.1: Bake Time / Temperature Settings

Product Bake Time (hours) Bake Temperature (°C)(includes oven ramp-up)

HSDL-1xxx 12 ± 0.5 100 ± 5

HSDL-32xx ≥ 48 60 ±5≥ 4 100 ± 5≥ 2 125 ± 5≥ 1 150 ± 5

HSDL-33xx ≥ 48 60 ± 5≥ 4 100 ± 5≥ 2 125 ± 5

HSDL-36xx ≥ 48 60 ± 5≥ 4 100 ± 5≥ 2 125 ±5

When the part is heated, the mois-ture vapor pressure increasesrapidly. This causes a differentialrate of expansion, which cancause internal delamination of theencapsulant from the die and/orleadframe/substrate. Other fail-ures include internal cracks thatdo not extend to the package ex-terior, wire bond damageincluding breakage, separation ofthe bond from the die/leadframeor ball bond cratering.

More severe failures include ex-ternal package cracks. This isknown as a “popcorn” failure asthe internal stresses can cause thepackage to bulge and then crackwith an audible “pop”. In extremecases, a portion of the die mayeven protrude from the package.

When the temperature ramp ratelimit is exceeded or excessiveheat is applied, the common fail-ure modes seen are delaminationand broken wires. Commoncauses are poor temperature con-trol in ovens (e.g. overshoot at themaximum), or very hot soldering

irons used in rework exceedingthe transceiver’s rated tempera-ture limit.

More information can be found inthe IPC/EIAJ J-Std-020A joint in-dustry standard.

Assembly Recommendations

Stencil and Aperture DimensionsA stencil of 0.152 mm (0.006") or0.127 mm (0.005") is recom-mended for solder paste printing.This ensures sufficient solderpaste volume, adequate “brick”aspect ratio, and prevents inter-pad shorting. Due to the differentproduct sizes, please refer to therespective product data sheets forthe corresponding length/widthdimensions of the stencil open-ings.

The stencil length opening islonger than the actual land area,to ensure that sufficient solderpaste is deposited. The stencilthickness cannot be increased asthis is restricted by the “brick”aspect ratio, and may cause other

43

problems, e.g. slumping. Agilent’sevaluations show that the solderpulls into the joint, and there is nosolder balling.

Solder PasteBased on calculations and evalua-tions, the recommended solderpaste volumes are tabulated inTable 7.2. This recommendation isbased on either no-clean or aque-ous solder cream types, typically60-65% solid content by volume.

Table 7.2 Recommended SolderPaste Volume.

Product Solder paste volume/castellation(mm3, ± 15%)

HSDL-2xxx 0.36HSDL-32xx 0.22HSDL-33xx 0.30HSDL-36xx 0.30

The solder paste volume is calcu-lated using an approximated usinga geometrical model of acastellation joint. As an example,the HSDL-36xx castellation solderfillet model is shown in Figure 7.8.

Pick and Place; Alignment ToleranceA standard pick and place opera-tion can be used. The transceivershould be picked up around themounting center – this may not becoincident with the centerline ofthe shield foot, e.g. HSDL-36xx.

Pick and place can be performedusing standard SMT machines.The flat top of the integratedshield makes it easy for vacuumpickup tools.

An evaluation of several popularpick and place machines was

done. The key factor to successfulpickup was found to be the typeof vision used – front or backlighting. The evaluation was basedon HSDL-2300, HSDL-3200 andHSDL-3600. These are physicallyrepresentative of the HSDL-2xxx,HSDL-32xx and HSDL-36xx fami-lies respectively (all three partswere run on each machine).

The findings can serve as a guide.However, it is recommended toverify this during setup. More de-tailed specifications on the pickand place machines can be ob-tained from the respectivemanufacturers.

It was found that the Siemens ma-chine requires front lighting torecognize all three transceivertypes. In the case of the Panasert,Fuji and Universal machines, theoptimal vision methods are tabu-lated below. Although backlighting can be used for all threetransceiver types, the results ob-tained weren’t optimal.

The findings are summarized inTable 7.3.

Figure 7.8 HSDL-36xx Front Mount Castellation Solder Fillet Model.

Table 7.3: Pick and Place Machine Vision Lighting vs. Transceiver Type.

Brand Model Optimal Vision MethodFront lighting Back lighting

Panasert MPA-V, MPA-V2, HSDL-3200, HSDL-3600 HSDL-2300MPA-G1

Fuji QP242 HSDL-3200, HSDL-3600 HSDL-2300

Universal GSM HSDL-3200, HSDL-3600 HSDL-2300

Siemens F4 HSDL-2300, HSDL-3200, Not applicableHSDL-3600

0.8 1.2 0.7

ALL DIMENSIONS IN mm

R 0.20.425

0.70.4

44

Placement Alignment Tolerance andSelf-aligningThe unit will self-align duringreflow provided sufficient solderpaste is applied, and the misalign-ment is within the tolerancelimits. The self-alignment takesplace with the aid of the liquidsolder surface tension. The self-aligning feature is independent ofboard direction travel (assumingconvective reflow).

Figure 7.9 shows the co-ordinatesystem used when discussingplacement. Note that only 50% ofthe land is shown, the remainderis under the transceiver. This isillustrated in Figure 7.10.

Castellation x-axis AlignmentToleranceIn general, during placement, thex-axis misalignment should notexceed 0.2 mm (0.008") or half thecastellation width (whichever issmaller). Figures 7.11 and 7.12show the placement of the trans-ceiver before reflow (x-axismisalignment), and the positionafter reflow and self-alignment.

Castellation y-axis AlignmentToleranceIn general, the unit does not self-align in the y-axis. Agilentrecommends that the unit beplaced in line with the fiducialmark. The intention is to leave aminimum of 50% of the landlength exposed, ensuring a goodfillet. Refer to Figure 7.10.

Castellation Rotational ( θ )Alignment ToleranceThe rotational alignment toler-ance varies by product, and alsoby front/top mount. The valuesare summarized in Table 7.4. Re-fer to the product data sheet forthe authoritative figures, as theseare subject to improvement andchange.

Figure 7.9 Co-ordinate System for Placement (front mount, plan view).

Figure 7.10 Recommended Transceiver Placement with Respect to Land Pattern.

Figure 7.11 x-axis Misalignment, before Reflow.

Figure 7.12 x-axis Misalignment Self-corrected after Reflow.

Y

X

LAND, 50%

θ

FIDUCIAL

EDGE

MINIMUM 1/2 THE LENGTH OF THE LAND PAD

45

Reflow ProfileSoldering IR transceivers, whichare lightweight miniature compo-nents, in a mass manufacturingenvironment can pose seriousprocess problems. It is imperativethat the recommended respectivereflow profiles be strictly adheredto for every transceiver. IR trans-ceivers can be reflow solderedusing a convective IR process. Aconvective IR process usesmiddle to long infrared wave-lengths (approximately 4000 to6200 nanometers). Approximately65% of the energy is used to heatthe air in the reflow chamber(convective heating) and 35% ofthe energy directly heats the PCboard and components (radiativeheating). Some systems are forcedhot air systems with a dual cham-ber design, wherein the firstchamber has IR heaters to heatthe air which is then blown overthe PC board assemblies locatedin a second chamber. In these sys-

Product Alignment tolerance (mm or degrees) Mount optionX-axis Y-axis θ

HSDL-2100, 0.2 mm or half Place in line ≤ ±3° Front mountHSDL-2300 castellation width with fiducial

HSDL-3200 0.2 mm or half Place in line ≤ ±3° Front mountcastellation width with fiducial

HSDL-3201 0.2 mm or half Place in line ≤ ±3° Front mountcastellation width with fiducial

HSDL-3202 0.2 mm or half Place in line ≤ ±3° Front mountcastellation width with fiducial

HSDL-3310 0.2 mm or half Place in line ≤ ±2° Front mountcastellation width with fiducial

HSDL-3600#007, #017 0.2 mm or half Place in line ≤ ±2° Front mountcastellation width with fiducial

HSDL-3600#107, #117 0.2 mm or half Place in line ≤ ±2° Front mount with guide pinscastellation width with fiducial

HSDL-3600#008, #018 0.2 mm or half Place in line ≤ ±1° Top mountcastellation width with fiducial

Table 7.4 Placement Alignment Tolerances.

tems, heating is 100% convective.The PC board and componentsare uniformly heated to achievereliable solder connections. Aconvective thermal environmentminimizes the thermal stressesexperienced by the component.

Figure 7.13 is a straight-linerepresentation of a nominaltemperature profile for aconvective reflow solder process.All temperature and time valuesindicated are for illustration

purposes only. Please follow therespective reflow profile statedfor every transceiver in theirrespective data sheets. Thetemperature profile is dividedinto four process zones with four∆T/∆time temperature changerates. The ∆T/∆time temperaturechange rates are detailed in Table7.5. The temperatures aremeasured at the component toprinted circuit (PC) boardconnections.

Figure 7.13 Reflow Profile.

0 50

R1

R2

R5

P1HEAT

UP

P3SOLDERREFLOW

P4COOL DOWN

t-TIME(SECONDS)

P2SOLDER PASTE DRY

100 150 200 250 300

230

200

125

183170150

5025

100

T -

TE

MP

ER

AT

UR

E (

°C)

90 SEC MAXABOVE 183°C

MAX 245°CR3 R4

46

Table 7.5 Convective IR Reflow Process Zones, see Figure 7.13.

Process Zone Symbol ∆T Max. ∆T / ∆time

Heat Up P1, R1 25°C to 125°C 4°C/s

Solder Paste Dry P2, R2 125°C to 170°C 0.5°C/s

Solder Reflow P3, R3 170°C to 230°C (245°C max.) 4°C/sP3, R4 230°C to 170°C -4°C/s

Cool Down P4, R5 170°C to 25°C -3°C/s

In process zone P1, the PC boardand the transceiver castellationI/O pins are heated to a tempera-ture of 125°C to activate the fluxin the solder paste. The tempera-ture ramp up rate, R1, is limited to4°C per second to allow for evenheating of both the PC board andtransceiver castellation I/O pins.

Process zone P2 should be ofsufficient time duration ( > 60 sec-onds ) to dry the solder paste. Thetemperature is raised to a leveljust below the liquidus point ofthe solder, usually 170°C (338°F).

Process zone P3 is the solderreflow zone. In zone P3, the tem-perature is quickly raised abovethe liquidus point of solder to230°C (446°F) for optimum re-sults. The dwell time above theliquidus point of solder should bebetween 15 and 90 seconds. Itusually takes about 15 seconds toassure proper coalescing of thesolder balls into liquid solder andthe formation of good solder con-nections. Beyond a dwell time of90 seconds, the intermetallicgrowth within the solder connec-tions becomes excessive,resulting in the formation of weakand unreliable connections. Thetemperature is then rapidly re-duced to a point below the solidustemperature of the solder, usually170°C (338°F), to allow the solderwithin the connections to freezesolid.

Process zone P4 is the cooldown after solder freeze. The cooldown rate, R5, from the liquiduspoint of the solder to 25°C (77°F)should not exceed - 3°C per sec-ond maximum. This limitation isnecessary to allow the PC boardand transceiver castellation I/Opins to change dimensions evenly,thereby minimizing the stress onthe transceiver.

Examples of CastellationSolder JointsFigures 7.14 - 7.16 show solderjoints which are good, insufficientsolder, and solder bridging

Figure 7.14 Good Solder Joint.

Figure 7.16 Solder Bridging (shorted)

Figure 7.15 Insufficient Solder.

(shorted). This can be used as astarting point for post reflowvisual inspection.

47

Other SMT Considerations

Nitrogen vs. air reflowAll evaluations have been doneusing air as the reflow environ-ment. No problems have beenobserved that require nitrogenreflow, since the transceiverswere first introduced (volumeshipped is in the hundreds of mil-lions of units).

Lead-free soldering processAt time of this writing, AgilentTechnologies’ transceivers are notlead-free (Pb-free), nor are theycompatible with lead-free reflowprocesses yet. Re-designs andevaluations are in progress tomeet industry and regulatory/leg-islative deadlines.

7.2 ELECTRICAL CONSIDERATIONS

Board Layout GuidelinesAll IR modules contain high gain,wide bandwidth circuits. Specialattention must be paid when de-signing and laying out boards withsuch components. As with manyanalog components, effortsshould be made to separate the IRmodule from sources of electro-magnetic noise (EMI), and tominimize power supply andground line noise. The effects ofEMI and power supply noise canpotentially reduce the sensitivityof the receiver, resulting in re-duced link distance. EMI can alsogenerate spurious signals on thereceiver RXD output when no IRsignal is being received. Evalua-tion kits which demonstrate therecommended board layout foreach transceiver model are avail-able, and can be obtained fromyour local Agilent ComponentSales Representative. These kitsare further described on page 55.

EMI ImmunityEMI is radiated by switched modepower supplies, dc/dc converters,external monitor I/O ports, powerports, or clock generators. Thevoltage of the EMI source and thedistance from the source deter-mine the strength of the EMI fieldat any given point. EMI fieldstrength is measured in Volts/meter. A 200 V source placed onemeter from a detector representsa field strength of 200 V/m. Simi-larly, a 10V source at a distanceof 5 cm also represents a fieldstrength of 200 V/m.

An IrDA receiver’s EMI immunityis the maximum EMI fieldstrength that the receiver can tol-erate while maintaining a bit errorrate (BER) < 10-8. All Agilent

transceivers are shipped with

a metal shield as standard or

option, and have EMI immu-

nity typically greater than

200 V/m. Thus the distance of theEMI source to the module mustbe increased so that the EMI fieldstrength is less than 200 V/m atthe transceiver module.

Figure 7.18 Noise and Distance Relationship.

Power Supply Rejection (PSR)Power supply noise can becoupled into the receiver throughVCC or ground lines. Power supplyripple is a common example ofpower supply noise. Power Sup-ply Rejection (PSR) refers to themodule’s ability to tolerate powersupply noise, while maintainingerror free operation. Proper PCBlayout techniques and externalcomponent placement can ensuresuccessful operation with powersupply noise present on VCC orground.

Board Layout RecommendationsThe following recommendationsfor PCB layout should providesufficient EMI immunity andpower supply rejection for errorfree IR link operation. Please seeAgilent Application Note 1114,“Infrared Transceiver PC BoardLayout for Noise Immunity”.

• Board Topology: A multi-layerPC board is recommended sothat a sufficient ground planecan be properly placed. Useone layer underneath and near

V

EMI SOURCE

m

48

the transceiver module as VCC,and sandwich that layer be-tween ground connected boardlayers. For example in a fourlayer board, layer 1 (top) con-tains signal traces, layer 2contains ground underneath themodule and surrounding areas,layer 3 contains traces, databus signals and VCC, layer 4(bottom) contains groundmetal.

The area underneath the mod-ule at the second layer, and3 cm in any direction aroundthe module is defined as thecritical ground plane zone.The board ground plane shouldbe maximized in the criticalground plane zone. Any unusedboard space in the criticalground plane zone should befilled with ground metal. Do

not connect this ground

plane directly to the IrDA

module ground pin. Addi-

tionally, any fast switching

data or clock signals at the

layer 3 should not be laid

directly underneath the

critical ground plane zone.

Figure 7.19 illustrates the abovepoints.

• External Components and

Integrated shield: Bypass ca-

pacitors for the VCC pin should

be of low inductance and wide

frequency response, e.g. X7R

ceramic, while that for the

VLED pin should be of big vol-

ume and fast frequency

response, e.g. Tantalum. Bothshould be placed as close(<0.5 cm) to the VCC and GNDpins of the module, and on thesame side of the board as themodule. The remaining compo-nents should be placed withinthe board area where theground plane has been maxi-

Figure 7.19 Board Topology and Layer Design.

mized. The integrated metal

shield of the module should

be connected to the ground

plane by the shortest path.

• VCC Supply: The least noisypower source available on theapplication board should bechosen for VCC of the module.Biasing VCC directly from anoisy switched mode powersupply line should be avoided.The VCC line to the transceivermodule should be filtered suffi-ciently so that less than 75 mVof noise is present at either theVCC or GND pins of the module.The recommended values ofthe VCC bypass capacitorsshould provide sufficient filter-ing in most cases, but may beincreased in value if more filter-ing is necessary.

• Proximity to Noise Sources:

All signal or noise sources(power ports, monitor ports,clock generators, switchedmode power supplies) shouldbe placed as far away as pos-sible to minimize EMI at themodule. Distance to noisesources should be consideredin all dimensions, includingother circuit boards that maybe either above or below thetransceiver module, or flex cir-cuits (with a noise source)“folded” close to the moduleduring the final assembly.

TOP LAYERCONNECT THE METAL SHIELD AND MODULEGROUND PIN TO BOTTOM GROUND LAYER

LAYER 2CRITICAL GROUND PLANE ZONE. DO NOTCONNECT DIRECTLY TO THE MODULE GROUND PIN

LAYER 3KEEP DATA BUS AWAY FROM CRITICALGROUND PLANE ZONE

BOTTOM LAYER (GND)

49

Reference LayoutReference schematics for each ofthe transceiver families are shownin the diagrams below along withthe recommended component val-ues.

HSDL-36xx #007 Front Option HSDL-36xx #008 Top Option

HSDL-3600 #007 / HSDL-3600 #008

Components Recommended Value

R1 2.2 Ω, ± 5%, 0.5 W, for 2.7 V ≤ VCC ≤ 3.3 V operation2.7 Ω, ± 5%, 0.5 W, for 3.0 V ≤ VCC ≤ 3.6 V operation

CX1 0.47 µF, ± 20%, X7R CeramicCX2 6.8 µF, ± 20%, TantalumCX3 6.8 µF, ± 20%, Tantalum

HSDL-3601 #007 / HSDL-3601 #008

Components Recommended Value

R1 6.2 Ω, ± 5%, 0.5 W, for 4.75 V ≤ VCC ≤ 5.25 V operationCX1 0.47 µF, ± 20%, X7R CeramicCX2 6.8 µF, ± 20%, TantalumCX3 6.8 µF, ± 20%, Tantalum

HSDL-3610 #007 / HSDL-3600 #008

Components Recommended Value

R1 6.2 Ω, ± 5%, 0.5 W, for 2.7 V ≤ VCC ≤ 3.6 V operation15.0 Ω, ± 5%, 0.5 W, for 4.75 V ≤ VCC ≤ 5.25 V operation

CX1 0.47 µF, ± 20%, X7R CeramicCX2 6.8 µF, ± 20%, TantalumCX3 6.8 µF, ± 20%, Tantalum

TOP LAYER BOTTOM LAYER

17 mm

26.5

mm

27.2 mm

17.8

mm

7.4

mm

17.8

mm

17.1 mm

TOP LAYERBOTTOM LAYER

50

HSDL-3202HSDL-3201

HSDL-3310

Components Recommended Value

R1 2.2 Ω, ± 5%, 0.5 W, for 2.7 V ≤ VCC ≤ 3.3 V operation2.7 Ω, ± 5%, 0.5 W, for 3.0 V ≤ VCC ≤ 3.6 V operation5.6 Ω, ± 5%, 0.5 W, for 4.5 V ≤ VCC ≤ 5.5 V operation

CX1 0.47 µF, ± 20%, X7R CeramicCX2 6.8 µF, ± 20%, TantalumCX3 1 µF, ± 20%, TantalumCX4 1 µF, ± 20%, Tantalum

HSDL-3310

HSDL-3201

Components Recommended Value

R1 0 Ω, ± 5%, 0.5 WCX1 1 µF, ± 20%, Tantalum

HSDL-3202

Components Recommended Value

R1 0 Ω, ± 5%, 0.5 WCX1 1 µF, ± 20%, TantalumCX2 1 µF, ± 20%, Tantalum

17.2 mm

21.5

mm

TOP LAYER BOTTOM LAYER

17.2 mm

21.5

mm

TOP LAYER BOTTOM LAYER

27.1 mm

17.8

mm

7.6

mm

17.1 mm

5.08mm

TOP LAYERBOTTOM LAYER

51

7.3 OPTICAL PORT DESIGNTo ensure IrDA compliance, thereare constraints on the height andwidth of the optical port. Mini-mum dimensions ensure that theIrDA cone angles are met, andmaximum dimensions ensure thatthe effects of stray light are mini-mized. Usually the smallestpossible window is wanted tominimize the opening in the prod-uct, and also due to the constraintthe product manufacturers haveon space. The minimum-viewingangle that will ensure that theIrDA cone angles are met withoutvignetting is ±15 degrees. Theminimum size corresponds to acone angle of 30 degrees, themaximum to a cone angle of 60degrees.

Figure 7.20 shows a module posi-tioned with respect to the frontpanel of a hypothetical product.Dimension ‘Z’ is the distance be-tween the apex of the receiverside lens and the back of the win-dow. ‘X’ is the width of thewindow and ‘Y’ is the height of thewindow. ‘K’ is the distance of thecenter of the LED lens from thecenter of the photodiode lens. ‘D’is the depth of the LED image in-side the part, and ‘A’ is the halfangle of the cone with a IrDAminimum of 15 degrees, and amaximum of 30 degrees.

For all transceivers, ‘Z’ is the dis-tance specified by the opticalwindow designer, and ‘D’ is thedepth of the LED image that isprovided by the IR Transceivermanufacturer. While computingthe window dimensions, the thick-ness of the window can beassumed to be negligible. If thethickness of the window is takeninto account, the optical thicknessis the mechanical thickness di-vided by the index of reflection.

Figure 7.20 Position of Module with Respect to Product Case.

The width and height of the opti-cal port can be calculated fromthe following expressions,

X = K + 2 • (Z + D) • tan A

Y = 2 • (Z + D) • tan A

The minimum and maximumvalue for the width and height is

Figure 7.21: Aperture width (x) vs. moduledepth.

Figure 7.22: Aperture height (y) vs. moduledepth.

defined by the minimum andmaximum viewing angle require-ment of IrDA. Tangent A is therequired half angle for viewing.For the IrDA minimum, it is 15degrees, for the IrDA maximum itis 30 degrees. Figure 7.21 and fig-ure 7.22 show the possible rangeof X and Y dimensions for a givenmodule depth, Z.

25

20

15

10

5

00 1 2 3 4 5 6 7 8 9

MODULE DEPTH (z) mm

AP

ER

TU

RE

WID

TH

(x)

mm

X MAX

X MIN

OPAQUEMATERIAL

XIR TRANSPARENT

WINDOWK

AZ

D

IR TRANSPARENTWINDOW

OPAQUE MATERIAL

20

16

12

8

4

0

18

14

10

6

2

0 1 2 3 4 5 6 7 8 9MODULE DEPTH (z) mm

AP

ER

TU

RE

HE

IGH

T (

Y)

mm

Y MAX

Y MIN

52

Table 7.6 lists the distance fromthe center of the LED lens to thecenter of the photodiode lens ‘K’,and the depth of the LED imageinside the part for the variousAgilent IrDA transceivers.

Agilent IrDA Distance between center of Depth of LEDTransceiver LED lens to center of photo- image ‘D’ (mm)

diode lens ‘K’ (mm)

HSDL-1001/1100 6.35 mm 6.70 mmHSDL-3200/3201/3202 5.10 mm 3.17 mmHSDL-3600/3601/3610 7.07 mm 8.00 mmHSDL-2100/2200/2300 6.40 mm 7.00 mm

Table 7.6 Agilent Transceiver Image Depth

Shape of the WindowFrom an optics standpoint, thewindow should be flat. This en-sures that the window will notalter either the radiation patternof the LED or the receiver patternof the photodiode.

If the window must be curved formechanical design reasons, placea curve on the backside of thewindow that has the same radiusas the front side. While this willnot completely eliminate the lenseffect of the front curved surface,it will reduce the effects. Theamount of change in the radiationpattern is dependent upon the ma-terial chosen for the window, theradius of the front and backcurves, and the distance from theback surface to the transceiver.Once these factors are known, alens design can be made whichwill eliminate the effect of thefront surface curve.

The following diagrams show theeffects of a curved window on theradiation pattern. In all cases, thecenter thickness of the window is1.5 mm, the window is made ofpolycarbonate plastic, and the dis-tance from the transceiver to theback surface of the window is3 mm.

Window Material SelectionAgilent IrDA Transceiver specifi-cations for transmitter radiantintensity and for receiver inputirradiance allow for 10% light sig-nal loss through a cosmeticwindow placed in front of the IRtransceiver module. The recom-mended plastic materials for use

Figure 7.23 Flat Window (First Choice).Figure 7.24 Curved Front and Back Window(Second choice).

Figure 7.25 Curved Front, Flat Back Window(Not Used)

as a cosmetic window are avail-able from General ElectricPlastics.

Recommended Dye: Violet#21051 (IR transmissant above625 nm)Indenting the module into the sys-tem box can attain improvedreceiver performance in the pres-ence of ambient light (sunlight,fluorescent light, incandescentlight) by a few millimeters. Theoverhang of the system box willminimize the amount of directambient light that the IrDA trans-ceiver detector sees. Thecosmetic window will also helpreflect ambient light away fromthe module.

53

7.4 EYE SAFETYProducts compliant with ormerely interoperable under theInfrared Data Association (IrDA)specifications 1.3, are also re-quired to be eye safe, and in somegeographical regions, compliantwith national, regional or interna-tional eye safety standards.Agilent’s IrDA transceivers aredefined as eye safe based on com-pliance with the basic laser safetystandard (IEC825-1), set by theTechnical Commission 76, LaserEquipment (TC76) of the Interna-tional ElectrotechnicalCommission (IEC). The EuropeanCommittee for ElectrotechnicalStandardization (CENELAC) hasalso adopted this as EN 60825-1.

Infrared, visible or ultravioletelectromagnetic radiation, in suffi-cient concentrations, can causedamage to the human eye. Todate, light-emitting diodes (LEDs),such as the ones used in IrDAtransceivers, have not been foundto cause any damage. But with theincrease in LED efficiency andpower with higher data rates andlink distances, it is critical to keepa watchful eye on this parameter.Being a market leader in develop-ing new transceivers, Agilentevaluates compliance with eyesafety standards for every trans-ceiver in the market. Agilenttransceivers are designed to com-ply with the eye safety standardsunder all conditions.

The human eye can withstandonly a finite amount of radiation,beyond which it can be irrevers-ibly damaged. With thisinformation, damage thresholdlevels have been calculated over awide range of wavelengths andother relevant parameters. Giventhe damage threshold data, apply-ing a safety factor enables thecalculation of a set of Maximum

Permissible Exposures (MPEs).For a set of conditions, the MPEis the maximum electromagneticradiation exposure that is deemedto be safe. A source that isdeemed to be safe to the nakedeye can turn harmful in the pres-ence of light collecting/focussingoptics. Hence, for a given methodof viewing a set of AccessibleEmission Levels (AEL) is calcu-lated. AEL represents the amountof electromagnetic emission thatis accessible by a human eye. AELclass limits are usually expressedin Watts or Joules. AEL is depen-dent on the system’s light outputpower, wavelength, apparentsource size and pulse or exposureduration.

System classification as eye safeor not is done in the followingsteps:

• Based on MPE in IEC825-1, cal-culate the AEL Class 1 limit.AEL class 1 limits for IrDA sys-tems emitting short infraredpulses or continuous infraredlight is shown in Table 7.8 be-low for different source sizes.

• Measure the actual AEL of thesystem (refer to Agilent Appli-cation Note 1118: Complianceof Infrared communicationproducts to IEC 825-1 andCENELEC EN 60825-1).

• Measure the actual AEL of thesystem.

• Compare the AEL of the systemwith the AEL Class 1 limit forboth pulsed emission and con-tinuous emission.

• Consider operating conditionswhich may cause a single fault.If a single fault condition cancause increased emission,make sure that the AEL classifi-cation takes this into account.

The measurement distance, r, andmeasurement aperture diameter,d, are derived from apparentsource size, s, as shown in Table7.7. Apparent source size is howlarge the source appears (not theactual size of the emitter chip orthe molded lens diameter).

Aperture Diameter (d) Measurement Distance (r)

Fixed at 7.0 millimeters 100 (s/10 + 0.0046) 0.5 millimeters

7 (s/10 + 0.0046)-0.5 millimeters Fixed at 100 millimeters

Table 7.7

54

IEC 825-1 and EN 60825-1 regulations mention several AEL class limits.For source wavelength λ = 700 - 1050 nm, the AEL class 1 limit is calcu-lated as:

AEL = [ 0.0007t 0.75 C4 C6 Joules] [1000 / t ] milliwatts

where,

t = exposure duration in seconds

C4 =10 [0.002 ( λ - 700) ]

C6 = 1 for α < αmin

C6 = α / αmin for αmin < α < αmax

C6 = 100 / αmin for α > αmax

where α = 1000 • [12 • tan -1 ( [ s / 2 ] / 100 mm)] (milliradians)

s = apparent source size (millimeters)

The angular subtense parameter αmax is defined as 100 milliradians.αmax = 100 mr is taken as the largest reasonable subtense which can besharply focussed by a human eye. The apparent source angularsubtense αmin is the limit above which the source is considered an ex-tended source. Because of eye movement, this is a function of time.

αmin = 1.5 milliradians for t < 0.7 seconds

= 2.0 t 0.75 milliradians for 0.7 seconds < t < 10 seconds

= 11.0 milliradians for t > 10 seconds

The AEL Class 3A limit is 5 times the Class 1 limit.

Exposure Apparent Angular AELDuration Source Size Subtense Class 1 limit(t sec) (s mm) (α milliradians) (mW)

10 2 20 1.566

100 2 20 0.880

10 3 30 2.349

100 3 30 1.321

Table 7.8 AEL Limit Calculations (Wavelength λ = 870 nm in all cases)

For more information on AEL classifications, class limit calculations,measurement of system AEL and AEL calculations for Agilent trans-ceivers, please refer to Agilent Application Note 1118: Compliance of

Infrared Communication Products to IEC825-1 and CENELEC EN

60825-1.

55

8. Evaluation andDeveloper Kits

Agilent’s evaluation and developerkits provide the necessary infor-mation and components requiredto design and test an optimumIrDA compliant infrared system,which can later be incorporatedinto the final product. These kitsallow a developer to experimentwith the IrDA physical layer,evaluate the EMI effects on theperformance, and understand thefeatures and functions of Agilenttransceiver modules. The evalua-tion boards serve as a reference tothe recommended design and lay-out techniques described in thisdesign guide and can be used forcustom layout. With these kits,development time of the physicallayer is greatly reduced by theprovision of known good trans-ceivers, so a link can be up andrunning quickly. The boards areready to be plugged into an I/Odevice.

Developer Kit (HSDL-8000)The HSDL-8000 evaluation kit in-cludes two evaluation boards withthe HSDL-1001 IrDA 1.0 Compli-ant Infrared transceiver for115.2 Kb/s links. For serial portapplications, the boards can bereadily plugged to the port via theHSDL-7001 IrDA 1.0 Encode/De-code IC, which comes with thekit. Discrete IR LEDs are includedin these kits for extending linkdistance or achieving greaterviewing angles for non-IrDA links.

Developer Kit (HSDL-8010)The HSDL-8010 evaluation kit in-cludes two evaluation boards withthe HSDL-1100 IrDA 1.1 Compli-ant Infrared transceiver for 4 Mb/slinks. This kit provides the neces-sary information and componentsto assist you in designing an opti-mum 4 Mb/s IrDA Infrared system.

Table 8.1.

HSDL-8000 HSDL-8010Evaluation Kit Evaluation Kit

HSDL-1001 on Evaluation Board X NA

HSDL-1100 on Evaluation Board NA X

HSDL-7001 X NA

HSDL-4220 X NA

HSDL-4230 X NA

Data-sheet/Design Guide/Instruction X X

56

57

9. Beyond IrDA

9.1 EXTENDING TRANSMISSIONDISTANCEIrDA specifications specify atransmission link distance of 1 mfor standard operation and20 - 30 cm for low power opera-tion. In some cases, it may bedesired to increase link distancebeyond the 1 m guaranteed byIrDA. Referring back to the sec-tion on “Introduction to Optics”, itcan be seen that for an IR link be-tween A and B, increasing boththe intensity and sensitivity for Aor B increases the link distance.Increasing either the intensity orsensitivity for both A and B canachieve the same results. Theformer arrangement is ideal forcases where the link distance withIrDA 1 m compliant devices is tobe increased. All changes can belocalized to one end of the linkwith no changes at the other. If atend A only the transmission inten-sity were to be increased, thesame should be done at B as well.Otherwise, at distances greaterthan the guaranteed 1 m, it is quitepossible that B is able to read thesignals from A, but A is not able toread B due to B’s lower transmis-sion intensity. The same logic canbe extended to increasing sensi-tivity of the detector alone.

Typical link distance can be in-creased if both ends of the IR linkincrease their transmission inten-sity. Radiant intensity isapproximately proportional to theLED forward current, and irradi-ance (the strength of the received

IR signal) will follow the inversesquare law for distances greaterthan a few cm. For example, fourtimes the LED forward current willprovide four times the intensity.Four times the intensity will givethe same signal strength at twotimes the distance. If a transceiveroperating at 250 mA LED currentcan operate up to 1.6 m, an in-crease of LED current to 500 mAcan improve the link distance to2.2 m.

The HSDL-1001 featured in the ex-ample has the ability to drive anexternal LED for added power.Either the HSDL-4220 or theHSDL-4230 IR emitter can be con-nected in series or in parallel withthe HSDL-1001’s internal LED.(Note that the parallel connectionwill only work with 5 V supplies.)The HSDL-4220 typically provides190 mW/Sr of intensity at a peakpulse current of 250 mA, and has aviewing angle of 30 degrees. TheHSDL-4230 typically provides375 mW/Sr of intensity at a peakpulse current of 250 mA, and has aviewing angle of 17 degrees. Referto the HSDL-4220 and HSDL-4230data sheets for more informationon these products.

For 5 V systems, a parallel con-nection (Figure 9.1) may be used.The drive transistor of the HSDL-1001 has sufficient capacity todrive a second LED in parallel.The current in the external LED islimited by RLEDX. The value ofRLEDX is chosen in the same man-ner as RLED (refer to the sectionon External Passive Compo-

nents). This configuration has theadvantage of being less sensitiveto power supply variations thanthe series connection, becausemore of the supply voltage isdropped across the limitingresistors.

58

Figure 9.1 External Parallel LED.

Figure 9.2 External Series LED.

The series, or “stacked” connec-tion (Figure 9.2) can be used withsupplies greater than 5 V. Thisconnection is preferred because ituses power that would otherwisebe wasted in RLED. This configu-ration can be used when VCC ishigh enough to allow for two for-ward voltage drops (2.5 V each at240 mA) and the tolerance is tightenough so that the RLED chosenfor minimum VCC does not causeexcessive currents at maximumVCC.

The combined intensity of theHSDL-1001 internal LED and theHSDL-4220 or HSDL-4230 externalLED can be used to calculate thepotential link distance. Link dis-tance is proportional to the squareroot of the total intensity of thesignal. Table 9.1 shows the typicallink distances which can beachieved under typical operatingconditions with various externalLEDs driven as indicated. Thevalues are based on a detectorsensitivity of 4 µW/cm2.

For transceivers where an addi-tional pin is not available to drivethe LED in parallel as in the caseof the HSDL-1001, the configura-tion given in Figure 9.3 can beused.

For data rates less than115.2 kbps, transmitting signalswith less than 20% duty cycle canhelp increase link distance. Thereceiver threshold is determinedby average power, so a lower dutycycle will reduce average powerand thus increase the receiver’ssensitivity. Also, to minimizepower consumption and increaseLED life, it is recommended touse the minimum pulse width al-lowed by IrDA, which is 1.6 µs.

Transmitting LED Pulsed Total LED TypicalDevices Drive Current typical intensity on-axis link

(Ipeak), mA on-axis, mW/Sr distance, meters

HSDL-1001 250 100 1.6HSDL-1001 500 200 2.2HSDL-1001 and 250 each 290 2.7 HSDL-4230HSDL-1001 and 500 each 950 4.9 HSDL-4230HSDL-1001 and 500 each 3200 8.9 four HSDL-4230s

Table 9.1 Link distances achievable for various transceiver and emittercombinations.

GND5

3

4

1

6

VCC

GND

V+

RXD

TXD

COMPARATOR

HSDL-1001

PHOTODIODE

VPIN

LEDC

LEDA7 8LEDX

RLED

RLEDX

SHUTDOWN

V+

GND

5

3

4

1

6

GND

V+ V+

RXD

TXD

COMPARATOR

HSDL-1001

PHOTODIODE

VPIN

LEDCLEDA7 8

RLED

V+

SHUTDOWN

59

9.2 REMOTE CONTROL APPLICATIONBefore implementing ConsumerIR (remote control) modes inIrDA enabled devices, it is essen-tial to understand the differencesin the current implementations ofCIR and IrDA. Table 9.2 summa-rizes some of the key points.

In transmit only mode, the IrDAmodule is used to transmit in aCIR mode to a CIR receiver. Themain influencing factor is the dif-ference in operating wavelengths.Please refer to Figure 9.3. The op-erating wavelengths were setapart to reduce interference ef-fects. This fact is important whenusing a CIR detector with an IRfilter, where the link distancemight be reduced based on thecut-off wavelength of the filter.This would lead to attenuation ofthe IR signal. IrDA is based on abase-band modulation schemesupporting data rates rangingfrom 2.4 to 115 kbps. This alsoencompasses the sub-carrier fre-quency of RC, which ranges from30 – 70 kHz. Therefore modulationis not of concern.

In the receive mode, the RCmodulation has a major role toplay. An RC detector is tuned todetect RC sub-carrier frequencies.Therefore, an IrDA receiver willbe less sensitive as compared toan RC detector at the RC opera-tional point. Moreover, the IrDAtransceiver was designed for alink distance of 1 m. In CIR mode,the link distance will come downto IrDA link distance levels. Inmost cases the IrDA module willbe used in CIR transmit onlymode as in PDAs and in a bi-direc-tional mode.

IrDA RC

Wavelength (nm) 850 – 900 900 – 950

Modulation Baseband ASK

Data Rate (kbps) ~ 115 ~ 2

Link Distance (m) ~ 1 m ~ 8 m

Table 9.2: Differences between IrDA and RC

Figure 9.3 External Parallel LED with Switching Transistor.

C2C1R1

R2

TxD

Q1

ADDITIONALLED

VLED

60

TxD InterfaceIn the case of MPUs or ASICs thatassign both IrDA and CIR transmitfunctions to the same pin, theconnection is the same as in theIrDA case. If separate output driv-ing pins are used, a logical ORgate should be used as shown inFigure 9.4. If the RC part uses anegative logic, an inverter shouldbe used before the OR gate. Inmost cases, IrDA and RC func-tions are assigned to separatepins.

RxD InterfaceIt is essential to remember the dif-ference in sensitivity and themodulation scheme between IrDAand CIR when trying to use anIrDA transceiver in CIR mode.

Figure 9.5 shows an HSDL-3201transceiver being used to imple-ment CIR control. The transceiveroutputs the raw data being re-ceived on the IR medium, asrequired by IrDA, and does notextract the baseband informationrequired for CIR. Moreover, thepulse width is limited to 2.5 µs forthe HSDL-3201. CIR uses a muchwider pulse width. Therefore, amonostable multivibrator(HC123) is used for pulse widthwidening. The value of the resis-tor and capacitor is chosen tomatch the sub-carrier frequencyof CIR.

Figure 9.5 Circuit Example for Receiving Side.

Figure 9.4 Circuit Example for Transmitting Mode.

IrDA TRANSMITTINGCIRCUIT

MPU OR SEPARATED ASIC

IrDA SIGNALOUT PIN

REMOTE CONTROLOUT PIN

THIS EXAMPLE IS FOR POSITIVE LOGIC. IF DRIVING CIRCUIT OUTPUTSNEGATIVE LOGIC, NEEDS INVERTER BEFORE OR CIRCUIT.

Tx IrDA MODULE(HSDL-3201)

REMOTE CONTROLTRANSMITTING CIRCUIT

IrDA RECEIVINGCIRCUIT

MPU OR SEPARATED ASIC

2 IB

IQ 4

15IRxCx

14ICx

3 IR

Rx1 IA

IrDA MODULE(HSDL-3201)

HC123

VCC

REMOTE CONTROLRECEIVING CIRCUIT

61

10. Companion Circuits

IntroductionWith ever-increasing functionalityin handheld devices, IRtransceivers are being coupledwith discrete emitters anddetectors, such as Agilent’sHSDL-4xxx emitters andHSDL-5xxx detectors, to achievehigher link distances and toperform other IR functions notcompliant with IrDA. The section,Beyond IrDA, explored suchapplication scenarios andimplementation. The followingsection highlights circuitconfigurations for driving discreteemitters and detectors. The echocancellation circuit discussedbelow is used to nullify the signalseen by the receiver residingadjacent to the transmitter whilethe transmitter transmits in atransceiver.

10.1 LED DRIVER CIRCUITSIn many cases an additional LEDis added to achieve an increase inlight intensity and therefore linkdistance. The circuit below is areference LED driver circuit usingAgilent’s HSDL-4230 emitter.

The switching transistor Q1 usedis a Fairchild FET, Si4532DY or

Figure 10.1 LED Driver Circuit.

NDS351. R1 determines theamount of current flowingthrough the LED and the capaci-tors C1 and C2 are for filtering thesupply. R2 is a 50 ohm terminatorin case of pulses being fed from apulse generator that requires a 50ohm termination. As an example,for a VLED = 3.2 V, R1 = 4.7 ohms,transistor on resistance = 0.3ohms and diode on resistance =1.7 ohms, the LED current can becalculated to be around 250 mA. Itcan be seen from the data sheetthat this translates to an intensityof 375 mW/Sr. With a 4 µW/cm2

detector, the link distance can becomputed to 3 m.

10.2 RECEIVER CIRCUITSDiscrete detectors are used inmany cases as additional sensors.The circuit configuration will con-sist of an I-V stage, gain and acomparator. A few of these varia-tions are listed below.

Configuration A: Op-amp

configuration using a

combination of resistors and op-

amps to realize the desired gain

and comparator function.

Figure 10.2 Receiver Circuit - Configuration A.

Example values:Detector HSDL-5420/5400,R1 = 10 kΩ (I-V gain stage), R2and R3 (non-inverting gain), R4 =100 kΩ, R5 = 1 kΩ, C2 = 10 pF. R4and R5 define the hysteresis volt-age.

C2C1R1HSDL4230

R2

TxD Q1

VLED

+

–

–

+

HSDL-54xx

R2R3

R1

R5

R4

C2

C1

Vdd

+–

OUT

VREF

62

Configuration B: Op-amp,

resistor and external comparator

configuration. Op-amp and I-V

resistor are used in the gain

stage.

Example values:Detector HSDL-5420/5400,R1 = 10 kΩ (I-V gain stage),R2 and R3 (non-inverting gain).TLC3702 is a comparator withouthysteresis.

Configuration C: Resistor and

comparator configuration. Gain

is realized only from the I-V

resistor stage.

Example values:Detector HSDL-5420/5400,R1 = 10 kΩ. TLC3702 is a com-parator without hysteresis.

Some applications require a fixedpulse width pulse output duringlight incident. A configuration us-ing a monostable multivibrator isshown in Figure 10.5 thatachieves the same.

Configuration D: Monostable

multivibrator configuration for

single shot output stage.

SN74LS221 is a dual monostablemultivibrator.

Figure 10.3 Receiver Circuit - Configuration B.

Figure 10.4 Receiver Circuit - Configuration C.

Figure 10.5 Receiver Circuit - Configuration D.

–

+

HSDL-54xx

R2R3

R1

C1

Vdd

+–VREF

3

21 VOUT

TLC3702

R1

C1

Vdd

+–

VOUT

VREF

3

TLC3702

21

HSDL-54xxSN74LS221

R1

100 K

430 K

C1 27 pF1B(2)

CLR(3)

1A(1)

1REXT(15)

1CEXT(14)

1Q(13)

VCCVCC

VCC

VOUT

63

10.3 ECHO CANCELLATION CIRCUITThe transceiver design is suchthat the receiver sees the trans-mitting light of the transmitterand generates an echo. This canbe nullified by using an echo can-cellation circuitry. Agilenttransceivers inherently do nothave an echo cancellation cir-cuitry for the following reason. Anecho of a transmitted pulse on thereceiver side serves as a goodself-check of the transmitter func-tionality. In the application,however, echoes on the receiverside while transmitting mightcause hang-ups of themicrocontroller. Generally, this isavoided by disabling all receiverinterrupts while transmitting.

In the event that this must beimplemented on hardware, thefollowing reference circuit can beused. SN74LS221 is a monostablemultivibrator, which generates aone shot pulse while transmitting.With the right choice of externalcomponents, this one shot pulsecan be made to have the samepulse width as that of the echoseen by the receiver and thereforenullify it. However, it is alwaysrecommended to disable the re-ceiver interrupts in the softwarewhile transmitting, as it is a lessexpensive and easier alternative.

Figure 10.6 Echo Cancellation Circuit.

SN74LS221 HSDL-7001 MICROCONTROLLER

HSDL-1001

1REXT(15)IR_TxD

SDO

IR_RCV

OSCIN

OSCOUT

CEXT(14)

1A(1)

1B(2)

CLR(3)

1Q(13)

TxD

RxD

430 K

VCC

VCC

VCC

10MOHM

F = 3.6864 MHz15 pF

27 pF

0.1 µF

74HC32

15 pF

IO1

SDI

IO2

IO3

100 K

100 K

10 K

TxD

RCV

A0

A1

A2

CLK_SEL

POWERDN

PULSEMOD

NRST

64

65

Appendix

Basic Radiometry

Definitions:

Radiant flux ( φ ):Optical power emitted by a sourcein watts.

Radiant intensity (IE = dφ/dΩ):Optical power emitted by a sourcewithin a cone of unit steradian.

Irradiance (EI = dφ/dA = dIE/dAfor a point source): Optical powerincident per unit area from a pointsource.

Steradian ( ω ): A steradian is thesolid angle subtended from thecenter of a sphere by 1/4 π of thesurface area of the sphere. Thereare 4 π steradians in a full sphere.A cone of a solid angle ω , has itsapex at the center of a sphere ofradius R and defines an area A onthe surface of the sphere. To finda solid angle ( ω ), determine thesurface area of the sphere in-cluded within the solid angle (A),and divide the area by the squareof the radius of the sphere (R).

ω = A / R2

transmitted in a unit solidangle, i.e., given the source an-gular width, the illuminationcan be estimated. The approxi-mation that a transmitter LEDsource is a point source isvalid except at very close dis-tances of a few millimetersfrom the source.

The inverse square lawdescribes the relationshipbetween source radiantintensity and the irradiance ata distance.

EI = IE /d2

Where IE is the transmitterradiant intensity, EI is the re-ceiver input irradiance, and dis the distance between thetransceiver and the receiver.

The inverse square law is use-ful in estimating the irradiancefrom the source intensity.Thus, a source of 500 mW/Sr ata distance of 50 cm results inan irradiance of 0.2 mW/cm2

and at 1 m results in a radianceof 0.05 mW/cm2.

Integrating the irradiance overthe effective detector areagives the radiant flux receivedby the detector. Multiplyingthe radiant flux by the receiversensitivity yields the amountof detector photocurrent.

i.e., the detector photo currentcan be estimated from the irra-diance as:

The radiant flux is the mean radi-ant energy transferred by the lightradiation from a source and is theenergy (or power, which is energyper unit time) quantity. For apoint source of light, the radiantintensity describes the energy

Iphoto (mA) = Irradiance (EI mW/cm2) • effectivedetector area (cm2) • Detector sensitivity (mA/mW)

R

AREA, A

Rr

ω

66

If a receiver lens were to be usedto collect more light, then the de-tector area is either the physicaldetector area multiplied by thelens magnification OR the en-trance pupil area of the lens(whichever is smaller). Quiteoften in the case of IrDA compo-nents, it is essentially the lens thatdefines the area of the receiver.

Example: Using a 2 mm diameterlens (lens effective area of3.14 cm2) and a detector sensitiv-ity of 0.5 mA/mW, see table A.1below.

The Iphoto calculated in Table A.1is the pulsed photo current at thereceiver for the respective trans-mitter intensity. The pulsed photocurrent should be more than theintrinsic noise level of the detec-tor and the preamplifierelectronics, for the signal to bedetected.

SIR Low power Standard Power

Transmitter Intensity 3.6 72 40 500(mW/Sr)

Link Distance (cm) 20 20 100 100

Irradiance at receiver 3.6/400 = 0.009 72/400 = 0.18 40/10000 = 0.004 500/10000 = 0.05(mW/cm2)

Iphoto (µA) 0.009•3.14•0.5•1000 0.18•3.14•0.5•1000 0.004•3.14•0.5•1000 0.05•3.14•0.5•1000 = 14.13 = 282.6 = 6.28 µA = 78.5

Table A.1

www.semiconductor.agilent.com

Data subject to change.Copyright © 2001 Agilent Technologies, Inc.May 25, 2001Replaces 5965-8531E5988-1772EN