aida update
DESCRIPTION
AIDA Update. presented by Tom Davinson on behalf of the AIDA collaboration (Edinburgh – Liverpool – STFC DL & RAL). Tom Davinson School of Physics & Astronomy The University of Edinburgh. AIDA: Introduction. Advanced Implantation Detector Array (AIDA) - PowerPoint PPT PresentationTRANSCRIPT
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AIDA Update
presented byTom Davinson
on behalf of the AIDA collaboration(Edinburgh – Liverpool – STFC DL & RAL)
Tom DavinsonSchool of Physics & AstronomyThe University of Edinburgh
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AIDA: Introduction
Advanced Implantation Detector Array (AIDA)
UK collaboration: University of Edinburgh, University of Liverpool,STFC Daresbury Laboratory & STFC Rutherford Appleton Laboratory
• SuperFRS• Exotic nuclei ~ 50 – 200MeV/u• Implant – decay correlations• Multi-GeV implantation events• Subsequent low-energy decays• Tag events for gamma and neutron detector arrays
Detector: multi-plane Si DSSD array wafer thickness 1mm 8cm x 8cm (128x128 strips) or 24cm x 8cm (384x128 strips)
Instrumentation: ASIClow noise (<12keV FWHM), low threshold (0.25% FSR)20GeV FSR plus ( 20MeV FSR or 1GeV FSR) fast overload recovery (~s)spectroscopy performancetime-stamping
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AIDA Hardware
Mezzanine: 4x 16 channel ASICs Cu cover EMI/RFI/light screen cooling
FEE: 4x 16-bit ADC MUX readout (not visible) 8x octal 50MSPS 14-bit ADCs Xilinx Virtex 5 FPGA PowerPC 40x CPU core/Linux OS – DAQ
Gbit ethernet, clock, JTAG portsPower
FEE width: 8cmPrototype – air coolingProduction – recirculating coolant
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AIDA Mechanical
• Mechanical design for 8cm x 8cm and 24cm x 8cm DSSSDs is complete
• Evaluate performance of 8cm x 8cm design before proceeding to manufacture of 24cm x 8cm design
• Design compatible with BELEN, TAS, MONSTER , RISING, FATIMA etc.
- Design drawings (PDF) available http://www.eng.dl.ac.uk/secure/np-work/AIDA/
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AIDA: status
• DSSSD with sub-contractor (MSL)- 8cm x 8cm & 24 x 8cm mechanical samples & prototypes delivered- production batch (#2) in progress
• Production hardware (ASIC, FEE Mezzanine PCB, FEE PCB) delivered by sub-contractors • FEE64 Mezzanine assembly
- c. 37 complete- 40 queued
• FEE64 PCB- 50 tested OK- 17 partly tested- 7 with faults requiring further tests
• FEE module assembly - 12 complete - 6.5 tested OK - 20 queued
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AIDA: status
• MACB timestamp distribution system for FEE modules- delivery complete
• Mechanical design and infrastructure (HV, PSUs, cooling etc.)
- detector HV, FEE PSUs, cooling & FEE crates delivered- support assembly University of Liverpool workshop due end-Feb 2012
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AIDA: outlook
• AIDA production hardware was available for commissioning on schedule in 2011/Q3
• Performance of 20GeV & 1GeV ranges meets specification- need to optimise DSSSD-FEE coupling for 20MeV range- progress very encouraging
• Basic data merge with MBS successfully demonstrated during AIDA+LYCCA test May 2011
- further work required
• Continuing FEE firmware development work in progress- DSP (digital CFD etc)
• DAQ software development work in progress- interface migtated from Tcl/Tk to XML/SOAP (web-based)- control and management of multiple FEE modules- timestamp-ordered data merge (GREAT format)
Bottom line – AIDA is ready and needs to be scheduled on FRS
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AIDA Plans
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Acknowledgements
My thanks to:
STFC DLP. Coleman-Smith, M. Kogimtzis, I. Lazarus, S. Letts, P. Morrall, V. Pucknell, J. Simpson & J. Strachan
STFC RALD. Braga, M. Prydderch & S. Thomas
University of LiverpoolT. Grahn, P. Nolan, R. Page, S. Ritta-Antila & D. Seddon
University of EdinburghZ. Liu, G. Lotay & P. Woods
University of BrightonO. Roberts
GSIF. Amek, L. Cortes, J. Gerl, E. Merchan, S. Pietri et al.
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AIDA: Project Partners
• The University of Edinburgh (lead RO)Phil Woods et al.
• The University of LiverpoolRob Page et al.
• STFC DL & RALJohn Simpson et al.
Project Manager: Tom Davinson
Further information: http://www.ph.ed.ac.uk/~td/AIDA
Technical Specification:http://www.ph.ed.ac.uk/~td/AIDA/Design/AIDA_Draft_Technical_Specification_v1.pdf
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FEE Assembly Sequence
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Bench Tests of Prototype Hardware
0.15mV rms ~ 2.5keV rms Si
INL < 0.1% ( > 95% FSR )
Tests with pulser demonstrating integral non-linearity and noiseperformance of 20MeV range
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Tests with AIDA Production Hardware
• Realistic input loading CD ~ 60pF, IL ~ 60nA• Expectation ~12keV FWHM
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GSI Commissioning Test – August 2011
• SIS 250MeV/u 209Bi
• Beam delivery direct to HTC
• From exit port+ ~1.0m air+ ~2mm Al (degrader)+ ~0.9m air+ 1x MSL type W-1000 DSSSD
cheap alternative to type BB18 …
• Test of response of 20GeV range
• No rejection of lighter, lower energy ions generated by passage of beam through exit port/degrader
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Event Multiplicity
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High Energy Implantation Events
• Significant ballistic deficit effects• Confirms Bardelli model and previous TAMU observations • Implies preamp risetime for high energy heavy-ions >500ns
(cf. intrinsic preamp risetime ~90ns)
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Implant Decay Correlations
y-scale 1ms/channelx-scale 4keV/channel
decay time = txy(decay)-txy(implant)
Expect random correlations only
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E(p+n) – E(n+n) + offset – decay events
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E(p+n strips) versus E(n+n strips) - decay events
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E(p+n strips) versus E(n+n strips) – implant events
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8cm x 8cm AIDA Enclosure
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GSI Commissioning Test – August 2011: setup
1x MSL type W(DS)-1000 bias -150V leakage current ~0.8uA
16x p+n junction strips (horizontal)16x n+n ohmic strips (vertical)
strip size ~50mm x 3mm, thickness 1mm
Edinburgh MSL type W – AIDA mezzanine adaptor PCBac coupling ~10nF / striptest capacitance ~1pF / stripbias resistor ~10M / strip
Detector connected to ASICs #3 & #4
Events defined as all ADC data within 8us time windowdecay events – events containing no HEC data (i.e. LEC data only)implant events – any events containing HEC data (i.e. may contain
LEC data)
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MSL type BB18
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