1 4 bit arithmatic and logic unit (fairchild dm74ls181) kunjal shah radha dharmana rutu pandya...

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4 BIT Arithmatic and Logic Unit(Fairchild DM74LS181)

Kunjal ShahRadha Dharmana

Rutu PandyaVennela Patchala.

Advisor: Dr. David, ParentDecember 5, 2005

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Agenda• Abstract• Introduction

– Why– Simple Theory– Back Ground information (Lit Review)

• Design Flow• Project (Experimental) Details• Results• Cost Analysis• Lessons Learned• Acknowledgement

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Abstract

Specifications of ALU• Load : 25 fF• 16 arithmathic functions• 16 logical functions• Propagation delay : 5ns• Clock frequency : 200 MHz• Power requirement : 17 mW• Occupied Area : 373 x373um

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Introduction

Why?• The Arithmatic and Logic Unit is a building block

of several industrial circuits.• Design consists of different kinds of Arithmatic

operations like Ripple carry adder, subtractor, Transfer data..

Logical operations like AND, OR, XOR, INV.• How the ALU is designed and how it works is

essential for designing advanced circuits.

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ALU Block Diagram

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Design flow

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Longest path

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Longest path calculations

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Schematic

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Logical Operations

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Arithmetic Operations

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Layout

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DRC

Verification

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Transient Response

A=0, B=1, M=1, S=E, F0 =1, F1=F2 = F3 = 0, F =A+B

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Power

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Cost Analysis

• Time spent on each phase of the project– Verifying logic 1 week– Logic reduction 1 week– Transistor sizing 1 week– Layout of individual blocks 2weeks– Integration of blocks 3 days– post extracted timing 1 day

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Lessons Learned

• The circuit can be used as a building block for 16/32-bit ALU.

• Same metal should not be used in both horizontal and vertical direction.

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Acknowledgement

• Thanks to Cadence Design Systems for the VLSI lab

• Thanks to Professor David W. Parent for his guidance.