1 6.001 sicp register machines what and why datapaths instructions abstract operations
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6.001 SICPRegister Machines
• what and why• datapaths• instructions• abstract operations
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Plan
• Design a central processing unit (CPU) from:• wires• logic (networks of AND gates, OR gates, etc)• registers• control sequencer
• Our CPU will interpret scheme as its machine language
• Today: Iterative algorithms in hardware• Next: Recursive algorithms in hardware• Then: Scheme in hardware (EC-EVAL)
• EC-EVAL exposes more details of scheme than M-EVAL
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The ultimate goal
GCD24
44
48
306
Ultimate machine
48
306
Circuit
diagram
Universal machine
(define (gcd a b)
….)
48
306
Procedure description
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A universal machine
• Existence of a universal machine has major implications for what “computation” means
• Insight due to Alan Turing (1912-1954)• “On computable numbers with an application to the
Entscheidungsproblem, A.M. Turing, Proc. London Math. Society, 2:42, 1937
• Hilbert’s Entscheidungsproblem (decision problem) 1900: Is mathematics decidable? That is, is there a definite method guaranteed to prodcue a correct decision about all assertions in mathematics?
• Church-Turing thesis: Any procedure that could reasonably be considered to be an effective procedure can be carried out by a universal machine (and thus by any universal machine)
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Euclid's algorithm to compute GCD
(define (gcd a b)
(if (= b 0)
a
(gcd b (remainder a b))))
• Given some numbers a and b• If b is 0, done (the answer is a)• If b is not 0:
• the new value of a is the old value of b• the new value of b is the remainder of a b• start again
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Example register machine: datapath
a b =
0rem
t
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Example register machine: instructions
(controller
test-b
(test (op =) (reg b) (const 0))
(branch (label gcd-done))
(assign t (op rem) (reg a) (reg b))
(assign a (reg b))
(assign b (reg t))
(goto (label test-b))
gcd-done)
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Complete register machine
a b =
0rem
tinstructions
sequencer
program counter
condition
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Datapath terminology
a b =
0rem
t
register
operation
button wire
constant
test
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Datapath components
• Button• when pressed, value on input wire flows to output
• Register• output the stored value continuously• change value when button on input wire is pressed
• Operation• output wire value = some function of input wire values
• Test• an operation• output is one bit (true or false)• output wire goes to condition register
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Incrementing a register
sum0
+
1
X
Y? 0 1 2
? 1 2 3
an op thatadds its inputs
press sum ?
X 0Y 1Y 2
• What sequence of button presses will result in the register sum containing the value 2?
X Y Y
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Euclid's algorithm to compute GCD
(define (gcd a b)
(if (= b 0)
a
(gcd b (remainder a b))))
• Given some numbers a and b• If b is 0, done (the answer is a)• If b is not 0:
• the new value of a is the old value of b• the new value of b is the remainder of a b• start again
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Datapath for GCD (partial)
• What sequence of button presses will result in: the register a containing GCD(a,b) the register b containing 0
• The operation rem computes the remainder of a b
Z 9 6 3X 6 6 3Y 6 3 3 Z 6 3 0X 3 3 0Y 3 0 0
press a b t9 6 ?
a b
rem
X
Y
t
Z
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Example register machine: instructions
(controller
test-b
(test (op =) (reg b) (const 0))
(branch (label gcd-done))
(assign t (op rem) (reg a) (reg b))
(assign a (reg b))
(assign b (reg t))
(goto (label test-b))
gcd-done)
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Instructions
• Controller: generates a sequence of button presses• sequencer• instructions
• Sequencer: activates instructions sequentially• program counter remembers which one is next
• Each instruction:• commands a button press, OR• changes the program counter
– called a branch instruction
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Button-press instructions: the sum example
(controller
(assign sum (const 0)) <X>
(assign sum (op +) (reg sum) (const 1)) <Y>
(assign sum (op +) (reg sum) (const 1)))
sum0
+
1
X
Y
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Unconditional branch
(controller
0 (assign sum (const 0))
increment
1 (assign sum (op +) (reg sum) (const 1))
2 (goto (label increment)))
sum0
+
1
X
Y
PC nextPC press0 1 X1 2 Y2 3 1 --1 2 Y2 3 1 --
sequencer: nextPC <- PC + 1 activate instruction at PC PC <- nextPC start again
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Conditional branch
a b
rem
t(controllertest-b
(assign t (op rem) (reg a) (reg b)) (assign a (reg b)) (assign b (reg t)) (goto (label test-b)) )
=
0
insts
sequencer
program counter
condition
(test (op =) (reg b) (const 0)) (branch (label gcd-done))
gcd-done
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Conditional branch details
(test (op =) (reg b) (const 0))• push the button which loads the condition register
from this operation's output
(branch (label gcd-done))• Overwrite nextPC register with value if condition register
is TRUE• No effect if condition register is FALSE
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Check your understanding
• Draw the datapath for the following instruction sequence• Describe what function it computes
(controller
test-n
(test (op =) (reg n) (const 0))
(branch (label done))
(test (op =) (reg n) (const 1))
(branch (label done))
(assign n (op -) (reg n) (const 2))
(goto (label test-n))
done)
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Answer: computes the function odd?
n
-
2
0 = 1=
• input in register n• output in register n: 1 if input was odd, 0 if input was even(define (odd? n) (cond ((= n 0) n) ((= n 1) n) (else (odd? (- n 2)))))
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Datapaths are redundant
• We can always draw the data path required for aninstruction sequence
• Therefore, we can leave out the data path when describing a register machine
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Abstract operations
• Every operation shown so far is abstract:• abstract = consists of multiple lower-level operations
• Lower-level operations might be:• AND gates, OR gates, etc (hardware building-blocks)• sequences of register machine instructions
• Example: GCD machine uses
(assign t (op rem) (reg a) (reg b))
• Rewrite this using lower-level operations
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Less-abstract GCD machine(controllertest-b (test (op =) (reg b) (const 0)) (branch (label gcd-done)) ; (assign t (op rem) (reg a) (reg b)) (assign t (reg a))rem-loop (test (op <) (reg t) (reg b)) (branch (label rem-done)) (assign t (op -) (reg t) (reg b)) (goto (label rem-loop))rem-done (assign a (reg b)) (assign b (reg t)) (goto (label test-b))gcd-done)
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Importance of register machine abstraction
• A CPU is a very complicated device• We will study only the core of the CPU
• eval, apply, etc.• We will use abstract register-machine operations for all the
other instruction sequences and circuits:
(test (op self-evaluating?) (reg exp))
• remember,(op +) is abstract, (op <) is abstract, etc.• no magic in (op self-evaluating?)
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Summary
• Introduced register machines• registers, buttons, tests, constants
• Register machine instructions• button press• unconditional branch (goto)• conditional branch (branch)
• Abstraction in register machines
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Recitation problem
• Draw the datapath and write the instruction sequence for the register machine that implements
(define (max a b)
(if (> a b) a b))
• The two input values are in registers labeled a and b• The output should be left in a register labeled out
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