26power electronics: dalla progettazione allo sviluppo di sistemi di controllo per applicazioni...

7/29/2019 26Power Electronics: dalla progettazione allo sviluppo di sistemi di controllo per applicazioni Inverter

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ni.com | NI CONFIDENTIAL

NI Vision for Power Electronics

Inverter Technology Applications

Join the developer community at ni.com/powerdev

Brian MacCleery – Principal Product Manager for

Clean Energy Technology, National Instruments,

Member IEEE

2ni.com | NI CONFIDENTIAL

Power ElectronicsThe Cylinder and Piston of the Digital Energy Revolution

The Digital Energy Revolution

•Digitized and digitally controlled

•Networked•Field reconfigurable

•Modeled and simulated

• Improving at exponential rates

Join the developer community at ni.com/powerdev

“Today, approximately 30 percent of all

power generation utilizes power

electronics between the point ofgeneration and consumption. By 2030, it

is expected that up to 80 percent of all

generated electricity will utilize power

electronics.” –US Dept. of Energy

7ni.com

2020 compared to 2000…

• Processing performance is 113 thousand times cheaperper dollar

• A power converter controls 27 times more power for itssize

• Lithion-Ion batteries deliver 29 times more energystorage (kWh) per dollar

• Typical inverters are 99.5% efficient (3.4 times less wasteheat)

• Solar module cost is 110 times cheaper per watt, solarinstalled cost is 24 times cheaper per watt

11ni.com

Top NI Applications in Digital Energy

A. Solar/PV

B. Wind turbines

C. Motor drives, pumps, compressors

D. Rail auxiliary power buses, traction controlE. Uninterruptable Power Supplies (UPS)

F. Electric & hybrid vehicles (including commercial/ agricultural vehicles)

G. Other: Grid Storage, Flexible AC Transmission Systems (FACTS), etc.

Cost per Watt = 14.26*(ANNUAL_PRODUCTION_GW*1000)^(-1.205)*ANNUAL_PRODUCTION_GW*1000

The Power Electronics Renaissance

< 10 kW,1,300,000,

50% of units

10 to 100kW,

728,000,28%of units

100 to 500kW,

416,000,

16%of units

500 kW+,156,000, 6%

of units 90% Growth

160% Growth

190% Growth

260% Growth

2010 INVERTER UNITS AND GROWTH RATE BY INVERTER SIZE (kW) INVERTER SHIPMENTS (MWp)

“Since the industrial revolution I do not know of a single

financial push towards a solitary focus as large asrenewable energy outside of war.”- Glenn A. Knierim,Ph.D. of Infinity Physics

17ni.com | NI CONFIDENTIALData Source: http://www.frc.ri.cmu.edu/~hpm/book97/ch3/processor.list

Modern Hybrid DSP-FPGA

Modern Field Programmable Gate Array (FPGA)

HARD CORE DSP SLICE

RECONFIGURABLE

LOGICI/O BLOCK

Source: Xilinx

Modern hybrid FPGAs offer higher performance than traditional DSPs

MACS = Multiply-accumulate operations per second(measure of DSP performance)

Dual-Core

Spartan-6

LX45 FPGA

Performance Ratio

(FPGA/DSP)

Million MACS per Chip 600 14,500 24Million MACS per Watt 571 5,897 10Million MACS per Dollar 7 279 40

LabVIEW FPGA vs VHDL

Counter Analog I/O Streaming

66 Pages ~4000 lines

21ni.com

Levels of Hardware Abstraction

A b s t r a c t i o

System Complexity

IGBT Modules

Intelligent Power Modules

Power Stack (Level 2)

Power Stack w/ Controller

Inverter

NI Vision:•“To do for digital energy what the PC did for the desktop”−Standard HW architectures, modular blocks, software defined, field programmable

•“The software is the inverter”

NI sbRIO GPIC

NI Single-Board RIO General Purpose Inverter Controller (GPIC)

NI Single-Board RIO General Purpose Inverter Controller(NI GPIC)

• Industry-proven NI LabVIEW RIO architecture and cutting-edge co-simulation tools

•Deployment-ready for high volume commercial applications

•Multicore FPGA delivers 40x higher performance per dollar thantraditional DSPs

Design Flow with the NI GPIC1. Co-Simulation, 2. Interface Board Design, 3. Commercial Deployment

Customer Defined Interface Board1. NI Single-Board RIO sbRIO-9606

2. NI GPIC 9683 RIO Mezzanine Card (bottom orientation connectors)

3. Custom interface or gate drive PCB (not provided by NI)

GPIC Mating PCB Design

• Semikron SKiiP 3 connector • Break-out connector for GPIC inputs

SmartPower Stack™ Inverter

The System (What is a Stack)

• Inside the Stack (diagram)

Power Electronics Design Goals & Tradeoffs

• Optimize for multiple design goals simultaneously,including:

• Energy efficiency

• Cost

• Component lifetime

• Systematic reliability

• Regulatory compliance

• Smart grid ready

• Differentiated features

• …• …

TestCells

Design

Deploy

PrototypeHIL

Testing

Graphical Co‐Simulation

(Multisim, LabVIEW

Rapid Control Prototyping

(Multicore CompactRIO, SIT)

Commercial Deployment

(General Purpose Inverter Controller)

Real‐Time HIL Simulation

(State‐Space and FEA‐Based)

Power Electronics

Testing

(Bloomy Energy, PXI)

Click to navigate

Utility Networking

(IEC‐61850, DNP3, …)

Digital Dynamometers

& Grid Simulators

The Evolution of System Level Design

Traditional Methodology Proposed Methodology

Software

(Analog)

FPGA SW Cost

Float to Fixed-

Point Math

Closed Loop

Simulation

System Level to

Register Level Code

Continuous to

Discrete Time

Circuit Design &

PCB Layout

Mechanical

Design

Magnetic & Thermal

Analysis

Full-Custom

Circuit Design

Graphical

Implementation

(Discrete-Time,

Fixed Point)

(Analog)

FPGA SW Cost

Algorithm

Closed Loop

Simulation

Automatic

Synthesis

Circuit Design &

PCB Layout

Mechanical

Design

Magnetic & Thermal

Analysis

Chip-On-Board

with I/O Support

SmuaoCe

DomeCe

NI Multisim Analog Simulation

• Integrated schematic capture &simulation environment

• 22,000+ components from

leading device manufacturers

• Power device simulation fortransformers, SMPS, IGBTs etc…

• Customizable simulation analyses& instruments

• NI LabVIEW FPGA and Control

Design & Simulation Moduleintegration

GRAPHICAL CO-SIMULATION WITH NI LABVIEW FPGA & MULTISIM

(AUTO-VARIABLE TIMESTEP CO-SIMULATION)

NATIONAL INSTRUMENTS

NI LabVIEW FPGA NI Multisim

Auto-Variable Timestep FPGA Co-Simulation

• Traditional system design requires separate analog and digital simulation• Accurate, cycle-accurate, closed loop simulation requires co-ordination -> Auto-Variable

Timestep Co-Simulation• Effectively creates a continuous time simulation involving both LabVIEW and Multisim

• SMPS, FET and transistor performance best characterized in SPICE

• Algorithm development with graphical system design (LabVIEW)

• Co-simulation possible due to LabVIEW and Multisim nodes

MOSFETs

Demo: Buck Converter Co‐Simulation with MathScript

Open Source Back-to-Back Inverter Research Board

Screaming Circuits Back-to-Back 3-Phase Inverter Kit(Does not include NI sbRIO GPIC)

Demo: 3 Phase “Grid-Tied” Inverter Control

Co-Simulation of FPGA-based Control System

with Comparison to Experimental Results

New data on LabVIEW graphical

system design approach

Wilson Research Study

NI Embedded

Customers (2012)1EETimes Overall

Embedded Market

(2012)2

Average Development Team Size

(HW, SW, Firmware Engineers)4.8 11.5 2.4

Average Months to Complete Project 6.2 12.5 2.0Average Person-Months to Complete

Project

30 144 4.8 (average of 114 person-

month savings per design)

Average DevelopmentCost

(assuming $100k/person/year with

overhead)

$248,000 $1,198,000 4.8 (average $950,000 cost

savings per design)

Percent of Projects Completed On or

Ahead of Schedule

58% of NI customers 42% of embedded

market

Percent of Projects Completed

Behind Schedule/Late

38% of NI customers 55% of embedded

market

NOTE1: The overall embedded market study was a global Email/web study including over 1,700responses from embedded engineers from Americas, Europe and AsiaNOTE2: The study of NI embedded customers was a global Email/web study including over 1,100responses NI embedded customers from Americas, Europe and Asia

Dynapower Case Study

"The key to this design was the ability for our power engineers todirectly program their product without a software engineer inthe middle. This new platform and method of developmentchanged our development time from 72 weeks to 24

weeks….These tools take design to the next level. We can havea 90 percent confidence factor in a first design and minimizehardware iterations during the prototype stage.“

NI Vi i f P El t i

TestCells

Design

Deploy

PrototypeHIL

Testing

Graphical Co‐Simulation

(Multisim, LabVIEW

Rapid Control Prototyping

(Multicore CompactRIO, SIT)

Commercial Deployment

(General Purpose Inverter Controller)

Real‐Time HIL Simulation

(State‐Space and FEA‐Based)

Power Electronics

Testing

(Bloomy Energy, PXI)

Click to navigate

Utility Networking

(IEC‐61850, DNP3, …)

Digital Dynamometers

& Grid Simulators

H d I th L (HIL) Si l ti f P

Hardware-In-the-Loop (HIL) Simulation of PowerElectronics

Keys to success for power electronics simulations:• High fidelity models

• Non-linear

• Time varying

• Sub 1us timing

• High speed I/O (1-10x the loop rate)

ControllerK p

ErrorControlOutput FeedbackSetpoint

Hardware-In-the-Loop (HIL) Simulation of Power Electronics

Keys to success for power electronics simulations:• High fidelity models

• Non-linear

• Time varying

• Sub 1us timing

• High speed I/O (1-10x the loop rate)

ActualDigital Inverter

Controller

ErrorControlOutput FeedbackSetpoint

SimulatedSwitched-ModePower System

What is a power electronics HIL test

system?

Motor/Generator

Inverter/Converter/DrivePower System

Control

System

Transformer Converter/Rectifier Inverter/Drive

Battery Stack,

Solar Array

DCDC Management

System

Real-Time Power Simulation(Cracked ECU or Full Power Simulator)

Physical Control Board

HIL = Hardware-In-the-Loop

When simulating switch‐mode power systems,

matters!

For negligible error, the simulation timestep should be 100times faster than the PWM switching frequency

Image courtesy Prof. Reza Iravani, University of Toronto

Graphical System Design

LabVIEW

FPGA Hybrid

DSP‐

Graphical Programmin

Desktop Co‐

Simulation

Compilation

Synthesis

Place &

Deploymen

HARD CORE DSP SLICE

Open Source FPGA-based Real-Time HIL Simulator

System ParametersIGBTs: SEMIKRON SKM 50 GB 123D, 600 V, 80 ADC – link voltage: Vdc = 400 VFundamental Freq = 60 HzPWM (carrier) Freq = 3 KHzOutput Filter: Lf = 800 μH Cf = 500 μF

Load: Lload = 2 mH Rload = 5Ω

Simulation loop rate of 3.57 MHz (0.28 μs)

> 3000X Acceleration vs. Processor Reference: MCBRYDE, JAMES. Inverter Efficiency Simulation and

Measurement for Various Modern Switching Devices.

JMAG Finite Element Analysis (FEA) Based

JMAG Finite‐Element‐Analysis (FEA) Based

FPGA Real‐Time Simulator

PMSM Sinusoidal Flux Model*(DQ Reference Frame)

J MAG FEA Model

Low FidelityModel Assumptions:

•Uniform air-gap•No slot harmonics•No stator saturation•Sinusoidally distributedwindings•No zero phase sequence

(system is balanced)

High FidelityModel Assumptions:

•Complex geometry

•Magnetic materials•Permanent magnets•Nonlinear inductance•Saturation effects•Coil winding•Copper and iron losses*

•Efficiency*

*Post processing

Modified Nodal Analysis Based

Real‐

Simulator

Modified Nodal Analysis Based

Real‐

Simulator

I n t e r f a c e

Inverter

Sensor

Interface

I n t e r f a c e

Emulation

Sensor

Emulation

Motor Model

SET Electric Motor Emulator (EME)

NI Power Electronics RCP & HIL System

ni com/powerdev

ni.com/powerdev

JOIN THE DEVELOPER COMMUNITY AT

NI.COM/POWERDEV

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26power electronics: dalla progettazione allo sviluppo di sistemi di controllo per applicazioni...

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