analogue to digital conversion © d hoult 2010 odwsc
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Analogue to Digital Conversion
© D Hoult 2010 ODWSC
analogue signal
© D Hoult 2010 ODWS
The analogue signal must be sampled (its voltage must be measured at regular intervals).
© D Hoult 2010 ODWS
The analogue signal must be sampled (its voltage must be measured at regular intervals).
To measure the voltage, the A to D converter produces its own voltage which it increases in discrete steps until it is equal to the signal voltage.
© D Hoult 2010 ODWS
The analogue signal must be sampled (its voltage must be measured at regular intervals).
To measure the voltage, the A to D converter produces its own voltage which it increases in discrete steps* until it is equal to the signal voltage.
* this voltage is said to be quantised
© D Hoult 2010 ODWS
The analogue signal must be sampled (its voltage must be measured at regular intervals).
At this point the counter is “disabled” (it stops counting).
To measure the voltage, the A to D converter produces its own voltage which it increases in discrete steps until it is equal to the signal voltage.
© D Hoult 2010 ODWS
Vs is the value of the signal voltage at the instant of sampling
© D Hoult 2010 ODWS
The sampling process is assumed to take a very short time.
© D Hoult 2010 ODWS
© D Hoult 2010 ODWS
© D Hoult 2010 ODWS
The precision of the process is limited by the “size of the steps”
© D Hoult 2010 ODWS
This depends on the number of bits used by the counter
© D Hoult 2010 ODWS
3 bit precision and sampling frequency 1 Hz
© D Hoult 2010 ODWS
3 bit precision and sampling frequency 1 Hz
© D Hoult 2010 ODWS
3 bit precision and sampling frequency 1 Hz
© D Hoult 2010 ODWS
3 bit precision and sampling frequency 1 Hz
© D Hoult 2010 ODWS
3 bit precision and sampling frequency 1 Hz
© D Hoult 2010 ODWS
digital signal
3 bit precision and sampling frequency 1 Hz
© D Hoult 2010 ODWS
digital signal
binary coded output
3 bit precision and sampling frequency 1 Hz
© D Hoult 2010 ODWS
digital signal
binary coded output 110 110 110 etc
3 bit precision and sampling frequency 1 Hz
© D Hoult 2010 ODWS
3 bit precision and sampling frequency 2 Hz
© D Hoult 2010 ODWS
3 bit precision and sampling frequency 2 Hz
© D Hoult 2010 ODWS
3 bit precision and sampling frequency 2 Hz
© D Hoult 2010 ODWS
digital signal
binary coded output
3 bit precision and sampling frequency 2 Hz
© D Hoult 2010 ODWS
digital signal
binary coded output 110 001 110 001 etc
3 bit precision and sampling frequency 2 Hz
© D Hoult 2010 ODWS
3 bit precision and sampling frequency 4 Hz
© D Hoult 2010 ODWS
digital signal
binary coded output 110 001 110 001 etc
3 bit precision and sampling frequency 4 Hz
© D Hoult 2010 ODWS
4 bit precision and sampling frequency 4 Hz
© D Hoult 2010 ODWS
4 bit precision and sampling frequency 4 Hz
© D Hoult 2010 ODWS
binary coded output 1011 0010 1011 0010 etc
4 bit precision and sampling frequency 4 Hz
© D Hoult 2010 ODWS
4 bit precision and sampling frequency 8 Hz
© D Hoult 2010 ODWS
binary coded output
4 bit precision and sampling frequency 8 Hz
© D Hoult 2010 ODWS
1011 1100 1011 0110 0010 0000 0010 0110 etc
4 bit precision and sampling frequency 8 Hz
© D Hoult 2010 ODWS
1011 1100 1011 0110 0010 0000 0010 0110 etc
Binary coded digital output corresponding to the first four samples
© D Hoult 2010 ODWS
1011 1100 1011 0110 0010 0000 0010 0110 etc
Binary coded digital output corresponding to the first four samples
© D Hoult 2010 ODWS
1011 1100 1011 0110 0010 0000 0010 0110 etc
Binary coded digital output corresponding to the first four samples
© D Hoult 2010 ODWS
1011 1100 1011 0110 0010 0000 0010 0110 etc
Binary coded digital output corresponding to the first four samples
© D Hoult 2010 ODWS
1011 1100 1011 0110 0010 0000 0010 0110 etc
Binary coded digital output corresponding to the first four samples
© D Hoult 2010 ODWS
1011 1100 1011 0110 0010 0000 0010 0110 etc
Binary coded digital output corresponding to the first four samples
In some systems, logic 1 (“true”) is represented by zero volts and logic zero (“false”) by 5 V
© D Hoult 2010 ODWS
1011 1100 1011 0110 0010 0000 0010 0110 etc
Binary coded digital output corresponding to the first four samples
In some systems, logic 1 (“true”) is represented by zero volts and logic zero (“false”) by 5 V
© D Hoult 2010 ODWS
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