ec6202 electronic devices and circuits unit 2

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EC6202 ELECTRONIC DEVICES AND CIRCUITS

Unit 2

Dr Gnanasekaran Thangavel

Professor and Head

Electronics and Instrumentation

Engineering

R M K Engineering College

UNIT II TRANSISTORS

BJT, JFET, MOSFET- structure, operation, characteristics

and Biasing UJT, Thyristor and IGBT Structure and

characteristics.

2 Dr Gnanasekaran Thangavel 8/2/2017

1. https://www.youtube.com/watch?v=yOmPCjPlaEg

2. https://www.youtube.com/watch?v=jQb199oIY5U

3. https://www.youtube.com/watch?v=G-BvuL5IDLw

4. https://www.youtube.com/watch?v=IRok_SGrx9Q

5. https://www.youtube.com/watch?v=2LBKwGwGYt4

6. https://www.youtube.com/watch?v=_DZ7baOhNFQ

7. https://www.youtube.com/watch?v=Dd4im8TMAk0

Bipolar Junction

transistor

Holes and electrons

determine device characteristicsThree terminal device

Control of two terminal

currents

Amplification and switching through 3rd contact

Understanding of BJT

force – voltage/currentwater flow – current

- amplification

Basic models of BJT

Diode

Diode

Diode

Diode

npn transistor

pnp transistor

Transistor Construction

3 layer semiconductor device consisting:

2 n- and 1 p-type layers of material npn transistor

2 p- and 1 n-type layers of material pnp transistor

The term bipolar reflects the fact that holes and

electrons participate in the injection process into the

oppositely polarized material

A single pn junction has two different types of bias:

forward bias

reverse bias

Thus, a two-pn-junction device has four types of bias.

Position of the terminals and symbol of BJT.

• Base is located at the middle

and more thin from the level of collector and emitter

• The emitter and collector terminals are made of the same type of semiconductor material, while the base of the other type of material

Transistor currents -The arrow is always drawn

on the emitter

-The arrow always point

toward the n-type

-The arrow indicates the

direction of the emitter

current:

pnp:E B

npn: B E

IC=the collector currentIB= the base currentIE= the emitter current

By imaging the analogy of diode, transistor can be construct

like two diodes that connected together.

It can be conclude that the work of transistor is base on work of

diode.

Basic models of BJT

Recall p-n junction

P N

W

Vappl > 0

-+

N P

W

Vappl < 0

-+

Forward bias, + on P, - on N (Shrink W, Vbi)

Allow holes to jump over barrier into N region as minority carriers

Reverse bias, + on N, - on P(Expand W, Vbi)

Remove holes and electrons awayfrom depletion region

I

V

I

V

So if we combine these by fusing their

terminals…P N

W

Vappl > 0

-+

N P

W

Vappl < 0

-+

Holes from P region (“Emitter”) of 1st PN junction driven by FB of 1st PN junction into central N region (“Base”)

Driven by RB of 2nd PN junction from Base into P region of2nd junction (“Collector”)

• 1st region FB, 2nd RB

• If we want to worry about holes alone, need P+ on 1st region

• For holes to be removed by collector, base region must be thin

Qualitative basic operation of BJTs

Bipolar Junction Transistors: Basics+

- +

-

IE IB

IC

IE = IB + IC ………(KCL)

VEC = VEB + VBC ……… (KVL)

BJT configurations

https://www.youtube.com/watch?v=Ir4sY5Fm-dU

http://ecetutorials.com/analog-electronics/operation-of-bjt/

+

- +

-

IE IB

IC

Bipolar Junction Transistors: Basics

VEB, VBC > 0 VEC >> 0IE, IC > 0 IB > 0

VEB >-VBC > 0 VEC > 0 but smallIE > -IC > 0 IB > 0

VEB < 0, VBC > 0 VEC > 0IE < 0, IC > 0 IB > 0 but small

Bipolar Junction Transistors: Basics

Bias Mode E-B Junction C-B Junction

Saturation Forward Forward

Active Forward Reverse

Inverted Reverse Forward

Cutoff Reverse Reverse

8/2/2017Dr Gnanasekaran Thangavel18

Active Region – the transistor operates as an amplifier and Ic = β.Ib

Saturation – the transistor is “Fully-ON” operating as a switch and Ic

= I(saturation)

Cut-off – the transistor is “Fully-OFF” operating as a switch and Ic =

0 Common Base Configuration – has Voltage Gain but no Current

Gain.

Common Emitter Configuration – has both Current and Voltage

Gain.

Common Collector Configuration – has Current Gain but no

Voltage Gain.

The Common Base (CB) Configuration

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The input current flowing into the

emitter is quite large as its the sum

of both the base current and

collector current respectively

therefore, the collector current

output is less than the emitter

current input resulting in a current

gain for this type of circuit of “1”

(unity) or less, in other words the

common base configuration

“attenuates” the input signal. This type of amplifier configuration is a non-inverting voltage amplifier

circuit, in that the signal voltages Vin and Vout are “in-phase”. Where:

Ic/Ie is the current gain, alpha ( α ) and RL/Rin is the resistance gain.

The Common Emitter (CE) Configuration

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The common emitter amplifier

configuration produces the highest

current and power gain of all the three

bipolar transistor configurations. This

is mainly because the input

impedance is LOW as it is connected

to a forward biased PN-junction, while

the output impedance is HIGH as it is

taken from a reverse biased PN-

junction.This type of bipolar transistor configuration has a greater input impedance, current

and power gain than that of the common base configuration but its voltage gain is

much lower. The common emitter configuration is an inverting amplifier circuit.

This means that the resulting output signal is 180o “out-of-phase” with the input

voltage signal.

The Common Collector (CC) Configuration

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The common collector, or

emitter follower

configuration is very

useful for impedance

matching applications

because of the very high

input impedance, in the

region of hundreds of

thousands of Ohms while

having a relatively low

output impedance.

The common emitter configuration has a current gain approximately equal to the β

value of the transistor itself. In the common collector configuration the load

resistance is situated in series with the emitter so its current is equal to that of the

emitter current.

The Common Collector Current Gain

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This type of bipolar transistor configuration

is a non-inverting circuit in that the signal

voltages of Vin and Vout are “in-phase”. It

has a voltage gain that is always less than

“1” (unity).

The load resistance of the common collector

transistor receives both the base and

collector currents giving a large current gain

(as with the common emitter configuration)

therefore, providing good current

Bipolar Transistor Summary

8/2/2017Dr Gnanasekaran Thangavel23

CharacteristicCommon

Base

Common

Emitter

Common

Collector

Input Impedance Low Medium High

Output Impedance Very High High Low

Phase Angle 0o 180o 0o

Voltage Gain High Medium Low

Current Gain Low Medium High

Power Gain Low Very High Medium

Relationship between DC Currents and

Gains

8/2/2017Dr Gnanasekaran Thangavel24

NPN Transistor Example

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No1: A bipolar NPN transistor has a DC current gain, (Beta) value of 200. Calculate the base current Ib required to switch a resistive load of 4mA.

Therefore, β = 200, Ic = 4mA and Ib = 20µA.

----------------------------------------------------------------------------------------------------------------

No2 :An NPN Transistor has a DC base bias voltage, Vb of 10v and an input base resistor, Rb of 100kΩ. What will be the value of the base current into the transistor.

Therefore, Ib = 93µA.

Single Stage Common Emitter Amplifier

Circuit

8/2/2017Dr Gnanasekaran Thangavel26

Common Emitter Amplifier

configuration of an NPN

transistor is called a Class A

Amplifier. A “Class A Amplifier”

operation is one where the

transistors Base terminal is

biased in such a way as to

forward bias the Base-emitter

junction. Ohm´s Law, the

current flowing through the load

resistor, ( RL ),

Output Characteristics Curves of a Typical Bipolar

Transistor

8/2/2017Dr Gnanasekaran Thangavel27

Dynamic Load Line of the transistor can be drawn directly onto the graph of curves above from the point of “Saturation” ( A ) when Vce = 0 to the point of “Cut-off” ( B ) when Ic = 0 thus giving us the “Operating” or Q-point of the transistor. These two points are joined together by a straight line and any position along this straight line represents the “Active Region” of the transistor. The actual position of the load line on the characteristics curves can be calculated as follows:

Output Characteristics Curves of a Typical Bipolar

Transistor

8/2/2017Dr Gnanasekaran Thangavel28

Then, the collector or output characteristics curves for Common Emitter NPN Transistors can be used to predict the Collector current, Ic, when given Vce and the Base current, Ib. A Load Line can also be constructed onto the curves to determine a suitable Operating or Q-point which can be set by adjustment of the base current. The slope of this load line is equal to the reciprocal of the load resistance which is given as: -1/RL

Then we can define a NPN Transistor as being normally “OFF” but a small input current and a small positive voltage at its Base ( B ) relative to its Emitter ( E ) will turn it “ON” allowing a much large Collector-Emitter current to flow. NPN transistors conduct when Vc is much greater than Ve.

AM transmitter

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Single transistor radio receiver

8/2/2017Dr Gnanasekaran Thangavel30

31

TRANSISTOR BIASING CIRCUITSThe term biasing is used for application of dc voltages to establish a fixed level of

current and voltage.

The purpose of biasing a circuit is to establish a proper stable dc operating point

(Q-point). The dc operating point between saturation and cutoff is called the Q-point.

The goal is to set the Q-point such that that it does not go into saturation or cutoff

when an ac signal is applied.

Transistor must be properly biased with dc voltage to operate as a linear amplifier.

If amplifier is not biased with correct dc voltages on input and output, it can go into

saturation or cutoff when the input signal applied.

There are several methods to establish DC operating point.

We will discuss some of the methods used for biasing transistors.base-bias circuits

voltage-divider bias circuits

emitter-bias circuits

collector-feedback bias circuitsemitter-feedback bias circuits

32

RB

RC

Q1

VCC

VB(ac)

IB(ac)

VCE(ac)

IC(ac)

Amplifier

33

A generic dc load line.

IC

VCE

(sat)CC

C

C

VI

R

(off )CE CCV V

CC CEC

C

V VI

R

34

RB

RC

2 k

Q1

+12 V

VCE

2 4 6 8 10 12

2

4

6

8

IC

IC(sat)

VCE(off)

Plot the dc load line for the circuit shown in Fig. 7.3a.

35

Fig 7.4 Example 7.2.Plot the dc load line for the circuit shown in Fig. 7.4. Then, find the values of VCE for IC = 1, 2, 5 mA respectively.

RB

RC

1 k

Q1

+10 V

VCE

2 4 6 8 10

2

4

6

8

IC

10 IC (mA) VCE (V)

1 9

2 8

5 5

CE CC C CV V I R

36

Fig 7.6-8 Optimum Q-point with amplifier operation.

βC BI I

CE CC C CV V I R

VCE

IB = 0 A

IB = 10 A

IB = 20 A

IB = 30 A

IB = 40 A

IB = 50 A

IC

Q-Point

VCC

VCC

/2

IC(sat)

IC(sat)

/2

IB

37

Base bias (fixed bias).

CC BEB

B

V VI

R

βC BI I

CE CC C CV V I R

RC

RB

+0.7 V

IC

IB

IE

Input

Output

VBE

VCC

Q1

b = dc current gain = hFE

38

Example

RC

2 kR

B

360 k

+0.7 V

IC

IB

IE

VBE

+8 V

hFE

= 100

0.7V 8V 0.7V

360kΩ

20.28μA

CCB

B

VI

R

100 20.28μA

2.028mA

C FE BI h I

8V 2.028mA 2kΩ

3.94V

CE CC C CV V I R

The circuit is midpoint biased.

39

Example

Construct the dc load line for the circuit shown in Fig. 7.10, and plot the Q-point from the values obtained in Example 7.3. Determine whether the circuit is midpoint biased.

VCE

(V)2 4 6 8 10

1

2

3

4

IC (mA)

Q

(sat )

8V4mA

2kΩ

CCC

C

VI

R

off8VCCCE

V V

40

Example - Q-point shift.

The transistor in Fig. 7.12 has values of hFE = 100 when T = 25 °C and hFE = 150

when T = 100 °C. Determine the Q-point values of IC and VCE at both of these temperatures.

RC

2 kR

B

360 k

+0.7 V

IC

IB

IE

VBE

+8 V

hFE

= 100 (T = 25C)h

FE = 150 (T = 100C)

Temp(°C) IB (A) IC (mA) VCE (V)

25 20.28 2.028 3.94

100 20.28 3.04 1.92

41

Base bias characteristics. (1)

RC

RB

+0.7 V

IC

IB

IE

Input

Output

VBE

VCC

Q1 Advantage: Circuit simplicity.

Disadvantage: Q-point shift with temp.

Applications: Switching circuits only.

Circuit recognition: A single resistor (RB) between the base terminal and VCC. No emitter resistor.

42

Base bias characteristics. (2)

RC

RB

+0.7 V

IC

IB

IE

Input

Output

VBE

VCC

Q1

(sat)

(off )

CCC

C

CE CC

VI

R

V V

Load line equations:

Q-point equations:

CC BEB

B

C FE B

CE CC C C

V VI

R

I h I

V V I R

43

Voltage divider bias

R1

R2 R

E

RC

+VCC

Input

Output

I1

I2 I

E

IB

IC

Assume that I2 > 10IB.

2

1 2

B CC

RV V

R R

0.7VE BV V

EE

E

VI

R

Assume that ICQ IE (or hFE >> 1). Then

CEQ CC CQ C EV V I R R

44

Example -1

Determine the values of ICQ and VCEQ for the circuit shown in Fig. 7.15.

R1

18 k

R2

4.7 kR

E

1.1 k

RC

3 k

+10 V

I1

I2

IE

IB

IC

hFE

= 50

2

1 2

4.7kΩ10V 2.07V

22.7kΩ

B CC

RV V

R R

0.7V

2.07V 0.7V 1.37V

E BV V

Because ICQ IE (or hFE >> 1),

1.37V1.25mA

1.1kΩ

ECQ

E

VI

R

10V 1.25mA 4.1kΩ 4.87V

CEQ CC CQ C EV V I R R

45

Example -2

Verify that I2 > 10 IB.

R1

18 k

R2

4.7 kR

E

1.1 k

RC

3 k

+10 V

I1

I2

IE

IB

IC

hFE

= 50

2

2

2.07V440.4μA

4.7kΩ

BVI

R

1.25mA

1 50+1

24.51μA

EB

FE

II

h

2 10 BI I

46

Which value of hFE do I use?

Transistor specification sheet may list any combination of the following hFE: max. hFE, min. hFE, or typ. hFE. Use typical value if there is one. Otherwise, use

(ave) (min) (max)FE FE FEh h h

47

Example

A voltage-divider bias circuit has the following values: R1 = 1.5 k, R2 = 680 , RC = 260 , RE = 240 and VCC = 10 V. Assuming the transistor is a 2N3904, determine the value of IB for the circuit.

2

1 2

680Ω10V 3.12V

2180ΩB CC

RV V

R R

0.7V 3.12V 0.7V 2.42VE BV V

2.42V10mA

240Ω

ECQ E

E

VI I

R

( ) (min) (max) 100 300 173FE ave FE FEh h h

(ave)

10mA57.5μA

1 174

EB

FE

II

h

48

Stability of Voltage DividerBias Circuit

The Q-point of voltage divider bias circuit is less dependent on hFE than that of the base bias (fixed bias).

For example, if IE is exactly 10 mA, the range of hFE is 100 to 300. Then

10mAAt 100, 100μA and 9.90mA

1 101

EFE B CQ E B

FE

Ih I I I I

h

10mAAt 300, 33μA and 9.97mA

1 301

EFE B CQ E B

FE

Ih I I I I

h

ICQ hardly changes over the entire range of hFE.

49

Load line for voltage divider bias circuit.

2 4 6 8 10 12

5

10

15

20

25

IC (mA)

VCE

(V)

(sat )

10V20mA

260Ω+240Ω

CCC

C E

VI

R R

(off ) 10VCE CCV V

Circuit values are from Example 7.9.

50

Base input resistance - 1

R1

R2 R

E

RC

VCC

I1

I2

IE

IB

IC

RIN(base)

R1

R2

I1

I2

VCC

0.7 V

IB

RIN(base)

( 1)E E E B FE EV I R I h R

(base) ( 1)EIN FE E

B

FE E

VR h R

I

h R

May be ignored.

51

Base input resistance -2

IB

R1

R2

I1

I2

VCC

IB

RIN(base)

VB

2 (base)

1 2 (base)

2

1 2

21

//

//

//

//

//

IN

B CC

IN

FE E

CC

FE E

EQ

CC

EQ FE EEQ

R RV V

R R R

R h RV

R R h R

RV

R R h RR R

52

Example

2 //

10kΩ// 50 1.1kΩ 8.46kΩ

EQ FE ER R h R

1

8.46kΩ20V 2.21V

68kΩ 8.46kΩ

EQ

B CC

EQ

RV V

R R

0.7V

2.21V 0.7V1.37mA

1.1kΩ

E BCQ E

E E

V VI I

R R

20V 1.37mA 7.3kΩ 9.99V

CEQ CC CQ C EV V I R R

R1

68k

R2

10kR

E

1.1k

RC

6.2k

VCC

=20V

I1

I2

IE

IC

hFE

= 50

53

Voltage-divider bias characteristics - 1

R1

R2 R

E

RC

+VCC

Input

Output

I1

I2 I

E

IB

IC

Circuit recognition: The voltage divider in the base circuit.

Advantages: The circuit Q-point values

are stable against changes in hFE.

Disadvantages: Requires more

components than most other biasing

circuits.

Applications: Used primarily to bias linear amplifier.

54

Voltage-divider bias characteristics -2

R1

R2 R

E

RC

+VCC

Input

Output

I1

I2 I

E

IB

IC

Load line equations: (sat)

(off )

CCC

C E

CE CC

VI

R R

V V

Q-point equations (assume that hFERE > 10R2):

2

1 2

0.7V

B CC

E B

ECQ E

E

CEQ CC CQ C E

RV V

R R

V V

VI I

R

V V I R R

55

Other Transistor Biasing Circuits

Emitter-bias circuits

Feedback-bias circuits

Collector-feedback bias

Emitter-feedback bias

56

Emitter bias.

Assume that the transistor operation is in active region.

RC

RE

RB

IC

IE

IB

Q1

Input

Output

+VCC

-VEE

0.7V

1

EEB

B FE E

VI

R h R

C FE BI h I

1E FE BI h I

CE CC C C E E EEV V I R I R V

Assume that hFE >> 1.

CE CC C C E EEV V I R R V

57

Example

RC

750

RE

1.5k

RB

100

IC

IE

IB

Q1

Input

Output

+12 V

-12 V

hFE

= 200

Determine the values of

ICQ and VCEQ for the

amplifier shown in Fig.7.27.

12V 0.7V

( 1)

11.3V37.47μA

100Ω+201 1.5kΩ

B

B FE E

IR h R

200 37.47μA

7.49mA

CQ FE BI h I

( )

24V 7.49mA 750Ω 1.5kΩ

7.14V

CEQ CC C C E EEV V I R R V

58

Load Line forEmitter-Bias Circuit

(sat )

( )CC EE CC EEC

C E C E

V V V VI

R R R R

( )CE off CC EE CC EEV V V V V

VCE

IC

IC(sat)

VCE(off)

59

Emitter-bias characteristics -1

RC

RE

RB

IC

IE

IB

Q1

Input

Output

+VCC

-VEE

Circuit recognition: A split (dual-polairty) power

supply and the base resistor is connected to ground.

Advantage: The circuit Q-point values are stable

against changes in hFE.

Disadvantage: Requires the use of dual-polarity

power supply.

Applications: Used primarily to bias linear amplifiers.

60

Emitter-bias characteristics- 2

RC

RE

RB

IC

IE

IB

Q1

Input

Output

+VCC

-VEE

Load line equations:

(sat )

(off )

CC EEC

C E

CE CC EE

V VI

R R

V V V

Q-point equations:

1

BE EECQ FE

B FE E

CEQ CC CQ C E EE

V VI h

R h R

V V I R R V

61

Collector-feedback bias.

RB

RC

+VCC

IC

IE

IB

CC C B C B B BEV I I R I R V

( 1)

CC BEB

FE C B

V VI

h R R

CQ FE BI h I

1CEQ CC FE B C

CC CQ C

V V h I R

V I R

62

Fig 7.30 Example 7.14.

Determine the values of ICQ and VCEQ for the amplifier shown in Fig. 7.30.

RB

RC

1.5 k

+10 V

180 k

hFE

= 100

1

10V 0.7V28.05μA

180kΩ 101 1.5kΩ

CC BEB

B FE C

V VI

R h R

100 28.05μA

2.805mA

CQ FE BI h I

( 1)

10V 101 28.05μA 1.5kΩ

5.75V

CEQ CC FE B CV V h I R

63

Circuit Stability ofCollector-Feedback Bias

RB

RC

+VCC

IC

IE

IB

hFE increases

IC increases (if IB is the same)

VCE decreases

IB decreases

IC does not increase that much.

Good Stability. Less dependent on hFE and temperature.

64

Collector-FeedbackCharacteristics (1)

RB

RC

+VCC

IC

IE

IB

Circuit recognition: The base resistor is

connected between the base and the collector terminals of the transistor.

Advantage: A simple circuit with relatively

stable Q-point.

Disadvantage: Relatively poor ac

characteristics.

Applications: Used primarily to bias linear amplifiers.

65

Collector-FeedbackCharacteristics (2)

RB

RC

+VCC

IC

IE

IB

Q-point relationships:

( 1)

CC BEB

FE C B

V VI

h R R

CQ FE BI h I

CEQ CC CQ CV V I R

66

Emitter-feedback bias.

RB

RC

+VCC

RE

IB

IE

IC

1

CC BEB

B FE E

V VI

R h R

CQ FE BI h I

CEQ CC C C E E

CC CQ C E

V V I R I R

V I R R

1E FE BI h I

67

Fig 7.32 Example 7.15.

RB

680k

RC

6.2k

+VCC

RE

1.6k

hFE

= 50

16V 0.7V

1 680kΩ 51 1.6kΩ

20.09μA

CC BEB

B FE E

V VI

R h R

50 20.09μA 1mACQ FE BI h I

16V 1mA 7.8kΩ 8.2V

CEQ CC CQ C EV V I R R

68

Circuit Stability ofEmitter-Feedback Bias

hFE increases

IC increases (if IB is the same)

VE increases

IB decreases

IC does not increase that much.

IC is less dependent on hFE and temperature.

RB

RC

+VCC

RE

IB

IE

IC

69

Emitter-Feedback Characteristics -1

Circuit recognition: Similar to voltage

divider bias with R2 missing (or base bias with RE added).

Advantage: A simple circuit with relatively

stable Q-point.

Disadvantage: Requires more components

than collector-feedback bias.

Applications: Used primarily to bias linear amplifiers.

RB

RC

+VCC

RE

IB

IE

IC

70

Emitter-Feedback Characteristics -2

RB

RC

+VCC

RE

IB

IE

IC

Q-point relationships:

( 1)

CC BEB

B FE E

V VI

R h R

CQ FE BI h I

CEQ CC CQ C EV V I R R

71

Summary

DC Biasing and the dc load line

Base bias circuits

Voltage-divider bias circuits

Emitter-bias circuits

Feedback-bias circuits

Collector-feedback bias circuits

Emitter-feedback bias circuits

Field-Effect Transistors -FET

8/2/2017Dr Gnanasekaran Thangavel72

The FET is based around the concept that charge

on a nearby object can attract charges within a

semiconductor channel.

The FET consists of a semiconductor channel with

electrodes at either end referred to as the drain and

the source.

A control electrode called the gate is placed in very

close proximity to the channel so that its electric

charge is able to affect the channel

In this way, the gate of the FET controls the flow of

carriers (electrons or holes) flowing from the source

to drain. It does this by controlling the size and

shape of the conductive channel.

The semiconductor channel where the current flow

occurs may be either P-type or N-type. This gives

rise to two types or categories of FET known as P-

Channel and N-Channel FETs.

Field Effect Transistor types

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There are many ways to define the

different types of FET that are available.

They may be categorised in a number of

ways, but some of the major types of FET

can be covered in the tree diagram.

Junction FET(JFET), Insulated Gate

FET(IGFET), Metal Oxide Silicon

FET(MOSFET), Dual Gate

MOSFET(DGMOSFET), MEtal Silicon

FET(MESFET), High Electron Mobility

Transistor (HEMT) , Pseudomorphic High

Electron Mobility Transistor( PHEMT), Fin

Field Effect Transistor (FinFET), vertical

MOS( VMOS)

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The N-channel JFET’s channel is doped with donor impurities meaning that

the flow of current through the channel is negative (hence the term N-

channel) in the form of electrons.

The P-channel JFET’s channel is doped with acceptor impurities meaning

that the flow of current through the channel is positive (hence the term P-

channel) in the form of holes. N-channel JFET’s have a greater channel

conductivity (lower resistance) than their equivalent P-channel types, since

electrons have a higher mobility through a conductor compared to holes.

This makes the N-channel JFET’s a more efficient conductor compared to

their P-channel counterparts.Bipolar Transistor

Field Effect

Transistor

Emitter – (E) >> Source –

(S)

Base – (B) >> Gate –

(G)

Collector – (C) >> Drain – (D)

Biasing of an N-channel JFET

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The cross sectional diagram above shows an

N-type semiconductor channel with a P-type

region called the Gate diffused into the N-

type channel forming a reverse biased PN-

junction and it is this junction which forms the

depletion region around the Gate area when

no external voltages are applied. JFETs are

therefore known as depletion mode devices.

JFET Channel Pinched-off

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The width of the channel decreases until no more current flows between the Drain and the Source and the FET is said to be “pinched-off” (similar to the cut-off region for a BJT). The voltage at which the channel closes is called the “pinch-off voltage”, ( VP ). In this pinch-off region the Gate voltage, VGS

controls the channel current and VDS has little or no effect.

The result is that the FET acts more like a voltage controlled resistor which has zero resistance when VGS = 0 and maximum “ON” resistance ( RDS ) when the Gate voltage is very negative. Under normal operating conditions, the JFET gate is always negatively biased relative to the source.

JFET

Model

Output characteristic V-I curves of a typical

junction FET.

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The characteristics curves example shown above, shows the four different regions of operation for a JFET and these are given as:

Ohmic Region – When VGS = 0 the depletion layer of the channel is very small and the JFET acts like a voltage controlled resistor.

Cut-off Region – This is also known as the pinch-off region were the Gate voltage, VGS is sufficient to cause the JFET to act as an open circuit as the channel resistance is at maximum.

Saturation or Active Region – The JFET becomes a good conductor and is controlled by the Gate-Source voltage, ( VGS ) while the Drain-Source voltage, ( VDS ) has little or no effect.

Breakdown Region – The voltage between the Drain and the Source, ( VDS ) is high enough to causes the JFET’s resistive channel to break down and pass

This another type of Field Effect Transistor

available whose Gate input is electrically

insulated from the main current carrying

channel and is therefore called an Insulated

Gate Field Effect Transistor or IGFET.

The most common type of insulated gate FET

which is used in many different types of

electronic circuits is called the Metal Oxide

Semiconductor Field Effect Transistor or

MOSFET for short.

The IGFET or MOSFET is a voltage

controlled field effect transistor that differs

from a JFET in that it has a “Metal Oxide”

Gate electrode which is electrically insulated

from the main semiconductor n-channel or p-

Metal Oxide Semiconductor Field Effect-MOSFET

Like the previous JFET tutorial, MOSFETs are three terminal devices

with a Gate, Drain and Source and both P-channel (PMOS) and N-

channel (NMOS) MOSFETs are available. The main difference this

time is that MOSFETs are available in two basic forms:

Depletion Type – the transistor requires the Gate-Source voltage,

( VGS ) to switch the device “OFF”. The depletion mode MOSFET is

equivalent to a “Normally Closed” switch.

Enhancement Type – the transistor requires a Gate-Source

voltage, ( VGS ) to switch the device “ON”. The enhancement mode

MOSFET is equivalent to a “Normally Open” switch.

The four MOSFET symbols above show an

additional terminal called the Substrate and is

not normally used as either an input or an output

connection but instead it is used for grounding

the substrate. It connects to the main

semiconductive channel through a diode junction

to the body or metal tab of the MOSFET. Usually

in discrete type MOSFETs, this substrate lead is

connected internally to the source terminal.

When this is the case, as in enhancement types

it is omitted from the symbol for clarification.

The line between the drain and source

connections represents the semiconductive

channel. If this is a solid unbroken line then this

represents a “Depletion” (normally-ON) type

MOSFET as drain current can flow with zero

gate potential. If the channel line is shown dotted

or broken it is an “Enhancement” (normally-OFF)

type MOSFET as zero drain current flows with

zero gate potential. The direction of the arrow

indicates whether the conductive channel is a p-

type or an n-type semiconductor device.

Basic MOSFET Structure and Symbol MOSFET

construction The construction of the Metal Oxide Semiconductor FET is

very different to that of the Junction FET. Both the

Depletion and Enhancement type MOSFETs use an

electrical field produced by a gate voltage to alter the flow

of charge carriers, electrons for n-channel or holes for P-

channel, through the semiconductive drain-source

channel. The gate electrode is placed on top of a very thin

insulating layer and there are a pair of small n-type regions

just under the drain and source electrodes.

We saw in the previous tutorial, that the gate of a junction

field effect transistor, JFET must be biased in such a way

as to reverse-bias the pn-junction. With a insulated gate

MOSFET device no such limitations apply so it is possible

to bias the gate of a MOSFET in either polarity, positive

(+ve) or negative (-ve).

This makes the MOSFET device especially valuable as

electronic switches or to make logic gates because with no

bias they are normally non-conducting and this high gate

input resistance means that very little or no control current

is needed as MOSFETs are voltage controlled devices.

Depletion-mode MOSFET The Depletion-mode MOSFET, which is less common than the enhancement

mode types is normally switched “ON” (conducting) without the application of a gate bias voltage. That is the channel conducts when VGS = 0 making it a “normally-closed” device. The circuit symbol shown above for a depletion MOS transistor uses a solid channel line to signify a normally closed conductive channel.

For the n-channel depletion MOS transistor, a negative gate-source voltage, -VGS will deplete (hence its name) the conductive channel of its free electrons switching the transistor “OFF”. Likewise for a p-channel depletion MOS transistor a positive gate-source voltage, +VGS will deplete the channel of its free holes turning it “OFF”.

In other words, for an n-channel depletion mode MOSFET: +VGS means more electrons and more current. While a -VGS means less electrons and less current. The opposite is also true for the p-channel types. Then the depletion mode MOSFET is equivalent to a “normally-closed” switch.

Depletion-mode N-Channel MOSFET and circuit

Symbols

The depletion-mode MOSFET is

constructed in a similar way to their

JFET transistor counterparts were

the drain-source channel is

inherently conductive with the

electrons and holes already present

within the n-type or p-type channel.

This doping of the channel

produces a conducting path of low

resistance between the Drain and

Source with zero Gate bias.

Enhancement-mode MOSFET The more common Enhancement-mode MOSFET or eMOSFET, is the reverse of the depletion-mode

type. Here the conducting channel is lightly doped or even undoped making it non-conductive. This

results in the device being normally “OFF” (non-conducting) when the gate bias voltage, VGS is equal

to zero. The circuit symbol shown above for an enhancement MOS transistor uses a broken channel

line to signify a normally open non-conducting channel.

For the n-channel enhancement MOS transistor a drain current will only flow when a gate voltage ( VGS

) is applied to the gate terminal greater than the threshold voltage ( VTH ) level in which conductance

takes place making it a transconductance device.

The application of a positive (+ve) gate voltage to a n-type eMOSFET attracts more electrons towards

the oxide layer around the gate thereby increasing or enhancing (hence its name) the thickness of the

channel allowing more current to flow. This is why this kind of transistor is called an enhancement mode

device as the application of a gate voltage enhances the channel.

Increasing this positive gate voltage will cause the channel resistance to decrease further causing an

increase in the drain current, ID through the channel. In other words, for an n-channel enhancement

mode MOSFET: +VGS turns the transistor “ON”, while a zero or -VGS turns the transistor “OFF”. Then,

the enhancement-mode MOSFET is equivalent to a “normally-open” switch.

The reverse is true for the p-channel enhancement MOS transistor. When VGS = 0 the device is “OFF”

and the channel is open. The application of a negative (-ve) gate voltage to the p-type eMOSFET

enhances the channels conductivity turning it “ON”. Then for an p-channel enhancement mode

Enhancement-mode N-Channel MOSFET and Circuit

Symbols Enhancement-mode MOSFETs

make excellent electronics switches due to their low “ON” resistance and extremely high “OFF” resistance as well as their infinitely high input resistance due to their isolated gate. Enhancement-mode MOSFETs are used in integrated circuits to produce CMOS type Logic Gates and power switching circuits in the form of as PMOS (P-channel) and NMOS (N-channel) gates. CMOS actually stands for Complementary MOS meaning that the logic device has both PMOS and NMOS within

Enhancement-mode N-Channel MOSFET

Amplifier

The DC biasing of this

common source (CS)

MOSFET amplifier circuit

is virtually identical to the

JFET amplifier. The

MOSFET circuit is biased

in class A mode by the

voltage divider network

formed by resistors R1

and R2. The AC input

resistance is given as RIN

= RG = 1MΩ.

Enhancement-mode N-Channel MOSFET

Amplifier … Metal Oxide Semiconductor Field Effect Transistors are three terminal active

devices made from different semiconductor materials that can act as either an insulator or a conductor by the application of a small signal voltage. The MOSFETs ability to change between these two states enables it to have two basic functions: “switching” (digital electronics) or “amplification” (analogue electronics). Then MOSFETs have the ability to operate within three different regions:

1. Cut-off Region – with VGS < Vthreshold the gate-source voltage is lower than the threshold voltage so the MOSFET transistor is switched “fully-OFF” and IDS = 0, the transistor acts as an open circuit

2. Linear (Ohmic) Region – with VGS > Vthreshold and VDS < VGS the transistor is in its constant resistance region and behaves as a voltage-controlled resistor whose resistive value is determined by the gate voltage, VGS

3. Saturation Region – with VGS > Vthreshold the transistor is in its constant current region and is switched “fully-ON”. The current IDS = maximum as the transistor acts as a closed circuit

MOSFET Summary

MOSFET type VGS = +ve VGS = 0VGS = -

ve

N-Channel Depletion ON ON OFF

N-Channel

EnhancementON OFF OFF

P-Channel Depletion OFF ON ON

P-Channel

EnhancementOFF OFF ON

Special Semiconductor Devices

INTRODUCTION:

The SCR is the most important special semiconductor device. This device is

popular for its Forward-Conducting and Reverse-blocking

characteristics.

SCR can be used in high-power devices. For example, in the central

processing unit of the computer, the SCR is used in switch mode power

supply (SMPS).

The DIAC, a combination of two Shockley Diodes, and the TRIAC, a

combination of two SCRs connected anti-parallelly are important power-

control devices.

The UJT is also used as an efficient switching device.

SILICON-CONTROLLED RECTIFIER (SCR) The silicon-controlled rectifier or semiconductor controlled rectifier is

a two-state device used for efficient power control.

SCR is the parent member of the thyristor family and is used in high-

power electronics. Its constructional features, physical operation and

characteristics are explained in the following sections.

The SCR is a four-layer structure, either p–n–p–n or n–p–n–p, that

effectively blocks current through two terminals until it is turned ON by a

small-signal at a third terminal.

The SCR has two states: a high-current low-impedance ON state and a

low-current high-impedance OFF state.

The basic transistor action in a four-layer p–n–p–n structure is analyzed

first with only two terminals, and then the third control input is introduced.

Physical Operation and Characteristics:

The physical operation of the SCR can be explained clearly with reference to

the current–voltage characteristics.

The forward-bias condition and reverse-bias condition illustrate the

conducting state and the reverse blocking state respectively. Based on these

two states a typical I –V characteristic of the SCR is shown in Fig. 8-2.

SCR in Forward Bias:

There are two different states in which we can examine the SCR in the forward-

biased condition:

(i) The high- impedance or forward-blocking state

(ii) The low-impedance or forward-conducting state

At a critical peak forward voltage Vp, the SCR switches from the blocking state to

the conducting state, as shown in Fig. 8-2.

A positive voltage places junction j1 and j3 under forward-bias, and the centre

junction j2 under reverse-bias.

The for ward voltage in the blocking state appears across the reverse-biased

junction j2 as the applied voltage V is increased. The voltage from the anode A to

cathode C, as shown in Fig. 8-1, is very small after switching to the forward-

conducting state, and all three junctions are forward-biased. The junction j2

switches from reverse-bias to forward-bias..

SCR in Reverse Bias:

In the reverse-blocking state the junctions j1 and j3 are reverse-

biased, and j2 is forward-biased.

The supply of electrons and holes to junction j2 is restricted, and due

to the thermal generation of electron–hole pairs near junctions j1 and j2 the

device current is a small saturation current.

In the reverse blocking condition the current remains small until

avalanche breakdown occurs at a large reverse-bias of several thousand volts.

An SCR p–n–p–n structure is equivalent to one p–n–p transistor and

one n–p–n transistor sharing some common terminals.

Collector current I C 1 = α1i + I CO 1 having a transfer ratio α 1 for the p–n–p.

Collector current I C 2 =α2i + I CO 2 having a transfer ratio a2 for the n–p–n.

ICO1 and ICO 2 stand for the respective collector-saturation currents.

I C 1 = α 1i + I CO 1 = I B 2 ……………….(8-1)

I C 2 = α 2 i + I CO 2 = I B 1 ……………… (8-2)

SCR in Reverse Bias:

The total current through the SCR is the sum of iC1 and iC2:

I C 1 + I = i ………………..(8-3)

Substituting the values of collector current from Eqs. (8-1) and (8-2) in Eq. (8-3) we get:

i (α1 + α2) + I CO 1 + I CO 2 = i

i = (I CO 1 + I CO 2 ) /(1- α1 + α2) ………………..(8-4)

Case I: When (α1 + α2) → 1, then the SCR current i → infinite.

As the sum of the values of alphas tends to unity, the SCR current i increases rapidly. The

derivation is no

longer valid as (α1 + α2) equals unity.

Case II: When (α1 + α2 → 0, i.e., when the summation value of alphas goes to zero, the

SCR resultant current can be expressed as:

i = I CO 1 + I CO 2 …………………………….(8-5)

The current, i, passing through the SCR is very small. It is the combined collector-saturation

currents of the two equivalent transistors as long as the sum (α1 + α2) is very small or almost

near zero.

SCR in Reverse Bias:

I–V Characteristics of the SCR:

Forward-Blocking State: When the device is biased in the forward-blocking state, as shown in Fig. 8-4(a), the applied

voltage appears primarily across the reverse-biased junction j2. Al though the junctions j1 and j3 are

forward-biased, the current is small.

Forward-Conducting State of the SCR:As the value of (α1 + α2 ) approaches unity through one of the mechanisms ,many holes

injected at j1 survive to be swept across j2 into p2.

This process helps feed the recombination in p2 and support the injection of holes into n2. In a

similar manner, the transistor action of electrons injected at j3 and collected at j2 supplies electrons for n1.

The current through the device can be much larger.

I–V Characteristics of the SCR:

Reverse-Blocking State of the SCR:

The SCR in reverse-biased condition allows almost negligible

current to flow through it. This is shown in Fig. 8-4(c).

In the reverse-blocking state of the SCR, a small saturation

current flows from anode to cathode. Holes will flow from the gate into p2, the base of the n–p–n transistor,

due to positive gate current.

The required gate current for turn-on is only a few milli-amperes, therefore, the SCR can be

turned on by a very small amount of power in the gate.

I–V Characteristics of the SCR:

As shown in Fig. 8-5, if the gate current is 0 mA, the

critical voltage is higher, i.e., the SCR requires more

voltage to switch to the conducting state.

But as the value of gate current increases, the critical

voltage becomes lower, and the SCR switches to

the conducting state at a lower voltage.

At the higher gate current IG2, the SCR switches

faster than at the lower gate current IG1,

because IG2 > IG1.

I–V Characteristics of the SCR:

Semiconductor-controlled switch (SCS):

Few SCRs have two gate leads, G2

attached to p2 and G1

attached to n1, as shown in Fig. 8-6.

This configuration is called the

semiconductor-controlled switch

(SCS).

The SCS, biased in the forward-

blocking state, can be switched to the

conducting state by a negative pulse at

the anode gate n1 or by a positive

current pulse applied to the cathode

gate at p2.

Simple Applications:

The SCR is the most important member of the thyristor family. The SCR is a

capable power device as it can handle thousands of amperes and volts.

Generally the SCR is used in many applications such as in high power

electronics, switches, power-control and conversion mode.

It is also used as surge protector.

Static Switch: The SCR is used as a switch for power-switching in various

control circuits.

Power Control: Since the SCR can be turned on externally, it can be used to

regulate the amount of power delivered to a load.

Surge Protection: In an SCR circuit, when the voltage rises beyond the

threshold value, the SCR is turned on to dissipate the charge or voltage quickly.

Power Conversion: The SCR is also used for high-power conversion and

regulation. This includes conversion of power source from ac to ac, ac to dc and

dc to ac.

TRIODE AC SWITCH (TRIAC):

The term TRIAC is derived by combining the first three letters of the word

“TRIODE” and the word “AC”.

A TRIAC is capable of conducting in both the directions. The TRIAC, is thus, a

bidirectional thyristor with three terminals. It is widely used for the control of

power in ac circuits.

Constructional Features:

Depending upon the polarity of the gate pulse and the biasing

conditions, the main four-layer structure that turns ON by a

regenerative process could be one of p1 n1, p2 n2, p1 n1 p2 n3, or

p2 n1 p1 n4, as shown in Fig. 8-8.

Advantages of the TRIAC:

The TRIAC has the following advantages:

(i) They can be triggered with positive- or negative-polarity

voltage.

(ii) They need a single heat sink of slightly larger size.

(iii) They need a single fuse for protection, which simplifies their

construction.

(iv) In some dc applications, the SCR has to be connected with a

parallel diode for protection against reverse voltage, whereas a

TRIAC may work without a diode, as safe breakdown in either

direction is possible.

The TRIAC has the following disadvantages:

(i) TRIACs have low dv/dt ratings compared to SCRs.

(ii) Since TRIACs can be triggered in either direction, the trigger circuits with

TRIACs needs careful consideration.

(iii) Reliability of TRIACs is less than that of SCRs.

Disadvantages of the TRIAC:

Simple Applications of the TRIAC:

The TRIAC as a bidirectional thyristor has various applications. Some of the

popular applications of the

TRIAC are as follows:

(i) In speed control of single-phase ac series or universal motors.

(ii) In food mixers and portable drills.

(iii) In lamp dimming and heating control.

(iv) In zero-voltage switched ac relay.

DIODE AC SWITCH (DIAC): The DIAC is a combination of two diodes. Diodes being unidirectional

devices, conduct current only in one direction.

If bidirectional (ac) operation is desired, two Shockley diodes may be joined

in parallel facing different directions to form the DIAC.

Constructional Features:

The construction of DIAC looks like a transistor but there are major differences.

They are as follows:

(i) All the three layers, p–n–p or n–p–n, are equally doped in the DIAC, whereas

in the BJT there is a gradation of doping. The emitter is highly doped, the collector

is lightly doped, and the base is moderately doped.

(ii) The DIAC is a two-terminal diode as opposed to the BJT, which is a three-

terminal device.

Physical Operation and Characteristics:

The main characteristics are of the DIAC are as follows:

(i) Break over voltage

(ii) Voltage symmetry

(iii) Break-back voltage

(iv) Break over current

(v) Lower power dissipation

Although most DIACs have symmetric switching voltages, asymmetric

DIACs are also available. Typical DIACs have a power dissipations

ranging from 1/2 to 1 watt.

I-V characteristics of the DIAC:

UNIJUNCTION TRANSISTOR (UJT):

The uni-junction transistor is a three-terminal single-junction device. The switching

voltage of the UJT can be easily varied.

The UJT is always operated as a switch in oscillators, timing circuits and in

SCR/TRIAC trigger circuits.

Constructional Features:

The UJT structure consists of a lightly doped n-type silicon bar

provided with ohmic contacts on either side.

The two end connections are called base B1 and base B2. A small

heavily doped p-region is alloyed into one side of the bar. This p-region

is the UJT emitter (E) that forms a p–n junction with the bar.

Between base B1 and base B2, the resistance of the n-type bar called

inter-base resistance (RB ) and is in the order of a few kilo ohm.

This inter-base resistance can be broken up into two resistances—the

resistance from B1 to the emitter is RB1 and the resistance from B2 to

the emitter is RB 2.

Since the emitter is closer to B2 the value of RB1is greater than RB2.

Total resistance is given by:

RB = RB1 + RB2

Equivalent circuit for UJT:

The VBB source is generally

fixed and provides a constant

voltage from B2 to B1.

The UJT is normally

operated with both B2 and E

positive biased relative to B1.

B1 is always the UJT

reference terminal and all

voltages are measured

relative to B1 . VEE is a

variable voltage source.

UJT V–I characteristic curves:

ON State of the UJT Circuit:

As VEE increases, the UJT stays in the OFF state until VE approaches the

peak point value V P. As VE approaches VP the p–n junction becomes forward-

biased and begins to conduct in the opposite direction.

As a result IE becomes positive near the peak point P on the VE - IE curve.

When VE exactly equals VP the emitter current equals IP .

At this point holes from the heavily doped emitter are injected into the n-type

bar, especially into the B1 region. The bar, which is lightly doped, offers very

little chance for these holes to recombine.

The lower half of the bar becomes replete with additional current carriers

(holes) and its resistance RB is drastically reduced; the decrease in BB1

causes Vx to drop.

This drop, in turn, causes the diode to become more forward-biased and IE

increases even further.

OFF State of the UJT Circuit:

When a voltage VBB is applied across the two base terminals B1 and

B2, the potential of point p with respect to B1 is given by:

VP =[VBB/ (RB1 +RB2)]*RB1=η*RB1,

η is called the intrinsic stand off ratio with its typical value lying between

0.5 and 0.8.

The VEE source is applied to the emitter which is the p-side. Thus, the

emitter diode will be reverse-biased as long as VEE is less than Vx.

This is OFF state and is shown on the VE - IE curve as being a very

low current region.

In the OFF the UJT has a very high resistance between E and B1, and

IE is usually a negligible reverse leakage current. With no IE, the drop

across RE is zero and the emitter voltage equals the source voltage.

UJT Ratings: Maximum peak emitter current : This represents the maximum allowable value of a pulse

of emitter current.

Maximum reverse emitter voltage :This is the maxi mum reverse-bias that the emitter

base junction B2 can tolerate before breakdown occurs.

Maximum inter base voltage :This limit is caused by the maxi mum power that the n-type

base bar can safely dissipate.

Emitter leakage current :This is the emitter current which flows when VE is less than Vp

and the UJT is in the OFF state.

The UJT is very popular today mainly due to its high switching speed.

A few select applications of the UJT are as follows:

(i) It is used to trigger SCRs and TRIACs

(ii) It is used in non-sinusoidal oscillators

(iii) It is used in phase control and timing circuits

(iv) It is used in saw tooth generators

(v) It is used in oscillator circuit design

Applications:

INSULATED-GATE BIPOLAR TRANSISTOR

(IGBT):

The insulated-gate bipolar transistor is a recent model of a power-switching

device that combines the advantages of a power BJT and a power MOSFET.

Both power MOSFET and IGBT are the continuously controllable voltage-

controlled switch.

Constructional Features:

The structure of an IGBT cell is shown in Fig. 8-19.

The p region acts as a substrate which forms the anode region, i.e., the

collector region of the IGBT. Then there is a buffer layer of n region and a

bipolar-base drift region.

The p-region contains two n regions and acts as a MOSFET source. An

inversion layer can be formed by applying proper gate voltage.

The cathode, i.e., the IGBT emitter is formed on the n source region.

INSULATED-GATE BIPOLAR TRANSISTOR

(IGBT):

Physical Operation:

The principle behind the operation of an

IGBT is similar to that of a power MOSFET.

The IGBT operates in two modes:

(i) The blocking or non-conducting

mode

(ii) The ON or conducting mode.

The circuit symbol for the IGBT is shown in

Fig. 8-20.

It is similar to the symbol for an n–p–n

bipolar-junction power transistor with the

insulated-gate terminal replacing the base.

REAL-LIFE APPLICATIONS:

The IGBT is mostly used in high-speed switching devices. They have

switching speeds greater than those of bipolar power transistors.

The turn-on time is nearly the same as in the case of a power

MOSFET, but the turn-off time is longer.

Thus, the maximum converter switching frequency of the IGBT is

intermediate between that of a bipolar power transistor and a power

MOSFET.

POINTS TO REMEMBER:

1. A thyristor is a multilayer p–n terminal electronic device used for bi-stable

switching.

2. The SCR has two states:

(a) High-current low-impedance ON state

(b) Low-current OFF state

3. Latching current is defined as a minimum value of anode current which is a

must in order to attain the turn-on process required to maintain conduction

when the gate signal is removed.

4. Holding current is defined as a minimum value of anode current below which

it must fall for turning off the thyristor..

5. The TRIAC is a bidirectional thyristor with three terminals. It is used

extensively for the control of power in ac circuits.

6. The DIAC is an n–p–n or p–n–p structure with a uniformly doped layer.

7. Applications of the UJT:

(a) As trigger mechanism in the SCR and the TRIAC

(b) As non-sinusoidal oscillators

(c) In saw-tooth generators

(d) In phase control and timing circuits

8. The UJT operation can be stated as follows:

(a) When the emitter diode is reverse-biased, only a very small emitter

current flows. Under this condition RB1 is at its normal high-value. This is the OFF

state of the UJT.

(b) When the emitter diode becomes forward-biased RB1 drops to a very low

value so that the total resistance between E and B1 becomes very low, allowing

emitter current to flow readily. This is the ON state.

9. The IGBT is mostly used in high-speed switching Devices.

POINTS TO REMEMBER:

References1. David A. Bell ,”Electronic Devices and Circuits”, Prentice Hall of India,.

2. www.ee.ic.ac.uk/fobelets/EE2BJT_1_Q.ppt

3. www.ohio.edu/people/starzykj/network/Class/.../Lecture11%20BJT%20Transistor.ppt

4. https://www.calvin.edu/~pribeiro/courses/engr311/Lecture%20Notes/Chap5.ppt

5. http://www.electronics-tutorials.ws/transistor/tran_1.html

6. http://www.electronics-tutorials.ws/transistor/tran_5.html

7. http://www.electronics-tutorials.ws/transistor/tran_6.html

8. http://www.electronic-circuits-diagrams.com/powerful-am-transmitter-circuit/

9. http://www.circuitstoday.com/single-transistor-radio

10. http://www.radio-electronics.com/info/data/semicond/fet-field-effect-transistor/fet-overview-

types.php

11. http://www.electronics-tutorials.ws/power/unijunction-transistor.html

12. users.prf.jcu.cz/klee/UAI609/documentation/transistor%20biasing.ppt

13. wps.pearsoned.com/wps/media/objects/11427/11702257/Chapter%2B8.ppt

124 Dr Gnanasekaran Thangavel 8/2/2017

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Dr Gnanasekaran Thangavel 8/2/2017

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