green telecom & it workshop: wireline access india_vetter

Research directions for energy efficient wireline access

April 04, 2012Peter.Vetter@alcatel-lucent.com

Peter Vetter, Dusan Suvakovic, Keith Chow

Wireline Access WG Target: 10x per user – 100x efficiency gain

VirtualHGW

Un-cooled tunable lasers

Low power OFDM in optical access

Min. energy access architecturesFiber in the Home

Novel PON protocols;Low power CPE

Hybrid PONAlso: TNOZTE, KAIST

PON Sleepmode

0.0

2.0

4.0

6.0

8.0

10.0

2010 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021

W/s

ub

scri

ber

Wireless LAN

OLT(/subscriber)

HGW processor

Wireline LAN (Eth.)

PON digital

OE PON

Wireline Access: GPON, XGPON and BI-PON GPONXGPON

EE HW design

Long reach

Virtual HGW

BI PON

Low power electronics

Transparent CPE

Low power Optics

Sleepmode 2

Sleepmode

Short TermShort Term Long TermLong TermMedium TermMedium Term

Fast Sleep Mode Aim for awake time ONU proportional to useful payload Challenges

Schedule probing cycles and awake time with minimum impact on QoE Minimize power during sleep state Minimize wake-up time

Fast sleep state:No data

Active state:Probing Bursts of data

P

te.g. ~10 ms

0.0

2.0

4.0

6.0

8.0

10.0

2010 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021

W/s

ub

scri

ber

Wireless LAN

OLT(/subscriber)

HGW processor

Wireline LAN (Eth.)

PON digital

OE PON

Wireline Access: GPON, XGPON and BI-PON GPONXGPON

Sleepmode 2

Sleepmode

Short TermShort Term Long TermLong TermMedium TermMedium Term

Standard XG-PON

10 Gb/s10 Gb/s ~10 Mb/s~10 Mb/s

Bit-Interleaving PON

10 Gb/s10 Gb/s ~10 Mb/s~10 Mb/s

Demonstrator

ONU 1

TxOLT-MAC

(FPGA) Rx

ONT-FPGA UN

I

Line cardDS: 10Gbit/s

ONU 2DS: Bit-interleaved data

BIPONDS

BIDS

ONU 1

TxOLT-MAC

(FPGA)Rx

ONT-FPGA

UN

I

Line cardDS: 10Gbit/s

ONU 2DS: Packet data

XGPONDS

XGPONDS

Deser

Deser

Delta

Green PON ONT & Home prototype evaluation

DynamicPower (W) Ratio

XGPON1 3.200 1.00Sleep state 1.900 1.68

BIPON 1 Gbit/s 0.120 26.67BIPON 10 Mbit/s 0.040 80.00

FPGA implementation causes large static power consumption

Measured static power as baseline to establish dynamic power consumption

=> Good indicator of potential gain in custom ASIC.

Prototype with FPGA (Q1 2012)Prototype with FPGA (Q1 2012) ASIC designed (for Q2 2012)ASIC designed (for Q2 2012)

0.0

1.0

2.0

3.0

4.0

2010 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021

W/s

ub

scri

ber

Wireless LAN

OLT(/subscriber)

HGW processor

Wireline LAN (Eth.)

PON digital

OE PON

Wireline access PON improvements

BI PON

Short TermShort Term Long TermLong TermMedium TermMedium Term

Virtual Home Gateway / Quasi-passive CPE

Virtual HGW performs- routing and NAT- firewalling- OAM management

Quasi-passive CPE

Transparent CPE providing connectivity in-house and to network• Functions of current CPE moved to virtual HGW in network• Low power connectivity (“quasi-passive”) or transparant

(“passive”) CPE Savings:

• Cut-through of high bitrate services to terminal: LAN interfaces on CPE

• Lower power by processor platform sharing

0.0

1.0

2.0

3.0

4.0

2010 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021

W/s

ub

scri

ber

Wireless LAN

OLT(/subscriber)

HGW processor

Wireline LAN (Eth.)

PON digital

OE PON

Wireline access PON improvements

Short TermShort Term Long TermLong TermMedium TermMedium Term

Virtual HGW

Transparent CPE

0.0

1.0

2.0

3.0

4.0

2010 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021

W/s

ub

scri

ber

Wireless LAN

OLT(/subscriber)

HGW processor

Wireline LAN (Eth.)

PON digital

OE PON

Wireline access PON improvements

Short TermShort Term Long TermLong TermMedium TermMedium Term

Low power Optics

Low power electronics

1

10

100

1000

2010 2015 2020

GT Efficiency Gain

Business As Usual

Moore's Law efficiencyimprovement

Relative subscriber rate

Gain (rate double 4y)

Gain (rate double 6y)

Wireline Access Energy Efficiency

EE HW design

Long reach

Virtual HGW

BI PON

Low power electronics

Transparent CPE

Low power Optics

Sleepmode 2

Sleepmode