how to expand the physics reach while saving money fast-track collaboration start at pisa in 1999,...
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HOW TO EXPAND THE PHYSICS REACH WHILE SAVING MONEY
FAST-TRACK COLLABORATION
Start at Pisa in 1999, funded by Gruppo V: INFN, Dip. Fisica, Dip. Ing. Informatica, SNS - Pisa:A. Annovi, R. Carosi, M. Dell’Orso, P. Giannetti,G. Iannaccone, G. Punzi Offline-quality tracks @LHC Level 1 output rate
Joined in 2002:INFN, Dip. Fisica, Dip. Ing. Informatica, SNS - Pisa:P. Catastini, V. Cavasinni, V. Flaminio, T. Del Prete,C. Roda, G. Usai, I. VivarelliINFN, Dip. Fisica Roma: S. Giagu, M. Rescigno, L. ZanelloUniversity of Chicago: M. Shochet
Interested to join:University of Geneva: X. WuArgonne National Laboratory: J. Proudfoot
Co-operating on software algorithms:INFN-Dip. Fisica - Genova: F. Parodi
Co-operating on standard cell chip:Dip. Fisica - Ferrara: R. Tripiccione
P. Giannetti CSN1 3/2/2003
SVT Collaborators
Fast-Track Offline-quality tracks made
available to LHC L2 triggers, @L1 output rate.
Outline:
• Fitting FTK in the DAQ
• Working principles
• Physics reach and trigger strategies
• QCD multi-jet background
• Size and performance
Fullresolution
hits
Lowresolutionsuper bins
Tracking in 2 steps: find Roads,
then find Tracks inside Roads
Road
Super Bin
Road =Pattern
Road
PIPELINE
LVL1LVL1
Fast Track +(Road Finder) Fast Track +(Road Finder)
EVENT BUILDEREVENT BUILDER
CPU FARMCPU FARM
CALO MUON TRACKER CALO MUON TRACKER
BufferMemory
ROD
BufferMemory ROB ROBROB
offlinequalityTracks:Pt >1 GeV
Ev/sec = 50~100 kHz
L2 Algorithms
fewCPUs
FEFE
CMSinner detector
1000 tracks||< 2.5
Reconstructed tracks Pt> 2.0 GeV
30 minimum bias events +H->ZZ->4
Htt events: 1000 tracks in barrel 120 tracks Pt> 2.0
GeV
AM = BINGO PLAYERS
HIT # 1447
PATTERN NPATTERN 1PATTERN 2
PATTERN 3
PATTERN 5
PATTERN 4
Dedicated device - maximum parallelism:• Each pattern with private comparator• Road search during detector readout
The Event...
The Pattern Bank
TRACKING WITH PATTERN MATCHING
AM the Associative Memory
Bingo scorecard
ASSOCIATIVE MEMORY: CHIP ARCHITECTURE
ONE PATTERN
FF FF FF FF
FF FF FF FF
FF FF FF FF
FF FF FF FF
word word word word
Layer 1 Layer 2 Layer 3 Layer 4
HIT
Patt 0
Patt 1
Patt 2
Patt 3
Ou
tpu
t Bu
s
HIT HIT HIT
1/4
A
M 1/4
A
MDivide into sectors
6 buses
6 buses
Pixels barrel SCT barrel Pixels disks
Barrel + Disks to build full coverage
AM input bandwidth = 40 MHz cluster/bus
AM input buses = 6 <cluster/event> cluster rate
Pix 0 1300 64 MHzPix 2 + extra 1200 57 MHzSC0 + extra 980 49 MHzSC1 + extra 1000 52 MHzSC2 + extra 980 49 MHzSC3 + extra 980 49 MHz
Ev/sec 50KHz
2 AM partitionsfor the whole Pix+Si tracker
More partitions as a backup option
Less partitions Less hardware
conservative estimates from inner-detector & pixel TDRs
20 9U VME boards – 3 types
SUPER BINSDATA
ORGANIZERROADS
ROADS + HITS
EVENT # N
PIPELINED AM
HITS
FASTRACK
BUFFERMEMORY
BUFFERMEMORY
FrontEnd
Tracker
DO-board
EVENT # 1AM
-board
50~100 KHzevent rate
GB
Few CPUs
Offline quality Track parameters
The AM board
• Track confined to a road, fit is simple
• Linear expansion in the hit positions xi: – = k (cik xi)2 final cut
– d = d0+ai xi = 0+ bi xi Pt = …
• Fit reduces to a few scalar products fast
• Constants from detector geometry– Calculate in advance– Correction of mechanical alignments via linear
algorithm • fast and stable• A tough problem made easy !
Test of the linear fit using a fast simulation of the ATLAS Silicon Tracker Genova group: M. Cervetto, P. Morettini, F. Parodi, C. Schiavi, presented on 20-Nov-2002 at PESA
(d0) = 17 m
Track parameterresidulas
Track parameters:fit value vs. true
/N
Z bb
bbH/A bbbb
tt qqqq-bb
ttH qqqq-bbbb
H/A tt qqqq-bb
H hh bbbb
H+-
tb qqbb
Offline-quality b-tagging:Hadronic or soft-lepton
events reach of b’s
ATLAS with pixel only b-tag @LVL2 is less efficient
with FASTRACK offline b-tag performances @LVL2
ATL-
DA
Q-2
000
-03
3
ATLA
S T
P
31/3
/2000
0.6
100
10
1000
b
Ru
ATLAS: Staging of Trigger/DAQ system
-- Deferrals limit mainly available networking and computing for HLT-- Large uncertainties on LVL1 affordable rate vs money (component cost, software performance, etc.)
No room for safety factor
LVL1 LVL1 rate LVL1 rate HLT HLTselections (kHz) (kHz) selections Rate(examples …) L= 1 x 1033 L= 2 x 1033 (Hz) no deferrals extrem deferral
(2/3 of CORE)
MU6,8,20 23 0.8 20 2MU6 --- 0.2 210 ~40
EM20i,25,30 11 4.4 e25i 2EM15i,15,20 2 1 2e15i ~40 60i 220i ~40 J180,200,200 0.2 0.2 j400 3J75,90,90 0.2 0.2 3j165 4J55,65,65 0.2 0.2 4j110 ~25
J50+xE50,60,60 0.4 0.4 j70+xE70 ~20
Tau20,25,25+xE30 2 2 35+xE45 ~5
MU10+EM15i --- 0.1Others 5 5 others ~30(pre-scaled, etc.)
Total ~ 44 ~ 15 ~200
From Fabiola Gianotti, LHCC, 01/07/2002
CMS: Trigger Table @ 2x1033 cm-2s-1
Trigger Level-1 HLT Thresh. Rate Thresh. Rate (GeV) (kHz) (GeV) (Hz)
Inclusive iso e 29 29 33Inclusive iso 29 3.3 80 4Di-e 17 17 1Di-17 1.3 40,25 5
Inclusive iso 14 2.7 19 25Di-3 0.9 7 4
Inclusive -jet 86 2.2 86 3Di--jet 59 1.0 59 1
Jet*Etmiss 88*46 2.3 180*123 5
1-, 3-, 4-jets 177,86,70 3.0 657,247,113 9Inclusive b-jet 237 5
e*jet 21*45 0.8 19*45 2
Other 0.9 10
TOTAL 16.0 105
From CMS TDR 6, 15/12/2002
ATLAS+FTK: Trigger @ 2x1033 cm-2s-1
Level 1
soft : + very soft jets: ~ 2 kHz PT> 6 GeVjet1 PT > 25 GeV + || < 2.5jet2 PT > 10 GeV + || < 2.5
hadron: 3 soft jets: ~ 4 kHzjet1 PT > 70 GeV + || < 2.5jet2 PT > 50 GeV + || < 2.5jet3 PT > 15 GeV + || < 2.5
ET > 200 GeV
Level 2
Mbb50: 2 b-jets + Mbb > 50 GeV 3-b: 3 b-jets
Mbb50 on level-1 soft : ~ 160 HzMbb50 on level-1 hadron: ~ 50 Hz3-b on level-1 soft : ~ 10 Hz3-b on level-1 hadron: ~ 10 Hz
Even
ts
Z b-bbar Important b-jet calibration tool
Mbb(GeV)
Level 1: soft or hadron
Level 2: Mbb50
significances:(soft ) S/B 60(hadron) S/B 20
CDF Run II
(S/B = 35)
Cdf/anal/top/cdfr/4158
Even
ts
Mbb(GeV)
2fb-1
ATLAS + FTK 20fb-1
Title:/afs/cern.ch/user/t/tdrhiggs/public/HIGGS-TDR/contrCreator:HIGZ Version 1.25/05Preview:This EPS picture was not savedwith a preview included in it.Comment:This EPS picture will print to aPostScript printer, but not toother types of printers.
bbH/A bbbb
Analysis:4 b-jets |j|<2.5 PT
j > 70, 50, 30, 30 GeV efficiency 10%
L1: hadron (70,50,15) efficiency 25%L1: soft- efficiency 19%
L2: 3-b efficiency on hadron sample 18% L2: 3-b efficiency on soft- sample 8%
ATLA
S-T
DR
-15
(1999)
Effect of jet PT cuts is even worse with deferrals
MA (Gev)
tan
200
Pythia vs CDF RUN I data
Physics background Pythia Xsec study sample Data Xsec
pp bbbbbb 4 bjet+X 30 pp VH bbqq 2bjet+2jet 10 tt bbqqqq 2bjet+4jet 15
Multijet QCD backgroundShower Monte Carlos expected to underestimate data cross-sections.
IN CDF WE OBSERVE THE OPPOSITE ?
We are studying this background:
Different Monte Carlos: 1) Herwig vs Pythia2) matrix element calculations vs shower Monte Carlos
Hqq+HV 10 pb
6 + hadron 0.1 pb on tape2000 H/year
Hbb+Htt 1 pb
6 + hadron 0.05 pb on tape1000 H/year
gg H 30 pb
61 pb on tape20000 H/year
bb
bb
bbqq
bbbbqqqq
bbqqbb
bbbb
bbH/Abbbb
CDF
ATLAS
More examples
qqH, VH bb+njets
L1: hadronL2: Mbb50
qqH
WH ttH Z0H
Efficiency % ~25
~25
~ 90
~35
ttH bbbb+njets, H+Z0 bb+bb
L1: hadronL2: 3-b
Electron Identification
Swapping trigger algorithms can reduce the trigger rate while increasing efficiency!
The sooner offline quality tracks are included in the trigger the greater is the final efficiency.C
ER
N/L
HC
C/2
00
0-1
7
The efficiency & jet rejection could be enhanced by using tracks before calorimeters.
With FTK tracks are ready on the shelf: using tracks is even faster than using calorimeter raw data!
0.4
0.5
0.6
0.7
0.8
0.9
1.
0 0.02 0.06 0.1 0.14
(QCD 50-170 GeV)
(H
(20
0,5
00
GeV
)
1
,3h+
X) L=2x1033 cm-2 sec-1
mH=500mH=200
TRK tau on first calo jets
Pix tau on first calo jet
Staged-Pix tau on first calo jet
0.007
0.004
TRK tau on both calo jets
Calo+TRK: (QCD)=10-3 (mH=500)=0.49 (mH=200)=0.45 T=170 ms
Calo+PXL: (QCD)=10-3 (mH=500)=0.42 (mH=200)=0.41 T=59 ms
HLT selection @ CMS H(200,500 GeV) 1,3h± + X) CERN/LHCC 02-26 CMS TDR 6 December 15, 2002
Calo tau on first jet
Thin Road Width: pix 1mm x 6.5cm Si 3mm x
12.5cm
Medium Road Width: pix 2mm x 6.5cm Si 5mm x
12.5cm
Large Road Width: pix 5mm x 6.4cm Si 10mm x
12.5cm
ATLAS Barrel (~CERN/LHCC97-16)
7 layers: 3 Pixel + 4 micro-strip (no stereo)
Cylindrical Luminosity Region: R = 1mm, z = ±15cm
Generate tracks (Pt>1 GeV) & store NEW patterns
1/4BARREL
10M
patterns
ATLAS configuration:12 detector layers – 5 •105 SB/layer128 chips/board PQ208 die: 16.32 mm2
What chips do we have now ?
Config. Technology Status Density(patt/chip)
CDF old full custom on-line 128 CDF old FPGA working 64CDF current FPGA designed 1000~ATLAS old FPGA under test 32ATLAS stand. cell 0.18 estimate (now) 11000ATLAS stand. cell 0.1 estimate (1999) 40000
International Technology Roadmap for Semiconductor 1998
2005: patt / 9U-board
XCS40XL (.13) 64x103
Virtex (.1) 330x103
Stand. Cell (.1) 5000x103
AM
-B1
AM
-B0
DO
5D
O4
DO
3D
O2
DO
1D
O0
CUSTOM BACKPLANE FOR SBS & ROADSIN THE PIPELINE
RO
AD
BU
S
on
P2
Gh
ost
Bu
ster
DO - DAQCONNECTION
The FTK CRATEC
PU
0C
PU
1
1/2 Barrel +
Disks
30M patterns
AM
-B2
AM
-B3
CPU
2C
PU
3{
AM
-B4
AM
-B5
Standalone program to produce hits from tracks, it includes:• multiple scattering• ionization energy losses• detector inefficiencies• resolution smearing• primary vertex smearing: xy=1mm z=6cm
Detector hits generated from (Pythia): • QCD10 sample: QCD Pt>10 GeV • QCD40 sample: QCD Pt>40 GeV • QCD100 sample: QCD Pt>100 GeV • QCD200 sample: QCD Pt>200 GeV
all samples + noise + <5 MB>.
Road finding 6 layers/7 (FTK simulation)
Fullresolution
hits
Lowresolutionsuper bins
Tracking in 2 steps: find Roads,
then find Tracks inside Roads
Road
Super Bin
Road =Pattern
Road
Nfits <Ncomb/road>x<Nroad/track>
13 comb x 34 roads = ~440 comb/track
1.4 comb x 4 roads = 6 comb/track QCD Pt102.3 comb x 6 roads = 14 comb/track QCD Pt407.8 comb x 9.5 roads = 74 comb/track QCD Pt10027 comb x 25 roads = 658 comb/track QCD Pt200
thin
thin
large
large
Pt 200
Pt 100
Pt 40
Pt 10
Step 2: Software Linear Fit Ncomb
/trk
658
74
14
6
Ntrk
/ev
17
16
10
8
L1 Trig
jet
jet
soft jet
soft
L1 Rate
200Hz
<2KHz
~5KHz
~20KHz
Fits/sec
2.2MHz
<3MHz
750kHz
1.5MHz
<8MHz
Full 3D fit
fit/s 0.6 MHz
2D Fit
fit/s 2.2 MHz
PIII 800MHz
2.5D Fit
fit/s 1.1 MHz
Htt 4400 fit/ev <latency> =
1ms max latency =
100ms
Pt 200 11200 fit/ev. <latency> =
3ms
only 8 CPUs (barrel)
Latency Test
Nfit
/ev
11186
1184
140
48
FTK finds roads with event rates up to 100 KHz.
FTK data organization/reduction allows full resolution track fitting with Pt>~1 GeV with low CPU usage.
More efficient LVL2 triggers:Lower LVL1 & LVL2 thresholds and CPU power saved!
FTK is very compact: 2 crates + connection to experimentb-jet tagging at rates 10-20 KHz:more Higgs physics !
FTK as a possible strategy for hadron collider triggers:offline-quality tracks at LVL2
Backup slides
SVT TDR ’96
Impact parameter
SVT simulated on real data superimposed to real offline
SVT just started
Real dataCDF run 127844
No alignment corrections
~ 45 m
~ 48 m
Independent Tests of QCD Production
Channels
• Direct production
• Flavor excitation
• Gluon splitting
• CDF ok• LEP ok
• CDF ? not ok ?• LEP not applic.
• CDF ? not ok ?• LEP F.S.R. only
Init. State Rad. 75%Fin. State Rad. 25%Phys. Rev. D 50, 5562 (1994)
CDF: Pythia compared to Herwig
6pb/GeV
30pb/GeV
PythiaHerwig
Direct production
g - splitting
Flavor excitation
Only Direct productiondoesn’t show differences!
Pythia is well tested at LEP, but only Direct Production can be well tested at LEP!
6jet of which 2b-jet PT>250 GeV: Pythia & Herwig
Direct production is negligible
Pythia Herwig
D,Ds
D0D0KK
BD0
BhhBsDs
*
• The natural implementation of the linear fit is coupled with hits selection made by dedicated hardware (Pisa group proposal). But could be also an important tool for the online software selection.
• The importance of the size of (assumed) linearity region has been studied in the cases:
– Large region (0</6, ||<0.5, |z0|<10cm): the
detector geometry gives the dominant contribution to track resolution ((d0) = 90
m).
– Smallest region (each possible pattern of modules has different tuning): good results ((d0) = 17 m), but big effort is requested to
tune all the detector. The memory needed in this case could be large: N possible patterns X 95 tuning constants (considering six layers) X 4 bytes (variables in float precision).
Conclusions (by M.Cervetto on linear fit)
Calorimet. LVL2 algorithm for Tau selectionEfficiency for H vs. output rateCMS-IN 2000-033
Tau Identification
0.4
0.5
0.6
0.7
0.8
0.9
1.
0 0.01-0.04-0.06-0.08-0.1 0.12 0.14 0.16
(QCD 50-170 GeV)
(H
(20
0,5
00
GeV
)
1
,3h+
X)
0.0070.003
L=1034 cm-2 sec-1
TRK tau on first calo jets
Pix tau on first calo jet
Staged-Pix tau on first calo jet
TRK tau on both calo jets
0.
0.2
0.4
0.6
0.8
1
0 25 50 75 100 125 150 175 200
Calibrated jet Et
Sele
ctio
n e
ffici
ency
Htt
bar
L=1033 cm-2 sec-1
1 jet
2 jet
3 jet
4 jet
25%
10 Hz
||< 2.5
Hadronic Htt selection @ CMS
Level 1
Level2: 4 jets Et>50 GeV
1 bjet: 10-15 Hz 50% efficiency
Composition of LVL1 soft sample
26% of the events have no b-quarks inside
74% of the events have at least a b-jet:13% direct production27.5% flavor excitation33.3% g splitting
23% of the events have at least 2 b-jet:13% direct production 3% flavor excitation 7% g splitting
===========================================
no-btagging:mjj>70 GeV Rate=1.2 ± 15% kHz
double b-tagging:mbb>70 GeV Rate=110 Hz
Level 2 rates: Pythia+ATLfastIdeal: b=100% c =0% u,d =0%
Real: b=60% c =10% u,d =1%
Mis-tag: b=100% c =10% u,d =1%
ATL-DAQ-99-014
# RODS # RODS 360O in 180O in
Pix 0 36 18Pix 2 32 16Pixdisk 16 8 SC0-3 44 22 SCdisk 48 24
TOT 176 88
Now: CDF-like configuration: 0.45 Gbit/s6 layers - 48000 250 wide SB/Layer
• full custom (.7) - 128 patt/chip- 16x103 patt/9U board
• XCS30XL (.35) - 128 patt/chip - 16x103 patt/9U board• XC2S200E (0. 186 lay) 50 euro/chip
- 300 patt/chip - 38x103 patt/9U board
• XC2V1000 (0.158 lay – 0.12 transistors)
- 1200 patt/chip- 153x103patt/9Uboard
• EP1C20F324C8 (0.1350 euro/chip- 1100 patt/chip
- 141x103patt/9Uboard• Stand.Cell (.35) - 1000 patt/40 mm2
• Stand.Cell (.18) - 4000 patt/40 mm2
• Stand.Cell (.13) - 16000 patt/40 mm2
The Associative Memory CHIP128 chips/board PQ208 (die:16.32 mm2 )
2005: LHC-like configuration: 4.Gbit/s 12 layers - 500000 SB/Layer
• XCS40XL (.13)- 64x103 patt/9U board
• Virtex (.1) -330x103 patt/9U board
• Stand.Cell (.1) - 5x106 patt/9U
boardInternational Technology Roadmap for Semiconductor 1998
CDF AM = 400 k pat. 4 milioni di pat.XC2S200E55 $/chip;14000 chips: 1.4 GLXC2V1000 200$/chip; 3500 chips: 1.4 GLStandard Cell 1000 chips; 200 + 200 ML
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