lecture1: introduction to silicon photonics - helios project · silicon photonics –phd course...

lecture1: Introduction to silicon photonics

Prepared by Lorenzo PavesiUniversity of Trento

Photonics

Photonics is the technology associated with signal generation, processing, transmission and detection where the signal is carried by photons (i. e. light)

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Silicon Photonics

Photonic devices produced within standard silicon factory and with standard silicon processing

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

i.e. CMOS compatible

Motivation to Silicon Photonics

Limit of microelectronic evolution where photonics can help in take pace with Moore’s lawOptical communication evolutionA new technology platform to enable low cost and high performance photonics

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Semiconductor Technology Evolution

the main thrust for semi business growth

“Smaller, Faster, Cheaper”

Moore’s lawSilicon Photonics –PhD course prepared within FP7-224312 Helios project

The invention of the transistor

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

23 -12-1947

The First Planar Transistor764 µm

SiO2N+

PN-type silicon

Al contact

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

1959

The First Planar Integrated Circuit

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

1961

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Intel 4004 Microprocessor

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

1971

Moore’s Law in microprocessors

40048008

80808085 8086

286386

486Pentium® proc

P6

0.001

0.01

0.1

1

10

100

1000

1970 1980 1990 2000 2010Year

Tran

sist

ors

(MT)

2X growth in 1.96 years!

Courtesy, IntelSilicon Photonics –PhD course prepared within FP7-224312 Helios project

Intel Pentium (IV) Microprocessor

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

2001

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Die Size Growth

40048008

80808085

8086286

386486 Pentium ® proc

P6

1

10

100

1970 1980 1990 2000 2010Year

Die

siz

e (m

m)

~7% growth per year~2X growth in 10 years

Courtesy, IntelSilicon Photonics –PhD course prepared within FP7-224312 Helios project

Die size grows by 14% to satisfy Moore’s law

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Clock FrequencyLead microprocessors frequency doubles every 2 years

P6Pentium ® proc

48638628680868085

8080800840040.1

1

10

100

1000

10000

1970 1980 1990 2000 2010Year

Freq

uenc

y (M

hz)

2X every 2 years

Courtesy, IntelSilicon Photonics –PhD course prepared within FP7-224312 Helios project

Clock Frequency

P6Pentium ® proc

48638628680868085

8080800840040.1

1

10

100

1000

10000

1970 1980 1990 2000 2010Year

Freq

uenc

y (M

hz)

2X every 2 years

Courtesy, IntelSilicon Photonics –PhD course prepared within FP7-224312 Helios project

saturation

Today chip cross section

semiconductor

interconnections

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

CPU Multi-layer Metal Increase Trend

0

1

2

3

4

5

6

7

1980-2u

1984-1.5u

1987-1.0u

1990-0.8u

1993-0.6u

1995-0.35u

1997-0.25u

1999-0.18u

2001-0.13u

# of Metal Layers

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

…here we have a problem…..

How can all these single nm long transistors talk each-other ?

The problem of interconnectsSilicon Photonics –PhD course prepared within FP7-224312 Helios project

Interconnect length

2000 2002 2004 2006 2008 2010 2012 2014 2016 20181km

10km

100km

Tota

l int

erco

nnec

t len

gth

(m/c

m2 )

year

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

10 Km long interconnect

Power dissipationLatencyDelay…..

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Wiring delay > gate delay

Delay

RC time constantsR=ρL/AC=κA/d

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Power Dissipation

Year

P6Pentium ® proc

486386

2868086

808580808008

4004

0.1

1

10

100

1971 1974 1978 1985 1992 2000

Pow

er (W

atts

)

Power delivery and dissipation will be prohibitiveSilicon Photonics –PhD course prepared within FP7-224312 Helios project

Power Density

400480088080

8085

8086

286 386486

Pentium® procP6

1

10

100

1000

10000

1970 1980 1990 2000 2010Year

Pow

er D

ensi

ty (W

/cm

2)

Hot Plate

NuclearReactor

RocketNozzle

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

The Challenges

10

100

1000

1990 1995 2000 2005 2010 2015

CPUPower(W)

SupplyVoltage

(V)

Power = Capacitance x Voltage2 x Frequencyalso

Power ~ Voltage3

Power Limitations Diminishing Voltage Scaling

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Tera-leap to Parallelism: EN

ERG

Y-EFF

ICIE

NT P

ERFO

RM

AN

CE

TIME

Instruction level parallelism

Hyper-ThreadingThe days ofsingle-core chips

Dual Core

Quad-Core

More performanceUsing less energy

10’s to 100’sof cores Era of

Tera-ScaleComputing

All this compute capability may require high speed optical links

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Chip Multiprocessors

Parameter Value Technology process 90nm SOI with low-κ dielectrics and 8 metal

layers of copper interconnect Chip area 235mm^2 Number of transistors ~234M Operating clock frequency 4Ghz Power dissipation ~100W Percentage of power dissipation due to global interconnect

30-50%

Intra-chip, inter-core communication bandwidth

1.024 Tbps, 2Gb/sec/lane (four shared buses, 128 bits data + 64 bits address each)

I/O communication bandwidth 0.819 Tbps (includes external memory)

IBM Cell:

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Interconnects pose problems

not only within the chip

Growth of the Internet

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Power due to the explosion of internet

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

To solve the interconnect problem

GO TO PHOTONICS

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Length Scales for interconnects

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Chip to Chip1 – 50 cm

Board to Board50 – 100 cm

1 to 100 m

Rack to Rack

0.1 – 80 km

Metro &Long Haul

Decreasing Distances→

Billions

Millions

Thousands

Vo

lum

es

Optical Copper

Moving to Interconnects

Drive optical to high volumes and low costs

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Optical interconnects

Source IEEE spectrum

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Evolution of optical communication

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

1958-59 Kapany creates optical fiber with cladding1960-Ted Maiman demonstrates first laser in Ruby1962-4 Groups simultaneously make first semiconductor lasers1970-First room temp. CW semiconductor laser-Hayashi & PanishApril 1977-First fiber link with live telephone traffic-

GTE Long Beach 6 Mb/sMay 1977-First Bell system 45 mb/s links 850nm MMEarly 1980s-InGaAsP 1.3 µm Lasers

- 0.5 dB/km, lower dispersion-Single modeLate 1980s-Single mode transmission at 1.55 µm -0.2 dB/km1989-Erbium doped fiber amplifier1 Q 1996- 8 Channel WDM

A few date

1970 I. HayashiSemiconductor Laser

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Brief story of optical communication

Evolution of optical data link

Optical fiber system has the capacity to hold the whole internet traffic

It doubles each 9 month vs moore’s law 18 months

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

In 2000, for the first time, semiconductor revenues in communication exceeded revenues in PC sector.

Source: Kimerling

Technology in the Internet Age

15%

20%

25%

30%

35%

1996 1997 1998 1999 2000 2001

PC

Communications

% o

f Sem

icon

duct

or E

lect

roni

cs R

even

ue

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

The next challenge

No opticshere

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Major limit of photonics

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Complexity in today PIC

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Innovation driven by cost

Material comparison

λ (μm)

Band gap

Δn/n (%) Tx Rx waveguides Optical component

Si 1.1 I 70 No Yes Yes Yes

GaAs 0.8 D 0-14 Yes Yes Yes Yes

InP/InGaAs 1.55 D 0-3 Yes Yes Yes Yes

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Big challenges

How to merge photonics and electronicsHow to move optical communication to the chipHow to standardize photonicsHow to

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Big challenges

How to merge photonics and electronicsHow to move optical communication to the chipHow to standardize photonicsHow to

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Silicon photonics solution to these challenges?

Why do we want to use silicon

Because silicon is an optical material

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

General properties at room T

50Silicon Photonics –PhD course prepared within FP7-224312 Helios project

http://ww

w.icknowledge.com

/misc_technology/S

ilicon%20properties.pdf

Silicon is an Excellent Optical Material

High refractive index difference with SiO2nSi=3.5

nSiO2=1.45

1 3 5 7 9 11 13Wavelength (um)

1 3 5 7 9 11 13

Wavelength (μm)

0

4

8

12

Abs

orpt

ion

(dB

/cm

) TransparentWindow

1.2 – 6.5 μm

Source: UCLA

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Silicon is easily shaped

• ultra-compact waveguides• features: 50-500 nm ± 1-10 nm• fabrication in CMOS fab(deep UV lithography)

Record low lossachieved

Photonic crystal waveguide Photonic wire waveguide

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

• IC’s are made of Silicon (>98%) even for high frequency applications(cellular phone)

Why silicon

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Silicon is cheaper than other semiconductors

* Source waferworld.com**Assumed equal processing cost (1000 €), die size 1 cm, yield =1

P4 2.6GHz 200$

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Wafer size (R&D)

Wafer size (commercial)

Wafer cost(€)

mm² substrate cost(€)

Si 450 mm 300 mm 100 0.001

SOI ? 300 mm 800 0.008

InP 150 mm 100 mm 300 0.03

GaAs 200 mm 150 mm 300 0.013

Mature and widespread technology

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Band diagram

SiliconGallium Arsenide

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

Silicon limit

Indirect band gap = low radiative recombination probability = long

radiative lifetimes (ms)

Free carriers move around =Non-radiative recombinations prevail

Extremely low internal quantum efficiency in bulk silicon (10-6)

Silicon Photonics –PhD course prepared within FP7-224312 Helios project

60Silicon Photonics –PhD course prepared within FP7-224312 Helios project

acknowledgements

All those who have posted beautiful images and slides on the internet which I have re-used here

62Silicon Photonics –PhD course prepared within FP7-224312 Helios project