variation aware application scheduling in multi-core systems

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Variation Aware Application Scheduling in Multi-core Systems. Lavanya Subramanian, Aman Kumar Carnegie Mellon University {lsubrama, amank}@andrew.cmu.edu Website: http://www.cs.cmu.edu/~amank/. Document Map. Problem Statement Milestones Overview of Project Static Profiling - PowerPoint PPT Presentation

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Variation Aware Variation Aware Application Application SchedulingScheduling

in Multi-core in Multi-core SystemsSystems

Lavanya Subramanian, Aman KumarLavanya Subramanian, Aman KumarCarnegie Mellon UniversityCarnegie Mellon University

{lsubrama, amank}@andrew.cmu.edu{lsubrama, amank}@andrew.cmu.edu

Website: http://www.cs.cmu.edu/~amank/Website: http://www.cs.cmu.edu/~amank/

Document MapDocument Map

• Problem Statement Problem Statement

• MilestonesMilestones

• Overview of ProjectOverview of Project• Static ProfilingStatic Profiling• Variation Map ConstructionVariation Map Construction• Variability incorporation in BLESSVariability incorporation in BLESS

• ResultsResults

22

Problem Statement Problem Statement (Aide-(Aide-mémoire)mémoire)

• The perspective of a chip multi processor being a homogenous set of cores is not a practical one.

• A CMP has to be relooked as:• a collection of heterogeneous cores• each core operating at different

frequency• each core with a different power profile

33

MilestonesMilestones

• Milestone 1.1:• Building variability information into the CMP

simulator.• Static profiling of applications.

• Milestone 2:• Building a scheduler into the CMP simulator.

• Milestone 3:• Implementing and analyzing the proposed

scheme against the baseline algorithms.

44

The Lock Stock and The Lock Stock and BarrelBarrel

55

Static ProfilingStatic Profiling

• Simulate SPEC 2000 benchmarks on Wattch/Sim-GALS

• Extract • Memory instruction dynamic power per

instruction• Non-memory instruction dynamic power per

instruction• Core average leakage power per cycle

66

Static profiling (Results)

Benchmark

Non-memory instruction

dynamic power (Watt)

Memory instruction

dynamic power (Watt)

Avg. Core Leakage power per Cycle

(Watt)

ammp 4.856 3.6018 0.1272

gzip 2.514 1.3364 0.0897

vpr 4.0125 2.9914 0.1569

mesa 2.6177 1.5051 0.1261

art 3.7089 2.8037 0.1719

mcf 3.3925 2.5841 0.1716

parser 2.6258 1.7255 0.1529

vortex 3.8746 2.8734 0.1536

bzip2 2.4704 1.3382 0.0854

Average 3.341377778 2.306622222 0.137255556

Tech: 45 nmSim GALS

77

Variation Map Variation Map ConstructionConstruction

• Generate Leff variation map from Varimap tool

• Calculate Leakage Variation• Based on Leff variation using SPICE and

MATLAB

• Calculate Frequency Variation (Base : 3GHz)• Based on Leff variation using MATLAB

Tech: 45 nm

88

Variability per COREVariability per CORE

• Read the Frequency/Leakage maps in Read the Frequency/Leakage maps in BLESSBLESS

• Compute Power/Performance based on Compute Power/Performance based on Variability informationVariability information

99

Variability per CORE Variability per CORE (Results)(Results)

• Same Application on 16 ProcessorsSame Application on 16 Processors

• 4 Applications on 16 Processors4 Applications on 16 Processors

SetupMIPS

Variation (%)

Power Variation

(%)

Max. MIPS

Least MIPS

Max Core

Power per Cycle

(W)

Least Core

Power per Cycle

(W)

w/out Var. 1.04 1.03 6258 6193 5.89 5.83

w. Var. 10 24 6557 5930 5.5 6.85

SetupMIPS

Variation (%)

Power Variation

(%)

Max. MIPS

Least MIPS

Max Core

Power per Cycle

(W)

Least Core

Power per Cycle

(W)

w/out Var. 93.49 89.80 6132 3169 5.77 3.04

w. Var. 98.84 102.38 6196 3116 5.95 2.941010

The Lock Stock and The Lock Stock and BarrelBarrel

1111

QuestionsQuestions

1212

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