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https://doi.org/10.1007/s10836-020-05880-7 An Efficient VLSI Test Data Compression Scheme for Circular Scan Architecture Based on Modified Ant Colony Meta-heuristic Sanjoy Mitra 1 · Debaprasad Das 2 Received: 30 August 2019 / Accepted: 16 April 2020 © Springer Science+Business Media, LLC, part of Springer Nature 2020 Abstract A new test data compression scheme for circular scan architecture is proposed in this paper. A stochastic heuristic based bio-inspired optimization approach namely ant colony algorithm (ACO) is applied after modification and customization to improve compression efficiency. In circular scan architecture, test data compression is achieved by updating the conflicting bits between the most recently captured response and test vector to be applied next. The quantity of conflicting bits also manifests the Hamming distance between the most recently captured response and the next test vector. A significant reduction in test data volume and test application time is achieved by reducing Hamming distance. The problem is renovated as a traveling salesman problem (TSP). The test vectors are presumed as cities and Hamming distance between a pair of test vectors is treated as intercity distance and a modified ACO algorithm in combination with mutation operator is applied here to resolve this combinatorial optimization problem. The experimental results confirm the efficacy of this approach. An average improvement of 6.36% in compression ratio and 4.77% in test application time is achieved. The exhibited technique sustains an optimal level of performance without incurring any extra DFT (design for testability) cost. Keywords Test data · Compression · Circular scan architecture · Ant colony 1 Introduction With recent advances in System-on-a-Chip (SoC) technol- ogy, the increase in density of integrated circuits has led to a tremendous increase in test data volume and test power dis- sipation [1]. As the complexity of SoC continues to increase, the difficulty and cost of testing such chips are increasing rapidly. Testing of SoC is dealt with the large size of test data volume that is stored in the tester memory and trans- ferred between tester and circuit under test. The test power plays a major role because the switching activity during test Responsible Editor: N. A. Touba Debaprasad Das [email protected] Sanjoy Mitra [email protected] 1 Department of Computer Science and Engineering, Tripura Institute of Technology, Agartala, 799015, India 2 Department of Electronics and Communication Engineering, TSSOT, Assam University, Silchar, 788011, India has a large contribution to overall test power. Test-data com- pression [2] offers a promising solution to the problem of reducing the test data volume for SoCs and to reduce the test time, peak power and average power. In the approach pro- posed by Feng and Li [3], a pre-computed test set for an IP core is compressed to a much smaller test, which is stored in ATE memory. Numerous techniques to control the volume of test data, test application time and power consumption in test mode have been presented in the literature. Built-in self- test (BIST) approaches [46] and test data compression techniques presented in [710], and [11] are also very useful to control test data volume and test power reduction. In addition to the above techniques, test data volume and test application time can also be reduced by applying test compaction techniques proposed in [12] and [13]. But these compacted test sets might achieve less detection of non- modeled physical defects [15, 16]. However, BIST requires a longer test application time, and it is extensively used for memory testing but is not common for logic testing [14]. An alternate approach for reducing test data volume for SoCs is based on the use of data compression techniques such as statistical coding, run-length coding and Golomb coding [7, 8, 14]. None of these codes are tailored to exploit / Published online: 6 June 2020 Journal of Electronic Testing (2020) 36:327–342

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Page 1: An Efficient VLSI Test Data ... - Auburn University

https://doi.org/10.1007/s10836-020-05880-7

An Efficient VLSI Test Data Compression Scheme for Circular ScanArchitecture Based onModified Ant Colony Meta-heuristic

Sanjoy Mitra1 ·Debaprasad Das2

Received: 30 August 2019 / Accepted: 16 April 2020© Springer Science+Business Media, LLC, part of Springer Nature 2020

AbstractA new test data compression scheme for circular scan architecture is proposed in this paper. A stochastic heuristic basedbio-inspired optimization approach namely ant colony algorithm (ACO) is applied after modification and customization toimprove compression efficiency. In circular scan architecture, test data compression is achieved by updating the conflictingbits between the most recently captured response and test vector to be applied next. The quantity of conflicting bits alsomanifests the Hamming distance between the most recently captured response and the next test vector. A significantreduction in test data volume and test application time is achieved by reducing Hamming distance. The problem is renovatedas a traveling salesman problem (TSP). The test vectors are presumed as cities and Hamming distance between a pair oftest vectors is treated as intercity distance and a modified ACO algorithm in combination with mutation operator is appliedhere to resolve this combinatorial optimization problem. The experimental results confirm the efficacy of this approach. Anaverage improvement of 6.36% in compression ratio and 4.77% in test application time is achieved. The exhibited techniquesustains an optimal level of performance without incurring any extra DFT (design for testability) cost.

Keywords Test data · Compression · Circular scan architecture · Ant colony

1 Introduction

With recent advances in System-on-a-Chip (SoC) technol-ogy, the increase in density of integrated circuits has led to atremendous increase in test data volume and test power dis-sipation [1]. As the complexity of SoC continues to increase,the difficulty and cost of testing such chips are increasingrapidly. Testing of SoC is dealt with the large size of testdata volume that is stored in the tester memory and trans-ferred between tester and circuit under test. The test powerplays a major role because the switching activity during test

Responsible Editor: N. A. Touba

� Debaprasad [email protected]

Sanjoy [email protected]

1 Department of Computer Science and Engineering, TripuraInstitute of Technology, Agartala, 799015, India

2 Department of Electronics and Communication Engineering,TSSOT, Assam University, Silchar, 788011, India

has a large contribution to overall test power. Test-data com-pression [2] offers a promising solution to the problem ofreducing the test data volume for SoCs and to reduce the testtime, peak power and average power. In the approach pro-posed by Feng and Li [3], a pre-computed test set for an IPcore is compressed to a much smaller test, which is storedin ATE memory.

Numerous techniques to control the volume of testdata, test application time and power consumption in testmode have been presented in the literature. Built-in self-test (BIST) approaches [4–6] and test data compressiontechniques presented in [7–10], and [11] are also very usefulto control test data volume and test power reduction. Inaddition to the above techniques, test data volume andtest application time can also be reduced by applying testcompaction techniques proposed in [12] and [13]. But thesecompacted test sets might achieve less detection of non-modeled physical defects [15, 16]. However, BIST requiresa longer test application time, and it is extensively used formemory testing but is not common for logic testing [14].

An alternate approach for reducing test data volume forSoCs is based on the use of data compression techniquessuch as statistical coding, run-length coding and Golombcoding [7, 8, 14]. None of these codes are tailored to exploit

/ Published online: 6 June 2020

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the specific properties of pre-computed test sets for logiccircuits. The use of variable-length input Huffman codingon compressing of test data is presented in [16]. Nouraniand Tehranipour suggested combining run-length and Huff-man coding in [17]. However, the decoding complexity forlarge block sizes of Huffman code makes it unsuitable foron-chip decompression. In [18], a multilayer MUX array isused to reuse the last shift-in data to achieve test compres-sion and low shifting power. A universal multi-casting scan(UMC-Scan) was stated in [19] to raise the test data com-pression ratio by affording the maximal freedom in multi-casting. Still, more hardware overhead became unavoidablein [18, 19].

1.1 Motivation

The volume of data needed for VLSI testing is rising veryspeedily with the advancements of technology. Test datavolume and its reduction for testing of a system havemanifested itself as a significant problem. The testing timeof a system generally relies upon the test data volume andthis volume of test data is dependent on the parameterslike test pattern quantity for an input data, the amount ofstimulus and response bits per pattern. With a view to limitthe volume of test data, compression of test data becomesvery essential.

1.2 Circular Scan Architecture

Circular scan architecture (CSA) [20] is another effectivedesign for testing (DFT) architecture, and it has acomparable hardware with a conventional scan. Theaffirmative attribute of the CSA is that the response ofprevious test patterns could be used as the next pattern’stemplate, which makes test data compression easier. Thework in [21] proposed a new test compression scheme basedon circular scan, where multiple conflicting bits are updatedthrough inputs of the scan chains that use a multiple-hotdecoder.

A typical circular scan architecture [24] is shown inFig. 1. It can be observed from Fig. 1 that the previouscaptured response is a template of the next pattern. Thecontents of scan cells can be updated by multiple rotationsof scan chains. Multiplexer-based decoder is used to changethe test data concurrently. The use of this multiplexer-based decoder in the circular scan architecture reduces testapplication time remarkably. Broadcast mode and One-bit-update mode are designed to load the next determined testpattern to reduce test data volume. If the quantity of bitswhich are required to be updated is less, then the resultingtest data volume is also very less. So, the critical challengeof the circular scan is to minimize the number of conflictingbits between the real test pattern and the template.

Fig. 1 Typical circular scan architecture [24]

1.3 Test Pattern Reordering

Numerous techniques aiming reduction in switching havebeen proposed by the researchers during the last fewyears. Methods proposed in [25–27], and [28] introducedpost-ATPG test vector ordering techniques. Test vectorordering techniques fundamentally envisage on reductionof switching activity of the circuit under test (CUT) byreducing the switching activity at the inputs of the circuitduring testing. 2D hamming distance based reordering[29] helps to reorder the test vectors vertically as wellas horizontally. In this paper the compression and powerreduction are not very efficient. Hamming distance basedreordering and column wise bit stuffing with differencevector is presented by [30], which can also be used with anyrun length code technique for higher compression ratio.

The test vector set reordering can be viewed as similarto the familiar traveling salesman problem (TSP), which isexplained by Lelodar and Mizanian [33]. In the context ofTSP, test vectors are presumed as the cities and the inter citydistance is considered as the Hamming distance betweentwo test vectors and this is described here in this paper by agraph based example. Test vector ordering was proven to beNP-hard and equivalent to the traveling salesman problem,hence heuristics are used to solve the problem. Shang andZhang [34] applied ant colony algorithm to find the shortestpath and this shortest path actually produces the optimizedorder of the test patterns to achieve the reduced switchingactivity. Significant features of ant colony algorithm like thepositive feedback effect and ease of convergence to a localoptimum along with the prime features of genetic algorithmlike crossover operator and mutation operator of can spread

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out diversity of solution. In the approaches proposed byLiu et al. [31] and Gu et al. [32], genetic algorithm wasembedded into the ant colony algorithm for deriving betterresults.

1.4 Contribution of this work

The key point of determining the test data compressionefficiency of circular scan based testing is minimizing thenumber of conflicting bits between the template patternand the real test pattern. To reduce test data volume,this paper proposes a new test vector reordering schemewhich can be equivalently thought off as an optimizationof corresponding traveling salesman problem (TSP) andthis is NP − complete by nature. Genetic algorithm (GA)was used in [22] in order to find the optimal path in thetransformed TSP. Although, the genetic algorithms have therapid global searching capability, the absence of feedbackof information in the system, sometimes leads to do-nothingredundant iteration and inefficient solution. Therefore, ifthere is a substantial increase in the size of the cities, thegenetic algorithm’s searching capability gradually declinesto a certain extent. When the number of the cities is toolarge, it cannot obtain the optimal solution in finite iteration,because iterative times are too long and unbearable. Incircular scan test architecture, it is not feasible to restrict thenumber of test vectors which corresponds to the cities in theoptimization problem of TSP. Thus, ant colony algorithmis more suitable than a genetic algorithm with a higherprobability of yielding the optimal results [23]. In order toovercome the shortcomings of GA used in [22], we usemodified and customized version of the stochastic heuristicbased ant colony optimization (ACO) algorithm termed asMCACO to solve this problem in more efficient manner.In MCACO, the pheromone updating portion of the antcolony meta-heuristic is modified to yield improvement inoptimization.

1.5 Organization of the Paper

In Section 2, a brief review of circular scan test applicationsis presented and from this review, we have analyzed thesignificance of conflicting bits in the context of test datacompression. Section 3 deals with the formulation ofconflicting bit minimization problem as an optimizationproblem. Section 4 describes the analogy of conflictingbit minimization problem with traveling salesman problemand describes how transformed problem of conflictingbit minimization may be resolved by solving a well-known optimization problem namely the traveling salesmanproblem. This section also briefs about the proposedmeta-heuristic of Modified and Customized Ant ColonyOptimization (MCACO) for solving the traveling salesman

problem renovated from conflicting bit minimizationproblem of circular scan test applications. Section 5details about the application of ant colony optimizationfor conflicting bit minimization. Description of the testingset up, experimental results and their analysis is given inSection 6 and the conclusion is drawn in Section 7.

2 Review of Circular Scan Test Applicationand Role of Conflicting Bits in Test DataCompression

In the architecture proposed in [24], the first test patterns areloaded serially. An internal scan chain is selected one at atime through the scan selection inputs. The test data for theselected chain, wherein the unspecified bits are randomlyset, is shifted in through the data input. The remainingpatterns use the captured response on the scan cells to thepreviously applied test pattern as a template. The content ofa scan cell is changed if it corresponds to a specified bit ofthe next pattern to be applied and if its current content is atvariance with the particular specified bit.

The bits of a test pattern, corresponding to the scan cellsthat have equal distance to the scan inputs, constitute a testslice. In the current test slice, if a set of bits differs fromthe corresponding bits in the scan cells, one of them isselected through the decoder and the value in the scan cellis updated through the data input. Since only one of theconflicting bits of the current test slice can be changed ateach cycle, multiple full rotations of the scan chain contentmay be required. Therefore, the test slice with the highestnumber of conflicting bits of a test pattern determines howmany times the scan chains have to be fully rotated toapply the current pattern. In the first rotation, the capturedresponse of the previous pattern is fed to the multiple-inputsignature register (MISR), thus delivering full observationof the test responses. In each time, only one scan comesfrom the inverting path and the rest from the buffer paths.The inverting path is selected for scan chain that has theconflicting bits. Using these two paths, the conflict bits areupdated internally. Therefore, there is no need to load theconflicting bits from ‘Data Input’ pin.

This type of circular scan architecture takes theadvantage of the fact that only a small number of bitsare specified in each pattern. In this scan arrangement,the quantity of internal scan chains is increased while theoriginal number of pins in the circuit remains unaltered. Thecaptured response of the previously applied pattern is usedas a template for the next pattern in the new structure andonly the conflicting bits of the next pattern is updated on thecaptured response of the previous pattern. This results in asubstantial decrease in test application time and test data forlarge circuits.

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3 Formulation of Conflicting BitMinimization (CBM) as an OptimizationProblem

Figure 1 shows the typical architecture of the circularscan testing. A conflicting bit minimization problem isformulated conceding three scan chains with eight scan cellseach are contained in the example circuit under test (CUT).The corresponding test set is given in Table 1. There arefive test patterns denoted as V1, V2, V3, V4, and V5. Thecorresponding responses represented as R1, R2, R3, R4, andR5 are also given in the Table 2. To achieve the test modeof circular scan, in that the previous response is used as thenext patterns’ template, the conflicting bits between themshould be updated. If the test vector V3 is applied first andvector V2 is to be used next, then the corresponding responseR3, V2 is used. The number of conflicting bits between R3

and V2 are computed as 8 bits which is also the Hammingdistance between them. But, if V1 is applied first, followedby V2, then only 6 conflicting bits need to be updated. Thequantity of conflicting bits must be minimized in order toreduce test data volume and test application time.

In order to demonstrate a typical solution of this problem,typical weight illustration graph and the test set weightmatrix are shown in Figs. 2 and 3, respectively. In Fig. 3,each vertex represents a test pattern, and the number ofconflicting bits between the response of Vi and the patternof Vj that was computed as the Hamming distance betweenthe two is denoted as the weight of the edge. It is obviouslya directed graph. Different orders of the test patterns willresult in a different number of conflicting bits. For example,the order of V3, V2, V5, V1, and V4 has the number ofconflicting bits W32 + W25 + W51 + W14 = 11 + 14 +12 + 11 = 48, where Wij denotes the weight of the twovertexes of i and j . The order of the test patterns influencesthe number of conflicting bits that need to be updated, andthat number should be minimized.

The problem is a NP -complete problem in reality. Letthe number of test patterns be n. The weights of each ofthe two patterns are easily obtained by computing theirHamming distance, and the weights of two vertexes ofVi and Vj are denoted as Wij and Wji , respectively. The

Table 1 Example of test pattern set

Test pattern Test pattern

ID

V1 XX10 0001 00XX XX01 X101 001X

V2 0XX1 XX10 X11X 1XX1 11X0 11X1

V3 11XX 111X 0X11 0000 1110 XX10

V4 1100 1011 11XX 0X01 1X00 X1XX

V5 1X00 10XX 1011 0000 1111 1XX1

Table 2 Corresponding set of responses

Responses

R1 0010 0101 1111 1111 0010 0000

R2 0011 1111 0101 1101 1010 0000

R3 1100 1111 0000 1001 1111 1110

R4 0101 0000 1101 0000 1111 1111

R5 0111 0010 1111 0010 1111 1101

problem is finding the shortest path that passes throughevery vertex once and only once. So, the problem can betransformed as stated in the following section.

4 Traveling Salesman Problem (TSP)and Conflicting Bit Minimization (CBM)Analogy

4.1 Traveling Salesman Problem (TSP)

In traveling salesman problem, it is considered that eachcity has an integer number and the real value coordination(x, y) where x and y ∈ R. The sequence of integer numbersformed by permutation shows the visiting order of city intraveling salesman problem and the distance between cityp and q is calculated by the following Euclidean distanceformula as shown in Eq. 1:

dp,q =√

(xp − xq)2 + (yp − yq)2 (1)

In a TSP, usually, the computed intercity distances are storedin a matrix termed as distance matrix and used in calculating

Fig. 2 Weight illustration graph

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Fig. 3 Weight matrix

the sum of distance for specific permutation which needs tobe minimized by optimization algorithm. Figure 4 shows theexample for TSP problem with 5 cities. In this example for5 cities, then the permutation ‘12345’ is the one probablesolution for TSP problem. This permutation means that thestarting city is City 1 denoted as C1 in Fig. 4, then goes toCity 2 which is represented as C2, and then goes to City 3,denoted as C3 and at last City 5. The tour for this probablesolution is 1 → 2, 2 → 3, 3 → 4, 4 → 5. The distancefor this tour is computed from distance matrix which needsto be computed prior to commencement of iterations of theoptimization algorithm. The numerical example for distancematrix of this problem is as follows.

D =

⎡⎢⎢⎢⎢⎣

0 d12 d13 d14 d15d21 0 d23 d24 d25d31 d32 0 d34 d35d41 d42 d43 0 d45d51 d52 d53 d54 0

⎤⎥⎥⎥⎥⎦

4.2 Linear ProgrammingModel of CBM

Let Vm =< vm1, vm2, ..., vmk > and Rn =<

rn1, rn2, ..., rnk > denote a test pattern and its response,respectively. Let the number of conflicting bits between the

Fig. 4 Nodes representing cities for TSP Problem and distancebetween cities

next test patterns Vm+1 and response Rn of the previouslyapplied test pattern Vm is represented by C(m+1)n whichis also the Hamming distance between them. Besides, letus assume x(m+1)n signify a Boolean variable initialized tox(m+1)n = 1 with the necessary condition that responseRn acts as template to the immediately following next testpatterns Vm+1 in the pattern sequence and x(m+1)n = 0 oth-erwise. Finally, consider V = 1, 2, 3, ..., m symbolizes theset of vertexes where each m is correlated with the test pat-tern. The polynomial formulation of this problem can beexpressed as follows.

Optimize �C(m+1)n × x(m+1)n

⎧⎨⎩

∑(m:(m,n))∈V ×Rx(m+1)n = 1 m ∈ V, n ∈ R

ωi − ωj +zxmn�z −1 (m, n) ∈ V × R, m �= 1, n �= 1xmn ∈ 0, 1, ωi ∈ R m, n ∈ V

(2)

where the constraints ωi − ωj + zxmn � z − 1 assure thatno subtours will be selected, and where each variable ωm isa real number.

Given a directed graph with n vertexes, the distancebetween each of the two vertexes can be computed findingout the shortest path traveling across each vertex once andonly once. Hence conflict bit minimization problem can beanalogously viewed as the well-known traveling salesmanproblem (TSP), which is NP − complete, where thevertexes stand for test patterns and correspond to towns andthe number of conflicting bits between every two vertexesrepresents the distance between two towns.

To solve the problem of the conflicting bits minimiza-tion problem, which is NP-complete, the modified andcustomized ant colony optimization algorithm (MCACO)is proposed here in this paper. Optimization of antcolony meta-heuristics is regarded as one of bio-inspiredapproaches for solving the TSP problem. In the proposedMCACO algorithm, the global optimum distance from a setof feasible distances traveled by a crowd of ants correspondto an optimistic solution to the conflicting bit minimiza-tion problem and fitness of the solution resembles the totaltour distance covering all the cities. Inherent limitations oftraditional ACO are addressed with modified pheromonemeta-heuristic in combination with the genetic mutation.The steps given in the next section formulate the stochasticsolution of the aforesaid problem by utilizing the modifiedfeatures depicted in MCACO algorithm.

The optimized order of the five test vectors as shown inFig. 5 is V1 → V2 → V3 → V4 → V5, and the numberof corresponding conflicting bits that need to be updated is26 bits (W12 + W23 + W34 + W45 = 6 + 8 + 7 + 5 = 26)compared to that of the order V3 → V2 → V5 → V1 → V4

of 48 bits as shown in Fig. 2. Thus, a reduction of 22 bits isachieved.

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Fig. 5 Optimal path

4.3 Modified and Customized Ant ColonyMeta-heuristics for CBM

The ACO algorithm was one of the nature inspiredalgorithms which for the first time was developed by Dorigoet al. [35] and it has mimicked actual ant colony behaviors.The research on the behavior of ants in real life shows thatthe ants have the ability to find the shortest path betweentheir nest and food source. The most major feature inseeking the shortest path is the evaporation rate, chemicalmatter of pheromone that ants drop on the route which theyhave chosen.

4.3.1 Meta-heuristic of Surviving Ants

It is the natural phenomena that ants wander randomly inthe natural search space for their food particles. The extremecommunication between creatures and the position is builtwith the role of scented chemicals also known as pheromonedischarged by the ants. Generally, it treasures the food andapproaches back to their colony, though bequeathing downthe pheromone trails. If other ants treasure such a trail,possibly they are not kept wandering at random. Instead,it follows the trail, returning and emphasizing it if theyultimately find the food. Over time, the pheromone trailstarts to evaporate, hence reducing its attractive strength.The mean time taken by an ant to travel down the trailand come back, is same as the mean time the pheromoneshave to evaporate. The roaming ant continually looks for theshortest path by comparing the pheromone density.

Generally, the level of pheromone concentration becomeshigher on shorter paths than longer ones. Moreover, theevaporation of pheromone has the advantage that it helpsin evading the convergence to a locally optimal solution.In nature, if the evaporation would not have been there,then the trails selected by the first ant would have becomeexceptionally attractive for the other succeeding ants. Thus,the exploration of the solution search space is controlled.

Once an ant treasures the shortest (good) path from itscolony to the food source, other ants are also expected totrack that path. The fundamental idea of the ant colonyoptimization is to take off this behavior with replicated antsmoving around the path and exhibits the problem-solving.Ants mostly select a path where pheromone rate is high.Selection of city x, to which an ant in the city y in iterationi will go, is made according to Eq. 3.

P mxy =

{ [σxy(i)]α[ηxy(i)]β

�[σxy(i)]α[ηxy(i)]β if city y ∈ Nxm

0 otherwise(3)

In Eq. 3, the amount of pheromones between cities x andy is expressed by σxy . The heuristic information is givenby ηxy = d−1

xy and this variable ηxy in Eq. 3 conveys the

information ( 1dxy

) pertaining to distance between x and y

cities, and y displays cities where mth ant can go. Nxm is

the set of cities to be visited by ant m (to make the solutionfeasible), α is the pheromone decay parameter (0 < α < 1)and β is the factor used to regulate the significance of thepheromone concentration related to distance (β > 0). Whenstanding at a city x, the mth ant chooses to go to an yetunvisited city y with a probability P m

xy given by Eq. 3. Anant chooses the city with the highest ratio of P m

xy by makinga greedy selection. The mth ant finishes one total tour byusing Eq. 3. The above-mentioned operation is repeated ini iteration for every ant that is present in the colony. Theamount of pheromones left by an ant on a path that it hasused is calculated according to Eq. 4. In Eq. 4, the variabler represents the set of routes (i.e., set of edges in the TSPgraph) between the cities.

�mxy =

{CLm if (x, y) ∈ r outperformed by mth ant0 otherwise

(4)

where Lm represents a distance of the tour, C represents aconstant, and m represents mth ant in the colony. The totalamount of pheromones that ants, which are present in thecolony and use the route between cities x and y have left, iscalculated by using Eq. 5.

�mxy(i, i + 1) =

n∑m=1

�mxy(i) (5)

Amount of pheromones, which will be found in inter-city routes in iteration (i + 1), is determined as in Eq. 6depending on the impact of evaporation as well.

σxy(i, i + 1) = (1 − ϕ)σxy(i) +n∑

m=1

�mxy(i) (6)

where the parameter ϕ with (0 ≤ ϕ ≤ 1) is the trailpersistence and �m

xy(i) is the pheromone amount of ant k

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lays on the arcs in its visit (tour). In the projected MCACO,this pheromone amount is defined and calculated by

�mxy(i)=

⎧⎨⎩

√[Lm(i)]T ∗[Lm(i)

R∗Lm(i)if (x, y) used by ant m in ith iteration

0 otherwise

(7)

where R is the random number between the limits [0, 1] andLm(i) is the length of the tour of the best ant. When themaximum number of iterations is reached, the shortest tourlength obtained is regarded as the solution of the problem.

4.3.2 Customization for CBM as a TSP Problem

The complexity of the ACO based solution of the TSPproblem inflates with the increase in the number of citiesand hence the parameters α and β must be suitablycustomized to find the optimum route in the proposedMCACO algorithm. Pheromone matrix (σ ) and distancematrix (h) are initialized at the beginning of MCACO alikeother ACO based TSP solutions given the specific problemto be solved. As like other ACO approaches, the proposedalgorithm reaches the main iteration after the initializationand begins picking a path depending on the pheromone ratefor each path. An ant ‘m’ sticks to its previous personal bestpath ant

pbestm if a newly chosen path is found to be greater

than the previous one and antpbestm m ant is then considered

as its latest path. A better path is traced by the algorithm viacapitalizing personal experience and updating the individualbest. The algorithmic logic presented in [36] is enhanced,customized and repurposed in Algorithm 1 to yield optimalsolutions given the specific minimization problem in thiswork. Flowchart of this proposed approach is shown inFig. 6.

4.3.3 Significance of Mutation

Even though, the conventional ACO searches the bestoptimal solution for TSP, it suffers from getting deservedsolutions when the number of cities tends to become verylarge. Essentially in ACO, the intensity of pheromonedetermines the path to be followed by the ant for search offood particles. Thus, this pheromone concentration enacts aprime role influencing the global optimal solution. In orderto avoid to be fastened into local minima, the concept ofmutation is imported from the Genetic Algorithm. In orderto maintain the diversity of the proposed algorithm, themutation operator is incorporated for further exploration ofnew areas of the search space. After an ant completes itstour, it performs the mutation process according to the givenmutation probability. This operator may help the ant colonyalgorithm to explore new areas in the search space. It can beapplied by randomly exchanging the position of two cities

on the tour which leads to generating a new solution thatis not very far from the original one. A mutation function(swap, insertion, and reversion) [26, 36] is applied tomutate the individual best of ant (Globalbest ) and individualpersonal best is compared with the mutated output denotedas latestsol. The above mutation operators are picked atrandom and invoked by calling the mutation function.

The output of the mutation is updated if found betterthan the previous best, otherwise the ant procedure finishes

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Fig. 6 Flowchart of the proposed algorithm

and proceeds for the next. The Globalbest is drawn fromthe population after disposal of the individual ant process.Mutation function takes the Globalbest as its input toproduce the mutated output and this output is compared withthe previous Globalbest to find out the latest Globalbest

for this iteration. Following the Globalbest process, thealgorithm reaches stopping criteria and if fulfilled itterminates, otherwise, another iteration begins for the antsof the population.

Generally, lack of diversity in ACO approaches maylead to getting stuck at the local minima which limits theprobability of getting another best choice in the searchspace. Due to this reason, diversity is increased here insolving CBM problem by applying the mutation operatorwith a predefined probability. Here, we considered that if thediversity is less than 0.5, then the algorithm may get stuckin the local minima. Euclidean distance De is computed to

manifest the diversity between the fitness of the ants in thepopulation given by the equation

De = dave − dmin

dmax − dmin

(8)

where dave is the average distance between the fitness ofthe best ant and the fitness of the left over ants in thepopulation. Distances of the second best ant fitness from thefitness of the best ant and the worst ant fitness are denotedby dmax and dmin respectively. Usually, De has a range ofvalues between 0 and 1. Lower value of De indicates thatmost ants in the population are concentrating around thebest ant and so the speedy convergence is attained whichactually limits the possibility of further searching remainingbest if any in the search space. If De is high, most of theants are not biased towards the current best ant. Therefore,De outcomes an indication of the population variation andextent of dissimilarity between ants.

5 Application of Ant Colony Algorithmfor Conflicting Bit Minimization

As mentioned in previous sections, given test vectorsrenovated as cities in TSP are subjected to MCACOalgorithm for computing an optimal order of test vectorsso that the extent of conflicting bits between themgets minimized. In this scenario of Traveling SalesmanProblem (TSP), the quantity of conflicting bits betweenthe response of a test vector and the next test vector istreated as an intercity distance (also known as Hammingdistance). Features like the snap of convergence to alocal optima and affirmative feedback have influencedto apply ACO to resolve this combinatorial optimizationproblem of conflicting bit minimization in circular scan testapplications. In the proposed MCACO algorithm, the globaloptimum distance from a set of expedient distances traveledby a crowd of ants corresponds to an optimal solution tothe reordering problem and fitness of the solution resemblesthe total tour distance covering all the cities. Steps whichformulate the stochastic solution of the aforesaid problemby utilizing the modified features customized in MCACOalgorithm are shown below.

– Initialization of problem parameters: Input all thecompulsory ant parameters i.e., number of ants,maximum iteration, convergence factor, the maximumdistance of the ant tour over all the cities (i.e., thenumber of test vectors in this case), evaporation details,etc.

– Steps for finding the best possible test vector order:A formal definition in this respect as follows: for aVLSI circuit C and a set of input vectors Vm =<

vm1, vm2, vm3, ..., vmk >, the optimization problem is

334 J Electron Test (2020) 36:327–342

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to find out an input order < S1, S2, S3, ..., Sn >

where Sp = T(p) and (p) is a permutation of <

1, 2, 3..., n > so that

n−1∑p−1

Pcbm(Sp, Sp+1) (9)

Equation 9 turns out to be optimal for the conflicting bitminimization function Pcbm.

In the beginning, place the ants randomly and allowthem to take up random positions within the searchspace. Afterward, fix the maximum distance for anttour and pheromone levels to start with. Measure thepheromone level corresponding to every ant positionsspanned over entire ant colonies. Reinstate individualants to its initial position and compute the leastmagnitude against each ant-to-ant value and thesevalues are to be stored in a vector. Each and every ant inthe control vector has to gratify the constricting factorsas reflected in the Eq. 1. Afterward, the sequence ofthese vector values are derived based on preferences andthen preference values are summed up altogether. Sortout the likelihood of the values in the vector. Choosethe mostly required values and separately place theseopted values to another set of vector and store it there.Compute each ant-to-ant fitness, find the best ant out ofthe generated ants and generate the best fitness value ofthe ant. The fitness value estimation corresponding toeach ant is given by

f itness = 1

1 + ∑k−1k=1Pcbm(Sp, Sp+1)

(10)

The most suitable value of the ant denotes the optimalsequence of the test vector.

6 Testing Setup, Experimental Resultsand Analysis

As in most of the meta-heuristic algorithms, the quality ofthe solutions produced by the individual algorithm is by andlarge influenced by the differing values of the parametersand owing to this, different alternative values need to bereviewed to tune the parameters of the proposed algorithm.Accordingly, in our algorithm, the selection of parametervalues was done on the basis of their ability to produce theoptimal computational results with respect to the qualityof the solution. The parameter setting for modified andcustomized ACO (MCACO) algorithm is as follows: α = 2,β = 2, ϕ = 0.025, Q = 90 and the amount of pheromoneat the starting was set to 1 for each path from one city toanother.

The testing is performed on the computer with thefollowing features. The experiment is performed on high-end desktop PC with Core i7 CPU 2.4 GHz andmemory 8GB and Matlab 7.0 running on a computer withWindows 8. The stopping criteria were set to reach amaximum iteration number Max − iteration = 10, 000.Efficiency evaluation of the proposed compression schemeis performed on the test data set of five largest ISCAS’89benchmark circuits. Test data set corresponding to the fivelargest ISCAS’89 benchmark circuits were generated byusing the Synopsys Tetra Max ATPG tool with 100%fault coverage and these test patterns were considered asinput for finding the optimal ordering of test vector inorder to minimize the total number of conflicting bits.The compression scheme proposed in this paper yieldsthe significant improvement in compression ratio whilepreserving the fault coverage intact. Relevant type of TSPproblems are also observed from the TSP LIB (http://softlib.rice.edu/softlib/tsplib/).

Simulation experiments on ISCAS’89 benchmark suiteconsidered the model of zero delays. Here the solution ofthe TSP is achieved with the aid of the MCACO algorithm.The number of iteration cycle is 200. Initially we have usedonly simple ant colony optimization (ACO) and the obtainedresults are given in Tables 3 and 4. Table 3 shows the testdata volume compression ratio comparison with relevantschemes. The compression ratio is calculated as

CR = (TD − TE)

TD

× 100% (11)

where TD denotes the test data volume of the primary testsets and the test data volume of the compressed test sets isrepresented by TE .

The first column denotes the names of the benchmarkcircuits. The number of scan chains is represented as#SC. The column titled ‘ACO’ in Table 3 indicates thecompression ratio obtained by applying existing ant colonyoptimization algorithm. In Table 3, compression ratioscorresponding to approaches [21, 22, 37] and the ‘ACO’ areshown in against different scan chains #SC = 64, #SC =128, and #SC = 256 and in a similar manner experimentalresults in respect of test application time are compared inTable 4.

Test application time (TAT) is represented in terms ofATE (Automatic Testing Equipment) clock cycles. Thereduction in TAT is calculated as follows.

T Rpercentage = tncomp − tcomp

tncomp

× 100% (12)

where, TAT needed for applying uncompressed data isdenoted by tncomp and tcomp is the time in case ofcompressed data.

It is seen that in [37], only the test data volume is reducedas scan input selection unit only updates conflicting bits

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Table3

Testdatavolumeredu

ctionresults

with

ACO

Circuit

#SC=64

#SC=128

#SC=256

Azimipour

etal.[21]

Azimopour

etal.[37]

Zhang

etal.

[22]

ACO

Azimipour

etal.[21]

Azimopour

etal.[37]

Zhang

etal.

[22]

ACO

Azimipour

etal.[21]

Azimopour

etal.[37]

Zhang

etal.

[22]

ACO

s13207

68.40

58.20

71.40

72.30

77.30

67.80

79.60

78.54

79.40

69.20

81.40

83.87

s15850

45.50

33.70

47.77

48.03

62.10

44.50

63.00

63.00

63.10

51.60

64.20

65.90

s35932

33.30

07.30

36.20

35.90

66.40

20.20

67.70

68.20

75.20

26.00

76.40

77.04

s38417

48.10

32.70

51.10

50.76

59.30

42.90

61.50

62.00

59.70

48.20

61.90

61.96

s38584

51.40

35.40

54.70

56.50

60.30

48.20

62.80

61.65

71.80

55.60

73.50

74.30

Table4

Testapplicationtim

e(TAT)redu

ctionresults

with

ACO

Circuit

#SC=64

#SC=128

#SC=256

Azimipour

etal.[21]

Azimopour

etal.[37]

Zhang

etal.

[22]

ACO

Azimipour

etal.[21]

Azimopour

etal.[37]

Zhang

etal.

[22]

ACO

Azimipour

etal.[21]

Azimopour

etal.[37]

Zhang

etal.

[22]

ACO

s13207

70.30

51.20

72.60

72.83

73.70

64.10

74.68

73.80

80.30

66.20

82.65

84.05

s15850

50.60

31.50

53.70

53.51

65.40

38.00

65.95

67.26

67.10

43.80

68.09

69.52

s35932

44.70

09.60

46.30

45.72

68.90

15.10

70.35

72.30

72.50

18.80

74.07

74.28

s38417

50.60

30.30

53.70

52.77

56.40

35.80

58.61

59.21

63.20

43.40

65.61

65.42

s38584

59.40

31.70

60.80

62.32

65.10

43.30

66.03

65.47

73.60

51.60

75.14

76.52

336 J Electron Test (2020) 36:327–342

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internally and thus loading conflicting bits from ATE iseliminated and the test application time is almost similarto [24]. Thus, the test application time of paper [24] andpaper [21] are compared with the proposed method. It canbe observed in Table 4 that test application time (TAT)is reduced in most of the cases in comparison with theother related methodologies and the reason behind this isthe number of test data that needed to be updated wasreduced.

It can be seen in Table 3 for SC#64 that percentageof average improvement in compression ratio (CR)corresponding to five largest ISCAS’89 benchmark circuitsnamely s13207, s15850, s35932, s38417, s35854 are9.3%, 13.46%, 29.3%, 14.15% and 17.23%, respectivelywhen existing ant colony optimization algorithm (ACO)is applied. 1.34%, 0.06% and 3.2% improvement incompression ratio corresponding to the benchmark circuitsnamely s13207, s15850 and s35854, respectively, isobserved when compared with [22]. In case of SC#128,average improvement percentage in compression ratiocorresponding to benchmark circuits s13207 and s38584is 9.17% and 10.6%, respectively. Compression ratio (CR)improvement with respect to the most recent circular scantest based compression method [22] corresponding to thebenchmark circuits namely s13207 and s35854 is 3% and1%, respectively.

In case of the SC#128 in Table 4, 19.10% improvementin average percentage reduction in test application time(TAT) in the benchmark circuit s15850 is obtained byapplying ACO and an improvement of 1.9% in TATreduction is seen in comparison to the very recentcircular scan test based compression method propoed in[22]. Against scan chain length of 256 i.e., SC#256,an improvement of 9.79% in the average reduction inTAT is recorded corresponding to the benchmark circuits13207 and an improvement of 1.69% in TAT reductionis seen in comparison to the very recent circular scantest based compression method in [22]. An averageimprovement in TAT reduction of 21.83% is noticed inSC#64 corresponding to the benchmark circuit s38584 andan improvement of 2.03% is observed in comparison withcircular scan test based compression method in [22].

Observing the experimental results shown in Tables 3and 4, it can be inferred that the existing ant colonyoptimization algorithm has the edge over other relevantmethodologies in respect of reduction of test data volumeand test application time in most of the cases and the keyconcept is to minimize the number of conflicting bits neededto be updated, so that corresponding test data volume andtest. This initial edge of ant colony algorithms has motivatedus to modify the meta-heuristic of ant colony for improvingthese results further and mutation was also incorporated intothe process in this direction.

In our proposed scheme, the ant colony meta-heuristicsare modified and mutation is applied so that numbers ofconflicting bits can be further reduced through test setreordering which results in further improvement in testdata compression ratio and also improved reduction in testapplication time compared with the results obtained withexisting ACO in Tables 3 and 4.

In Table 5, percentage of average improvement incompression ratio (CR) for #SC = 64 corresponding to thecircuits namely s13207, s15850, s35932, s38417, s35854are 15.03%, 21%, 29.3%, 24.34% and 30.49%, respectivelyand percentage of improvement in compression ratio withrespect to the work in [22] corresponding to the benchmarkcircuits namely s13207, s15850, s35854 are 6.33%, 7.38%and 12.52%, respectively. Average improvement percentagein compression ratio for #SC = 128 corresponding tobenchmark circuits s13207, s35932 and s38417 is 8.48%,40.29% and 21.63%, respectively. Compression ratio (CR)improvement with respect to the most recent circular scantest based compression method in [22] corresponding to thebenchmark circuits namely s15850 and s38417 is 8.57% and7.92%, respectively.

In case of the #SC = 128, significant improvement(22.05%) in average reduction % of test application time(TAT) is observed corresponding to the benchmark cir-cuit s15850 and 3% improvement in TAT reduction isobserved when we compare with the work in [22]. In caseof #SC = 64, an improvement of 4.93% and 6.52% TATreduction corresponding to the benchmark circuits s13207and s38584 respectively, is recorded while comparing with[22]. In case of SC#256, a 7.15% reduction in TAT corre-sponding to benchmark s35932 is achieved when comparedwith [22].

If we compare the experimental results given in Tables 5and 6 obtained by applying existing ACO algorithmwith the outcomes of the proposed MCACO approachtabulated in Tables 5 and 6, it can be easily observedthat this proposed scheme outperformed other relevantmethodologies including existing ACO algorithm in respectof reduction of test data volume and test application time inmost of the cases.

In Table 7, 23.08% improvement in compression ratiocorresponding to ITC’99 benchmark circuit b17 for scanchain length #SC = 64, is recorded when comparedwith [22]. In the same scan chain length, 11.85%reduction in TAT for the benchmark circuit b22, isachieved in comparison to [22]. 11% improvement incompression ratio for #SC = 128 corresponding to ITC’99benchmark circuit b20, is recorded when compared with[22]. 9.4% improvement in compression ratio and 12.46%improvement in TAT reduction corresponding to ITC’99benchmark circuit b15 for scan chain(#SC = 256), isrecorded when compared with [22]. 9.6% improvement in

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Table5

Com

parisonof

testdatavolumereductionafterapplying

MCACO

Circuit

#SC=64

#SC=128

#SC=256

Azimipour

etal.[21]

Azimopour

etal.[37]

Zhang

etal.[22]

Proposed

Azimipour

etal.[21]

Azimopour

etal.[37]

Zhang

etal.

[22]

Proposed

Azimipour

etal.[21]

Azimopour

etal.[37]

Zhang

etal.

[22]

Proposed

s13207

68.40

58.20

71.40

75.92

77.30

67.80

79.60

81.25

79.40

69.20

81.40

85.20

s15850

45.50

33.70

47.77

51.30

62.10

44.50

63.00

68.40

63.10

51.60

64.20

68.45

s35932

33.30

07.30

36.20

37.92

66.40

20.20

67.70

72.15

75.20

26.00

76.40

81.10

s38417

48.10

32.70

51.10

54.67

59.30

42.90

61.50

66.37

59.70

48.20

61.90

65.53

s38584

51.40

35.40

54.70

61.55

60.30

48.20

62.80

65.82

71.80

55.60

73.50

75.50

Table6

Com

parisonof

testapplicationtim

ereductionafterapplying

MCACO

Circuit

#SC=64

#SC=128

#SC=256

Azimipour

etal.[21]

Azimopour

etal.[37]

Zhang

etal.

[22]

Proposed

Azimipour

etal.[21]

Azimopour

etal.[37]

Zhang

etal.

[22]

Proposed

Azimipour

etal.[21]

Azimopour

etal.[37]

Zhang

etal.

[22]

Proposed

s13207

70.30

51.20

72.60

76.18

73.70

64.10

74.68

78.50

80.30

66.20

82.65

86.14

s15850

50.60

31.50

53.70

55.25

65.40

38.00

65.95

69.23

67.10

43.80

68.09

72.54

s35932

44.70

09.60

46.30

47.12

68.90

15.10

70.35

75.38

72.50

18.80

74.07

76.22

s38417

50.60

30.30

53.70

54.75

56.40

35.80

58.61

63.09

63.20

43.40

65.61

68.94

s38584

59.40

31.70

60.80

64.77

65.10

43.30

66.03

67.17

73.60

51.60

75.14

79.02

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Table7

Testdatavolumeandtatreductio

nby

MCACOon

ITC’99circuit

BM

#SC=64

#SC=128

#SC=256

CR

TAT

CR

TAT

CR

TAT

Zhang

etal.[22]

Prop.

Zhang

etal.[22]

Prop.

Zhang

etal.[22]

Prop.

Zhang

etal.[22]

Prop.

Zhang

etal.[22]

Prop.

Zhang

etal.[22]

Prop.

b14

44.4

45.7

42.1

44.5

47.0

50.2

48.2

50.1

52.3

54.5

45.3

47.2

b15

27.9

29.3

30.6

32.1

41.2

45.5

43.7

45.3

35.1

38.4

31.3

35.2

b17

15.6

19.2

15.8

17.2

20.7

21.2

25.9

26.5

21.1

23.9

15.6

17.1

b20

23.8

26.4

25.4

27.3

20.9

23.2

28.0

29.0

33.6

33.9

27.2

28.5

b21

31.0

34.1

23.7

25.1

32.5

33.3

35.4

37.2

32.9

34.2

24.8

24.9

b22

33.9

37.1

27.0

30.2

35.4

36.7

36.1

37.4

32.4

35.1

28.1

29.9

Fig. 7 Comparison of Compression Ratio in SC#64

Fig. 8 Comparison of TAT Reduction in SC#128

Fig. 9 Comparison of Compression Ratio in SC#256

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Fig. 10 Compression Ratio Comparison ACO vs. MCACO in SC#64

TAT reduction corresponding to ITC’99 benchmark circuitb17, is recorded when compared with [22].

Besides, if we carefully observe the experimental results,it can be found out easily that the test application time (TAT)reduction and compression ratio are very much varying innature for different circuits and this is simply because ofheterogeneous distributions of 0, 1 and X (denotes the don’tcare (X) bits that can be set as 0 or 1) corresponding to thetest sets of different ISCAS’89 circuits. For those circuitswith more Xs and more compatible bits (two bits haveidentical data or one of X), the corresponding number ofconflicting bits is smaller, so the bits that need to be updatedare fewer, which would reduce the test data volume andtest application time. Quantity of don’t care (X) bits andconflicting bits play vital role in reducing test data volumeand test application time. Presence of conflicting data bitsin large numbers consequently reduces the probability of

Fig. 11 TAT Comparison ACO vs. MCACO in SC#128

Fig. 12 Comparison of Compression Ratio: MCACO vs. [22] inSC#64

test data volume minimization and test application timereduction.

Column bar graph in Fig. 7, graphically illustrates thecomparison of compression ratio corresponding to differentISCAS’89 benchmark circuits namely s13207, s15850,s35932, s38417, s35854 against scan chain #SC = 64.Likewise, Fig. 8 shows the comparison of test applicationtime(TAT) corresponding to above mentioned ISCAS’89benchmark circuits against scan chain #SC = 128. It canbe seen in Fig. 8 that the highest compression ratio isachieved for the circuit s13207 and this is because of thefact that corresponding conflicting bits between the previousresponse and next pattern are very less, hence the testdata volume and test application time reductions are bothimpressive compared with other circuits. Similarly, Fig. 9represents a comparing bar graph corresponding to SC#256showing compression ratio of different approaches incolumn bar. Figure 10 shows compression ratio comparison:MCACO vs. ACO in SC#64. Comparison of TAT reductioncorresponding to SC#128 in MCACO and ACO is shownin Fig. 11. In Fig. 12 compression ratio based comparisonbetween proposed MCACO approach and the methodproposed in [22] corresponding to SC#64 is shown.

7 Conclusion

This paper proposed an improved scheme for test datacompression in the circular scan test environment and theprimary focus has been on reducing the test data volumeand test application time. As detailed in the precedingsections, the response of the previous pattern is used asthe next patterns’ template in circular test application andthe volume of conflicting bits has a direct influence on

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compression ratio and test application time. Hence, thevolume of such conflicting bits is minimized in order toget better compression ratio and test application time. Acorrespondence between conflicting bit minimization andthe traveling salesman problem (TSP) is established herefor solving TSP with the help of modified ant colony meta-heuristics. In the circumstances, deployment of flexibletechniques becomes worth gaining as there is hardly anyfeasible restriction on the number of input test vectorskeeping in view of the fact that performance of several otheroptimization approaches tend to fall with the increase inpopulation size (i.e., number of of test vectors in this case).Aiming towards devising a flexible scheme of solution,we opt to modify the pheromone update meta-heuristicsof bio-inspired ant colony optimization model in alliancewith genetic mutation process wherever necessary and thismodified meta-heuristic is further customized in accordancewith the domain of the problem to yield optimal results.

Experimental results justify our claim of notableimprovement in compression ratio and test applicationtime (TAT) reduction over various recent methods. Ourproposed method outperforms other methods compared inthis paper by 20.70% average improvement in compressionratio and 19% average improvement in TAT reduction.In this paper, we have only modified the pheromoneupdate meta-heuristic of ant colony optimization techniqueleaving behind the scope of modifying the other slantsof ant colony method and this may even yield furtherimproved results in terms of compression ratio and testapplication time reduction in circular scan based testapplications. Even if a guided mutation is applied in placeof random mutation, there is a probability of further 2%to 3% average improvement in compression ratio and testapplication time. When a guided mutation is incorporated inMCACO approach, it is observed that percentage of averageimprovement in compression ratio (CR) over the MCACOwith random mutation for #SC = 64 corresponding to thecircuits namely s13207 and s15850 is 2.03% and 2.1%,respectively. Hence, if it is applied for all the circuits, it isexpected that further improvement in results is very muchachievable and future work can be extended in this direction.

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Sanjoy Mitra received the B.E. and M.Tech. degree in ComputerScience and Engineering from Tripura Engineering College (PresentlyNational Institute of Technology, Agartala) and Tripura University(A Central University), Agartala, India, respectively. He is currentlypursuing the Ph.D. from the Computer Science and EngineeringDepartment, Triguna Sen School of Technology, Assam University,Silchar, India. He is working as Assistant Professor in the Departmentof Computer Science and Engineering in Tripura Institute ofTechnology, Agartala, India. His research interests include the lowpower VLSI testing approaches and test data compression algorithms.

Debaprasad Das received the B.Sc. (Hons.) degree in physics fromVidyasagar University, Midnapore, India, in 1995, the B.Tech. degreein radiophysics and electronics from University of Calcutta, Kolkata,India in 1998, the M.E. degree in electronics and telecommunicationengineering from the Jadavpur University, Kolkata, in 2006 and Ph.D.degree at the School of VLSI Technology from Indian Institute ofEngineering Science and Technology (formerly Bengal Engineeringand Science University), Shibpur, Howrah, India in 2013. From 1998to 2003, he was a Senior Engineer at the ASIC Product DevelopmentCentre, Texas Instruments, Bangalore, India. From 2003 to 2013, hewas an Assistant Professor in Dept. of ECE, Meghnad Saha Instituteof Technology, Kolkata, India. He joined the Department of ECE,Assam University, Assam, India, in 2013, where he is currently a FullProfessor. He has authored or coauthored several research papers innational and international conferences and journals. He is also theauthor of the books VLSI Design, and VHDL: Design, Synthesisand Simulation (New Delhi, India: Oxford Univ. Press, 2015 and2018), and co-authored the book Carbon nanotube and Graphenenanoribbon interconnect (Taylor & Fancies USA: CRC. Press, 2014).His research interests include VLSI design, developing of electronicdesign automation tools for interconnect modeling, analyzing crosstalkand reliability, digital CMOS logic design, modeling of nanoelectronicdevices and interconnects, and Internet of Things (IoT). Das is a SeniorMember of the IEEE.

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