an943 practical picmicro® oscillator analysis and...

AN943Practical PICmicro® Oscillator Analysis and Design

INTRODUCTION

There is a wealth of information written on the subjectof designing and analyzing oscillator circuits. Sourcesrange from academic and research papers to industrygenerated application guides. It is a daunting task forthe embedded designer to work through all the avail-able and sometimes conflicting information. All thedesigner is really interested in is a simple set of rulesresulting in a reliable oscillator design that will workdespite crystal aging, deviations between devices,temperature or voltage. The problem is the simpleCrystal Pierce Gate Oscillator (Figure 1) has a “simpli-fied” model (Figure 2) that is anything but simple. Noneof the values are fixed. Some vary with process, age,temperature and voltage. Some components have anonlinear behavior with amplitude.

FIGURE 1: THE CRYSTAL PIERCE GATE OSCILLATOR

The purpose of this document is to explain the mostcritical aspects to designing and analyzing a reliablePICmicro MCU based oscillator.

The conditions for oscillation will be addressed in thefirst part of the document. The second part will look intothe behavior of the crystal as part of a resonant tankand how the tank in turn, behaves when connected tothe PICmicro device’s driver to form an oscillator. Thethird part of the document discusses the typical gainheadroom that an oscillator circuit needs to ensurereliable operation. The last section of the documentintroduces the reader to Negative Resistance Testing(NRT); a very simple yet reliable test that can evaluatean oscillator’s performance.

FIGURE 2: A SIMPLIFIED MODEL OF THE PRACTICAL OSCILLATOR

Author: Ruan LourensMicrochip Technology Inc.

OSC1 OSC2

C1 C2

X1

Note: Reading application notes AN826, CrystalOscillator Basics and Crystal Selection forrfPIC™ and PICmicro® Devices andAN849, Basic PICmicro® OscillatorDesign prior to reading this applicationnote is recommended. Conceptsexplained in the AN826 and AN849 areassumed to be prior knowledge.

Note: The analysis in section two is done as asimulation study, but could also be done inthe lab with the correct setup as described inSection “Simulation Of The Oscillator'sOpen-Loop Response”.

+

-2.8 MΩ

3.5 pF

+-

8.9 kΩ-20V/V

Co4.5 pF

33ΩRm Cm

0.01407 pF18 pFC1

18 pFC2

15 pF

18 mH

Lm

Driver Crystal

Voltage Amplifier

2004 Microchip Technology Inc. DS00943A-page 1

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THE BARKHAUSEN CRITERIA

To achieve oscillation, the circuit must meet theBarkhausen criteria. The Barkhausen criteria statesthat the circuit must have a loop gain of unity or greater,and have a phase shift that is a multiple of 360°.

FIGURE 3: THE OSCILLATOR LOOP SHOWING TANK AND DRIVER PORTIONS

The driver portion of the oscillator circuit (Figure 3) isinternal to the microprocessor. The external resonanttank consists of the crystal and the two load capacitorsC1 and C2. The common reasoning is that the tank pro-vides 180° of phase shift at the resonant frequency frwith some signal attenuation. To meet the Barkhausencriteria, the driver must have sufficient voltage gain toensure a total loop gain of unity or greater, and it mustsupply an additional 180° of phase shift. However, thiscommon path of reasoning is not correct, especially atthe higher frequencies in the megahertz ranges.

The reality of the design is that the driver providespower gain, not necessarily a voltage gain. At higherfrequencies, the driver circuit has more than 180° ofphase shift and can have a voltage gain less than unitywhen loaded. The passive resonant tank provides themissing voltage gain.

The rest of this document will use a generalizedPICmicro MCU HS mode driver as an analysis examplewith a typical 10 MHz crystal. The load capacitors C1and C2 are assumed to be equal to 18 pF.

THE PASSIVE RESONANT TANK

The resonant tank, shown in Figure 4, uses the equiv-alent of a 10 MHz crystal driven by a source voltagewith an output impedance RSOURCE. The output ismeasured at C1, which would be the input to the driverin a completed oscillator.

FIGURE 4: RESONANT TANK

Driver

C1 C2

X1

ResonantTank

Note: These are general models and a specificdevice will vary greatly, but the sameanalysis techniques can be used.

18 pFC1

18 pFC2

+

-

4.5 pF

CO

Cm LmRm OutputRSOURCE

33Ω 0.01407 pF18 mH

10 MHz Crystal

DS00943A-page 2 2004 Microchip Technology Inc.

AN943

The response of the passive resonant tank is shown inFigure 5, where RSOURCE is equal to 50Ω. It shows thecrystal series resonant frequency, fs, and anti-resonantfrequency, fa. It further shows the tank gain at 180°phase shift. At 180° of phase shift, the tank doesattenuate the signal, but the passive gain increases asthe frequency lowers towards fs. It is important to pointout that the maximum gain of the passive tank, at fs, willreduce as the source impedance is increased. Thereduction in gain is a result of lowering the Q or qualityfactor.

The maximum gain frequency will also move as thesource resistance is increased, because C2 is essen-tially shunted by a low-source impedance with littleinfluence on the tank. The influence of the sourceimpedance is shown in Figure 6 with the gray curverepresenting 50Ω and the black curve a 500Ω sourceimpedance.

FIGURE 5: AC RESPONSE OF PASSIVE 10 MHz RESONANT TANK

AC Analysis

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Gai

n [

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180° Phase PointAnti-Resonance fa

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Ph

ase

[Deg

]

Possible fr


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FIGURE 6: INFLUENCE OF SOURCE IMPEDANCE ON RESONANT TANK

50Ω

50Ω

AC Analysis

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-20

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Gai

n [

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500Ω

-220

-180

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-100

-60

-20

20

10.000 10.005 10.010 10.015 10.020

Freq [MHz]

Ph

ase

[Deg

]

500Ω


AN943

ESR

An important, but often misunderstood subject, isreferred to as the tank's Equivalent Series Resistance(ESR). The ESR is the resistance that the tank exhibitsat the true series resonant frequency of the crystal or fs.The ESR is translated to the motional resistance Rm ofthe crystal, as shown in Equation 1.

EQUATION 1:

The ESR is translated as a function of the tank loadcapacitance CL and the shunt capacitance C0 of thecrystal. The load capacitance CL, as shown inEquation 1, is the serial combination of C1 and C2, asshown in Equation 2.

EQUATION 2:

ESR is often used in evaluations instead of themotional resistance Rm or R1. The exact positioning ofthe ESR is shown in Figure 7. The crystal's motionalresistance Rm and ESR are directly related to the Q ofthe tank. It is important to understand that an increasingQ (decreasing Rm) will increase the tanks passive gainand, therefore, gain headroom. Later in this documentNegative Resistance Testing (NRT) is introducedwhere some test resistance, RTEST, is deliberatelyplaced in this position to evaluate the performance ofthe total resonator.

The ESR for the circuit in Figure 7 is calculated to be74.25Ω at fs using Equation 1. However, this is not theresistance that the driver circuit is loaded by at theresonant frequency fr. The tank load at fr is typically anorder of magnitude larger than the ESR in thisfrequency range, as shown in Section “The DriverCircuit”.

THE DRIVER CIRCUIT

The PICmicro microcontroller’s oscillator circuittypically has three separate gain or mode settings; LP,XT and HS. The LP mode is normally used with tuningfork crystals in the low frequency ranges such as32 kHz watch crystals. The XT and HS modes haveprogressively more gain and are typically used forcrystals in the megahertz ranges. The perception isthat XT mode should be used in mid-frequency range,up to 4 MHz and HS, in the higher megahertzfrequency ranges. This should be seen as a guidelineand not as a hard-set rule. The data sheet for eachdevice should be consulted for supply voltage andtemperature ranges associated with each mode.

The small signal model for a typical(1) HS oscillator isshown in Figure 8. It can be thought of as an invertingamplifier, not a logic gate, with a gain(2) Gd of -20 or26 dB. It also has a low-pass filter in the output path thatcauses the output gain to drop with frequency. Theoutput pole also causes a phase delay in the outputvoltage. The simulated output response of the driver(see Figure 9) is given when driven by a low-impedancesource into OSC1 and the output is taken at OSC2.

FIGURE 7: PLACEMENT OF THE ESR AND THE MOTIONAL RESISTANCE

ESR = Rm (1+CO/CL)2

CL = C1 x C2

C1 + C2

Note 1: This is only a typical model and themodel changes between differenttypes of PICmicro devices. The modelalso varies from part-to-part as afunction of manufacturing, supplyvoltage, temperature, etc.

2: Gain is expressed as either a dimension-less number such as “10” or in dB whereG[dB] = 20 • Log(VIN/VOUT).

18 pFC1

18 pFC2

4.5 pF

Co

Cm LmRmESR

33Ω 0.01407 pF18 mH


AN943

FIGURE 8: TYPICAL OSCILLATOR DRIVER EQUIVALENT MODEL – HS MODE

FIGURE 9: SIMULATED AC RESPONSE OF DRIVER – SMALL SIGNAL CASE IN HS MODE

The AC response and the model shown in Figure 8 andFigure 9 are for the small signal case only. The driver isbased on a voltage amplifier with a low frequency gainof -20. The output gain of the driver is reduced withincreasing frequency due to the output pole formed bya CD2. The gain of the driver also falls off as the ampli-tude increases. This is an important aspect of thedriver, because gain is needed under start-up condi-tions to increase the oscillation amplitude. The gain ofthe driver gradually decreases with increasing oscilla-tion amplitude until the oscillator (driver and resonanttank) reaches unity gain. The large signal amplitude,where the oscillator reaches unity, is referred to as theSteady State Amplitude (SSA). The output pole resultsin a 3 dB cutoff frequency at 1.2 MHz. Any load that isconnected to the output of the driver will change theimpedance of the system and thus change its outputcharacteristics. As an example, the unloaded gain at10 MHz is about 7.5 dB, but is reduced to unity gainwith a 550Ω load. The resistive load also reduces thephase shift relative to the open-loop phase response.

+

-+-

RD2 8.9 kΩ

Gd = -20

CD2

15 pF

OSC1

CD1

3.5 pF

RD1

2.8 MΩ

OSC2

AC Analysis

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-5

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15

20

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30

0.01 0.1 1 10 100Freq [MHz]

Mag

nit

ud

e [d

B]

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60

80

100

120

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180

200

220

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ase

[Deg

]

Gain [dB]Phase [Deg]


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FIGURE 10: TYPICAL OSCILLATOR DRIVER EQUIVALENT MODEL – XT MODE

A typical(1) XT driver's equivalent model is shown inFigure 10. It is interesting that the gain is lower than theHS driver's gain, but it has a higher 3 dB frequency ofabout 1.8 MHz. This leads into the next stage of theanalysis, which is to connect the tank and the driver tostudy the open-loop response of the oscillator.

SIMULATION OF THE OSCILLATOR'S OPEN-LOOP RESPONSE

Figure 11 shows the simulation model for analyzing theopen-loop response of the oscillator under small signalstart-up conditions. The loop is opened at load capaci-tor C1, normally connected to the driver's input on pinOSC1. The input impedance of OSC1, consisting ofCD1 and RD1, is connected to C1 from where the outputis taken. The addition of the driver's input and outputimpedance needs to be taken into account as far as theESR is concerned. The ESR recalculates to about 60Ωwith a new CL of 13 pf, that was previously 9 pF.

FIGURE 11: OPEN-LOOP SIMULATION MODEL OF THE OSCILLATOR

The response of the open-loop model is shown inFigure 12. The black curve is the output and the graycurve is the tank-input signal. The resonant frequencyfr, at start-up, is greater where the phase is zero and thegain is unity or more, in accordance with theBarkhausen criteria. It is interesting to compare theoutput signal to the tank-input signal, as it shows thepredicted low ESR at fs, where the tank loads the out-put driver. Figure 12 shows that at fr, the tank's inputimpedance is significantly higher than the ESR. Fromthe simulation results, one can calculate the tank'sinput impedance at fr to be in the order of 1 kΩ, whichis significantly higher than the ESR at fs of 60Ω.

The analysis can be performed in the lab to validate thesimulation. It is important to realize that the circuit isvery sensitive to any loading by measurement probesor sockets. Therefore, it is necessary to use eitheractive probes or dedicated buffers when measure-ments are taken. Even very high input impedancebuffers have 1 or 2 pF of input capacitance, and thismust be taken into account by subtracting the buffer'simpedance from C1 and C2, as is necessary. Onesolution is to use a TI Burr-Brown OPA655 or OPA354operational amplifier as a unity gain buffer. The tracesfrom the point of measurement to the input of the buffershould be kept as short as possible. Try to make thetrace less than 1 cm.

+

-+-

RD2 10 kΩ

Gd = -4

CD2

9 pF

OSC1

CD1

3.5 pF

RD1

2.8 MΩ/MR

OSC2

Note 1: This is only a typical model, and themodel changes between different types ofPICmicro devices. The model also variesfrom part-to-part as a function of manu-facturing, supply voltage, temperature,etc.

18 pFC2

+

-

+-

+-

RD2

8.9KΩ-20V/V

15 pF

CD2

Tank Input

Tank Output/ESR

33Ω

Rm

0.01407 pF

Cm

18 mH

Lm

18 pFC1

3.5 pF

CD1

2.8 MΩ

RD1

Driver Input

Co

4.5 pF


AN943

Gain Headroom

The simulation in Figure 12 shows that there is about20 dB of gain headroom at the resonant frequency. Anygain above unity will cause the oscillation amplitude toincrease, or grow, and the higher the gain, the soonerone will reach the SSA where the gain is unity. The gainheadroom of the oscillator will be affected if any part ofthe oscillator changes, that has an affect on gain. Theresonant tank’s gain is reduced to 14 dB for a worstcase part (from a typical 20 dB), if it is known that theworst case driver is 6 dB lower than the typical driver.

It would seem as if the goal of designing the oscillatoris to get the maximum gain headroom, yet it is undesir-able to have too much gain. Excessive gain may causethe crystal to resonate at one of the crystal's overtonefrequencies. It can also result in an excessively largeSSA, exceeding the crystals drive level. A large SSAcan further cause unwanted distortion, noise andradiation. The goal is to have just enough gain toensure operation.

FIGURE 12: AC RESPONSE OF THE OSCILLATOR'S OPEN-LOOP ANALYSIS

AC Analysis

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fr

fs

fa

-90

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]

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fr


AN943

Limiting Gain Headroom And The Steady State Amplitude

A very effective method to reduce the maximum gain,and/or the SSA, is to add a series resistor Rs betweenthe output of the driver and the tank, as shown inFigure 13. Adding a voltage divider on the outputreduces the SSA and the unwanted effects of overdriving the crystal where this may be an issue. It alsoincreases the drive impedance to the tank, reducing itsQ and passive gain. The gain can again be increased ifthe requirement is only to reduce the SSA by imped-ance matching of the tank. The tank impedance match-ing is done by changing the size of C2, and typicallyinvolves increasing the value of C2, thus lowering thesource impedance to the tank. Increasing the value ofC2 requires that the value of C1 be decreased. This isto maintain CL, as specified by the crystal manufac-turer. Increasing the size of C2 beyond the idealimpedance will reduce the gain because it will overloadthe driver. A rule of thumb is to not make C2 more thantwice the size of C1 while maintaining CL. With theaddition of RS, one can ignore the influence of CD2 onCL, assuming that RS > 1/(2π•fs•CL).

Another advantage of adding RS is that it forms a low-pass filter with C1, reducing the chances of overtoneoscillation. It can also reduce the start-up period of thetank because it adds thermal noise and increases thephase delay to the tank. Decreasing the start-up periodwith the addition of RS will be more noticeable withlower frequency designs that operate below the 3 dBfrequency of the driver’s output pole.

FIGURE 13: THE POSITION OF RS AND RTEST IN THE RESONANT TANK

It is strongly advised to add RS to the standard oscillatorcircuit in the final application, even if it is populated witha zero ohm resistor. Having the ability to add it to afuture design can prove helpful when migrating to adifferent microprocessor or changing the crystal. Theresistor RTEST is only needed when doing open-loopanalysis and NRT.

Choosing Gain Headroom

The preceding text explained the general behavior ofthe oscillator and how it is possible to change theoscillator’s gain, frequency, phase and amplituderesponse. The next part of the text will focus on choos-ing a typical gain headroom. The two variable factorsthat dictate the gain headroom requirement are thedrivers gain Gd and the crystal's motional resistanceRm. Practical devices have fairly consistent values forGd and Rm, but some parts do deviate from the typicalvalues within some limits. It is possible that some worstcase oscillators have a driver with a lowest possible Gdand a crystal with the highest possible Rm. The oscilla-tor's gain headroom, or GhO, should be high enough toensure that the oscillator is able to operate and start-upreliably with worst case devices. The GhO is theproduct of both the amplifier's gain headroomrequirement GhD and the crystal's gain headroomrequirement GhC, as per Equation 3.

EQUATION 3:

OSC1 OSC2

C1 C2

Rtest

RS

GhO = GhD x GhC


AN943

Driver Gain Headroom Guidelines

Microchip maintains matrix characterization parts forsome devices that go through deliberately skewedprocesses to determine the extremes of product varia-tion. One specific product's matrix variation in amplifiertrans conductance is shown in Table 1 below.

TABLE 1: EXAMPLE GAIN VARIATION AND GAIN HEADROOM OF A SPECIFIC HS DRIVER DATA AT 5 VDD(1)

One can make the generalized assumption that thetypical driver in Figure 8 has a mean Gd at room tem-perature of -20. The worst case Gd at 125°C would bethe typical Gd times the variation, or -20 x 0.65 = -13,and the best would be at -40°C being -20 x 1.6 = -32.

The driver's GhD, from a typical room temperature partto a worst case part at 125°C, is the inverse of the vari-ation as 1/0.65 or 1.54. This means that if one ignoresthe variation of the crystal that a typical oscillator withgain headroom of 1.54 (3.75 dB) will still meet theBarkhausen criteria if replaced by a worst case part at125°C. The “Typical Gain Headroom” values are to beused if one uses a couple of truly typical parts foranalysis that have been randomly selected fromdifferent manufacturing lots. However, if one only has asmall number of parts, then it is safer to use the”Maximum Gain Headroom” values that assume theanalysis was done with maximum gain parts.

There are two methods to account for the gain reduc-tion from the typical oscillator. The first is well suited foranalysis, and that is to simply change Gd in theequivalent model. The second method is well suited forlab analysis, and that is to introduce RTEST. The gain ofthe tank is inversely proportional to ESR. One needs toadd RTEST, as per Equation 4, which will reduce atypical oscillator's gain by the appropriate value.

EQUATION 4: USED TO CALCULATE RTEST VALUE TO ADD A TYPICAL OSCILLATOR

Example: A typical oscillator, with a crystal that has aRm = 33Ω, CO = 4.5 pf and CL = 13 pf. Calculate theRTEST value that will result in the same gain as a 125°Clowest gain device.

From Table 1, GhD = 1.54, Equation 4 is thencalculated as in Equation 5.

EQUATION 5:

Temp °CVariation Typical Gain Headroom GhD Maximum Gain Headroom GhD

Minimum Median Maximum Minimum Median Maximum Minimum Median Maximum

-40 1.17 1.41 1.6 N/A N/A N/A N/A N/A N/A

25 0.81 1 1.12 1.23 N/A N/A 1.38 1.12 N/A

125 0.65 0.79 1 1.54 1.27 N/A 1.72 1.42 1.12

Note 1: The values given in this table are for example only.

RTEST = RMTYPICAL (GhD – 1)(1 + CO/CL)2

RMTYPICAL – Typical motional resistance of crystalGhD – Gain headroom from Table 1

RTEST = 33(1.54 – 1)(1 + 4.5 pF/13 pF)2 = 32.3Ω


AN943

Crystal Gain Headroom Guidelines

The crystal's gain headroom requirement GhC can bebroken up into two parts; the first part is needed tocompensate for RM deterioration and the second is toensure good start-up. Crystal manufacturers havedifferent guidelines for variations in Rm. One reputablemanufacturer claims that the worst case values are nomore than 30% higher than the typical value. Themanufacturer also recommended that a total crystal,GhC = 3, be used to compensate for the 30% Rmdeterioration and start-up. This means that a gainheadroom of about 2 is sufficient for crystal start-upwith a comfortable safety margin, because it is not wiseto operate on the filter to oscillator margin. Equation 4is used in a similar manner to add RTEST when analyz-ing the crystal performance. Just the Rm deteriorationcomponent can be studied by using GhC = 1.3. Makesure that the oscillator still has a gain of 2 left over forstart-up. The alternative is to use the full GhC = 3 tocalculate RTEST, but then the oscillator should haveunity gain or greater.

The total oscillator GhO would thus be about 4.6 whenusing typical parts and approximately 5.2 when using asmall sample of parts. This would ensure properoperation at up to 125°C with a worst case driver andcrystal. This guideline is on par with some otherreputable crystal manufacturers’ guidelines to have aGhO of 5 to account for temperature and worst casepart deviations.

One problem is that most crystal manufacturers onlyspecify the worst case value for Rm, but the typical valuecan be measured, as shown in Figure 14. Place aknown source resistor in series with a signal generatorthat can be swept in 1 or 2 hertz steps around thecrystals operating frequency. A high-impedance probe isused to find the lowest output voltage, VOUT-MIN, at crys-tal's serial resonant frequency fs. The value for RSOURCE

should have a similar value as the expected value forRm. Using Equation 5, the value for Rm can then becalculated from VSOURCE, RSOURCE and VOUT-MIN.

FIGURE 14: SETUP TO DETERMINE Rm

EQUATION 6:

NEGATIVE RESISTANCE TESTING (NRT)

Negative Resistance Testing (NRT) is a very simpleand reliable test that can be performed without theneed for specialist equipment. NRT is done to validatean oscillator design, or used as a design basis.

To evaluate if an existing design or product has enoughgain headroom, one would add a resistor RTEST inseries with the crystal, as shown in Figure 13. It is notnecessary to make special provisions for the resistor;one can lift a lead or the side of the crystal package andplace a small 0603 surface mount resistor between thelead and the PCB pad. The resistor is then iterativelyincreased until the maximum value is reached wherethe oscillator starts up reliably. With RTESTMAX,calculate GhO. To do this, one needs the ESR, thetranslated motional resistance Rm (see Equation 1).The calculation is summarized in Equation 7 by thereordering of Equation 5.

EQUATION 7:

The load capacitance calculation should also includethe board capacitance (about 2-3 pF) and the driver’scapacitance, as shown in Equation 8.

EQUATION 8:+

-

RSOURCE

Output

Note: A tuning pot is not recommended as it hastoo much parasitic capacitive and induc-tive loading. However, it can be used toget within the right range.

Note: One can ignore the influence of CD2 on CLassuming that RS > 1/(2π•fs•CL).

Rm = VOUT • RSOURCE

VIN – VOUT

GhO = RTEST

ESR+ 1 =

RTEST

RMTYPICAL (1 + C0/CL)2

RMTYPICAL – Typical motional resistance of crystalGhO – Oscillator gain headroom

CL = (C1 + CD1) • (C2 + CD2)

C1 + CD1 + C2 + CD2+ CB


AN943

The test can then be repeated with a number of differ-ent parts and the results averaged to get typical results.The tests should be conducted with the lowestexpected supply voltage because the driver's gain issupply voltage dependent. The tests can be done atroom temperature or at the highest expectedtemperature, noting that the high temperature gainheadroom will be affected, as was discussed in theSection “Driver Gain Headroom Guidelines”. Onecan further consider simulating other environmentalconditions, such as humidity or radiation that thecircuitry may be exposed to.

To test proper start-up, it is best to write a firmwareroutine that periodically puts the part in Sleep mode andthen uses an interrupt, via a button push or WatchdogTime-out, to reset the part and go through a start-uproutine. Make sure that there is enough Sleep time tohave the oscillator completely stop. Do not simplyswitch the whole circuit off and on because this intro-duces a sharp transient that helps the start-up process.Another practical tip is to not use sockets unless thefinal product uses a socket for the PICmicro device.

Some crystal manufacturers use the followingterminology with NRT:

• RTESTMAX is referred to as the “safety margin”• “Oscillation allowance” is referred to as the “safety

margin” plus ESR

A ratio is specified between oscillation allowance andESR, which is the same as the definition for gainheadroom or GhO in this document.

Negative Resistance Testing (NRT) as a Design Tool

NRT can be used very effectively during the designprocess. The first step is to choose a specific frequencycrystal from a reputable crystal manufacturer. Choosea GhC based on the crystal manufacturer's specifica-tions in Rm and start-up requirements, that also incor-porate some safety buffer. Next, choose a GhD basedon the driver variations for the specific PICmicro MCUused. The values in Table 1 are good guideline values.With a total target gain headroom, one can calculateRTEST, a rule of thumb; GhD ≈ 5. Capacitors C1 and C2are calculated using Equation 7, based on the crystalmanufacturers recommended CL value. Make C1 andC2 equal in value, but do not include CD2 in the calcu-lation because RS will be used. With the calculatedvalues for RTEST, C1 and C2 and the data sheetrecommended Oscillator mode, find the maximum RSresistor value with RTEST in place where the oscillatorstarts up reliably. If RSMAX > 1/(2π•fs•CL), then theprocess design is done. If not, use the impedancematching guidelines under the Section “LimitingGain Headroom And The Steady State Amplitude”to increase the gain. Also, try a higher gain mode ifpossible, as an example try using HS instead of XT.

CONCLUSION

It is possible to analyze in simulation and in the lab whatthe small signal gain or gain headroom of an oscillatoris. It is important that the oscillator have enough gain toensure reliable start-up and operation even with worstcase devices. A method is given to choose a safe gainheadroom and how one can simulate the effects ofworst case devices by introducing a test resistor in theresonant tank. The design can be verified by a simplebut effective negative resistance test, which can also beused during the design of the oscillator tank.


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The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.

AmpLab, FilterLab, MXDEV, MXLAB, PICMASTER, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.

All other trademarks mentioned herein are property of their respective companies.

© 2004, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.

Printed on recycled paper.

DS00943A-page 13

Microchip received ISO/TS-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona and Mountain View, California in October 2003. The Company’s quality system processes and procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.


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